diff options
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/cpp.texi | 4 | ||||
| -rw-r--r-- | gcc/doc/cppopts.texi | 4 | ||||
| -rw-r--r-- | gcc/doc/extend.texi | 295 | ||||
| -rw-r--r-- | gcc/doc/install.texi | 20 | ||||
| -rw-r--r-- | gcc/doc/invoke.texi | 89 | ||||
| -rw-r--r-- | gcc/doc/md.texi | 337 | ||||
| -rw-r--r-- | gcc/doc/sourcebuild.texi | 4 | ||||
| -rw-r--r-- | gcc/doc/tm.texi | 35 | ||||
| -rw-r--r-- | gcc/doc/tm.texi.in | 35 |
9 files changed, 606 insertions, 217 deletions
diff --git a/gcc/doc/cpp.texi b/gcc/doc/cpp.texi index c463e7c2a82..682ee9f1161 100644 --- a/gcc/doc/cpp.texi +++ b/gcc/doc/cpp.texi @@ -2352,6 +2352,10 @@ use. This macro is defined, with value 2, when @option{-fstack-protector-all} is in use. +@item __SANITIZE_ADDRESS__ +This macro is defined, with value 1, when @option{-fsanitize=address} is +in use. + @item __TIMESTAMP__ This macro expands to a string constant that describes the date and time of the last modification of the current source file. The string constant diff --git a/gcc/doc/cppopts.texi b/gcc/doc/cppopts.texi index a2eb79d06f9..37e0b7b57ff 100644 --- a/gcc/doc/cppopts.texi +++ b/gcc/doc/cppopts.texi @@ -564,6 +564,10 @@ Accept universal character names in identifiers. This option is experimental; in a future version of GCC, it will be enabled by default for C99 and C++. +@item -fno-canonical-system-headers +@opindex fno-canonical-system-headers +When preprocessing, do not shorten system header paths with canonicalization. + @item -fpreprocessed @opindex fpreprocessed Indicate to the preprocessor that the input file has already been diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 43b21c6231f..f34f0f955e9 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -339,6 +339,7 @@ serves as a jump table: static void *array[] = @{ &&foo, &&bar, &&hack @}; @end smallexample +@noindent Then you can select a label with indexing, like this: @smallexample @@ -601,7 +602,7 @@ an inline function. It can be used only in inline functions that are always inlined, never compiled as a separate function, such as those using @code{__attribute__ ((__always_inline__))} or @code{__attribute__ ((__gnu_inline__))} extern inline functions. -For example following does link or runtime checking of open +For example following does link- or run-time checking of open arguments for optimized code: @smallexample #ifdef __OPTIMIZE__ @@ -916,7 +917,7 @@ examine and set these two fictitious variables with your debugger. @cindex @code{W} floating point suffix @cindex @code{Q} floating point suffix -As an extension, the GNU C compiler supports additional floating +As an extension, GNU C supports additional floating types, @code{__float80} and @code{__float128} to support 80-bit (@code{XFmode}) and 128-bit (@code{TFmode}) floating types. Support for additional types includes the arithmetic operators: @@ -1000,7 +1001,7 @@ as library calls. @cindex @code{DD} integer suffix @cindex @code{DL} integer suffix -As an extension, the GNU C compiler supports decimal floating types as +As an extension, GNU C supports decimal floating types as defined in the N1312 draft of ISO/IEC WDTR24732. Support for decimal floating types in GCC will evolve as the draft technical report changes. Calling conventions for any target might also change. Not all targets @@ -1106,7 +1107,7 @@ extension for floating-point constants of type @code{float}. @cindex @code{ULK} fixed-suffix @cindex @code{ULLK} fixed-suffix -As an extension, the GNU C compiler supports fixed-point types as +As an extension, GNU C supports fixed-point types as defined in the N1169 draft of ISO/IEC DTR 18037. Support for fixed-point types in GCC will evolve as the draft technical report changes. Calling conventions for any target might also change. Not all targets @@ -1218,7 +1219,7 @@ Fixed-point types are supported by the DWARF2 debug information format. @section Named Address Spaces @cindex Named Address Spaces -As an extension, the GNU C compiler supports named address spaces as +As an extension, GNU C supports named address spaces as defined in the N1275 draft of ISO/IEC DTR 18037. Support for named address spaces in GCC will evolve as the draft technical report changes. Calling conventions for any target might also change. At @@ -1280,7 +1281,7 @@ Objects in this address space are located in @code{.progmem.data}. @b{Example} -@example +@smallexample char my_read (const __flash char ** p) @{ /* p is a pointer to RAM that points to a pointer to flash. @@ -1301,7 +1302,7 @@ int main (void) /* Return 17 by reading from flash memory */ return array[array[i]]; @} -@end example +@end smallexample @noindent For each named address space supported by avr-gcc there is an equally @@ -1309,7 +1310,7 @@ named but uppercase built-in macro defined. The purpose is to facilitate testing if respective address space support is available or not: -@example +@smallexample #ifdef __FLASH const __flash int var = 1; @@ -1327,7 +1328,7 @@ int read_var (void) return (int) pgm_read_word (&var); @} #endif /* __FLASH */ -@end example +@end smallexample @noindent Notice that attribute @ref{AVR Variable Attributes,,@code{progmem}} @@ -1345,7 +1346,7 @@ together with attribute @code{progmem}. @item Reading across the 64@tie{}KiB section boundary of the @code{__flash} or @code{__flash@var{N}} address spaces -shows undefined behaviour. The only address space that +shows undefined behavior. The only address space that supports reading across the 64@tie{}KiB flash segment boundaries is @code{__memx}. @@ -1367,10 +1368,12 @@ as immediates into operands of instructions. @item The following code initializes a variable @code{pfoo} located in static storage with a 24-bit address: -@example +@smallexample extern const __memx char foo; const __memx void *pfoo = &foo; -@end example +@end smallexample + +@noindent Such code requires at least binutils 2.23, see @w{@uref{http://sourceware.org/PR13503,PR13503}}. @@ -1404,6 +1407,7 @@ belonging to another address space by qualifying the type with the extern int __ea i; @end smallexample +@noindent The compiler generates special code to access the variable @code{i}. It may use runtime library support, or generate special machine instructions to access that address @@ -1463,14 +1467,14 @@ initialized, as if they were flexible arrays. In addition to those cases that were useful, it also allowed initializations in situations that would corrupt later data. Non-empty initialization of zero-length arrays is now treated like any case where there are more initializer -elements than the array holds, in that a suitable warning about "excess -elements in array" is given, and the excess elements (all of them, in +elements than the array holds, in that a suitable warning about ``excess +elements in array'' is given, and the excess elements (all of them, in this case) are ignored. Instead GCC allows static initialization of flexible array members. This is equivalent to defining a new structure containing the original structure followed by an array of sufficient size to contain the data. -I.e.@: in the following, @code{f1} is constructed as if it were declared +E.g.@: in the following, @code{f1} is constructed as if it were declared like @code{f2}. @smallexample @@ -1620,6 +1624,7 @@ example: #define debug(format, ...) fprintf (stderr, format, __VA_ARGS__) @end smallexample +@noindent Here @samp{@dots{}} is a @dfn{variable argument}. In the invocation of such a macro, it represents the zero or more tokens until the closing parenthesis that ends the invocation, including any commas. This set of @@ -1634,6 +1639,7 @@ argument. Here is an example: #define debug(format, args...) fprintf (stderr, format, args) @end smallexample +@noindent This is in all ways equivalent to the ISO C example above, but arguably more readable and descriptive. @@ -1661,6 +1667,7 @@ used with the token paste operator, @samp{##}. If instead you write #define debug(format, ...) fprintf (stderr, format, ## __VA_ARGS__) @end smallexample +@noindent and if the variable arguments are omitted or empty, the @samp{##} operator causes the preprocessor to remove the comma before it. If you do provide some variable arguments in your macro invocation, GNU CPP @@ -1693,7 +1700,7 @@ yet been replaced with spaces. In ISO C99, arrays that are not lvalues still decay to pointers, and may be subscripted, although they may not be modified or used after the next sequence point and the unary @samp{&} operator may not be -applied to them. As an extension, GCC allows such arrays to be +applied to them. As an extension, GNU C allows such arrays to be subscripted in C90 mode, though otherwise they do not decay to pointers outside C99 mode. For example, this is valid in GNU C though not valid in C90: @@ -2072,7 +2079,7 @@ hack ((union foo) x); @cindex code, mixed with declarations ISO C99 and ISO C++ allow declarations and code to be freely mixed -within compound statements. As an extension, GCC also allows this in +within compound statements. As an extension, GNU C also allows this in C90 mode. For example, you could do: @smallexample @@ -2123,10 +2130,11 @@ attributes are currently defined for functions on all targets: @code{weak}, @code{malloc}, @code{alias}, @code{ifunc}, @code{warn_unused_result}, @code{nonnull}, @code{gnu_inline}, @code{externally_visible}, @code{hot}, @code{cold}, @code{artificial}, -@code{error} and @code{warning}. Several other attributes are defined -for functions on particular target systems. Other attributes, -including @code{section} are supported for variables declarations -(@pxref{Variable Attributes}) and for types (@pxref{Type Attributes}). +@code{no_address_safety_analysis}, @code{error} and @code{warning}. +Several other attributes are defined for functions on particular +target systems. Other attributes, including @code{section} are +supported for variables declarations (@pxref{Variable Attributes}) +and for types (@pxref{Type Attributes}). GCC plugins may provide their own attributes. @@ -2151,6 +2159,7 @@ void __f () @{ /* @r{Do something.} */; @} void f () __attribute__ ((weak, alias ("__f"))); @end smallexample +@noindent defines @samp{f} to be a weak alias for @samp{__f}. In C++, the mangled name for the target must be used. It is an error if @samp{__f} is not defined in the same translation unit. @@ -2198,6 +2207,7 @@ void* my_calloc(size_t, size_t) __attribute__((alloc_size(1,2))) void my_realloc(void*, size_t) __attribute__((alloc_size(2))) @end smallexample +@noindent declares that @code{my_calloc} returns memory of the size given by the product of parameter 1 and 2 and that @code{my_realloc} returns memory of the size given by parameter 2. @@ -2272,7 +2282,7 @@ the current inlining parameters. If this attribute is used on a function declaration and a call to such a function is not eliminated through dead code elimination or other optimizations, an error that includes @var{message} is diagnosed. This is useful -for compile time checking, especially together with @code{__builtin_constant_p} +for compile-time checking, especially together with @code{__builtin_constant_p} and inline functions where checking the inline function arguments is not possible through @code{extern char [(condition) ? 1 : -1];} tricks. While it is possible to leave the function undefined and thus invoke @@ -2285,7 +2295,7 @@ functions or when not emitting debugging information. If this attribute is used on a function declaration and a call to such a function is not eliminated through dead code elimination or other optimizations, a warning that includes @var{message} is diagnosed. This is useful -for compile time checking, especially together with @code{__builtin_constant_p} +for compile-time checking, especially together with @code{__builtin_constant_p} and inline functions. While it is possible to define the function with a message in @code{.gnu.warning*} section, when using this attribute the problem is diagnosed earlier and with exact location of the call even in presence @@ -2324,6 +2334,7 @@ typedef int intfn (); extern const intfn square; @end smallexample +@noindent This approach does not work in GNU C++ from 2.6.0 on, since the language specifies that the @samp{const} must be attached to the return value. @@ -2403,9 +2414,9 @@ explicitly specify any other visibility. In previous versions of GCC, the @code{dllexport} attribute was ignored for inlined functions, unless the @option{-fkeep-inline-functions} flag -had been used. The default behaviour now is to emit all dllexported +had been used. The default behavior now is to emit all dllexported inline functions; however, this can cause object file-size bloat, in -which case the old behaviour can be restored by using +which case the old behavior can be restored by using @option{-fno-keep-inline-dllexport}. The attribute is also ignored for undefined symbols. @@ -2457,7 +2468,7 @@ and, for either of those two conditions, the class also has an inline constructor or destructor and has a key function that is defined in the current translation unit. -For Microsoft Windows based targets the use of the @code{dllimport} +For Microsoft Windows targets the use of the @code{dllimport} attribute on functions is not necessary, but provides a small performance benefit by eliminating a thunk in the DLL@. The use of the @code{dllimport} attribute on imported variables was required on older @@ -2544,7 +2555,7 @@ function pops the arguments off the stack. If the number of arguments is variable all arguments are pushed on the stack. The @code{thiscall} attribute is intended for C++ non-static member functions. -As gcc extension this calling convention can be used for C-functions +As a GCC extension, this calling convention can be used for C functions and for static member methods. @item format (@var{archetype}, @var{string-index}, @var{first-to-check}) @@ -2574,7 +2585,7 @@ interpreted, and should be @code{printf}, @code{scanf}, @code{strftime}, MinGW targets, @code{ms_printf}, @code{ms_scanf}, and @code{ms_strftime} are also present. @var{archtype} values such as @code{printf} refer to the formats accepted -by the system's C run-time library, while @code{gnu_} values always refer +by the system's C runtime library, while @code{gnu_} values always refer to the formats accepted by the GNU C Library. On Microsoft Windows targets, @code{ms_} values refer to the formats accepted by the @file{msvcrt.dll} library. @@ -2762,6 +2773,7 @@ static void (*resolve_memcpy (void)) (void) @} @end smallexample +@noindent The exported header file declaring the function the user calls would contain: @@ -2769,6 +2781,7 @@ contain: extern void *memcpy (void *, const void *, size_t); @end smallexample +@noindent allowing the user to call this as a regular function, unaware of the implementation. Finally, the indirect function needs to be defined in the same translation unit as the resolver function: @@ -2824,7 +2837,7 @@ Permissible values for these parameters are: @w{@code{reset}}, @w{@code{timer0}}, @w{@code{timer1}}, @w{@code{message}}, @w{@code{dma0}}, @w{@code{dma1}}, @w{@code{wand}} and @w{@code{swi}}. Multiple parameters indicate that multiple entries in the interrupt -vector table should be initialized for this function, i.e. for each +vector table should be initialized for this function, i.e.@: for each parameter @w{@var{name}}, a jump to the function is emitted in the section @w{ivt_entry_@var{name}}. The parameter(s) may be omitted entirely, in which case no interrupt vector table entry is provided. @@ -2892,7 +2905,7 @@ void __attribute__ ((interrupt, use_shadow_register_set, @end smallexample On RL78, use @code{brk_interrupt} instead of @code{interrupt} for -handlers intended to be used with the @code{BRK} opcode (i.e. those +handlers intended to be used with the @code{BRK} opcode (i.e.@: those that must end with @code{RETB} instead of @code{RETI}). @item interrupt_handler @@ -2957,7 +2970,7 @@ compliant way to write such a signal handler is to declare such variables The attribute has no effect on functions defined within the current compilation unit. This is to allow easy merging of multiple compilation units into one, -for example, by using the link time optimization. For this reason the +for example, by using the link-time optimization. For this reason the attribute is not allowed on types to annotate indirect calls. @item long_call/short_call @@ -3066,7 +3079,7 @@ while the @code{sysv_abi} attribute tells the compiler to use the ABI used on GNU/Linux and other systems. The default is to use the Microsoft ABI when targeting Windows. On all other systems, the default is the x86/AMD ABI. -Note, the @code{ms_abi} attribute for Windows 64-bit targets currently +Note, the @code{ms_abi} attribute for Microsoft Windows 64-bit targets currently requires the @option{-maccumulate-outgoing-args} option. @item callee_pop_aggregate_return (@var{number}) @@ -3079,14 +3092,15 @@ zero -, or if the callee is responsible to pop hidden pointer - @var{number} equal to one. The default i386 ABI assumes that the callee pops the stack for hidden pointer. -Note that on 32-bit i386 Windows targets, the compiler assumes that the +Note that on 32-bit i386 Microsoft Windows targets, +the compiler assumes that the caller pops the stack for hidden pointer. @item ms_hook_prologue @cindex @code{ms_hook_prologue} attribute On 32-bit i[34567]86-*-* targets and 64-bit x86_64-*-* targets, you can use -this function attribute to make gcc generate the "hot-patching" function +this function attribute to make GCC generate the ``hot-patching'' function prologue used in Win32 API functions in Microsoft Windows XP Service Pack 2 and newer. @@ -3111,7 +3125,7 @@ option. On MeP targets this attribute causes the compiler to assume the called function is close enough to use the normal calling convention, -overriding the @code{-mtf} command line option. +overriding the @code{-mtf} command-line option. @item nesting @cindex Allow nesting in an interrupt handler on the Blackfin processor. @@ -3154,6 +3168,8 @@ optimized away, put @smallexample asm (""); @end smallexample + +@noindent (@pxref{Extended Asm}) in the called function, to serve as a special side-effect. @@ -3240,6 +3256,7 @@ typedef void voidfn (); volatile voidfn fatal; @end smallexample +@noindent This approach does not work in GNU C++. @item nothrow @@ -3400,6 +3417,12 @@ with computed goto or @code{asm goto}. The @code{cold} attribute on labels is not implemented in GCC versions earlier than 4.8. +@item no_address_safety_analysis +@cindex @code{no_address_safety_analysis} function attribute +The @code{no_address_safety_analysis} attribute on functions is used +to inform the compiler that it should not instrument memory accesses +in the function when compiling with the @option{-fsanitize=address} option. + @item regparm (@var{number}) @cindex @code{regparm} attribute @cindex functions that are passed arguments in registers on the 386 @@ -3431,7 +3454,7 @@ floating-point arguments on the stack. @cindex @code{force_align_arg_pointer} attribute On the Intel x86, the @code{force_align_arg_pointer} attribute may be applied to individual function definitions, generating an alternate -prologue and epilogue that realigns the runtime stack if necessary. +prologue and epilogue that realigns the run-time stack if necessary. This supports mixing legacy codes that run with a 4-byte aligned stack with modern codes that keep a 16-byte stack for SSE compatibility. @@ -3754,7 +3777,7 @@ On the PowerPC, the following options are allowed: @itemx no-altivec @cindex @code{target("altivec")} attribute Generate code that uses (does not use) AltiVec instructions. In -32-bit code, you cannot enable Altivec instructions unless +32-bit code, you cannot enable AltiVec instructions unless @option{-mabi=altivec} is used on the command line. @item cmpb @@ -3873,7 +3896,7 @@ do small block moves. Generate code that uses (does not use) vector/scalar (VSX) instructions, and also enable the use of built-in functions that allow more direct access to the VSX instruction set. In 32-bit code, you -cannot enable VSX or Altivec instructions unless +cannot enable VSX or AltiVec instructions unless @option{-mabi=altivec} is used on the command line. @item friz @@ -3907,7 +3930,7 @@ away so that a longer more expensive calling sequence is required. @cindex @code{target("cpu=@var{CPU}")} attribute Specify the architecture to generate code for when compiling the function. If you select the @code{target("cpu=power7")} attribute when -generating 32-bit code, VSX and Altivec instructions are not generated +generating 32-bit code, VSX and AltiVec instructions are not generated unless you use the @option{-mabi=altivec} option on the command line. @item tune=@var{TUNE} @@ -3919,19 +3942,19 @@ compilation tunes for the @var{CPU} architecture, and not the default tuning specified on the command line. @end table -On the 386/x86_64 and PowerPC backends, you can use either multiple +On the 386/x86_64 and PowerPC back ends, you can use either multiple strings to specify multiple options, or you can separate the option with a comma (@code{,}). -On the 386/x86_64 and PowerPC backends, the inliner does not inline a +On the 386/x86_64 and PowerPC back ends, the inliner does not inline a function that has different target options than the caller, unless the callee has a subset of the target options of the caller. For example a function declared with @code{target("sse3")} can inline a function with @code{target("sse2")}, since @code{-msse3} implies @code{-msse2}. The @code{target} attribute is not implemented in GCC versions earlier -than 4.4 for the i386/x86_64 and 4.6 for the PowerPC backends. It is -not currently implemented for other backends. +than 4.4 for the i386/x86_64 and 4.6 for the PowerPC back ends. It is +not currently implemented for other back ends. @item tiny_data @cindex tiny data section on the H8/300H and H8S @@ -3980,6 +4003,7 @@ for some system calls. extern int foo () __attribute__((version_id ("20040821"))); @end smallexample +@noindent Calls to @var{foo} are mapped to calls to @var{foo@{20040821@}}. @item visibility ("@var{visibility_type}") @@ -4083,7 +4107,7 @@ visibility from the template is used. On MeP, the @code{vliw} attribute tells the compiler to emit instructions in VLIW mode instead of core mode. Note that this attribute is not allowed unless a VLIW coprocessor has been configured -and enabled through command line options. +and enabled through command-line options. @item warn_unused_result @cindex @code{warn_unused_result} attribute @@ -4103,6 +4127,7 @@ int foo () @} @end smallexample +@noindent results in warning on line 5. @item weak @@ -4560,7 +4585,7 @@ The default alignment is sufficient for all scalar types, but may not be enough for all vector types on a target that supports vector operations. The default alignment is fixed for a particular target ABI. -Gcc also provides a target specific macro @code{__BIGGEST_ALIGNMENT__}, +GCC also provides a target specific macro @code{__BIGGEST_ALIGNMENT__}, which is the largest alignment ever used for any data type on the target machine you are compiling for. For example, you could write: @@ -4574,7 +4599,7 @@ often make copy operations more efficient, because the compiler can use whatever instructions copy the biggest chunks of memory when performing copies to or from the variables or fields that you have aligned this way. Note that the value of @code{__BIGGEST_ALIGNMENT__} -may change depending on command line options. +may change depending on command-line options. When used on a struct, or struct member, the @code{aligned} attribute can only increase the alignment; in order to decrease it, the @code{packed} @@ -4861,7 +4886,7 @@ of the data but not how this data is accessed. In order to read data located with the @code{progmem} attribute (inline) assembler must be used. -@example +@smallexample /* Use custom macros from @w{@uref{http://nongnu.org/avr-libc/user-manual,AVR-LibC}} */ #include <avr/pgmspace.h> @@ -4873,7 +4898,7 @@ int read_var (int i) /* Access var[] by accessor macro from avr/pgmspace.h */ return (int) pgm_read_word (& var[i]); @} -@end example +@end smallexample AVR is a Harvard architecture processor and data and read-only data normally resides in the data memory (RAM). @@ -4967,9 +4992,9 @@ memory-mapped peripherals. If an address is specified, the variable is assigned that address, else it is not assigned an address (it is assumed some other module assigns an address). Example: -@example +@smallexample int timer_count __attribute__((io(0x123))); -@end example +@end smallexample @item cb @itemx cb (@var{addr}) @@ -4977,9 +5002,9 @@ Variables with the @code{cb} attribute are used to access the control bus, using special instructions. @code{addr} indicates the control bus address. Example: -@example +@smallexample int cpu_clock __attribute__((cb(0x123))); -@end example +@end smallexample @end table @@ -5050,6 +5075,7 @@ struct @} t1; @end smallexample +@noindent The size of @code{t1} is 8 bytes with the zero-length bit-field. If the zero-length bit-field were removed, @code{t1}'s size would be 4 bytes. @@ -5075,6 +5101,7 @@ struct @} t3; @end smallexample +@noindent For @code{t2}, @code{bar} is placed at offset 2, rather than offset 1. Accordingly, the size of @code{t2} is 4. For @code{t3}, the zero-length bit-field does not affect the alignment of @code{bar} or, as a result, the size @@ -5099,6 +5126,7 @@ struct @} t4; @end smallexample +@noindent Here, @code{t4} takes up 4 bytes. @end enumerate @@ -5113,6 +5141,7 @@ struct @} t5; @end smallexample +@noindent Here, @code{t5} takes up 2 bytes. @end enumerate @end table @@ -5342,6 +5371,7 @@ typedef union __attribute__ ((__transparent_union__)) pid_t wait (wait_status_ptr_t); @end smallexample +@noindent This interface allows either @code{int *} or @code{union wait *} arguments to be passed, using the @code{int *} calling convention. The program can call @code{wait} with arguments of either type: @@ -5351,6 +5381,7 @@ int w1 () @{ int w; return wait (&w); @} int w2 () @{ union wait w; return wait (&w); @} @end smallexample +@noindent With this interface, @code{wait}'s implementation might look like this: @smallexample @@ -5433,6 +5464,7 @@ main (void) @} @end smallexample +@noindent If you replaced @code{short_a} with @code{short} in the variable declaration, the above program would abort when compiled with @option{-fstrict-aliasing}, which is on by default at @option{-O2} or @@ -5475,6 +5507,7 @@ __declspec(dllexport) C::C() @{@} @end smallexample +@noindent In this code, @code{C::C} is exported from the current DLL, but the virtual table for @code{C} is not exported. (You can use @code{__attribute__} instead of @code{__declspec} if you prefer, but @@ -5739,6 +5772,7 @@ volatile int vobj; vobj = 1; @end smallexample +@noindent Unless @var{*ptr} and @var{vobj} can be aliased, it is not guaranteed that the write to @var{*ptr} occurs by the time the update of @var{vobj} happens. If you need this guarantee, you must use @@ -6168,7 +6202,7 @@ to fall through to the next statement. This form of @code{asm} is restricted to not have outputs. This is due to a internal restriction in the compiler that control transfer instructions cannot have outputs. This restriction on @code{asm goto} may be lifted -in some future version of the compiler. In the mean time, @code{asm goto} +in some future version of the compiler. In the meantime, @code{asm goto} may include a memory clobber, and so leave outputs in memory. @smallexample @@ -6183,6 +6217,7 @@ int frob(int x) @} @end smallexample +@noindent In this (inefficient) example, the @code{frob} instruction sets the carry bit to indicate an error. The @code{jc} instruction detects this and branches to the @code{error} label. Finally, the output @@ -6213,6 +6248,7 @@ void doit(void) @} @end smallexample +@noindent In this (also inefficient) example, the @code{mfsr} instruction reads an address from some out-of-band machine register, and the following @code{jmp} instruction branches to that address. The address read by @@ -6235,13 +6271,14 @@ does not in fact fall through. #define TRACE TRACE1(__COUNTER__) @end smallexample +@noindent In this example (which in fact inspired the @code{asm goto} feature) we want on rare occasions to call the @code{trace} function; on other occasions we'd like to keep the overhead to the absolute minimum. The normal code path consists of a single @code{nop} instruction. However, we record the address of this @code{nop} together with the address of a label that calls the @code{trace} function. This allows -the @code{nop} instruction to be patched at runtime to be an +the @code{nop} instruction to be patched at run time to be an unconditional branch to the stored label. It is assumed that an optimizing compiler moves the labeled block out of line, to optimize the fall through path from the @code{asm}. @@ -6260,7 +6297,7 @@ statements in the pattern of the @code{asm} and multiplying that by the length of the longest instruction on that processor. Statements in the @code{asm} are identified by newline characters and whatever statement separator characters are supported by the assembler; on most processors -this is the `@code{;}' character. +this is the @samp{;} character. Normally, GCC's estimate is perfectly adequate to ensure that correct code is generated, but it is possible to confuse the compiler if you use @@ -6280,7 +6317,7 @@ stack-like regs: @item Given a set of input regs that die in an asm_operands, it is necessary to know which are implicitly popped by the asm, and -which must be explicitly popped by gcc. +which must be explicitly popped by GCC@. An input reg that is implicitly popped by the asm must be explicitly clobbered, unless it is constrained to match an @@ -6304,6 +6341,7 @@ use the input reg for an output reload. Consider this example: asm ("foo" : "=t" (a) : "f" (b)); @end smallexample +@noindent This asm says that input B is not popped by the asm, and that the asm pushes a result onto the reg-stack, i.e., the stack is one deeper after the asm than it was before. But, it is possible that @@ -6352,6 +6390,7 @@ takes one input, which is internally popped, and produces two outputs. asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp)); @end smallexample +@noindent This asm takes two inputs, which are popped by the @code{fyl2xp1} opcode, and replaces them with one output. The user must code the @code{st(1)} clobber for reg-stack.c to know that @code{fyl2xp1} pops both inputs. @@ -6602,6 +6641,8 @@ assignment, for example @code{r0} below: register int *p1 asm ("r0") = @dots{}; register int *p2 asm ("r1") = @dots{}; @end smallexample + +@noindent In those cases, a solution is to use a temporary variable for each arbitrary expression. @xref{Example of asm with clobbered asm reg}. @@ -6829,6 +6870,7 @@ types. This should be done using an appropriate @code{typedef}: typedef int v4si __attribute__ ((vector_size (16))); @end smallexample +@noindent The @code{int} type specifies the base type, while the attribute specifies the vector size for the variable, measured in bytes. For example, the declaration above causes the compiler to set the mode for the @code{v4si} @@ -6903,7 +6945,7 @@ a = l + a; /* Error, cannot convert long to int. */ Vectors can be subscripted as if the vector were an array with the same number of elements and base type. Out of bound accesses -invoke undefined behavior at runtime. Warnings for out of bound +invoke undefined behavior at run time. Warnings for out of bound accesses for vector subscription can be enabled with @option{-Warray-bounds}. @@ -6994,6 +7036,7 @@ This extension is sufficient such that #define offsetof(@var{type}, @var{member}) __builtin_offsetof (@var{type}, @var{member}) @end smallexample +@noindent is a suitable definition of the @code{offsetof} macro. In C++, @var{type} may be dependent. In either case, @var{member} may consist of a single identifier, or a sequence of member accesses and array references. @@ -7005,7 +7048,7 @@ The following built-in functions are intended to be compatible with those described in the @cite{Intel Itanium Processor-specific Application Binary Interface}, section 7.4. As such, they depart from the normal GCC practice of using -the ``__builtin_'' prefix, and further that they are overloaded such that +the @samp{__builtin_} prefix, and further that they are overloaded such that they work on multiple types. The definition given in the Intel documentation allows only for the use of @@ -7155,19 +7198,19 @@ Target architectures are encouraged to provide their own patterns for each of these built-in functions. If no target is provided, the original non-memory model set of @samp{__sync} atomic built-in functions are utilized, along with any required synchronization fences surrounding it in -order to achieve the proper behaviour. Execution in this case is subject +order to achieve the proper behavior. Execution in this case is subject to the same restrictions as those built-in functions. If there is no pattern or mechanism to provide a lock free instruction sequence, a call is made to an external routine with the same parameters -to be resolved at runtime. +to be resolved at run time. The four non-arithmetic functions (load, store, exchange, and compare_exchange) all have a generic version as well. This generic version works on any data type. If the data type size maps to one of the integral sizes that may have lock free support, the generic version utilizes the lock free built-in function. Otherwise an -external call is left to be resolved at runtime. This external call is +external call is left to be resolved at run time. This external call is the same format with the addition of a @samp{size_t} parameter inserted as the first parameter indicating the size of the object being pointed to. All objects must be the same size. @@ -7209,8 +7252,8 @@ efficiently as they could with a more appropriate implemention of the relaxed requirements. Note that the C++11 standard allows for the memory model parameter to be -determined at runtime rather than at compile time. These built-in -functions map any runtime value to @code{__ATOMIC_SEQ_CST} rather +determined at run time rather than at compile time. These built-in +functions map any run-time value to @code{__ATOMIC_SEQ_CST} rather than invoke a runtime library call or inline a switch statement. This is standard compliant, safe, and the simplest approach for now. @@ -7336,8 +7379,8 @@ All memory models are valid. This built-in function performs an atomic test-and-set operation on the byte at @code{*@var{ptr}}. The byte is set to some implementation -defined non-zero "set" value and the return value is @code{true} if and only -if the previous contents were "set". +defined nonzero ``set'' value and the return value is @code{true} if and only +if the previous contents were ``set''. All memory models are valid. @@ -7376,7 +7419,8 @@ All memory orders are valid. This built-in function returns true if objects of @var{size} bytes always generate lock free atomic instructions for the target architecture. -@var{size} must resolve to a compile time constant and the result also resolves to compile time constant. +@var{size} must resolve to a compile-time constant and the result also +resolves to a compile-time constant. @var{ptr} is an optional pointer to the object that may be used to determine alignment. A value of 0 indicates typical alignment should be used. The @@ -7472,7 +7516,7 @@ it is known at compile time that the destination object will not be overflown. If the compiler can determine at compile time the object will be always overflown, it issues a warning. -The intended use can be e.g. +The intended use can be e.g.@: @smallexample #undef memcpy @@ -7490,11 +7534,11 @@ memcpy (p, "abcde", n); memcpy (&buf[5], "abcde", 5); /* Destination is known, but the length is not known at compile time. This will result in __memcpy_chk call that can check for overflow - at runtime. */ + at run time. */ memcpy (&buf[5], "abcde", n); /* Destination is known and it is known at compile time there will be overflow. There will be a warning and __memcpy_chk call that - will abort the program at runtime. */ + will abort the program at run time. */ memcpy (&buf[6], "abcde", 5); @end smallexample @@ -8180,7 +8224,7 @@ infinities, NaNs and negative zeros are involved. @deftypefn {Built-in Function} int __builtin_constant_p (@var{exp}) You can use the built-in function @code{__builtin_constant_p} to -determine if a value is known to be constant at compile-time and hence +determine if a value is known to be constant at compile time and hence that GCC can perform constant-folding on expressions involving that value. The argument of the function is the value to test. The function returns the integer 1 if the argument is known to be a compile-time @@ -8300,6 +8344,7 @@ int f (int c, int v) @} @end smallexample +@noindent Because the @code{asm} statement unconditionally transfers control out of the function, control never reaches the end of the function body. The @code{__builtin_unreachable} is in fact unreachable and @@ -8333,12 +8378,13 @@ This function returns its first argument, and allows the compiler to assume that the returned pointer is at least @var{align} bytes aligned. This built-in can have either two or three arguments, if it has three, the third argument should have integer type, and -if it is non-zero means misalignment offset. For example: +if it is nonzero means misalignment offset. For example: @smallexample void *x = __builtin_assume_aligned (arg, 16); @end smallexample +@noindent means that the compiler can assume @code{x}, set to @code{arg}, is at least 16-byte aligned, while: @@ -8346,6 +8392,7 @@ means that the compiler can assume @code{x}, set to @code{arg}, is at least void *x = __builtin_assume_aligned (arg, 32, 8); @end smallexample +@noindent means that the compiler can assume for @code{x}, set to @code{arg}, that @code{(char *) x - 8} is 32-byte aligned. @end deftypefn @@ -8548,7 +8595,7 @@ significant bit position. If @var{x} is 0, the result is undefined. @end deftypefn @deftypefn {Built-in Function} int __builtin_clrsb (int x) -Returns the number of leading redundant sign bits in @var{x}, i.e. the +Returns the number of leading redundant sign bits in @var{x}, i.e.@: the number of bits following the most significant bit that are identical to it. There are no special cases for 0 or other values. @end deftypefn @@ -8937,7 +8984,7 @@ or if not a specific built-in is implemented or not. For example, if @code{__BUILTIN_AVR_NOP} is defined to @code{1} and undefined otherwise. The following built-in functions map to the respective machine -instruction, i.e. @code{nop}, @code{sei}, @code{cli}, @code{sleep}, +instruction, i.e.@: @code{nop}, @code{sei}, @code{cli}, @code{sleep}, @code{wdr}, @code{swap}, @code{fmul}, @code{fmuls} resp. @code{fmulsu}. The three @code{fmul*} built-ins are implemented as library call if no hardware multiplier is available. @@ -8963,7 +9010,7 @@ void __builtin_avr_delay_cycles (unsigned long ticks) @noindent @code{ticks} is the number of ticks to delay execution. Note that this built-in does not take into account the effect of interrupts that -might increase delay time. @code{ticks} must be a compile time +might increase delay time. @code{ticks} must be a compile-time integer constant; delays with a variable number of cycles are not supported. @smallexample @@ -9047,7 +9094,7 @@ GCC provides many FR-V-specific built-in functions. In general, these functions are intended to be compatible with those described by @cite{FR-V Family, Softune C/C++ Compiler Manual (V6), Fujitsu Semiconductor}. The two exceptions are @code{__MDUNPACKH} and -@code{__MBTOHE}, the gcc forms of which pass 128-bit values by +@code{__MBTOHE}, the GCC forms of which pass 128-bit values by pointer rather than by value. Most of the functions are named after specific FR-V instructions. @@ -9475,7 +9522,7 @@ of computers, depending on the command-line switches used. If you specify command-line switches such as @option{-msse}, the compiler could use the extended instruction sets even if the built-ins are not used explicitly in the program. For this reason, applications -that perform runtime CPU detection must compile separate files for each +that perform run-time CPU detection must compile separate files for each supported architecture, using the appropriate flags. In particular, the file containing the CPU detection code should be compiled without these options. @@ -9563,8 +9610,9 @@ void *memcpy (void *, const void *, size_t) @end deftypefn @deftypefn {Built-in Function} int __builtin_cpu_is (const char *@var{cpuname}) -This function returns a positive integer if the runtime cpu is of type @var{cpuname} - and returns @code{0} otherwise. The following cpu names can be detected: +This function returns a positive integer if the run-time CPU +is of type @var{cpuname} +and returns @code{0} otherwise. The following CPU names can be detected: @table @samp @item intel @@ -9615,6 +9663,9 @@ AMD family 15h Bulldozer version 1. @item bdver2 AMD family 15h Bulldozer version 2. +@item bdver3 +AMD family 15h Bulldozer version 3. + @item btver2 AMD family 16h CPU. @end table @@ -9633,8 +9684,9 @@ else @end deftypefn @deftypefn {Built-in Function} int __builtin_cpu_supports (const char *@var{feature}) -This function returns a positive integer if the runtime cpu supports @var{feature} - and returns @code{0} otherwise. The following features can be detected: +This function returns a positive integer if the run-time CPU +supports @var{feature} +and returns @code{0} otherwise. The following features can be detected: @table @samp @item cmov @@ -11732,6 +11784,7 @@ does not work: vec_add ((vector signed int)@{1, 2, 3, 4@}, foo); @end smallexample +@noindent Since @code{vec_add} is a macro, the vector constant in the example is treated as four separate arguments. Wrap the entire argument in parentheses for this to work. @@ -13708,7 +13761,7 @@ void vec_vsx_st (vector bool char, int, signed char *); @end smallexample Note that the @samp{vec_ld} and @samp{vec_st} built-in functions always -generate the Altivec @samp{LVX} and @samp{STVX} instructions even +generate the AltiVec @samp{LVX} and @samp{STVX} instructions even if the VSX instruction set is available. The @samp{vec_vsx_ld} and @samp{vec_vsx_st} built-in functions always generate the VSX @samp{LXVD2X}, @samp{LXVW4X}, @samp{STXVD2X}, and @samp{STXVW4X} instructions. @@ -14048,6 +14101,7 @@ does not work: spu_add ((vector signed int)@{1, 2, 3, 4@}, foo); @end smallexample +@noindent Since @code{spu_add} is a macro, the vector constant in the example is treated as four separate arguments. Wrap the entire argument in parentheses for this to work. @@ -14148,7 +14202,8 @@ unsigned __insn_@var{op} (...) @end smallexample -Where @var{op} is the name of the instruction. Refer to the ISA manual +@noindent +where @var{op} is the name of the instruction. Refer to the ISA manual for the complete list of instructions. GCC also provides intrinsics to directly access the network registers. @@ -14279,10 +14334,10 @@ compatibility with other compilers, but note that the common @code{1234H} numeric syntax is not supported (use @code{0x1234} instead). Example: -@example +@smallexample #pragma ADDRESS port3 0x103 char port3; -@end example +@end smallexample @end table @@ -14293,7 +14348,7 @@ char port3; @item custom io_volatile (on|off) @cindex pragma, custom io_volatile -Overrides the command line option @code{-mio-volatile} for the current +Overrides the command-line option @code{-mio-volatile} for the current file. Note that for compatibility with future GCC releases, this option should only be used once before any @code{io} variables in each file. @@ -14304,9 +14359,9 @@ Specifies which coprocessor registers are available to the register allocator. @var{registers} may be a single register, register range separated by ellipses, or comma-separated list of those. Example: -@example +@smallexample #pragma GCC coprocessor available $c0...$c10, $c28 -@end example +@end smallexample @item GCC coprocessor call_saved @var{registers} @cindex pragma, coprocessor call_saved @@ -14315,9 +14370,9 @@ any function using them. @var{registers} may be a single register, register range separated by ellipses, or comma-separated list of those. Example: -@example +@smallexample #pragma GCC coprocessor call_saved $c4...$c6, $c31 -@end example +@end smallexample @item GCC coprocessor subclass '(A|B|C|D)' = @var{registers} @cindex pragma, coprocessor subclass @@ -14326,11 +14381,11 @@ used by inline @code{asm} constructs. @var{registers} may be a single register, register range separated by ellipses, or comma-separated list of those. Example: -@example +@smallexample #pragma GCC coprocessor subclass 'B' = $c2, $c4, $c6 asm ("cpfoo %0" : "=B" (x)); -@end example +@end smallexample @item GCC disinterrupt @var{name} , @var{name} @dots{} @cindex pragma, disinterrupt @@ -14339,21 +14394,21 @@ for the duration of those functions. If any functions so named are not encountered in the source, a warning is emitted that the pragma is not used. Examples: -@example +@smallexample #pragma disinterrupt foo #pragma disinterrupt bar, grill int foo () @{ @dots{} @} -@end example +@end smallexample @item GCC call @var{name} , @var{name} @dots{} @cindex pragma, call For the named functions, the compiler always uses a register-indirect call model when calling the named functions. Examples: -@example +@smallexample extern int foo (); #pragma call foo -@end example +@end smallexample @end table @@ -14511,7 +14566,7 @@ multiple @code{#pragma pack(@var{n})} instances and finalized by a single @code{#pragma pack(pop)}. @end enumerate -Some targets, e.g.@: i386 and powerpc, support the @code{ms_struct} +Some targets, e.g.@: i386 and PowerPC, support the @code{ms_struct} @code{#pragma} which lays out a structure as the documented @code{__attribute__ ((ms_struct))}. @enumerate @@ -14570,11 +14625,11 @@ in effect), or @samp{ignored} if the diagnostic is to be ignored. @var{option} is a double quoted string that matches the command-line option. -@example +@smallexample #pragma GCC diagnostic warning "-Wformat" #pragma GCC diagnostic error "-Wformat" #pragma GCC diagnostic ignored "-Wformat" -@end example +@end smallexample Note that these pragmas override any command-line options. GCC keeps track of the location of each pragma, and issues diagnostics according @@ -14586,20 +14641,20 @@ after a line do not affect diagnostics caused by that line. Causes GCC to remember the state of the diagnostics as of each @code{push}, and restore to that point at each @code{pop}. If a -@code{pop} has no matching @code{push}, the command line options are +@code{pop} has no matching @code{push}, the command-line options are restored. -@example +@smallexample #pragma GCC diagnostic error "-Wuninitialized" - foo(a); /* error is given for this one */ + foo(a); /* error is given for this one */ #pragma GCC diagnostic push #pragma GCC diagnostic ignored "-Wuninitialized" - foo(b); /* no diagnostic for this one */ + foo(b); /* no diagnostic for this one */ #pragma GCC diagnostic pop - foo(c); /* error is given for this one */ + foo(c); /* error is given for this one */ #pragma GCC diagnostic pop - foo(d); /* depends on command line options */ -@end example + foo(d); /* depends on command-line options */ +@end smallexample @end table @@ -14627,6 +14682,7 @@ information. For example, TODO(Remember to fix this) @end smallexample +@noindent prints @samp{/tmp/file.c:4: note: #pragma message: TODO - Remember to fix this}. @@ -14684,6 +14740,7 @@ For example: int x [X]; @end smallexample +@noindent In this example, the definition of X as 1 is saved by @code{#pragma push_macro} and restored by @code{#pragma pop_macro}. @@ -14703,8 +14760,8 @@ function. The parenthesis around the options is optional. @code{target} attribute and the attribute syntax. The @code{#pragma GCC target} attribute is not implemented in GCC versions earlier -than 4.4 for the i386/x86_64 and 4.6 for the PowerPC backends. At -present, it is not implemented for other backends. +than 4.4 for the i386/x86_64 and 4.6 for the PowerPC back ends. At +present, it is not implemented for other back ends. @end table @table @code @@ -14772,13 +14829,14 @@ struct @{ @} foo; @end smallexample +@noindent In this example, you are able to access members of the unnamed union with code like @samp{foo.b}. Note that only unnamed structs and unions are allowed, you may not have, for example, an unnamed @code{int}. You must never create such structures that cause ambiguous field definitions. -For example, this structure: +For example, in this structure: @smallexample struct @{ @@ -14789,7 +14847,8 @@ struct @{ @} foo; @end smallexample -It is ambiguous which @code{a} is being referred to with @samp{foo.a}. +@noindent +it is ambiguous which @code{a} is being referred to with @samp{foo.a}. The compiler gives errors for such constructs. @opindex fms-extensions @@ -14814,6 +14873,7 @@ extern void f1 (struct s1 *); void f2 (struct s2 *p) @{ f1 (p); @} @end smallexample +@noindent In the call to @code{f1} inside @code{f2}, the pointer @code{p} is converted into a pointer to the anonymous field. @@ -14837,7 +14897,7 @@ These usages are only permitted when they are not ambiguous. Thread-local storage (@acronym{TLS}) is a mechanism by which variables are allocated such that there is one instance of the variable per extant -thread. The run-time model GCC uses to implement this originates +thread. The runtime model GCC uses to implement this originates in the IA-64 processor-specific ABI, but has since been migrated to other processors as well. It requires significant support from the linker (@command{ld}), dynamic linker (@command{ld.so}), and @@ -14863,7 +14923,7 @@ static, function-scoped static, or static data member of a class. It may not be applied to block-scoped automatic or non-static data member. When the address-of operator is applied to a thread-local variable, it is -evaluated at run-time and returns the address of the current thread's +evaluated at run time and returns the address of the current thread's instance of that variable. An address so obtained may be used by any thread. When a thread terminates, any pointers to thread-local variables in that thread become invalid. @@ -14876,7 +14936,7 @@ standard. See @uref{http://www.akkadia.org/drepper/tls.pdf, ELF Handling For Thread-Local Storage} for a detailed explanation of -the four thread-local storage addressing models, and how the run-time +the four thread-local storage addressing models, and how the runtime is expected to function. @menu @@ -15138,7 +15198,7 @@ Predefined Macros,cpp,The GNU C Preprocessor}). * Namespace Association:: Strong using-directives for namespace association. * Type Traits:: Compiler support for type traits * Java Exceptions:: Tweaking exception handling to work with Java. -* Deprecated Features:: Things will disappear from g++. +* Deprecated Features:: Things will disappear from G++. * Backwards Compatibility:: Compatibilities with earlier definitions of C++. @end menu @@ -15186,7 +15246,7 @@ references. Again, if you wish to force a read, cast the reference to an rvalue. G++ implements the same behavior as GCC does when assigning to a -volatile object -- there is no reread of the assigned-to object, the +volatile object---there is no reread of the assigned-to object, the assigned rvalue is reused. Note that in C++ assignment expressions are lvalues, and if used as an lvalue, the volatile object is referred to. For instance, @var{vref} refers to @var{vobj}, as @@ -15293,7 +15353,7 @@ C++ requires information about types to be written out in order to implement @samp{dynamic_cast}, @samp{typeid} and exception handling. For polymorphic classes (classes with virtual functions), the @samp{type_info} object is written out along with the vtable so that @samp{dynamic_cast} -can determine the dynamic type of a class object at runtime. For all +can determine the dynamic type of a class object at run time. For all other types, we write out the @samp{type_info} object when it is used: when applying @samp{typeid} to an expression, throwing an object, or referring to a type in a catch clause or exception specification. @@ -15522,6 +15582,7 @@ template ostream& operator << (ostream&, const Foo<int>&); @end smallexample +@noindent for each of the instances you need, and create a template instantiation library from those. @@ -15711,7 +15772,7 @@ int main() @node Type Traits @section Type Traits -The C++ front-end implements syntactic extensions that allow +The C++ front end implements syntactic extensions that allow compile-time determination of various characteristics of a type (or of a pair of types). @@ -15937,7 +15998,7 @@ and other places where they are not permitted by the standard is deprecated and will be removed from a future version of G++. G++ allows floating-point literals to appear in integral constant expressions, -e.g. @samp{ enum E @{ e = int(2.2 * 3.7) @} } +e.g.@: @samp{ enum E @{ e = int(2.2 * 3.7) @} } This extension is deprecated and will be removed from a future version. G++ allows static data members of const floating-point type to be declared diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi index 7396158acea..736ec2fad9b 100644 --- a/gcc/doc/install.texi +++ b/gcc/doc/install.texi @@ -1027,12 +1027,6 @@ For ARM targets, possible values for @var{dialect} are @code{gnu} or @code{gnu2}, which select between the original GNU dialect and the GNU TLS descriptor-based dialect. -@item --disable-multilib -Specify that multiple target -libraries to support different target variants, calling -conventions, etc.@: should not be built. The default is to build a -predefined set of them. - @item --enable-multiarch Specify whether to enable or disable multiarch support. The default is to check for glibc start files in a multiarch location, and enable it @@ -1042,6 +1036,12 @@ and for cross builds configured with @option{--with-sysroot}, and without More documentation about multiarch can be found at @uref{http://wiki.debian.org/Multiarch}. +@item --disable-multilib +Specify that multiple target +libraries to support different target variants, calling +conventions, etc.@: should not be built. The default is to build a +predefined set of them. + Some targets provide finer-grained control over which multilibs are built (e.g., @option{--disable-softfloat}): @table @code @@ -1719,6 +1719,14 @@ link time when @option{-fuse-linker-plugin} is enabled. This linker should have plugin support such as gold starting with version 2.20 or GNU ld starting with version 2.21. See @option{-fuse-linker-plugin} for details. + +@item --enable-canonical-system-headers +@itemx --disable-canonical-system-headers +Enable system header path canonicalization for @file{libcpp}. This can +produce shorter header file paths in diagnostics and dependency output +files, but these changed header paths may conflict with some compilation +environments. Enabled by default, and may be disabled using +@option{--disable-canonical-system-headers}. @end table @subheading Cross-Compiler-Specific Options diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index bc73cc96252..0971e2070a2 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -289,7 +289,8 @@ Objective-C and Objective-C++ Dialects}. @item Debugging Options @xref{Debugging Options,,Options for Debugging Your Program or GCC}. @gccoptlist{-d@var{letters} -dumpspecs -dumpmachine -dumpversion @gol --faddress-sanitizer -fdbg-cnt-list -fdbg-cnt=@var{counter-value-list} @gol +-fsanitize=@var{style} @gol +-fdbg-cnt-list -fdbg-cnt=@var{counter-value-list} @gol -fdisable-ipa-@var{pass_name} @gol -fdisable-rtl-@var{pass_name} @gol -fdisable-rtl-@var{pass-name}=@var{range-list} @gol @@ -452,8 +453,9 @@ Objective-C and Objective-C++ Dialects}. @xref{Link Options,,Options for Linking}. @gccoptlist{@var{object-file-name} -l@var{library} @gol -nostartfiles -nodefaultlibs -nostdlib -pie -rdynamic @gol --s -static -static-libgcc -static-libstdc++ -shared @gol --shared-libgcc -symbolic @gol +-s -static -static-libgcc -static-libstdc++ @gol +-static-libasan -static-libtsan @gol +-shared -shared-libgcc -symbolic @gol -T @var{script} -Wl,@var{option} -Xlinker @var{option} @gol -u @var{symbol}} @@ -929,6 +931,7 @@ See RS/6000 and PowerPC Options. -munaligned-doubles -mno-unaligned-doubles @gol -mv8plus -mno-v8plus -mvis -mno-vis @gol -mvis2 -mno-vis2 -mvis3 -mno-vis3 @gol +-mcbcond -mno-cbcond @gol -mfmaf -mno-fmaf -mpopc -mno-popc @gol -mfix-at697f} @@ -5372,7 +5375,7 @@ appended with a sequential number starting from 1. @var{range-list} is a comma-separated list of function ranges or assembler names. Each range is a number pair separated by a colon. The range is inclusive in both ends. If the range is trivial, the number pair can be simplified as a single number. If the -function's cgraph node's @var{uid} falls within one of the specified ranges, +function's call graph node's @var{uid} falls within one of the specified ranges, the @var{pass} is disabled for that function. The @var{uid} is shown in the function header of a dump file, and the pass names can be dumped by using option @option{-fdump-passes}. @@ -5729,12 +5732,6 @@ also printed. Dump the RTL in the assembler output as a comment before each instruction. Also turns on @option{-dp} annotation. -@item -dv -@opindex dv -For each of the other indicated dump files (@option{-fdump-rtl-@var{pass}}), -dump a representation of the control flow graph suitable for viewing with VCG -to @file{@var{file}.@var{pass}.vcg}. - @item -dx @opindex dx Just generate RTL for a function instead of compiling it. Usually used @@ -5843,10 +5840,16 @@ If @code{DECL_ASSEMBLER_NAME} has been set for a given decl, use that in the dump instead of @code{DECL_NAME}. Its primary use is ease of use working backward from mangled names in the assembly file. @item slim -Inhibit dumping of members of a scope or body of a function merely -because that scope has been reached. Only dump such items when they -are directly reachable by some other path. When dumping pretty-printed -trees, this option inhibits dumping the bodies of control structures. +When dumping front-end intermediate representations, inhibit dumping +of members of a scope or body of a function merely because that scope +has been reached. Only dump such items when they are directly reachable +by some other path. + +When dumping pretty-printed trees, this option inhibits dumping the +bodies of control structures. + +When dumping RTL, print the RTL in slim (condensed) form instead of +the default LISP-like representation. @item raw Print a raw representation of the tree. By default, trees are pretty-printed into a C-like representation. @@ -5858,6 +5861,16 @@ Enable dumping various statistics about the pass (not honored by every dump option). @item blocks Enable showing basic block boundaries (disabled in raw dumps). +@item graph +For each of the other indicated dump files (@option{-fdump-rtl-@var{pass}}), +dump a representation of the control flow graph suitable for viewing with +GraphViz to @file{@var{file}.@var{passid}.@var{pass}.dot}. Note that if +the file contains more than one function, the generated file cannot be +used directly by GraphViz@. You must cut and paste each function's +graph into its own separate file first. + +This option currently only works for RTL dumps, and the RTL is always +dumped in slim form. @item vops Enable showing virtual operands for every statement. @item lineno @@ -6859,12 +6872,18 @@ assumptions based on that. The default is @option{-fzero-initialized-in-bss}. -@item -faddress-sanitizer +@item -fsanitize=address Enable AddressSanitizer, a fast memory error detector. Memory access instructions will be instrumented to detect -out-of-bounds and use-after-free bugs. So far only heap bugs will be detected. +out-of-bounds and use-after-free bugs. See @uref{http://code.google.com/p/address-sanitizer/} for more details. +@item -fsanitize=thread +Enable ThreadSanitizer, a fast data race detector. +Memory access instructions will be instrumented to detect +data race bugs. +See @uref{http://code.google.com/p/data-race-test/wiki/ThreadSanitizer} for more details. + @item -fmudflap -fmudflapth -fmudflapir @opindex fmudflap @opindex fmudflapth @@ -9220,9 +9239,9 @@ doing loop versioning for alias in the vectorizer. See option The maximum number of iterations of a loop the brute-force algorithm for analysis of the number of iterations of the loop tries to evaluate. -@item hot-bb-count-fraction -Select fraction of the maximal count of repetitions of basic block in program -given basic block needs to have to be considered hot. +@item hot-bb-count-ws-permille +A basic block profile count is considered hot if it contributes to +the given permillage (i.e. 0...1000) of the entire profiled execution. @item hot-bb-frequency-fraction Select fraction of the entry block frequency of executions of basic block in @@ -9941,6 +9960,24 @@ for the languages used in the program, or using the option @option{-shared-libgcc}, such that it is linked with the shared @file{libgcc}. +@item -static-libasan +When the @option{-fsanitize=address} option is used to link a program, +the GCC driver automatically links against @option{libasan}. If +@file{libasan} is available as a shared library, and the @option{-static} +option is not used, then this links against the shared version of +@file{libasan}. The @option{-static-libasan} option directs the GCC +driver to link @file{libasan} statically, without necessarily linking +other libraries statically. + +@item -static-libtsan +When the @option{-fsanitize=thread} option is used to link a program, +the GCC driver automatically links against @option{libtsan}. If +@file{libtsan} is available as a shared library, and the @option{-static} +option is not used, then this links against the shared version of +@file{libtsan}. The @option{-static-libtsan} option directs the GCC +driver to link @file{libtsan} statically, without necessarily linking +other libraries statically. + @item -static-libstdc++ When the @command{g++} program is used to link a C++ program, it normally automatically links against @option{libstdc++}. If @@ -13731,6 +13768,11 @@ AMD Family 15h core based CPUs with x86-64 instruction set support. (This supersets BMI, TBM, F16C, FMA, AVX, XOP, LWP, AES, PCL_MUL, CX16, MMX, SSE, SSE2, SSE3, SSE4A, SSSE3, SSE4.1, SSE4.2, ABM and 64-bit instruction set extensions.) +@item bdver3 +AMD Family 15h core based CPUs with x86-64 instruction set support. (This +supersets BMI, TBM, F16C, FMA, AVX, XOP, LWP, AES, PCL_MUL, CX16, MMX, SSE, +SSE2, SSE3, SSE4A, SSSE3, SSE4.1, SSE4.2, ABM and 64-bit instruction set +extensions. @item btver1 CPUs based on AMD Family 14h cores with x86-64 instruction set support. (This @@ -19158,6 +19200,15 @@ default is @option{-mvis3} when targeting a cpu that supports such instructions, such as niagara-3 and later. Setting @option{-mvis3} also sets @option{-mvis2} and @option{-mvis}. +@item -mcbcond +@itemx -mno-cbcond +@opindex mcbcond +@opindex mno-cbcond +With @option{-mcbcond}, GCC generates code that takes advantage of +compare-and-branch instructions, as defined in the Sparc Architecture 2011. +The default is @option{-mcbcond} when targeting a cpu that supports such +instructions, such as niagara-4 and later. + @item -mpopc @itemx -mno-popc @opindex mpopc diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index eb6ba9130d0..4be4b55b3e2 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -46,6 +46,8 @@ See the next chapter for information on the C header file. * Insn Attributes:: Specifying the value of attributes for generated insns. * Conditional Execution::Generating @code{define_insn} patterns for predication. +* Define Subst:: Generating @code{define_insn} and @code{define_expand} + patterns from other patterns. * Constant Definitions::Defining symbolic constants that can be used in the md file. * Iterators:: Using iterators to generate patterns from a template. @@ -1725,9 +1727,6 @@ A memory address which uses a single base register with no offset A memory address suitable for a load/store pair instruction in SI, DI, SF and DF modes -@item Utf -A memory address suitable for a load/store pair instruction in TF mode - @end table @@ -3222,6 +3221,9 @@ when the Visual Instruction Set is available. @item C The constant all-ones, for floating-point. +@item A +Signed 5-bit constant + @item D A vector constant @@ -5291,6 +5293,62 @@ Convert unsigned integer operand 1 of mode @var{m} to fixed-point mode When overflows or underflows happen, the instruction saturates the results to the maximum or the minimum. +@cindex @code{extv@var{m}} instruction pattern +@item @samp{extv@var{m}} +Extract a bit-field from register operand 1, sign-extend it, and store +it in operand 0. Operand 2 specifies the width of the field in bits +and operand 3 the starting bit, which counts from the most significant +bit if @samp{BITS_BIG_ENDIAN} is true and from the least significant bit +otherwise. + +Operands 0 and 1 both have mode @var{m}. Operands 2 and 3 have a +target-specific mode. + +@cindex @code{extvmisalign@var{m}} instruction pattern +@item @samp{extvmisalign@var{m}} +Extract a bit-field from memory operand 1, sign extend it, and store +it in operand 0. Operand 2 specifies the width in bits and operand 3 +the starting bit. The starting bit is always somewhere in the first byte of +operand 1; it counts from the most significant bit if @samp{BITS_BIG_ENDIAN} +is true and from the least significant bit otherwise. + +Operand 0 has mode @var{m} while operand 1 has @code{BLK} mode. +Operands 2 and 3 have a target-specific mode. + +The instruction must not read beyond the last byte of the bit-field. + +@cindex @code{extzv@var{m}} instruction pattern +@item @samp{extzv@var{m}} +Like @samp{extv@var{m}} except that the bit-field value is zero-extended. + +@cindex @code{extzvmisalign@var{m}} instruction pattern +@item @samp{extzvmisalign@var{m}} +Like @samp{extvmisalign@var{m}} except that the bit-field value is +zero-extended. + +@cindex @code{insv@var{m}} instruction pattern +@item @samp{insv@var{m}} +Insert operand 3 into a bit-field of register operand 0. Operand 1 +specifies the width of the field in bits and operand 2 the starting bit, +which counts from the most significant bit if @samp{BITS_BIG_ENDIAN} +is true and from the least significant bit otherwise. + +Operands 0 and 3 both have mode @var{m}. Operands 1 and 2 have a +target-specific mode. + +@cindex @code{insvmisalign@var{m}} instruction pattern +@item @samp{insvmisalign@var{m}} +Insert operand 3 into a bit-field of memory operand 0. Operand 1 +specifies the width of the field in bits and operand 2 the starting bit. +The starting bit is always somewhere in the first byte of operand 0; +it counts from the most significant bit if @samp{BITS_BIG_ENDIAN} +is true and from the least significant bit otherwise. + +Operand 3 has mode @var{m} while operand 0 has @code{BLK} mode. +Operands 1 and 2 have a target-specific mode. + +The instruction must not read or write beyond the last byte of the bit-field. + @cindex @code{extv} instruction pattern @item @samp{extv} Extract a bit-field from operand 1 (a register or memory operand), where @@ -5306,10 +5364,16 @@ for operands 2 and 3 and the constant is never zero for operand 2. The bit-field value is sign-extended to a full word integer before it is stored in operand 0. +This pattern is deprecated; please use @samp{extv@var{m}} and +@code{extvmisalign@var{m}} instead. + @cindex @code{extzv} instruction pattern @item @samp{extzv} Like @samp{extv} except that the bit-field value is zero-extended. +This pattern is deprecated; please use @samp{extzv@var{m}} and +@code{extzvmisalign@var{m}} instead. + @cindex @code{insv} instruction pattern @item @samp{insv} Store operand 3 (which must be valid for @code{word_mode}) into a @@ -5321,6 +5385,9 @@ Operands 1 and 2 must be valid for @code{word_mode}. The RTL generation pass generates this instruction only with constants for operands 1 and 2 and the constant is never zero for operand 1. +This pattern is deprecated; please use @samp{insv@var{m}} and +@code{insvmisalign@var{m}} instead. + @cindex @code{mov@var{mode}cc} instruction pattern @item @samp{mov@var{mode}cc} Conditionally move operand 2 or operand 3 into operand 0 according to the @@ -5905,8 +5972,9 @@ the values of operands 1 and 2. @item @samp{blockage} This pattern defines a pseudo insn that prevents the instruction -scheduler from moving instructions across the boundary defined by the -blockage insn. Normally an UNSPEC_VOLATILE pattern. +scheduler and other passes from moving instructions and using register +equivalences across the boundary defined by the blockage insn. +This needs to be an UNSPEC_VOLATILE pattern or a volatile ASM. @cindex @code{memory_barrier} instruction pattern @item @samp{memory_barrier} @@ -6688,6 +6756,10 @@ Usually these statements prepare temporary registers for use as internal operands in the RTL template, but they can also generate RTL insns directly by calling routines such as @code{emit_insn}, etc. Any such insns precede the ones that come from the RTL template. + +@item +Optionally, a vector containing the values of attributes. @xref{Insn +Attributes}. @end itemize Every RTL insn emitted by a @code{define_expand} must match some @@ -8826,6 +8898,213 @@ generates a new pattern @end ifset @ifset INTERNALS +@node Define Subst +@section RTL Templates Transformations +@cindex define_subst + +For some hardware architectures there are common cases when the RTL +templates for the instructions can be derived from the other RTL +templates using simple transformations. E.g., @file{i386.md} contains +an RTL template for the ordinary @code{sub} instruction--- +@code{*subsi_1}, and for the @code{sub} instruction with subsequent +zero-extension---@code{*subsi_1_zext}. Such cases can be easily +implemented by a single meta-template capable of generating a modified +case based on the initial one: + +@findex define_subst +@smallexample +(define_subst "@var{name}" + [@var{input-template}] + "@var{condition}" + [@var{output-template}]) +@end smallexample +@var{input-template} is a pattern describing the source RTL template, +which will be transformed. + +@var{condition} is a C expression that is conjunct with the condition +from the input-template to generate a condition to be used in the +output-template. + +@var{output-template} is a pattern that will be used in the resulting +template. + +@code{define_subst} mechanism is tightly coupled with the notion of the +subst attribute (@pxref{Subst Iterators}). The use of +@code{define_subst} is triggered by a reference to a subst attribute in +the transforming RTL template. This reference initiates duplication of +the source RTL template and substitution of the attributes with their +values. The source RTL template is left unchanged, while the copy is +transformed by @code{define_subst}. This transformation can fail in the +case when the source RTL template is not matched against the +input-template of the @code{define_subst}. In such case the copy is +deleted. + +@code{define_subst} can be used only in @code{define_insn} and +@code{define_expand}, it cannot be used in other expressions (e.g. in +@code{define_insn_and_split}). + +@menu +* Define Subst Example:: Example of @code{define_subst} work. +* Define Subst Pattern Matching:: Process of template comparison. +* Define Subst Output Template:: Generation of output template. +@end menu + +@node Define Subst Example +@subsection @code{define_subst} Example +@cindex define_subst + +To illustrate how @code{define_subst} works, let us examine a simple +template transformation. + +Suppose there are two kinds of instructions: one that touches flags and +the other that does not. The instructions of the second type could be +generated with the following @code{define_subst}: + +@smallexample +(define_subst "add_clobber_subst" + [(set (match_operand:SI 0 "" "") + (match_operand:SI 1 "" ""))] + "" + [(set (match_dup 0) + (match_dup 1)) + (clobber (reg:CC FLAGS_REG))] +@end smallexample + +This @code{define_subst} can be applied to any RTL pattern containing +@code{set} of mode SI and generates a copy with clobber when it is +applied. + +Assume there is an RTL template for a @code{max} instruction to be used +in @code{define_subst} mentioned above: + +@smallexample +(define_insn "maxsi" + [(set (match_operand:SI 0 "register_operand" "=r") + (max:SI + (match_operand:SI 1 "register_operand" "r") + (match_operand:SI 2 "register_operand" "r")))] + "" + "max\t@{%2, %1, %0|%0, %1, %2@}" + [@dots{}]) +@end smallexample + +To mark the RTL template for @code{define_subst} application, +subst-attributes are used. They should be declared in advance: + +@smallexample +(define_subst_attr "add_clobber_name" "add_clobber_subst" "_noclobber" "_clobber") +@end smallexample + +Here @samp{add_clobber_name} is the attribute name, +@samp{add_clobber_subst} is the name of the corresponding +@code{define_subst}, the third argument (@samp{_noclobber}) is the +attribute value that would be substituted into the unchanged version of +the source RTL template, and the last argument (@samp{_clobber}) is the +value that would be substituted into the second, transformed, +version of the RTL template. + +Once the subst-attribute has been defined, it should be used in RTL +templates which need to be processed by the @code{define_subst}. So, +the original RTL template should be changed: + +@smallexample +(define_insn "maxsi<add_clobber_name>" + [(set (match_operand:SI 0 "register_operand" "=r") + (max:SI + (match_operand:SI 1 "register_operand" "r") + (match_operand:SI 2 "register_operand" "r")))] + "" + "max\t@{%2, %1, %0|%0, %1, %2@}" + [@dots{}]) +@end smallexample + +The result of the @code{define_subst} usage would look like the following: + +@smallexample +(define_insn "maxsi_noclobber" + [(set (match_operand:SI 0 "register_operand" "=r") + (max:SI + (match_operand:SI 1 "register_operand" "r") + (match_operand:SI 2 "register_operand" "r")))] + "" + "max\t@{%2, %1, %0|%0, %1, %2@}" + [@dots{}]) +(define_insn "maxsi_clobber" + [(set (match_operand:SI 0 "register_operand" "=r") + (max:SI + (match_operand:SI 1 "register_operand" "r") + (match_operand:SI 2 "register_operand" "r"))) + (clobber (reg:CC FLAGS_REG))] + "" + "max\t@{%2, %1, %0|%0, %1, %2@}" + [@dots{}]) +@end smallexample + +@node Define Subst Pattern Matching +@subsection Pattern Matching in @code{define_subst} +@cindex define_subst + +All expressions, allowed in @code{define_insn} or @code{define_expand}, +are allowed in the input-template of @code{define_subst}, except +@code{match_par_dup}, @code{match_scratch}, @code{match_parallel}. The +meanings of expressions in the input-template were changed: + +@code{match_operand} matches any expression (possibly, a subtree in +RTL-template), if modes of the @code{match_operand} and this expression +are the same, or mode of the @code{match_operand} is @code{VOIDmode}, or +this expression is @code{match_dup}, @code{match_op_dup}. If the +expression is @code{match_operand} too, and predicate of +@code{match_operand} from the input pattern is not empty, then the +predicates are compared. That can be used for more accurate filtering +of accepted RTL-templates. + +@code{match_operator} matches common operators (like @code{plus}, +@code{minus}), @code{unspec}, @code{unspec_volatile} operators and +@code{match_operator}s from the original pattern if the modes match and +@code{match_operator} from the input pattern has the same number of +operands as the operator from the original pattern. + +@node Define Subst Output Template +@subsection Generation of output template in @code{define_subst} +@cindex define_subst + +If all necessary checks for @code{define_subst} application pass, a new +RTL-pattern, based on the output-template, is created to replace the old +template. Like in input-patterns, meanings of some RTL expressions are +changed when they are used in output-patterns of a @code{define_subst}. +Thus, @code{match_dup} is used for copying the whole expression from the +original pattern, which matched corresponding @code{match_operand} from +the input pattern. + +@code{match_dup N} is used in the output template to be replaced with +the expression from the original pattern, which matched +@code{match_operand N} from the input pattern. As a consequence, +@code{match_dup} cannot be used to point to @code{match_operand}s from +the output pattern, it should always refer to a @code{match_operand} +from the input pattern. + +In the output template one can refer to the expressions from the +original pattern and create new ones. For instance, some operands could +be added by means of standard @code{match_operand}. + +After replacing @code{match_dup} with some RTL-subtree from the original +pattern, it could happen that several @code{match_operand}s in the +output pattern have the same indexes. It is unknown, how many and what +indexes would be used in the expression which would replace +@code{match_dup}, so such conflicts in indexes are inevitable. To +overcome this issue, @code{match_operands} and @code{match_operators}, +which were introduced into the output pattern, are renumerated when all +@code{match_dup}s are replaced. + +Number of alternatives in @code{match_operand}s introduced into the +output template @code{M} could differ from the number of alternatives in +the original pattern @code{N}, so in the resultant pattern there would +be @code{N*M} alternatives. Thus, constraints from the original pattern +would be duplicated @code{N} times, constraints from the output pattern +would be duplicated @code{M} times, producing all possible combinations. +@end ifset + +@ifset INTERNALS @node Constant Definitions @section Constant Definitions @cindex constant definitions @@ -9009,6 +9288,7 @@ facilities to make this process easier. * Mode Iterators:: Generating variations of patterns for different modes. * Code Iterators:: Doing the same for codes. * Int Iterators:: Doing the same for integers. +* Subst Iterators:: Generating variations of patterns for define_subst. @end menu @node Mode Iterators @@ -9357,4 +9637,51 @@ This is equivalent to: @end smallexample +@node Subst Iterators +@subsection Subst Iterators +@cindex subst iterators in @file{.md} files +@findex define_subst +@findex define_subst_attr + +Subst iterators are special type of iterators with the following +restrictions: they could not be declared explicitly, they always have +only two values, and they do not have explicit dedicated name. +Subst-iterators are triggered only when corresponding subst-attribute is +used in RTL-pattern. + +Subst iterators transform templates in the following way: the templates +are duplicated, the subst-attributes in these templates are replaced +with the corresponding values, and a new attribute is implicitly added +to the given @code{define_insn}/@code{define_expand}. The name of the +added attribute matches the name of @code{define_subst}. Such +attributes are declared implicitly, and it is not allowed to have a +@code{define_attr} named as a @code{define_subst}. + +Each subst iterator is linked to a @code{define_subst}. It is declared +implicitly by the first appearance of the corresponding +@code{define_subst_attr}, and it is not allowed to define it explicitly. + +Declarations of subst-attributes have the following syntax: + +@findex define_subst_attr +@smallexample +(define_subst_attr "@var{name}" + "@var{subst-name}" + "@var{no-subst-value}" + "@var{subst-applied-value}") +@end smallexample + +@var{name} is a string with which the given subst-attribute could be +referred to. + +@var{subst-name} shows which @code{define_subst} should be applied to an +RTL-template if the given subst-attribute is present in the +RTL-template. + +@var{no-subst-value} is a value with which subst-attribute would be +replaced in the first copy of the original RTL-template. + +@var{subst-applied-value} is a value with which subst-attribute would be +replaced in the second copy of the original RTL-template. + @end ifset diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi index ec8263f4087..0f29326690f 100644 --- a/gcc/doc/sourcebuild.texi +++ b/gcc/doc/sourcebuild.texi @@ -1556,6 +1556,10 @@ ARM target generates Thumb-2 code for @code{-mthumb}. ARM target supports @code{-mfpu=vfp -mfloat-abi=softfp}. Some multilibs may be incompatible with these options. +@item arm_v8_vfp_ok +ARM target supports @code{-mfpu=fp-armv8 -mfloat-abi=softfp}. +Some multilibs may be incompatible with these options. + @item arm_prefer_ldrd_strd ARM target prefers @code{LDRD} and @code{STRD} instructions over @code{LDM} and @code{STM} instructions. diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index eeb3f083a9b..ef47b1434a1 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -4849,41 +4849,6 @@ used by the exception handling mechanism, and so should be considered live on entry to an exception edge. @end defmac -@defmac DELAY_SLOTS_FOR_EPILOGUE -Define this macro if the function epilogue contains delay slots to which -instructions from the rest of the function can be ``moved''. The -definition should be a C expression whose value is an integer -representing the number of delay slots there. -@end defmac - -@defmac ELIGIBLE_FOR_EPILOGUE_DELAY (@var{insn}, @var{n}) -A C expression that returns 1 if @var{insn} can be placed in delay -slot number @var{n} of the epilogue. - -The argument @var{n} is an integer which identifies the delay slot now -being considered (since different slots may have different rules of -eligibility). It is never negative and is always less than the number -of epilogue delay slots (what @code{DELAY_SLOTS_FOR_EPILOGUE} returns). -If you reject a particular insn for a given delay slot, in principle, it -may be reconsidered for a subsequent delay slot. Also, other insns may -(at least in principle) be considered for the so far unfilled delay -slot. - -@findex epilogue_delay_list -@findex crtl->epilogue_delay_list -@findex final_scan_insn -The insns accepted to fill the epilogue delay slots are put in an RTL -list made with @code{insn_list} objects, stored in -@code{crtl->epilogue_delay_list}. The insn for the first -delay slot comes first in the list. Your definition of the macro -@code{TARGET_ASM_FUNCTION_EPILOGUE} should fill the delay slots by -outputting the insns in this list, usually by calling -@code{final_scan_insn}. - -You need not define this macro if you did not define -@code{DELAY_SLOTS_FOR_EPILOGUE}. -@end defmac - @deftypefn {Target Hook} void TARGET_ASM_OUTPUT_MI_THUNK (FILE *@var{file}, tree @var{thunk_fndecl}, HOST_WIDE_INT @var{delta}, HOST_WIDE_INT @var{vcall_offset}, tree @var{function}) A function that outputs the assembler code for a thunk function, used to implement C++ virtual function calls with multiple diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in index 2c9cb1045e7..f3945a46d3d 100644 --- a/gcc/doc/tm.texi.in +++ b/gcc/doc/tm.texi.in @@ -4778,41 +4778,6 @@ used by the exception handling mechanism, and so should be considered live on entry to an exception edge. @end defmac -@defmac DELAY_SLOTS_FOR_EPILOGUE -Define this macro if the function epilogue contains delay slots to which -instructions from the rest of the function can be ``moved''. The -definition should be a C expression whose value is an integer -representing the number of delay slots there. -@end defmac - -@defmac ELIGIBLE_FOR_EPILOGUE_DELAY (@var{insn}, @var{n}) -A C expression that returns 1 if @var{insn} can be placed in delay -slot number @var{n} of the epilogue. - -The argument @var{n} is an integer which identifies the delay slot now -being considered (since different slots may have different rules of -eligibility). It is never negative and is always less than the number -of epilogue delay slots (what @code{DELAY_SLOTS_FOR_EPILOGUE} returns). -If you reject a particular insn for a given delay slot, in principle, it -may be reconsidered for a subsequent delay slot. Also, other insns may -(at least in principle) be considered for the so far unfilled delay -slot. - -@findex epilogue_delay_list -@findex crtl->epilogue_delay_list -@findex final_scan_insn -The insns accepted to fill the epilogue delay slots are put in an RTL -list made with @code{insn_list} objects, stored in -@code{crtl->epilogue_delay_list}. The insn for the first -delay slot comes first in the list. Your definition of the macro -@code{TARGET_ASM_FUNCTION_EPILOGUE} should fill the delay slots by -outputting the insns in this list, usually by calling -@code{final_scan_insn}. - -You need not define this macro if you did not define -@code{DELAY_SLOTS_FOR_EPILOGUE}. -@end defmac - @hook TARGET_ASM_OUTPUT_MI_THUNK A function that outputs the assembler code for a thunk function, used to implement C++ virtual function calls with multiple |