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-rw-r--r--gcc/testsuite/gcc.dg/compat/struct-layout-1_generate.c12
-rw-r--r--gcc/testsuite/gcc.dg/compat/union-m128-1_main.c21
-rw-r--r--gcc/testsuite/gcc.dg/compat/union-m128-1_x.c7
-rw-r--r--gcc/testsuite/gcc.dg/compat/union-m128-1_y.c7
-rw-r--r--gcc/testsuite/gcc.dg/compat/vector-1_x.c8
-rw-r--r--gcc/testsuite/gcc.dg/compat/vector-1_y.c4
-rw-r--r--gcc/testsuite/gcc.dg/compat/vector-1a_main.c26
-rw-r--r--gcc/testsuite/gcc.dg/compat/vector-1a_x.c3
-rw-r--r--gcc/testsuite/gcc.dg/compat/vector-1a_y.c3
-rw-r--r--gcc/testsuite/gcc.dg/compat/vector-2_x.c4
-rw-r--r--gcc/testsuite/gcc.dg/compat/vector-2_y.c2
-rw-r--r--gcc/testsuite/gcc.dg/compat/vector-2a_main.c26
-rw-r--r--gcc/testsuite/gcc.dg/compat/vector-2a_x.c3
-rw-r--r--gcc/testsuite/gcc.dg/compat/vector-2a_y.c3
-rw-r--r--gcc/testsuite/gcc.dg/compat/vector-defs.h14
15 files changed, 122 insertions, 21 deletions
diff --git a/gcc/testsuite/gcc.dg/compat/struct-layout-1_generate.c b/gcc/testsuite/gcc.dg/compat/struct-layout-1_generate.c
index c53c3e8c2bd..f6a217e6f56 100644
--- a/gcc/testsuite/gcc.dg/compat/struct-layout-1_generate.c
+++ b/gcc/testsuite/gcc.dg/compat/struct-layout-1_generate.c
@@ -186,30 +186,42 @@ struct types vector_types[] = {
/* vector-defs.h typedefs */
{ "v8qi", TYPE_OTHER, 0, 0 },
{ "v16qi", TYPE_OTHER, 0, 0 },
+{ "v32qi", TYPE_OTHER, 0, 0 },
{ "v2hi", TYPE_OTHER, 0, 0 },
{ "v4hi", TYPE_OTHER, 0, 0 },
{ "v8hi", TYPE_OTHER, 0, 0 },
+{ "v16hi", TYPE_OTHER, 0, 0 },
{ "v2si", TYPE_OTHER, 0, 0 },
{ "v4si", TYPE_OTHER, 0, 0 },
+{ "v8si", TYPE_OTHER, 0, 0 },
{ "v1di", TYPE_OTHER, 0, 0 },
{ "v2di", TYPE_OTHER, 0, 0 },
+{ "v4di", TYPE_OTHER, 0, 0 },
{ "v2sf", TYPE_OTHER, 0, 0 },
{ "v4sf", TYPE_OTHER, 0, 0 },
+{ "v8sf", TYPE_OTHER, 0, 0 },
{ "v16sf", TYPE_OTHER, 0, 0 },
{ "v2df", TYPE_OTHER, 0, 0 },
+{ "v4df", TYPE_OTHER, 0, 0 },
{ "u8qi", TYPE_OTHER, 0, 0 },
{ "u16qi", TYPE_OTHER, 0, 0 },
+{ "u32qi", TYPE_OTHER, 0, 0 },
{ "u2hi", TYPE_OTHER, 0, 0 },
{ "u4hi", TYPE_OTHER, 0, 0 },
{ "u8hi", TYPE_OTHER, 0, 0 },
+{ "u16hi", TYPE_OTHER, 0, 0 },
{ "u2si", TYPE_OTHER, 0, 0 },
{ "u4si", TYPE_OTHER, 0, 0 },
+{ "u8si", TYPE_OTHER, 0, 0 },
{ "u1di", TYPE_OTHER, 0, 0 },
{ "u2di", TYPE_OTHER, 0, 0 },
+{ "u4di", TYPE_OTHER, 0, 0 },
{ "u2sf", TYPE_OTHER, 0, 0 },
{ "u4sf", TYPE_OTHER, 0, 0 },
+{ "u8sf", TYPE_OTHER, 0, 0 },
{ "u16sf", TYPE_OTHER, 0, 0 },
{ "u2df", TYPE_OTHER, 0, 0 },
+{ "u4df", TYPE_OTHER, 0, 0 },
{ "__m64", TYPE_OTHER, 0, 0 },
{ "__m128", TYPE_OTHER, 0, 0 }
#define NVTYPES2 (sizeof (vector_types) / sizeof (vector_types[0]))
diff --git a/gcc/testsuite/gcc.dg/compat/union-m128-1_main.c b/gcc/testsuite/gcc.dg/compat/union-m128-1_main.c
index 69dd34dce57..11f872154eb 100644
--- a/gcc/testsuite/gcc.dg/compat/union-m128-1_main.c
+++ b/gcc/testsuite/gcc.dg/compat/union-m128-1_main.c
@@ -1,6 +1,8 @@
+/* { dg-skip-if "test SSE2 support" { ! { i?86-*-* x86_64-*-* } } } */
/* { dg-options "-O" } */
-#ifdef __x86_64__
+#include "cpuid.h"
+
/* Test function argument passing. PR target/15301. */
extern void union_m128_1_x (void);
@@ -9,13 +11,14 @@ extern void exit (int);
int
main ()
{
- union_m128_1_x ();
+ unsigned int eax, ebx, ecx, edx;
+
+ if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
+ return 0;
+
+ /* Run SSE vector test only if host has SSE2 support. */
+ if (edx & bit_SSE2)
+ union_m128_1_x ();
+
exit (0);
}
-#else
-int
-main ()
-{
- return 0;
-}
-#endif
diff --git a/gcc/testsuite/gcc.dg/compat/union-m128-1_x.c b/gcc/testsuite/gcc.dg/compat/union-m128-1_x.c
index 06a4ef5ffdb..1f92303d95b 100644
--- a/gcc/testsuite/gcc.dg/compat/union-m128-1_x.c
+++ b/gcc/testsuite/gcc.dg/compat/union-m128-1_x.c
@@ -1,6 +1,5 @@
-/* { dg-options "-O" } */
+/* { dg-options "-O -msse2" } */
-#ifdef __x86_64__
#include "union-m128-1.h"
SS_union_mi128 un;
@@ -23,7 +22,3 @@ union_m128_1_x ()
foo(un);
foo(st);
}
-#else
-int dummy_x;
-#endif
-
diff --git a/gcc/testsuite/gcc.dg/compat/union-m128-1_y.c b/gcc/testsuite/gcc.dg/compat/union-m128-1_y.c
index 2b6eb0a6ee8..be9d6e8f3d5 100644
--- a/gcc/testsuite/gcc.dg/compat/union-m128-1_y.c
+++ b/gcc/testsuite/gcc.dg/compat/union-m128-1_y.c
@@ -1,6 +1,5 @@
-/* { dg-options "-O" } */
+/* { dg-options "-O -msse2" } */
-#ifdef __x86_64__
#include <stdlib.h>
#include "union-m128-1.h"
@@ -26,7 +25,3 @@ foo (SS_struct_mi128 st)
|| x.u [1] != 0xfedcba9876543210LL)
abort ();
}
-#else
-int dummy_y;
-#endif
-
diff --git a/gcc/testsuite/gcc.dg/compat/vector-1_x.c b/gcc/testsuite/gcc.dg/compat/vector-1_x.c
index 11995b496e5..ab4f88bf48b 100644
--- a/gcc/testsuite/gcc.dg/compat/vector-1_x.c
+++ b/gcc/testsuite/gcc.dg/compat/vector-1_x.c
@@ -8,13 +8,17 @@
SETUP (8, qi);
SETUP (16, qi);
+SETUP (32, qi);
SETUP (2, hi);
SETUP (4, hi);
SETUP (8, hi);
+SETUP (16, hi);
SETUP (2, si);
SETUP (4, si);
+SETUP (8, si);
SETUP (1, di);
SETUP (2, di);
+SETUP (4, di);
#endif
@@ -26,13 +30,17 @@ vector_1_x (void)
CHECK (8, qi);
CHECK (16, qi);
+ CHECK (32, qi);
CHECK (2, hi);
CHECK (4, hi);
CHECK (8, hi);
+ CHECK (16, hi);
CHECK (2, si);
CHECK (4, si);
+ CHECK (8, si);
CHECK (1, di);
CHECK (2, di);
+ CHECK (4, di);
DEBUG_FINI
diff --git a/gcc/testsuite/gcc.dg/compat/vector-1_y.c b/gcc/testsuite/gcc.dg/compat/vector-1_y.c
index 1cec61734b4..5a09c0eadb6 100644
--- a/gcc/testsuite/gcc.dg/compat/vector-1_y.c
+++ b/gcc/testsuite/gcc.dg/compat/vector-1_y.c
@@ -8,12 +8,16 @@
TEST (8, qi, 101)
TEST (16, qi, 101)
+TEST (32, qi, 90)
TEST (2, hi, 201)
TEST (4, hi, 202)
TEST (8, hi, 203)
+TEST (16, hi, 203)
TEST (2, si, 301)
TEST (4, si, 302)
+TEST (8, si, 303)
TEST (1, di, 401)
TEST (2, di, 402)
+TEST (4, di, 403)
#endif
diff --git a/gcc/testsuite/gcc.dg/compat/vector-1a_main.c b/gcc/testsuite/gcc.dg/compat/vector-1a_main.c
new file mode 100644
index 00000000000..76fb2915e1d
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/compat/vector-1a_main.c
@@ -0,0 +1,26 @@
+/* { dg-skip-if "test SSE2 vector" { ! { i?86-*-* x86_64-*-* } } } */
+
+/* Test compatibility of vector types: layout between separately-compiled
+ modules, parameter passing, and function return. This test uses
+ vectors of integer values. */
+
+#include "cpuid.h"
+
+extern void vector_1_x (void);
+extern void exit (int);
+int fails;
+
+int
+main ()
+{
+ unsigned int eax, ebx, ecx, edx;
+
+ if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
+ return 0;
+
+ /* Run SSE vector test only if host has SSE2 support. */
+ if (edx & bit_SSE2)
+ vector_1_x ();
+
+ exit (0);
+}
diff --git a/gcc/testsuite/gcc.dg/compat/vector-1a_x.c b/gcc/testsuite/gcc.dg/compat/vector-1a_x.c
new file mode 100644
index 00000000000..aa0fa7f208c
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/compat/vector-1a_x.c
@@ -0,0 +1,3 @@
+/* { dg-options "-w -mno-mmx -msse2" } */
+
+#include "vector-1_x.c"
diff --git a/gcc/testsuite/gcc.dg/compat/vector-1a_y.c b/gcc/testsuite/gcc.dg/compat/vector-1a_y.c
new file mode 100644
index 00000000000..2c88e198845
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/compat/vector-1a_y.c
@@ -0,0 +1,3 @@
+/* { dg-options "-w -mno-mmx -msse2" } */
+
+#include "vector-1_y.c"
diff --git a/gcc/testsuite/gcc.dg/compat/vector-2_x.c b/gcc/testsuite/gcc.dg/compat/vector-2_x.c
index de5f29c2688..d08c77fe3a0 100644
--- a/gcc/testsuite/gcc.dg/compat/vector-2_x.c
+++ b/gcc/testsuite/gcc.dg/compat/vector-2_x.c
@@ -10,7 +10,9 @@
SETUP (2, sf);
SETUP (4, sf);
SETUP (16, sf);
+SETUP (8, sf);
SETUP (2, df);
+SETUP (4, df);
#endif
@@ -22,7 +24,9 @@ vector_2_x (void)
CHECK (2, sf);
CHECK (4, sf);
+ CHECK (8, sf);
CHECK (16, sf);
+ CHECK (4, df);
CHECK (2, df);
DEBUG_FINI
diff --git a/gcc/testsuite/gcc.dg/compat/vector-2_y.c b/gcc/testsuite/gcc.dg/compat/vector-2_y.c
index 10d7a064532..fd5830c35b3 100644
--- a/gcc/testsuite/gcc.dg/compat/vector-2_y.c
+++ b/gcc/testsuite/gcc.dg/compat/vector-2_y.c
@@ -9,7 +9,9 @@
TEST (2, sf, 301.0)
TEST (4, sf, 302.0)
+TEST (8, sf, 303.0)
TEST (16, sf, 304.0)
TEST (2, df, 402.0)
+TEST (4, df, 402.0)
#endif
diff --git a/gcc/testsuite/gcc.dg/compat/vector-2a_main.c b/gcc/testsuite/gcc.dg/compat/vector-2a_main.c
new file mode 100644
index 00000000000..96c1111fddc
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/compat/vector-2a_main.c
@@ -0,0 +1,26 @@
+/* { dg-skip-if "test SSE2 support" { ! { i?86-*-* x86_64-*-* } } } */
+
+/* Test compatibility of vector types: layout between separately-compiled
+ modules, parameter passing, and function return. This test uses
+ vectors of floating points values. */
+
+#include "cpuid.h"
+
+extern void vector_2_x (void);
+extern void exit (int);
+int fails;
+
+int
+main ()
+{
+ unsigned int eax, ebx, ecx, edx;
+
+ if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
+ return 0;
+
+ /* Run SSE vector test only if host has SSE2 support. */
+ if (edx & bit_SSE2)
+ vector_2_x ();
+
+ exit (0);
+}
diff --git a/gcc/testsuite/gcc.dg/compat/vector-2a_x.c b/gcc/testsuite/gcc.dg/compat/vector-2a_x.c
new file mode 100644
index 00000000000..fcfacec04e8
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/compat/vector-2a_x.c
@@ -0,0 +1,3 @@
+/* { dg-options "-w -mno-mmx -msse2" } */
+
+#include "vector-2_x.c"
diff --git a/gcc/testsuite/gcc.dg/compat/vector-2a_y.c b/gcc/testsuite/gcc.dg/compat/vector-2a_y.c
new file mode 100644
index 00000000000..3797acb6a57
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/compat/vector-2a_y.c
@@ -0,0 +1,3 @@
+/* { dg-options "-w -mno-mmx -msse2" } */
+
+#include "vector-2_y.c"
diff --git a/gcc/testsuite/gcc.dg/compat/vector-defs.h b/gcc/testsuite/gcc.dg/compat/vector-defs.h
index 7574e28c53d..f2f050527ec 100644
--- a/gcc/testsuite/gcc.dg/compat/vector-defs.h
+++ b/gcc/testsuite/gcc.dg/compat/vector-defs.h
@@ -56,6 +56,20 @@ typedef float __attribute__((mode(V2DF))) v2df;
#endif
+typedef qi __attribute__((vector_size (32))) v32qi;
+typedef hi __attribute__((vector_size (32))) v16hi;
+typedef si __attribute__((vector_size (32))) v8si;
+typedef di __attribute__((vector_size (32))) v4di;
+typedef sf __attribute__((vector_size (32))) v8sf;
+typedef df __attribute__((vector_size (32))) v4df;
+
+typedef union U32QI { v32qi v; qi a[32]; } u32qi;
+typedef union U16HI { v16hi v; hi a[16]; } u16hi;
+typedef union U8SI { v8si v; si a[8]; } u8si;
+typedef union U4DI { v4di v; di a[4]; } u4di;
+typedef union U8SF { v8sf v; sf a[8]; } u8sf;
+typedef union U4DF { v4df v; df a[4]; } u4df;
+
typedef union U8QI { v8qi v; qi a[8]; } u8qi;
typedef union U16QI { v16qi v; qi a[16]; } u16qi;