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-rw-r--r--gcc/ChangeLog9
-rw-r--r--gcc/config/sparc/sparc-protos.h2
-rw-r--r--gcc/config/sparc/sparc.c69
-rw-r--r--gcc/config/sparc/sparc.md4
-rw-r--r--gcc/recog.c57
-rw-r--r--gcc/recog.h3
6 files changed, 71 insertions, 73 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0e78d529761..ea1687fba81 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2002-05-03 Richard Henderson <rth@redhat.com>
+
+ * recog.c (store_data_bypass_p, if_test_bypass_p): New.
+ * recog.h: Declare them.
+
+ * config/sparc/sparc.c (ultrasparc_store_bypass_p): Remove.
+ * config/sparc/sparc.md: Use store_data_bypass_p instead.
+ * config/sparc/sparc-protos.h: Update.
+
2002-05-03 Jason Thorpe <thorpej@wasabisystems.com>
* config/sparc/netbsd-elf.c (CPP_SUBTARGET_SPEC64): Remove
diff --git a/gcc/config/sparc/sparc-protos.h b/gcc/config/sparc/sparc-protos.h
index 5f6343bf9ac..fd372ded33c 100644
--- a/gcc/config/sparc/sparc-protos.h
+++ b/gcc/config/sparc/sparc-protos.h
@@ -120,8 +120,6 @@ extern char *sparc_v8plus_shift PARAMS ((rtx *, rtx, const char *));
32 bits of REG are 0 before INSN. */
extern int sparc_check_64 PARAMS ((rtx, rtx));
extern rtx gen_df_reg PARAMS ((rtx, int));
-/* Used for DFA scheduling when cpu is ultrasparc. */
-extern int ultrasparc_store_bypass_p PARAMS ((rtx, rtx));
extern int sparc_extra_constraint_check PARAMS ((rtx, int, int));
#endif /* RTX_CODE */
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 30b6e8992da..3a5053defb1 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -7701,75 +7701,6 @@ sparc_cycle_display (clock, last)
return last;
}
-/* Make sure that the dependency between OUT_INSN and
- IN_INSN (a store) is on the store data not the address
- operand(s) of the store. */
-
-int
-ultrasparc_store_bypass_p (out_insn, in_insn)
- rtx out_insn, in_insn;
-{
- rtx out_pat, in_pat;
- unsigned int regno;
-
- if (recog_memoized (in_insn) < 0)
- return 0;
-
- if (get_attr_type (in_insn) != TYPE_STORE
- && get_attr_type (in_insn) != TYPE_FPSTORE)
- abort ();
-
- out_pat = PATTERN (out_insn);
- in_pat = PATTERN (in_insn);
-
- if ((GET_CODE (out_pat) != SET
- && GET_CODE (out_pat) != PARALLEL)
- || GET_CODE (in_pat) != SET)
- abort ();
-
- if (GET_CODE (SET_SRC (in_pat)) == REG)
- {
- regno = REGNO (SET_SRC (in_pat));
- }
- else if (GET_CODE (SET_SRC (in_pat)) == SUBREG)
- {
- regno = REGNO (SUBREG_REG (SET_SRC (in_pat)));
- }
- else
- return 0;
-
- if (GET_CODE (out_pat) == PARALLEL)
- {
- int i;
-
- for (i = 0; i < XVECLEN (out_pat, 0); i++)
- {
- rtx exp = XVECEXP (out_pat, 0, i);
-
- if (GET_CODE (exp) != SET)
- return 0;
-
- if (GET_CODE (SET_DEST (exp)) == REG
- && regno == REGNO (SET_DEST (exp)))
- return 1;
-
- if (GET_CODE (SET_DEST (exp)) == SUBREG
- && regno == REGNO (SUBREG_REG (SET_DEST (exp))))
- return 1;
- }
- }
- else if (GET_CODE (SET_DEST (out_pat)) == REG)
- {
- return regno == REGNO (SET_DEST (out_pat));
- }
- else if (GET_CODE (SET_DEST (out_pat)) == SUBREG)
- {
- return regno == REGNO (SUBREG_REG (SET_DEST (out_pat)));
- }
-
- return 0;
-}
-
static int
sparc_issue_rate ()
{
diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index 8d246d009f3..a5b90fece71 100644
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -624,7 +624,7 @@
;; We need a special guard function because this bypass does
;; not apply to the address inputs of the store.
(define_bypass 0 "us1_simple_ieuN,us1_simple_ieu1,us1_simple_ieu0,us1_faddsub_single,us1_faddsub_double,us1_fmov_single,us1_fmov_double,us1_fcmov_single,us1_fcmov_double,us1_fmult_single,us1_fmult_double" "us1_store"
- "ultrasparc_store_bypass_p")
+ "store_data_bypass_p")
;; An integer branch may execute in the same cycle as the compare
;; creating the condition codes.
@@ -758,7 +758,7 @@
;; We need a special guard function because this bypass does
;; not apply to the address inputs of the store.
(define_bypass 0 "us3_integer,us3_faddsub,us3_fmov,us3_fcmov,us3_fmult" "us3_store"
- "ultrasparc_store_bypass_p")
+ "store_data_bypass_p")
;; An integer branch may execute in the same cycle as the compare
;; creating the condition codes.
diff --git a/gcc/recog.c b/gcc/recog.c
index 2720d8e07e3..2b85d4b0a25 100644
--- a/gcc/recog.c
+++ b/gcc/recog.c
@@ -3275,3 +3275,60 @@ peephole2_optimize (dump_file)
#endif
}
#endif /* HAVE_peephole2 */
+
+/* Common predicates for use with define_bypass. */
+
+/* True if the dependency between OUT_INSN and IN_INSN is on the store
+ data not the address operand(s) of the store. Both OUT_INSN and IN_INSN
+ must be single_set. */
+
+int
+store_data_bypass_p (out_insn, in_insn)
+ rtx out_insn, in_insn;
+{
+ rtx out_set, in_set;
+
+ out_set = single_set (out_insn);
+ if (! out_set)
+ abort ();
+
+ in_set = single_set (in_insn);
+ if (! in_set)
+ abort ();
+
+ if (GET_CODE (SET_DEST (in_set)) != MEM)
+ return false;
+
+ if (reg_mentioned_p (SET_DEST (out_set), SET_DEST (in_set)))
+ return false;
+
+ return true;
+}
+
+/* True if the dependency between OUT_INSN and IN_INSN is in the
+ IF_THEN_ELSE condition, and not the THEN or ELSE branch.
+ Both OUT_INSN and IN_INSN must be single_set. */
+
+int
+if_test_bypass_p (out_insn, in_insn)
+ rtx out_insn, in_insn;
+{
+ rtx out_set, in_set;
+
+ out_set = single_set (out_insn);
+ if (! out_set)
+ abort ();
+
+ in_set = single_set (in_insn);
+ if (! in_set)
+ abort ();
+
+ if (GET_CODE (SET_SRC (in_set)) != IF_THEN_ELSE)
+ return false;
+
+ if (reg_mentioned_p (SET_DEST (out_set), XEXP (in_set, 1))
+ || reg_mentioned_p (SET_DEST (out_set), XEXP (in_set, 2)))
+ return false;
+
+ return true;
+}
diff --git a/gcc/recog.h b/gcc/recog.h
index ff96e47a944..4d474405cd4 100644
--- a/gcc/recog.h
+++ b/gcc/recog.h
@@ -137,6 +137,9 @@ extern rtx peep2_find_free_register PARAMS ((int, int, const char *,
extern void peephole2_optimize PARAMS ((FILE *));
extern rtx peephole2_insns PARAMS ((rtx, rtx, int *));
+extern int store_data_bypass_p PARAMS ((rtx, rtx));
+extern int if_test_bypass_p PARAMS ((rtx, rtx));
+
/* Nonzero means volatile operands are recognized. */
extern int volatile_ok;