diff options
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64.c | 6 |
2 files changed, 11 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index edfc0b4a46e..d3a632646d4 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,10 @@ 2016-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Handle + CSEL of zero_extended registers. + +2016-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + * config/aarch64/aarch64.c (aarch64_rtx_costs, COMPARE case): Handle COMPARE of ZERO_EXTRACT against zero form of TST-immediate. diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index fee917f135b..73ef7e5a554 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -6145,6 +6145,12 @@ aarch64_if_then_else_costs (rtx op0, rtx op1, rtx op2, int *cost, bool speed) || GET_CODE (op1) == NOT || (GET_CODE (op1) == PLUS && XEXP (op1, 1) == const1_rtx)) op1 = XEXP (op1, 0); + else if (GET_CODE (op1) == ZERO_EXTEND && GET_CODE (op2) == ZERO_EXTEND) + { + /* CSEL with zero-extension (*cmovdi_insn_uxtw). */ + op1 = XEXP (op1, 0); + op2 = XEXP (op2, 0); + } *cost += rtx_cost (op1, VOIDmode, IF_THEN_ELSE, 1, speed); *cost += rtx_cost (op2, VOIDmode, IF_THEN_ELSE, 2, speed); |