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-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/i386/i386.c6
2 files changed, 10 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7b541708dff..02b82890f90 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2004-09-03 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/i386/i386.c (x86_branch_hints): Remove m_PENT4 and
+ m_NOCONA.
+
2004-09-03 Richard Henderson <rth@redhat.com>
PR middle-end/9997
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index f50b81bf44f..760c7f0d997 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -527,7 +527,11 @@ const int x86_unroll_strlen = m_486 | m_PENT | m_PPRO | m_ATHLON_K8 | m_K6;
const int x86_cmove = m_PPRO | m_ATHLON_K8 | m_PENT4 | m_NOCONA;
const int x86_3dnow_a = m_ATHLON_K8;
const int x86_deep_branch = m_PPRO | m_K6 | m_ATHLON_K8 | m_PENT4 | m_NOCONA;
-const int x86_branch_hints = m_PENT4 | m_NOCONA;
+/* Branch hints were put in P4 based on simulation result. But
+ after P4 was made, no performance benefit was observed with
+ branch hints. It also increases the code size. As the result,
+ icc never generates branch hints. */
+const int x86_branch_hints = 0;
const int x86_use_sahf = m_PPRO | m_K6 | m_PENT4 | m_NOCONA;
const int x86_partial_reg_stall = m_PPRO;
const int x86_use_loop = m_K6;