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-rw-r--r--libgcc/config/mips/mips16.S5
1 files changed, 5 insertions, 0 deletions
diff --git a/libgcc/config/mips/mips16.S b/libgcc/config/mips/mips16.S
index 82675018002..944c7c884ed 100644
--- a/libgcc/config/mips/mips16.S
+++ b/libgcc/config/mips/mips16.S
@@ -89,8 +89,13 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
OPCODE, OP2; \
.set reorder
+#if __mips >= 4
+/* Coprocessor moves are interlocked from the MIPS IV ISA up. */
+#define DELAYf(T, OPCODE, OP2) DELAYt (T, OPCODE, OP2)
+#else
/* Use "OPCODE. OP2" and jump to T. */
#define DELAYf(T, OPCODE, OP2) OPCODE, OP2; jr T
+#endif
/* MOVE_SF_BYTE0(D)
Move the first single-precision floating-point argument between