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* * lib/target-supports.exp (check_effective_target_arm_nothumb):schwab2014-07-242-4/+9
* [AArch64] Optimize epilogue in the presence of an outgoing args area.mshawcroft2014-07-244-17/+21
* * config/rx/rx.md (stack_push): Adjust RTL to account for the factnickc2014-07-244-3/+8
* PR c/57653mpolacek2014-07-247-0/+31
* Add missing break statement.tschwinge2014-07-242-0/+5
* 2014-07-24 Richard Biener <rguenther@suse.de>rguenth2014-07-246-14/+30
* remove useless unused attributes in i386 codetbsaunde2014-07-246-85/+64
* Daily bump.gccadmin2014-07-241-1/+1
* Add a blank linehjl2014-07-231-0/+1
* Update x32 baseline_symbols.txthjl2014-07-232-0/+26
* [AArch64] Prologue and epilogue test cases.mshawcroft2014-07-2317-0/+338
* [AArch64] Simplify epilogue expansion using new helper functions.mshawcroft2014-07-233-48/+74
* [AArch64] Simplify prologue expand using new helper functions.mshawcroft2014-07-233-35/+66
* [AArch64] Split save restore path.mshawcroft2014-07-232-35/+75
* [AArch64] Unify vector and core register save/restore code.mshawcroft2014-07-232-76/+30
* [AArch64] Use helper functions to handle multiple modes.mshawcroft2014-07-232-4/+45
* [AArch64] Refactor code out into aarch64_next_callee_savemshawcroft2014-07-232-99/+95
* [AArch64] Hoist calculation of register rtx.mshawcroft2014-07-232-36/+24
* [AArch64] Remove useless variable 'increment'mshawcroft2014-07-232-5/+8
* [AArch64] Use register offset in cfun->machine->frame.reg_offsetmshawcroft2014-07-232-27/+29
* Revert r212893:amker2014-07-2312-1197/+26
* [AArch64] Remove useless parameter base_rtx.mshawcroft2014-07-232-7/+12
* [AArch64] Remove useless local variable.mshawcroft2014-07-232-2/+7
* [AArch64] Consistent parameter types in prologue/epilogue generation.mshawcroft2014-07-232-1/+6
* [AArch64] GNU-Stylize some un-formatted code.mshawcroft2014-07-232-23/+33
* Remove redundant testshjl2014-07-232-4/+7
* 2014-07-23 Sebastian Huber <sebastian.huber@embedded-brains.de>joel2014-07-232-2/+131
* 2014-07-23 Sebastian Huber <sebastian.huber@embedded-brains.de>joel2014-07-234-1/+180
* * c-c++-common/ubsan/bounds-2.c (fn4): Adjust to check the array sizempolacek2014-07-232-2/+9
* rs6000: fix for PR61396 (wide-int fallout)segher2014-07-232-2/+9
* gcc/nathan2014-07-235-15/+21
* * python/libstdcxx/v6/printers.py (StdExpAnyPrinter): Convert typeredi2014-07-232-1/+6
* 2014-07-23 Host Schirmeier <horst@schirmeier.com>rguenth2014-07-232-0/+5
* [ARM] Enable arm target in ira-shrinkwrap-prep* testcases.ktkachov2014-07-236-17/+47
* 2014-07-23 Richard Biener <rguenther@suse.de>rguenth2014-07-234-180/+229
* gcc/romangareev2014-07-234-1/+86
* gcc/romangareev2014-07-232-0/+54
* Daily bump.gccadmin2014-07-231-1/+1
* 2014-07-22 Martin Jambor <mjambor@suse.cz>jamborm2014-07-222-1/+7
* Fix vext[us]64_1.c test on ARM by unsharing test body.alalaw012014-07-227-38/+73
* [AArch64][2/2] Add rtx cost function handling of clz, clrsb, rbit.ktkachov2014-07-222-0/+20
* [AArch64][1/2] Remove UNSPEC_CLS and use clrsb RTL code in its' place.ktkachov2014-07-222-2/+6
* gcc/testsuitekyukhin2014-07-222-0/+6
* [AArch64] Implement vbsl_f64 arm_neon.h intrinsic.ktkachov2014-07-224-0/+47
* * gcc.target/i386/fuse-caller-save-xmm.c (dg-options): Useuros2014-07-222-1/+6
* * g++.dg/ipa/imm-devirt-2.C (dg-final): Improve einline dump string.uros2014-07-224-5/+14
* gcc/romangareev2014-07-225-1/+178
* Daily bump.gccadmin2014-07-221-1/+1
* PR target/55701amker2014-07-2114-18/+1219
* * config/arm/arm.c (output_move_neon): Handle REG explicitly.amker2014-07-212-8/+19