| Commit message (Collapse) | Author | Age | Files | Lines |
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* gimple-ssa-combine.c: New file.
* gimple-ssa-combine.h: New file.
* Makefile.in (OBJS): Add gimple-ssa-combine.o.
(gimple-ssa-combine.o): New target.
* tree-ssa-forwprop.c: Include gimple-ssa-combine.h.
(delete_dead_code_uptil): New function.
(ssa_forward_propagate_and_combine): Create
gimple_combine object and call combine on it.
Assert if the combine does not find an optimization
that forwprop's combiner does.
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201069 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201067 138bc75d-0d04-0410-961f-82ee72b054a4
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partitioning of variables.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201065 138bc75d-0d04-0410-961f-82ee72b054a4
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* gcc.dg/simulate-thread/simulate-thread.exp: Skip on AIX.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201062 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201061 138bc75d-0d04-0410-961f-82ee72b054a4
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* g++.dg/ext/vector23.C: Ignore vector ABI warning.
* g++.dg/guality/guality.exp: Skip on AIX.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201060 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201059 138bc75d-0d04-0410-961f-82ee72b054a4
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* gfortran.dg/nint_2.f90: Correct AIX target name to skip.
* gfortran.dg/guality/guality.exp: Skip on AIX.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201058 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201057 138bc75d-0d04-0410-961f-82ee72b054a4
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PR target/57516
* config/avr/avr-fixed.md (round<mode>3_const): Turn expander to insn.
* config/avr/avr.md (adjust_len): Add `round'.
* config/avr/avr-protos.h (avr_out_round): New prototype.
(avr_out_plus): Add `out_label' argument.
* config/avr/avr.c (avr_out_plus_1): Add `out_label' argument.
(avr_out_plus): Pass down `out_label' to avr_out_plus_1.
Handle the case where `insn' is just a pattern.
(avr_out_bitop): Handle the case where `insn' is just a pattern.
(avr_out_round): New function.
(avr_adjust_insn_length): Handle ADJUST_LEN_ROUND.
libgcc/
PR target/57516
* config/avr/lib1funcs-fixed.S (__roundqq3, __rounduqq3)
(__round_s2_const, __round_u2_const)
(__round_s4_const, __round_u4_const, __round_x8):
Saturate result if addition result cannot be represented.
gcc/testsuite/
PR target/57516
* gcc.target/avr/torture/builtins-4-roundfx.c (test2hr, test2k):
Adjust to corrected rounding.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201051 138bc75d-0d04-0410-961f-82ee72b054a4
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nds32 port maintainers.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201049 138bc75d-0d04-0410-961f-82ee72b054a4
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* gcc.dg/cilk-plus/cilk-plus.exp: only run if
check_effective_target_cilkplus.
* g++.dg/cilk-plus/cilk-plus.exp: Same.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201048 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201045 138bc75d-0d04-0410-961f-82ee72b054a4
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Add check for flag_stack_usage to handle -fstack-usage support
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201042 138bc75d-0d04-0410-961f-82ee72b054a4
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interaction for new Power8 flags and VSX.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201041 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201040 138bc75d-0d04-0410-961f-82ee72b054a4
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off.
PR middle-end/57698
* tree-inline.c (expand_call_inline): Emit errors during
early_inlining only if optimization is not turned on.
PR middle-end/57698
* gcc.c-torture/compile/pr57698.c: New test.
* gcc.c-torture/compile/pr43791.c: Remove prune output
directive.
* gcc.c-torture/compile/pr44043.c: Ditto.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201039 138bc75d-0d04-0410-961f-82ee72b054a4
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* passes.c (init_optimization_passes): Move the construction of
the pass hierarchy into a new passes.def file.
* Makefile.in (passes.o): Add dependency on passes.def.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201038 138bc75d-0d04-0410-961f-82ee72b054a4
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constructing the tree of passes (INSERT_PASSES_AFTER,
PUSH_INSERT_PASSES_WITHIN, POP_INSERT_PASSES,
TERMINATE_PASS_LIST).
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201037 138bc75d-0d04-0410-961f-82ee72b054a4
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Wei Mi <wmi@google.com>
PR rtl-optimization/57878
* lra-assigns.c (assign_by_spills): Move non_reload_pseudos to the
top.
(reload_pseudo_compare_func): Check nregs first for reload
pseudos.
2013-07-18 Wei Mi <wmi@google.com>
PR rtl-optimization/57878
* g++.dg/pr57518.C: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201036 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201035 138bc75d-0d04-0410-961f-82ee72b054a4
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seen, quit the loop.
* gengtype.c (write_roots): Similarly once we find the
"deletable" or "if_marked" option.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201034 138bc75d-0d04-0410-961f-82ee72b054a4
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2013-07-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gcc.dg/pr42611.c: Move dg-error to correct line.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201027 138bc75d-0d04-0410-961f-82ee72b054a4
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"xtab" and "sat". Move value "clz" from here to ...
(attriubte "type"): ... here.
(satsi_<SAT:code>): Delete "insn" attribute.
(satsi_<SAT:code>_shift): Likewise.
(arm_zero_extendqisi2addsi): Likewise.
(arm_extendqisi2addsi): Likewise.
(clzsi2): Update for attribute changes.
(rbitsi2): Likewise.
* config/arm/arm-fixed.md (arm_ssatsihi_shift): Delete "insn" attribute.
(arm_usatsihi): Likewise.
* config/arm/cortex-a8.md (cortex_a8_alu): Update for attribute change.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201025 138bc75d-0d04-0410-961f-82ee72b054a4
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"arlo_imm". Rename "alu_reg" to "arlo_reg". Rename "simple_alu_shift" to
"extend". Split "alu_shift" into "shift" and "arlo_shift". Split
"alu_shift_reg" into "shift_reg" and "arlo_shift_reg". List types
in alphabetical order.
(attribute "core_cycles"): Update for attribute changes.
(arm_addsi3): Likewise.
(addsi3_compare0): Likewise.
(addsi3_compare0_scratch): Likewise.
(addsi3_compare_op1): Likewise.
(addsi3_compare_op2): Likewise.
(compare_addsi2_op0): Likewise.
(compare_addsi2_op1): Likewise.
(addsi3_carryin_shift_<optab>): Likewise.
(subsi3_carryin_shift): Likewise.
(rsbsi3_carryin_shift): Likewise.
(arm_subsi3_insn): Likewise.
(subsi3_compare0): Likewise.
(subsi3_compare): Likewise.
(arm_andsi3_insn): Likewise.
(thumb1_andsi3_insn): Likewise.
(andsi3_compare0): Likewise.
(andsi3_compare0_scratch): Likewise.
(zeroextractsi_compare0_scratch
(andsi_not_shiftsi_si): Likewise.
(iorsi3_insn): Likewise.
(iorsi3_compare0): Likewise.
(iorsi3_compare0_scratch): Likewise.
(arm_xorsi3): Likewise.
(thumb1_xorsi3_insn): Likewise.
(xorsi3_compare0): Likewise.
(xorsi3_compare0_scratch): Likewise.
(satsi_<SAT:code>_shift): Likewise.
(rrx): Likewise.
(arm_shiftsi3): Likewise.
(shiftsi3_compare0): Likewise.
(not_shiftsi): Likewise.
(not_shiftsi_compare0): Likewise.
(not_shiftsi_compare0_scratch): Likewise.
(arm_one_cmplsi2): Likewise.
(thumb_one_complsi2): Likewise.
(notsi_compare0): Likewise.
(notsi_compare0_scratch): Likewise.
(thumb1_zero_extendhisi2): Likewise.
(arm_zero_extendhisi2): Likewise.
(arm_zero_extendhisi2_v6): Likewise.
(arm_zero_extendhisi2addsi): Likewise.
(thumb1_zero_extendqisi2): Likewise.
(thumb1_zero_extendqisi2_v6): Likewise.
(arm_zero_extendqisi2): Likewise.
(arm_zero_extendqisi2_v6): Likewise.
(arm_zero_extendqisi2addsi): Likewise.
(thumb1_extendhisi2): Likewise.
(arm_extendhisi2): Likewise.
(arm_extendhisi2_v6): Likewise.
(arm_extendqisi): Likewise.
(arm_extendqisi_v6): Likewise.
(arm_extendqisi2addsi): Likewise.
(thumb1_extendqisi2): Likewise.
(thumb1_movdi_insn): Likewise.
(arm_movsi_insn): Likewise.
(movsi_compare0): Likewise.
(movhi_insn_arch4): Likewise.
(movhi_bytes): Likewise.
(arm_movqi_insn): Likewise.
(thumb1_movqi_insn): Likewise.
(arm32_movhf): Likewise.
(thumb1_movhf): Likewise.
(arm_movsf_soft_insn): Likewise.
(thumb1_movsf_insn): Likewise.
(movdf_soft_insn): Likewise.
(thumb_movdf_insn): Likewise.
(arm_cmpsi_insn): Likewise.
(cmpsi_shiftsi): Likewise.
(cmpsi_shiftsi_swp): Likewise.
(arm_cmpsi_negshiftsi_si): Likewise.
(movsicc_insn): Likewise.
(movsfcc_soft_insn): Likewise.
(arith_shiftsi): Likewise.
(arith_shiftsi_compare0
(arith_shiftsi_compare0_scratch
(sub_shiftsi): Likewise.
(sub_shiftsi_compare0
(sub_shiftsi_compare0_scratch
(and_scc): Likewise.
(cond_move): Likewise.
(if_plus_move): Likewise.
(if_move_plus): Likewise.
(if_move_not): Likewise.
(if_not_move): Likewise.
(if_shift_move): Likewise.
(if_move_shift): Likewise.
(if_shift_shift): Likewise.
(if_not_arith): Likewise.
(if_arith_not): Likewise.
(cond_move_not): Likewise.
(thumb1_ashlsi3): Set type attribute.
(thumb1_ashrsi3): Likewise.
(thumb1_lshrsi3): Likewise.
(thumb1_rotrsi3): Likewise.
(shiftsi3_compare0_scratch): Likewise.
* config/arm/neon.md (neon_mov<mode>): Update for attribute changes.
(neon_mov<mode>): Likewise.
* config/arm/thumb2.md (thumb_andsi_not_shiftsi_si): Update for attribute
changes.
(thumb2_movsi_insn): Likewise.
(thumb2_cmpsi_neg_shiftsi): Likewise.
(thumb2_extendqisi_v6): Likewise.
(thumb2_zero_extendhisi2_v6): Likewise.
(thumb2_zero_extendqisi2_v6): Likewise.
(thumb2_shiftsi3_short): Likewise.
(thumb2_addsi3_compare0_scratch): Likewise.
(orsi_not_shiftsi_si): Likewise.
* config/arm/vfp.md (arm_movsi_vfp): Update for attribute changes.
* config/arm/arm-fixed.md (arm_ssatsihi_shift): Update for attribute
changes.
* config/arm/arm1020e.md (1020alu_op): Update for attribute changes.
(1020alu_shift_op): Likewise.
(1020alu_shift_reg_op): Likewise.
* config/arm/arm1026ejs.md (alu_op): Update for attribute changes.
(alu_shift_op): Likewise.
(alu_shift_reg_op): Likewise.
* config/arm/arm1136jfs.md (11_alu_op): Update for attribute changes.
(11_alu_shift_op): Likewise.
(11_alu_shift_reg_op): Likewise.
* config/arm/arm926ejs.md (9_alu_op): Update for attribute changes.
(9_alu_shift_reg_op): Likewise.
* config/arm/cortex-a15.md (cortex_a15_alu): Update for attribute changes.
(cortex_a15_alu_shift): Likewise.
(cortex_a15_alu_shift_reg): Likewise.
* config/arm/cortex-a5.md (cortex_a5_alu): Update for attribute changes.
(cortex_a5_alu_shift): Likewise.
* config/arm/cortex-a53.md (cortex_a53_alu) : Update for attribute
changes.
(cortex_a53_alu_shift): Likewise.
* config/arm/cortex-a7.md (cortex_a7_alu_imm): Update for attribute
changes.
(cortex_a7_alu_reg): Likewise.
(cortex_a7_alu_shift): Likewise.
* config/arm/cortex-a8.md (cortex_a8_alu): Update for attribute changes.
(cortex_a8_alu_shift): Likewise.
(cortex_a8_alu_shift_reg): Likewise.
(cortex_a8_mov): Likewise.
* config/arm/cortex-a9.md (cortex_a9_dp): Update for attribute changes.
(cortex_a9_dp_shift): Likewise.
* config/arm/cortex-m4.md (cortex_m4_alu): Update for attribute changes.
* config/arm/cortex-r4.md (cortex_r4_alu): Update for attribute changes.
(cortex_r4_mov): Likewise.
(cortex_r4_alu_shift): Likewise.
(cortex_r4_alu_shift_reg): Likewise.
* config/arm/fa526.md (526_alu_op): Update for attribute changes.
(526_alu_shift_op): Likewise.
* config/arm/fa606te.md (606te_alu_op): Update for attribute changes.
* config/arm/fa626te.md (626te_alu_op): Update for attribute changes.
(626te_alu_shift_op): Likewise.
* config/arm/fa726te.md (726te_shift_op): Update for attribute changes.
(726te_alu_op): Likewise.
(726te_alu_shift_op): Likewise.
(726te_alu_shift_reg_op): Likewise.
* config/arm/fmp626.md (mp626_alu_op): Update for attribute changes.
(mp626_alu_shift_op): Likewise.
* config/arm/marvell-pj4.md (pj4_alu_e1): Update for attribute changes.
(pj4_alu_e1_conds): Likewise.
(pj4_alu): Likewise.
(pj4_alu_conds): Likewise.
(pj4_shift): Likewise.
(pj4_shift_conds): Likewise.
(pj4_alu_shift): Likewise.
(pj4_alu_shift_conds): Likewise.
* config/arm/arm.c (xscale_sched_adjust_cost): Update for attribute changes.
(cortexa7_older_only): Likewise.
(cortexa7_younger): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201024 138bc75d-0d04-0410-961f-82ee72b054a4
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* ipa-pure-const.c (generate_summary): Rename to...
(pure_const_generate_summary): ... this.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201020 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201019 138bc75d-0d04-0410-961f-82ee72b054a4
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* config/rs6000/darwin.h (REGISTER_NAMES): Add HTM registers.
line, and those below, will be ignored--
M ChangeLog
M config/rs6000/darwin.h
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201011 138bc75d-0d04-0410-961f-82ee72b054a4
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Tobias Burnus <burnus@net-b.de>
PR fortran/57895
* match.c (gfc_match_name): Ensure that the error
message regarding -fdollar-ok gets printed.
(gfc_match_common): Avoid multiple freeing.
2013-07-17 Tobias Burnus <burnus@net-b.de>
PR fortran/57895
* gfortran.dg/dollar_sym_3.f: New.
* gfortran.dg/dollar_sym_1.f90: Update dg-error.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201008 138bc75d-0d04-0410-961f-82ee72b054a4
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2013-07-17 Yvan Roux <yvan.roux@linaro.org>
PR target/57909
* config/arm/arm.c (gen_movmem_ldrd_strd): Fix unaligned load/store
usage in HI mode.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201005 138bc75d-0d04-0410-961f-82ee72b054a4
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* config/s390/s390.c: (s390_expand_builtin): Allow -mhtm to be
enabled without -march=zEC12.
* config/s390/s390.h (TARGET_HTM): Do not require EC12 machine
flags to be set.
2013-07-17 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* acinclude.m4: Add htm asm check for s390.
* configure.tgt: Add -mhtm and -Wa,-march=zEC12 to the options.
* configure: Regenerate.
* config/s390/target.h: Remove __HTM__ check.
(htm_available): Call getauxval to get hwcaps and check whether
HTM is available or not.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201004 138bc75d-0d04-0410-961f-82ee72b054a4
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* MAINTAINERS (Write After Approval): Add myself.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200998 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200996 138bc75d-0d04-0410-961f-82ee72b054a4
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(ISA_HAS_FP_MADD4_MSUB4): Also enable for ISA_MIPS32R2.
(ISA_HAS_NMADD4_NMSUB4): Remove the MODE argument; rewrite in
terms of ISA_HAS_FP4, and also enable for ISA_MIPS32R2.
(ISA_HAS_NMADD3_NMSUB3): Remove the MODE argument.
* config/mips/mips.c (mips_rtx_costs) <PLUS>: Check for
ISA_HAS_FP_MADD4_MSUB4 || ISA_HAS_FP_MADD3_MSUB3 rather than
ISA_HAS_FP4.
<MINUS, NEG>: Update according to changes to ISA_HAS_NMADD4_NMSUB4
and ISA_HAS_NMADD3_NMSUB3.
* config/mips/mips.md (nmadd4<mode>, nmadd3<mode>): Likewise.
(nmadd4<mode>_fastmath, nmadd3<mode>_fastmath): Likewise.
(nmsub4<mode>, nmsub3<mode>): Likewise.
(nmsub4<mode>_fastmath, nmsub3<mode>_fastmath): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200993 138bc75d-0d04-0410-961f-82ee72b054a4
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TARGET_MIPS5400 checking.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200992 138bc75d-0d04-0410-961f-82ee72b054a4
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This corrects the code that handles composite literals where
the key is a variable in an enclosing function. See bug475.go
in the testsuite.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200990 138bc75d-0d04-0410-961f-82ee72b054a4
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registers in the comment.
(DWARF_FRAME_REGISTERS): Subtract also the 3 HTM registers.
(DWARF_REG_TO_UNWIND_COLUMN): Use DWARF_FRAME_REGISTERS
rather than FIRST_PSEUDO_REGISTERS.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200988 138bc75d-0d04-0410-961f-82ee72b054a4
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PR fortran/57912
* trans-expr.c (gfc_trans_scalar_assign): Correct if
condition for caf realloc.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200987 138bc75d-0d04-0410-961f-82ee72b054a4
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enable extra ISA flags with TARGET_HTM.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200985 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200983 138bc75d-0d04-0410-961f-82ee72b054a4
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PR target/55654
PR target/55656
PR target/55657
* obj-c++.dg/cxx-ivars-3.mm: Use NSObject instead of Object.
* obj-c++.dg/strings/const-cfstring-5.mm: Likewise.
* obj-c++.dg/torture/strings/const-str-10.mm: Likewise.
* obj-c++.dg/torture/strings/const-str-9.mm: Likewise.
* objc.dg/image-info.m: Likewise.
* objc.dg/symtab-1.m: Likewise.
* objc.dg/torture/strings/const-str-10.m: Likewise.
* objc.dg/torture/strings/const-str-11.m: Likewise.
* objc.dg/torture/strings/const-str-9.m: Likewise.
* objc.dg/zero-link-1.m: Likewise.
* objc.dg/zero-link-2.m: Likewise.
* objc.dg/no-extra-load.m: Avoid Foundation.h.
* objc.dg/objc-foreach-4.m: Likewise.
* objc.dg/objc-foreach-5.m: Likewise.
* obj-c++.dg/proto-lossage-7.mm: Use NSObject instead of Object
(for Darwin).
* obj-c++.dg/strings/const-str-12.mm: Likewise.
* obj-c++.dg/syntax-error-1.mm: Likewise.
* objc.dg/method-6.m: Likewise.
* objc.dg/pr23214.m: Likewise.
* objc.dg/proto-lossage-7.m: Likewise.
* objc.dg/strings/const-str-12b.m: Likewise.
* objc.dg/zero-link-3.m: Likewise.
* obj-c++.dg/method-12.mm: Skip on Darwin versions without 'Object'.
* objc.dg/encode-7-next-64bit.m: Use NSObject instead of Object,
adjust headers, interfaces and encoded types to reflect current system
versions. Add FIXME and outputs from current system compiler for
reference.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200977 138bc75d-0d04-0410-961f-82ee72b054a4
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* configure.ac: Sync from binutils.
* configure: Regenerate.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200976 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200974 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200972 138bc75d-0d04-0410-961f-82ee72b054a4
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Fix comment typos.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200969 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/
* tree-vect-data-refs.c (dr_group_sort_cmp): Do not use hash function in compare function for sorting.
gcc/testsuite/
* gcc.target/i386/l_fma_float_1.c: Update the instruction to be counted.
* gcc.target/i386/l_fma_float_3.c: Likewise.
* gcc.target/i386/l_fma_double_1.c: Likewise.
* gcc.target/i386/l_fma_double_3.c: Likewise
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200968 138bc75d-0d04-0410-961f-82ee72b054a4
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* libgcc2.c: Don't include <limits.h>.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200963 138bc75d-0d04-0410-961f-82ee72b054a4
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* acinclude.m4 (LIBITM_CHECK_AS_HTM): New.
* configure.ac: Use it.
(AC_CHECK_HEADERS): Check for sys/auxv.h.
(AC_CHECK_FUNCS): Check for getauxval.
* config.h.in, configure: Rebuild.
* configure.tgt (target_cpu): Add -mhtm to XCFLAGS.
* config/powerpc/target.h: Include sys/auxv.h and htmintrin.h.
(USE_HTM_FASTPATH): Define.
(_TBEGIN_STARTED, _TBEGIN_INDETERMINATE, _TBEGIN_PERSISTENT,
_HTM_RETRIES) New macros.
(htm_abort, htm_abort_should_retry, htm_available, htm_begin, htm_init,
htm_begin_success, htm_commit, htm_transaction_active): New functions.
gcc/
* config.gcc (powerpc*-*-*): Install htmintrin.h and htmxlintrin.h.
* config/rs6000/t-rs6000 (MD_INCLUDES): Add htm.md.
* config/rs6000/rs6000.opt: Add -mhtm option.
* config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add OPTION_MASK_HTM.
(ISA_2_7_MASKS_SERVER): Add OPTION_MASK_HTM.
* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
__HTM__ if the HTM instructions are available.
* config/rs6000/predicates.md (u3bit_cint_operand, u10bit_cint_operand,
htm_spr_reg_operand): New define_predicates.
* config/rs6000/rs6000.md (define_attr "type"): Add htm.
(TFHAR_REGNO, TFIAR_REGNO, TEXASR_REGNO): New define_constants.
Include htm.md.
* config/rs6000/rs6000-builtin.def (BU_HTM_0, BU_HTM_1, BU_HTM_2,
BU_HTM_3, BU_HTM_SPR0, BU_HTM_SPR1): Add support macros for defining
HTM builtin functions.
* config/rs6000/rs6000.c (RS6000_BUILTIN_H): New macro.
(rs6000_reg_names, alt_reg_names): Add HTM SPR register names.
(rs6000_init_hard_regno_mode_ok): Add support for HTM instructions.
(rs6000_builtin_mask_calculate): Likewise.
(rs6000_option_override_internal): Likewise.
(bdesc_htm): Add new HTM builtin support.
(htm_spr_num): New function.
(htm_spr_regno): Likewise.
(rs6000_htm_spr_icode): Likewise.
(htm_expand_builtin): Likewise.
(htm_init_builtins): Likewise.
(rs6000_expand_builtin): Add support for HTM builtin functions.
(rs6000_init_builtins): Likewise.
(rs6000_invalid_builtin, rs6000_opt_mask): Add support for -mhtm option.
* config/rs6000/rs6000.h (ASM_CPU_SPEC): Add support for -mhtm.
(TARGET_HTM, MASK_HTM): Define macros.
(FIRST_PSEUDO_REGISTER): Adjust for new HTM SPR registers.
(FIXED_REGISTERS): Likewise.
(CALL_USED_REGISTERS): Likewise.
(CALL_REALLY_USED_REGISTERS): Likewise.
(REG_ALLOC_ORDER): Likewise.
(enum reg_class): Likewise.
(REG_CLASS_NAMES): Likewise.
(REG_CLASS_CONTENTS): Likewise.
(REGISTER_NAMES): Likewise.
(ADDITIONAL_REGISTER_NAMES): Likewise.
(RS6000_BTC_SPR, RS6000_BTC_VOID, RS6000_BTC_32BIT, RS6000_BTC_64BIT,
RS6000_BTC_MISC_MASK, RS6000_BTM_HTM): New macros.
(RS6000_BTM_COMMON): Add RS6000_BTM_HTM.
* config/rs6000/htm.md: New file.
* config/rs6000/htmintrin.h: New file.
* config/rs6000/htmxlintrin.h: New file.
gcc/testsuite/
* lib/target-supports.exp (check_effective_target_powerpc_htm_ok): New
function to test if HTM is available.
* gcc.target/powerpc/htm-xl-intrin-1.c: New test.
* gcc.target/powerpc/htm-builtin-1.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200960 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200956 138bc75d-0d04-0410-961f-82ee72b054a4
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