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* [AArch64] Rework ARMv8.1 command line options.mwahab2015-12-081-0/+21
* * doc/invoke.texi (SPARC options): Fix typo.ebotcazou2015-12-081-0/+4
* * config/ia64/ia64.c (ia64_emit_probe_stack_range): Adjust.ebotcazou2015-12-081-0/+5
* * config/i386/i386.c (ix86_emit_swsqrtsf): Cleanupuros2015-12-081-0/+5
* * ChangeLog: Fix whitespace.uros2015-12-081-63/+54
* gcc/ienkovich2015-12-081-0/+6
* * config/rl78/constraints.md (Wfr): Change to be a non-memorydj2015-12-081-0/+19
* PR target/63668ebotcazou2015-12-071-1/+9
* 2015-12-07 Steve Ellcey <sellcey@imgtec.com>sje2015-12-071-0/+7
* Add scheduling model for Exynos M1evandro2015-12-071-0/+7
* * fold-const.c (operand_equal_p): Drp flag_strict_aliasing check.hubicka2015-12-071-0/+4
* * config//nvptx/nvptx.c (write_return): New.nathan2015-12-071-0/+5
* PR ipa/61886hubicka2015-12-071-0/+46
* PR middle-end/68291ebotcazou2015-12-071-1/+9
* 2015-12-07 Bernd Edlinger <bernd.edlinger@hotmail.de>edlinger2015-12-071-0/+2
* 2015-12-07 Bernd Edlinger <bernd.edlinger@hotmail.de>edlinger2015-12-071-0/+5
* gcc/nathan2015-12-071-0/+5
* Fix missing range information for "%q+D" format codedmalcolm2015-12-071-0/+9
* gcc/nathan2015-12-071-0/+5
* PR target/68627kyukhin2015-12-071-0/+6
* PR target/68633kyukhin2015-12-071-0/+7
* * config/sh/sh.md (rsqrtsf2): Adjust for the recent rsqrt_optab changeskkojima2015-12-071-0/+4
* support for AMD clzero isa.vekumar2015-12-061-0/+29
* * ipa-icf.c (sem_function::merge): Check that local_original exists.hubicka2015-12-061-0/+4
* PR target/68609dje2015-12-051-0/+11
* check that all the scev applied ops have are dominated by their defsspop2015-12-041-0/+8
* fix PR68693: Check for loop structure when extending the SCoPspop2015-12-041-0/+18
* [AArch64] Add register constraints to add<mode>3_pluslongjgreenhalgh2015-12-041-0/+5
* 2015-12-04 Vladimir Makarov <vmakarov@redhat.com>vmakarov2015-12-041-0/+6
* gcc/nathan2015-12-041-0/+9
* Add fuzzing coverage supportdvyukov2015-12-041-0/+12
* PR middle-end/65958ebotcazou2015-12-041-2/+12
* C++ FE: expression rangesdmalcolm2015-12-041-0/+12
* PR c/68656jakub2015-12-041-12/+9
* * ipa-inline.c (can_inline_edge_p) Use merged_comdat.hubicka2015-12-041-0/+11
* gcc:bonzini2015-12-041-0/+5
* rs6000: Clean up the cstore code a bitsegher2015-12-041-1/+11
* gcc * config.gcc (extra_gcc_objs): Define for MSP430.nickc2015-12-041-1/+26
* I really do hate this keyboard.segher2015-12-041-1/+1
* rs6000: Implement cstore for signed Pmode register comparessegher2015-12-041-0/+5
* * tree-tailcall.c (find_tail_calls): Ignore GIMPLE_NOPs.jakub2015-12-041-0/+2
* PR tree-optimization/68680jakub2015-12-041-0/+5
* PR tree-optimization/68671jakub2015-12-041-0/+7
* * tree-ssa-reassoc.c (maybe_optimize_range_tests): Return booleanlaw2015-12-041-0/+9
* [AArch64] Don't allow -mgeneral-regs-only to change the .arch assembler direc...ktkachov2015-12-041-0/+7
* [PATCH 2/2] S/390: Implement "target" attribute.krebbel2015-12-041-0/+8
* [PATCH 1/2] S/390: Implement "target" attribute.krebbel2015-12-041-0/+92
* Add notinbranch/inbranch flags to attribute __simd__.kyukhin2015-12-041-0/+7
* gcc/ienkovich2015-12-041-0/+5
* * config/nvptx/nvptx.c (write_one_arg): Deal with prologuenathan2015-12-041-0/+8
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