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path: root/gcc/config/aarch64/aarch64-protos.h
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* gcc/Yvan Roux2017-07-061-3/+14
* gcc/Yvan Roux2017-07-041-0/+1
* gcc/Yvan Roux2017-06-141-0/+1
* 2017-02-01 Andrew Pinski <apinski@cavium.com>pinskia2017-02-011-2/+8
* [AArch64][1/4] Support Return address protection on AArch64jiwang2017-01-201-0/+1
* gcc/tnfchris2017-01-191-1/+1
* [AArch64] Purge leftover occurrences of aarch64_nopcrelative_literal_loadsktkachov2017-01-191-1/+0
* This patch simplifies the handling of EH return. We force the use of thewilco2017-01-171-1/+1
* Update copyright years.jakub2017-01-011-1/+1
* 2016-11-22 Michael Collison <michael.collison@arm.com>collison2016-11-231-0/+3
* [AArch64] Expand DImode constant stores to two SImode stores when profitablektkachov2016-11-171-0/+1
* [AArch64] Use new target pass registration framework for FMA steering passktkachov2016-10-171-0/+2
* 2016-10-07 Andrew Pinski <apinski@cavium.com>pinskia2016-10-071-4/+0
* * config/aarch64/aarch64-protos.h (aarch64_elf_asm_named_section):schwab2016-06-221-1/+0
* [AArch64] Handle AND+ASHIFT form of UBFIZ correctly in costsktkachov2016-06-141-0/+1
* [AArch64] Emit division using the Newton seriesevandro2016-06-131-0/+2
* [AArch64] Emit square root using the Newton seriesevandro2016-06-131-2/+3
* [AArch64] Add more choices for the reciprocal square root approximationevandro2016-06-131-0/+18
* [AArch64] Remove aarch64_simd_attr_length_movektkachov2016-05-311-1/+0
* [AArch64] Tie operand 1 to operand 0 in AESMC pattern when AES/AESMC fusion i...ktkachov2016-05-271-0/+1
* Remove aarch64_cannot_change_mode_class as the underlying issuewilco2016-05-271-3/+0
* [AArch64] Remove an unused reload hook.mwahab2016-05-161-1/+0
* [Patch AArch64 2/3] Rework the code to print extension strings (pr70133)jgreenhalgh2016-04-111-4/+21
* 2016-03-25 Richard Henderson <rth@redhat.com>law2016-03-251-0/+4
* [AArch64] PR target/70002: Make aarch64_set_current_function play nice with p...ktkachov2016-03-111-0/+1
* Rename the tuning option and related functions to enable the Newton series fo...evandro2016-02-261-4/+1
* PR target/69305rth2016-01-281-0/+1
* Add support for vector permute cost since various permutes can expandwilco2016-01-281-1/+2
* Update copyright years.jakub2016-01-041-1/+1
* [AArch64] PR rtl-optimization/68796 Add compare-of-zero_extract patternktkachov2015-12-181-0/+1
* [Patch AArch64] Reinstate CANNOT_CHANGE_MODE_CLASS to fix pr67609jgreenhalgh2015-12-091-0/+3
* PR middle-end/65958ebotcazou2015-12-041-0/+1
* Add an rsqrt_optab and IFN_RSQRT internal functionrsandifo2015-12-031-1/+1
* Make builtin_vectorized_function take a combined_fnrsandifo2015-11-171-4/+1
* [AArch64] Add extra tuning parameters for target processorsjgreenhalgh2015-11-121-0/+4
* Machine modes for address printing.jules2015-11-091-2/+0
* 2015-11-06 Benedikt Huber <benedikt.huber@theobroma-systems.com>ptomsich2015-11-061-0/+4
* [PATCH] [AArch64] Distinct costs for sign and zero extensionjgreenhalgh2015-10-271-1/+2
* [AArch64] Enable autoprefetcher modelling in the schedulerktkachov2015-10-271-0/+17
* [Patch AArch64 63304] Fix issue with global state.ramana2015-10-221-0/+1
* [AArch64][1/2] Add fmul-by-power-of-2+fcvt optimisationktkachov2015-10-201-0/+2
* [AArch64] Delete aarch64_symbol_context which is not usedjiwang2015-09-241-18/+3
* [AArch64] Use atomic load-operate instructions for update-fetch patterns.mwahab2015-09-221-1/+1
* [AArch64] Use atomic load-operate instructions for fetch-update patterns.mwahab2015-09-221-0/+2
* [AArch64] Use atomic instructions for swap and fetch-update operations.mwahab2015-09-221-0/+1
* [AArch64] Rename SYMBOL_SMALL_GOTTPREL to SYMBOL_SMALL_TLSIEjiwang2015-08-281-2/+2
* 2015-08-27 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>thopre012015-08-271-0/+1
* [AArch64][TLSIE][2/2] Implement TLS IE for tiny modeljiwang2015-08-261-0/+2
* [AArch64][TLSLE][3/3] Implement local executable mode for all memory modeljiwang2015-08-261-0/+6
* [AArch64][TLSLE][2/3] Rename SYMBOL_TLSLE to SYMBOL_TLSLE24jiwang2015-08-261-2/+2
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