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* arc: Remove Rcq constraint.Claudiu Zissulescu2022-10-101-79/+73
* arc: Remove Rcw constraintClaudiu Zissulescu2022-10-101-110/+110
* arc: Remove Rcr constraintClaudiu Zissulescu2022-10-101-18/+18
* arc: Add ARCHS release 310a tune variant.Claudiu Zissulescu2022-07-181-12/+20
* arc: Fail conditional move expand patternsClaudiu Zissulescu2022-02-251-5/+20
* Fix -Wformat-diag in various targets.Martin Liska2022-01-181-1/+1
* Change references of .c files to .cc filesMartin Liska2022-01-171-4/+4
* Update copyright years.Jakub Jelinek2022-01-031-1/+1
* arc: Update (u)maddhisi4 patternsClaudiu Zissulescu2021-11-161-17/+17
* arc: Update ZOL pattern.Claudiu Zissulescu2021-09-141-4/+4
* arc: Update doloop_end patternsClaudiu Zissulescu2021-06-091-26/+20
* arc: Fix (u)maddhisi patternsClaudiu Zissulescu2021-06-091-25/+41
* arc: Update 64bit move split patterns.Claudiu Zissulescu2021-06-091-73/+18
* arc: Remove obsolete optionsClaudiu Zissulescu2021-06-031-8/+0
* arc: Remove define_insn_and_split *bbit_diKewen Lin2021-06-021-28/+0
* arc: Improve vector support for ARCv2.Claudiu Zissulescu2021-05-101-0/+1
* arc: Update ctz/clz patternsClaudiu Zissulescu2021-05-101-23/+30
* arc: fix accumulator first register.Claudiu Zissulescu2021-01-051-4/+4
* Update copyright years.Jakub Jelinek2021-01-041-1/+1
* arc: generate mac(u) insn instead of macd(u) when destination is acclClaudiu Zissulescu2020-12-291-10/+14
* arc: Don't use predicated vadd2 instructions in mov patterns.Claudiu Zissulescu2020-12-291-3/+3
* arc: Refurbish adc/sbc patternsClaudiu Zissulescu2020-12-111-66/+29
* arc: Use separate predicated patterns for mpyd(u)Claudiu Zissulescu2020-12-111-50/+51
* arc: Improve/add instruction patterns to better use MAC instructions.Claudiu Zissulescu2020-11-091-6/+65
* arc: Improve code gen for 64bit add/sub operations.Claudiu Zissulescu2020-03-031-75/+41
* arc: Add length attribute to eh_return pattern.Claudiu Zissulescu2020-03-031-1/+3
* [ARC] Use TARGET_INSN_COST.Claudiu Zissulescu2020-02-131-22/+25
* [ARC] Update mlo/mhi handling when big-endian CPU.Claudiu Zissulescu2020-02-131-18/+32
* [ARC] Save mlo/mhi registers when ISR.Claudiu Zissulescu2020-01-271-23/+20
* [ARC] Propagate uncached type attribute to each member of a struct.Claudiu Zissulescu2020-01-271-0/+60
* Update copyright years.Jakub Jelinek2020-01-011-1/+1
* [ARC] Use hardware support for double-precision compare instructions.Claudiu Zissulescu2019-12-121-2/+2
* [ARC] Fix failing pr77309 for ARC700Claudiu Zissulescu2019-11-221-23/+29
* [ARC] Fix movsi_ne pattern.Claudiu Zissulescu2019-11-111-11/+11
* [ARC] Don't split ior/mov predicated insns.Claudiu Zissulescu2019-11-061-3/+10
* [ARC] Cleanup sign/zero extend patternsClaudiu Zissulescu2019-11-061-49/+56
* [ARC] Fix and refurbish the interrupts.Claudiu Zissulescu2019-07-241-78/+61
* builtins.c (get_memory_rtx): Fix comment.Aaron Sawdey2019-06-271-2/+2
* [ARC] Fix for PR89838Claudiu Zissulescu2019-06-251-2/+6
* [ARC] Improve code gen when compiling for sizeClaudiu Zissulescu2019-06-101-85/+130
* [ARC] Remove Rs5 constraint.Claudiu Zissulescu2019-04-161-12/+12
* [ARC] Refurb eliminate regs.Claudiu Zissulescu2019-04-161-8/+4
* [ARC] Emit blockage regardless to avoid delay slot scheduling.Claudiu Zissulescu2019-04-161-13/+0
* [ARC] Enable code density frame option for elf targets.Claudiu Zissulescu2019-03-181-10/+12
* [ARC] Fix tst_movb pattern.Claudiu Zissulescu2019-03-181-2/+2
* Update copyright years.Jakub Jelinek2019-01-011-1/+1
* [ARC] Cleanup, fix and set LRA default.Claudiu Zissulescu2018-11-141-19/+38
* [ARC] Update EH code.Claudiu Zissulescu2018-11-131-0/+15
* [ARC] Refurbish and improve prologue/epilogue functions.Claudiu Zissulescu2018-11-131-0/+176
* [ARC] Add peephole rules to combine store/loads into double store/loadsClaudiu Zissulescu2018-11-131-0/+69
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