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* gcc/ada/rsandifo2014-10-291-12/+12
* [PATCH][ARM] Disable store_minmaxsi pattern for arm_restrict_iktkachov2014-10-011-1/+1
* Fix PR target/63209.davidxl2014-09-101-2/+8
* [ARM][7/7] Convert FP mnemonics to UAL | f{ld,st}m -> v{ld,st}mktkachov2014-09-091-1/+1
* PR target/55701amker2014-09-051-0/+14
* * config/arm/arm.md (arm_movqi_insn): Use Uh instead of m constraint.amker2014-09-051-1/+1
* [ARM] Delete f_sels, f_seld types, use fcsel instead.ktkachov2014-08-071-1/+1
* [ARM] Adjust clz, rbit and rev patterns for -mrestrict-it.ktkachov2014-08-051-0/+4
* Revert r212893:amker2014-07-231-14/+0
* PR target/55701amker2014-07-211-0/+14
* 2014-07-17 Terry Guo <terry.guo@arm.com>xguo2014-07-171-22/+22
* gcc/mzakirov2014-07-111-3/+3
* [ARM] PR target/49423cbaylis2014-07-051-20/+10
* * arm.md (arch): Add armv6_or_vfpv3.rearnsha2014-07-031-2/+7
* -fuse-caller-save - Enable for ARMvries2014-06-181-2/+28
* 2014-06-11 Terry Guo <terry.guo@arm.com>xguo2014-06-111-1766/+2
* Disable opt_enabled attribute.ramana2014-06-051-3/+11
* Fix PR target/61154ramana2014-06-021-1/+1
* * arm/iterators.md (shiftable_ops): New code iterator.rearnsha2014-05-291-37/+25
* gcc/rsandifo2014-05-281-1/+1
* PR target/61208rearnsha2014-05-221-5/+5
* [ARM] Adjust arith_shiftsi for -mrestrict-it.ktkachov2014-05-201-0/+1
* [ARM] Enable tail call optimization for long callyufeng2014-04-251-4/+8
* [ARM][3/3] Recognise bitwise operations leading to SImode rev16ktkachov2014-04-231-0/+38
* Optimise NotDI AND/OR ZeroExtendSI for ARMv7Aibolton2014-04-221-0/+22
* PR target/60657law2014-04-041-11/+11
* [ARM/AArch64][1/2] Crypto intrinsics tuning for Cortex-A53 - "type" Attribute...ktkachov2014-03-281-99/+0
* Update copyright years in gcc/rsandifo2014-01-021-1/+1
* 2013-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>ktkachov2013-12-191-2/+6
* [gcc/]ktkachov2013-12-191-0/+11
* 2013-12-19 Charles Baylis <charles.baylis@linaro.org>clyon2013-12-191-1/+1
* 2013-12-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com>ktkachov2013-12-171-1/+1
* 2013-12-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>ktkachov2013-12-091-2/+2
* [ARM] Add __builtin_trap support for A32ibolton2013-12-061-0/+17
* 2013-11-29 Yvan Roux <yvan.roux@linaro.org>yroux2013-11-291-1/+1
* [gcc/]ktkachov2013-11-261-0/+18
* gcc/ChangeLogxguo2013-11-251-4/+55
* PR target/59216rearnsha2013-11-221-35/+62
* [ARM] Add missing type attribute to zero_extend on armjgreenhalgh2013-11-191-1/+2
* [ARM] [Neon types 3/10] Update Current type attributes to new Neon Types.jgreenhalgh2013-10-151-30/+104
* 2013-10-01 Kugan Vivekanandarajah <kuganv@linaro.org>clyon2013-10-011-73/+6
* 2013-09-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>ktkachov2013-09-131-6/+8
* [gcc/]ktkachov2013-09-111-6/+6
* [AArch64, ARM] Introduce "mrs" type attribute.jgreenhalgh2013-09-061-1/+1
* [AArch64, ARM] Use "multiple" for type, where more than one instruction is us...jgreenhalgh2013-09-061-3/+3
* [Patch ARM AARCH64] Split "type" attributes: fdivjgreenhalgh2013-09-061-1/+0
* [Patch ARM] Add "type" attribute to Everything!jgreenhalgh2013-09-061-188/+342
* [AARCH64][Insn classification unification 3/N] ALU/shift typesjgreenhalgh2013-09-051-92/+100
* [AArch64, AArch32][Insn classification refactoring 6/N] Remove "neon_type" at...jgreenhalgh2013-09-051-74/+32
* 2013-08-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>ktkachov2013-08-011-2/+5
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