summaryrefslogtreecommitdiff
path: root/gcc/config/arm/arm.md
Commit message (Expand)AuthorAgeFilesLines
* [ARM] PR target/69161: Don't ignore mode when matching comparison operator in...ktkachov2016-02-171-2/+2
* Update copyright years.jakub2016-01-041-1/+1
* [ARM] PR target/68648: Fold NOT of CONST_INT in andsi_iorsi3_notsi splitterktkachov2015-12-161-2/+16
* Add scheduling model for Exynos M1evandro2015-12-071-1/+2
* PR middle-end/65958ebotcazou2015-12-041-1/+1
* [ARM] PR target/68214: Delete IP-reg-clobbering call-through-mem patternsktkachov2015-12-041-34/+0
* [AArch64] Add attribute for compatibility with ARM pipeline modelsjgreenhalgh2015-11-201-0/+3
* [ARM] Do not expand movmisalign pattern if not in 32-bit modektkachov2015-11-201-5/+5
* [ARM] PR 68149 Fix ICE in unaligned_loaddi splitktkachov2015-11-201-53/+0
* [PATCH][ARM]Fix addsi3_compare_op2 pattern.renlin2015-11-121-2/+2
* 2015-11-06 Michael Collison <michael.collison@linaro.orgcollison2015-11-061-38/+0
* [Patch ARM] Unified assembler in ARM state.ramana2015-11-061-85/+77
* [Patch PR target/67366 1/2] [ARM] - Add movmisalignhi / si patternsramana2015-10-091-0/+35
* * config/arm/arm.c (arm_emit_probe_stack_range): Adjust comment.ebotcazou2015-10-061-3/+1
* Remove REAL_VALUE_FROM_CONST_DOUBLErsandifo2015-10-051-23/+13
* 2015-09-17 Christian Bruel <christian.bruel@st.com>chrbr2015-09-171-1/+1
* PR middle-end/65958ebotcazou2015-09-171-0/+24
* [ARM] PR 67439: Allow matching of *arm32_movhf when -mrestrict-it is onktkachov2015-09-101-2/+3
* [ARM][3/3] Expand mod by power of 2ktkachov2015-09-091-1/+70
* gcc/rsandifo2015-08-241-2/+1
* [PATCH][ARM]Tighten the conditions for arm_movw, arm_movt.renlin2015-08-241-1/+1
* 2015-08-12 Yvan Roux <yvan.roux@linaro.org>yroux2015-08-121-2/+2
* 2015-08-01 Michael Collison <michael.collison@linaro.orgcollison2015-08-021-0/+38
* [ARM][2/3] Make if_neg_move and if_move_neg into insn_and_splitktkachov2015-07-311-22/+38
* Fix double word typos.aldyh2015-07-131-1/+1
* [ARM] fix movdi expander to avoid illegal ldrd/strdalalaw012015-07-061-0/+36
* Add ARM/thumb attribute targetchrbr2015-06-101-0/+14
* gcc/configavelenko2015-05-181-0/+49
* gcc/ChangeLog:kugan2015-05-161-21/+52
* [ARM] Fix PR 65955: Do not take REGNO on non-REG operand in movcond_addsiktkachov2015-05-121-1/+1
* 2014-09-23 Christian Bruel <christian.bruel@st.com>chrbr2015-05-111-2/+6
* gcc/rsandifo2015-05-071-48/+29
* 2015-04-28 Yvan Roux <yvan.roux@linaro.org>yroux2015-04-281-16/+47
* 2015-04-27 Yvan Roux <yvan.roux@linaro.org>yroux2015-04-271-3/+3
* [ARM][trivial] Use uppercase for code iterator namesktkachov2015-04-241-7/+7
* [ARM] Restrict {load,store}_multiple expanders to MAX_LD_STM_OPS regsktkachov2015-04-231-2/+2
* gcc/xguo2015-02-261-1/+2
* [ARM] Wire up the new scheduler description for the ARM Cortex-A57 processorjgreenhalgh2015-01-261-2/+3
* [ARM] Move comment about splitting Thumb1 patterns to thumb1.mdktkachov2015-01-161-19/+0
* 2015-01-15 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>ptomsich2015-01-151-2/+9
* [ARM] Fix PR target/64460: Set 'shift' attr properly on some patterns.ktkachov2015-01-141-2/+2
* Update copyright years.jakub2015-01-051-1/+1
* [ARM] Optimize copysign/copysignf for soft-float using BFIjiwang2014-11-281-0/+41
* [ARM] Add Cortex-A17 supportktkachov2014-11-281-2/+3
* 2014-11-27 Thomas Preud'homme <thomas.preudhomme@arm.com>thopre012014-11-271-9/+42
* Fix missing output formatter.ramana2014-11-201-1/+1
* PR target/59593fyang2014-11-191-7/+15
* [ARM] Use std::swap instead of manually swappingktkachov2014-11-181-12/+4
* 2014-11-17 Terry Guo <terry.guo@arm.com>xguo2014-11-181-2/+9
* Fix typo in *<arith_shift_insn>_shiftsiramana2014-11-121-1/+1
View Lorry Controller Status