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* Implement x86 interrupt attributehjl/interrupt/stage1H.J. Lu2016-05-271-12/+343
* PR target/70738uros2016-05-251-12/+39
* AVX-512F: Add vectorizer support builtinsiverbin2016-05-251-3/+51
* * config/i386/i386.c (ix86_preferred_reload_class): Useuros2016-05-241-4/+5
* * config/i386/i386.h (IS_STACK_MODE): Enable foruros2016-05-231-15/+13
* Revert:uros2016-05-221-4/+1
* * gcc/config/i386/i386.c (ix86_rtx_costs) <case CONST_DOUBLE>:uros2016-05-201-36/+33
* Add -mgeneral-regs-only optionhjl2016-05-201-1/+4
* Fix patterns to enable sse-14.c to compile with -masm=intel.kyukhin2016-05-181-0/+4
* gcc/ienkovich2016-05-171-1/+7
* * config/i386/i386.c (ix86_compute_frame_layout, ix86_expand_prologue,jakub2016-05-131-13/+10
* Fix SEGV in ix86_in_large_data_p (PR target/71080)ro2016-05-131-0/+3
* * builtins.c (expand_builtin_memcmp): Do not emit the call here.ebotcazou2016-05-131-3/+3
* * config/i386/i386.c (legitimize_pic_address): Useuros2016-05-111-12/+2
* gcc/ienkovich2016-05-111-7/+0
* * config/i386/i386.c (legitimize_pic_address): Merge 64-bit and 32-bituros2016-05-101-74/+46
* gcc/ienkovich2016-05-101-6/+64
* PR target/70873uros2016-05-051-0/+20
* PR target/70858jakub2016-04-281-7/+7
* * config/i386/i386.c (ix86_spill_class): Enable for TARGET_SSE2 whenuros2016-04-271-2/+5
* Extend STV pass to 64-bit modehjl2016-04-271-37/+351
* Support .largecomm with Solaris as (PR target/61821)ro2016-04-261-3/+11
* Support .lbss etc. sections with Solaris as (PR target/59407)ro2016-04-261-2/+8
* * config/i386/i386.md (*movoi_internal_avx): Set mode attribute to XIuros2016-04-251-13/+7
* * config/i386/i386-protos.h (standard_sse_constant_p): Adduros2016-04-241-59/+107
* Simplify ix86_expand_vector_move_misalignhjl2016-04-201-171/+81
* Remove ssememalignhjl2016-04-191-12/+0
* Remove UNSPEC_LOADU and UNSPEC_STOREUhjl2016-04-191-138/+104
* * config/i386/i386.c (ix86_decompose_address): Use lowpart_subreguros2016-04-191-22/+21
* i386: Don't convert stack operations to pushes if using a redzone.bernds2016-04-151-1/+1
* * config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen):jakub2016-04-121-16/+23
* * cgraph.h (struct cgraph_simd_clone): Add mask_mode field.jakub2016-04-071-1/+6
* * config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen):jakub2016-04-061-6/+35
* gcc/ienkovich2016-03-311-3/+6
* PR target/70421jakub2016-03-301-1/+6
* Properly check conflict between DRAP register and __builtin_eh_returnhjl2016-03-301-3/+5
* 2016-03-22 Ilya Enkovich <enkovich.gnu@gmail.com>law2016-03-221-0/+14
* Remove duplicated AVX-512VL bit check.kyukhin2016-03-221-3/+0
* PR target/70325kyukhin2016-03-221-4/+15
* PR target/70329jakub2016-03-221-4/+12
* gcc/ienkovich2016-03-111-1/+4
* Fix cost table initialization order for AMD znver1 target.vekumar2016-03-091-2/+2
* PR target/70110jakub2016-03-081-2/+4
* PR target/70064uros2016-03-071-12/+13
* Fix Multiply costs for AMD -march=znver1.vekumar2016-03-051-5/+5
* PR target/70062jakub2016-03-041-15/+13
* 2016-03-02 Richard Biener <rguenther@suse.de>rguenth2016-03-021-1/+1
* 2016-03-02 Richard Biener <rguenther@suse.de>rguenth2016-03-021-0/+4
* PR target/70027uros2016-03-011-9/+15
* Remove __seg_tls before first release.rth2016-02-231-49/+1
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