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path: root/gcc/config/m68k/m68k.md
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* (ashrdi_const, ashrdi3): Allow 31 as shift count.kenner1997-01-191-3/+6
* (rot[lr][shq]i3): Allow 'N', 'O' or 'P' operands.kenner1997-01-191-9/+58
* Fix previous change: {add,sub}qw should be {add,sub}ql. For other useskenner1997-01-191-10/+6
* (addsi3, addhi3): Use two addqw (or subqw) insns when adding (orkenner1997-01-041-9/+9
* (add[hs]i3): Only use two addq.w or subq.w instructionskenner1996-12-101-20/+51
* (iorsi_zexthi_ashl16): New pattern.kenner1996-12-071-1/+21
* ({and,ior,xor}si3_internal): Removed !TARGET_5200 from conditionalskenner1996-12-071-6/+3
* (andsi3): Changed into define_expand.kenner1996-12-071-5/+48
* (movqi): Emit 'st' for INTVAL & 255 == 255, not INTVAL == -1.kenner1996-11-121-11/+11
* (addsi3): If TARGET_5200, use the lea insn to add small constants tokenner1996-11-121-3/+11
* (negsi2): Change into define_expand.kenner1996-11-121-13/+46
* (mulsidi3 matcher): Change predicate const_int_operandtege1996-09-261-6/+2
* Simplify movqi, add more !TARGET_5200 casesian1996-07-191-108/+36
* (negdi2): Undo last change: don't apply neg to address regs.kenner1996-07-191-1/+4
* Add TARGET_5200 to conditions which determine whether the extbl instructionkenner1996-07-181-9/+11
* (add patterns): Don't use two addqw instructions when adding small (8kenner1996-07-181-16/+20
* (movsi_const0, movhi): Favor clr with TARGET_5200.kenner1996-06-061-86/+90
* Disable byte and word arithmetic, rotate, integer divide, dbcc,kenner1996-06-061-106/+126
* (ashlsi_16, lshrsi_16): Disable pattern for TARGET_68060; this specialkenner1996-04-161-6/+6
* (tstdi): Optimized for "d" case.kenner1996-04-151-142/+248
* (ftruncdf2): Enable for m68060 systems.kenner1996-04-141-5/+4
* (fullword move): Call output_move_simode_const.kenner1996-03-261-21/+1
* (pushexthisi_const, movsi_const0): New names.kenner1996-03-191-4/+5
* (dbra peepholes): Use flags_in_68881.tege1996-03-121-2/+2
* Use proper modes and predicates for {sign,zero}_extract.kenner1996-03-111-40/+64
* (const_umulsi3_highpart): Disable for TARGET_M68060.kenner1996-02-191-15/+25
* * m68k.md (movqi): Call CC_STATUS_INIT when loading to/fromlaw1996-02-121-0/+2
* (movqi): Use moveq if possible.kenner1996-01-311-0/+11
* ({adddi,subdi}_sexthishl32): 'a' and 'd' versions merged and fixed; dokenner1996-01-311-37/+26
* (pushdi): Allow "i" for operand 1.kenner1996-01-151-4/+38
* (ashrsi_31): New pattern.tege1995-12-141-0/+12
* Split decrement_and_branch_until_zero until define_expand/define_insnmeissner1995-12-011-1/+15
* (subxf3): Properly name pattern.kenner1995-11-071-2/+2
* (cmpxf): Don't call force_const_mem, it looses for PIC;kenner1995-11-051-105/+30
* (anonymous DImode shift patterns setting cc0): Turned off due tokenner1995-09-281-29/+30
* Make both assembler syntaxes do the same for PIC calls.kenner1995-09-281-22/+19
* (cmpdi): Change patterns to allocate scratch register at RTL generation time.kenner1995-09-111-6/+6
* (adddi3, subdi3): "&" added to clobber's constraints.kenner1995-08-211-2/+2
* For all dbra pattern, change constraint from 'g' to 'd*g'.kenner1995-08-211-2/+2
* (subdi3): Should not be commutative.kenner1995-08-191-2/+2
* [USE_GAS]: Output `jbsr' instead of `jsr' for normal function callskenner1995-07-291-2/+10
* (tstdi, cmpdi): Use match_scratch, not match_operand.kenner1995-07-171-12/+6
* Change FSF address.kenner1995-06-151-1/+2
* (cmpdi matcher): Set cc_status before returning.kenner1995-06-111-1/+1
* ({add,sub}di{_mem,3}): Patterns merged.kenner1995-06-111-86/+86
* (tstdi): Rewrite.kenner1995-06-091-21/+16
* (cmpdi): Rewrite to avoid bogus matching constraints.kenner1995-06-051-12/+22
* (umulsi3_highpart): Pass correct number of arguments to const_uint32_operand.kenner1995-06-011-2/+2
* (one_cmpldi2): New pattern.kenner1995-06-011-13/+37
* (decrement_and_branch_until_zero): Operand 0 constraint changed from "+g"kenner1995-05-301-2/+2