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path: root/gcc/config/rs6000/vsx.md
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* Add hint * too 2nd alternative of the 1st scratch in *vsx_extract_<mode>_stor...Vladimir N. Makarov2020-11-021-1/+1
* VSX_EXTRACT fixCarl Love2020-10-281-1/+1
* [PATCH, rs6000] VSX load/store rightmost element operationsWill Schmidt2020-10-221-0/+18
* [PATCH, rs6000] int128 sign extention instructions (partial prereq)Will Schmidt2020-10-221-0/+33
* [RS6000] VSX_MM_SUFFIXAlan Modra2020-10-221-3/+3
* rs6000: correct BE vextract_fp_from_short[hl] vperm masksDavid Edelsohn2020-10-191-2/+2
* Rename mffgpr/mftgpr insn types and remove Power6 references.Pat Haugen2020-09-141-4/+4
* Fix instruction types.Pat Haugen2020-09-101-3/+3
* rs6000: Rename instruction xvcvbf16sp to xvcvbf16spnPeter Bergner2020-08-181-3/+3
* rs6000, Add vector replace builtin support GCC maintainers:Carl Love2020-08-041-0/+60
* rs6000 Add vector insert builtin supportCarl Love2020-08-041-0/+110
* rs6000, Update support for vec_extractCarl Love2020-08-041-0/+66
* [PATCH] RS6000 Add testlsbb by Byte operationsWill Schmidt2020-07-301-0/+39
* RS6000, add VSX mask manipulation supportCarl Love2020-07-101-0/+49
* rs6000: Add len_load/len_store optab supportKewen Lin2020-07-081-0/+28
* [PATCH, PR target/94954] Fix wrong codegen for vec_pack_to_short_fp32() builtinWill Schmidt2020-06-241-0/+10
* rs6000: Rename future to power10Segher Boessenkool2020-06-221-3/+3
* rs6000: Add MMA built-in function definitions and test cases.Peter Bergner2020-06-211-0/+15
* pr94833, fix vec_first_match_index for nullsCarl Love2020-05-181-2/+2
* rs6000: Add xxgenpcvwm and xxgenpcvdmCarl Love2020-05-111-0/+32
* Fix target/93937Michael Meissner2020-02-281-22/+0
* Fix PR target/93932Michael Meissner2020-02-271-19/+71
* Fix bad code of vector extract of PC-relative address with variable element #.Michael Meissner2020-01-071-4/+4
* Update copyright years.Jakub Jelinek2020-01-011-1/+1
* rs6000: Handle unordered for xscmpexp[dq]p without NaNs (PR92449)Segher Boessenkool2019-11-121-0/+12
* vsx.md (xxswapd_<mode>): Add support for V2DF and V2DI modes.Kelvin Nilsen2019-11-061-0/+11
* [rs6000] vector conversion RTL pattern update for diff unit sizeKewen Lin2019-11-011-31/+83
* [rs6000] vector conversion RTL pattern update for same unit sizeKewen Lin2019-11-011-77/+28
* [rs6000] Replace vsx_xvcdpsp by vsx_xvcvdpspKewen Lin2019-11-011-9/+0
* Rework how prefixed instruction length is calculated.Michael Meissner2019-10-231-0/+8
* This patch is to add the support for float from/to long conversionKewen Lin2019-09-291-0/+45
* RS6000, add xxswapd supportCarl Love2019-09-231-28/+34
* [rs6000] Fix ambiguous .md attribute usesRichard Sandiford2019-07-161-2/+2
* altivec.md (altivec_mov<mode>, [...]): Change the RTL attribute "length" from...Michael Meissner2019-07-031-8/+8
* rs6000: Remove wp and wqSegher Boessenkool2019-06-051-60/+55
* rs6000: More simplificationSegher Boessenkool2019-06-051-42/+23
* rs6000: <VSs> -> <sd>pSegher Boessenkool2019-06-051-59/+45
* rs6000: VSa->wa for some more casesSegher Boessenkool2019-06-051-3/+3
* rs6000: Simplify <VSa> for VSX_TISegher Boessenkool2019-06-051-4/+4
* rs6000: ww -> waSegher Boessenkool2019-06-051-13/+13
* rs6000: Remove Ftrad, Fvsx, Fs; add s and sdSegher Boessenkool2019-06-051-4/+4
* rs6000: Simplify <VSa> for VSX_WSegher Boessenkool2019-06-051-16/+16
* rs6000: Simplify VS[ra]* for VSX_[BDF]Segher Boessenkool2019-06-051-110/+97
* rs6000: wf -> waSegher Boessenkool2019-06-041-39/+35
* rs6000: wd -> waSegher Boessenkool2019-06-041-37/+33
* rs6000: Delete VS_64regSegher Boessenkool2019-06-041-7/+2
* rs6000: ws -> waSegher Boessenkool2019-06-041-15/+15
* rs6000: wv -> v+p7vSegher Boessenkool2019-06-041-4/+4
* rs6000: wi->wa, wt->waSegher Boessenkool2019-06-041-8/+8
* rs6000: wm -> wa+p8vSegher Boessenkool2019-05-221-4/+2
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