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* Merge ix86_maybe_switch_abi with ix86_set_current_functionhjl/pr67850H.J. Lu2015-10-061-14/+8
| | | | | | | | | | | | | | ix86_maybe_switch_abi is called to late during RTL expansion and we use the stale information from compilation of the previous function. aggregate_value_p uses call_used_regs. aggregate_value_p is used by IPA and return value optimization, which are called before ix86_maybe_switch_abi is called. This patch merges ix86_maybe_switch_abi with ix86_set_current_function. PR target/67850 * config/i386/i386.c (ix86_maybe_switch_abi): Merged with ... (ix86_set_current_function): This. (TARGET_EXPAND_TO_RTL_HOOK): Removed.
* 2015-10-06 Venkataramanan Kumar <Venkataramanan.kumar@amd.com>vekumar2015-10-0611-28/+1185
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AMD znver1 enablement. * config.gcc (i[34567]86-*-linux* | ...): Add znver1. (case ${target}): Add znver1. * config/i386/cpuid.h(bit_CLZERO): Define. * config/i386/driver-i386.c: (host_detect_local_cpu): Let -march=native recognize znver1 processors. * config/i386/i386-c.c (ix86_target_macros_internal): Add znver1, clzero def_and_undef. * config/i386/i386.c (struct processor_costs znver1_cost): New. (m_znver1): New definition. (m_AMD_MULTIPLE): Includes m_znver1. (processor_target_table): Add znver1 entry. (ix86_target_string) : Add clzero entry. (static const char *const cpu_names): Add znver1 entry. (ix86_option_override_internal): Add znver1 instruction sets. (PTA_CLZERO) : New definition. (ix86_option_override_internal): Handle new clzerooption. (ix86_issue_rate): Add znver1. (ix86_adjust_cost): Add znver1. (ia32_multipass_dfa_lookahead): Add znver1. (has_dispatch): Add znver1. * config/i386/i386.h (TARGET_znver1): New definition. (TARGET_CLZERO): Define. (TARGET_CLZERO_P): Define. (struct ix86_size_cost): Add TARGET_ZNVER1. (enum processor_type): Add PROCESSOR_znver1. * config/i386/i386.md (define_attr "cpu"): Add znver1. (set_attr znver1_decode): New definitions for znver1. * config/i386/i386.opt (flag_dispatch_scheduler): Add znver1. (mclzero): New. * config/i386/mmx.md (set_attr znver1_decode): New definitions for znver1. * config/i386/sse.md (set_attr znver1_decode): Likewise. * config/i386/x86-tune.def: Add znver1 tunings. * config/i386/znver1.md: Introduce znver1 cpu and include new md file. * gcc/doc/invoke.texi: Add details about znver1 git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228520 138bc75d-0d04-0410-961f-82ee72b054a4
* PR c/65345ebotcazou2015-10-061-10/+15
| | | | | | | | * config/sparc/sparc.c (sparc_atomic_assign_expand_fenv): Adjust to use create_tmp_var_raw rather than create_tmp_var. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228516 138bc75d-0d04-0410-961f-82ee72b054a4
* Fix PR65345 in SH backendkkojima2015-10-051-5/+7
| | | | | | | | | Adjust to use create_tmp_var_raw rather than create_tmp_var at sh_atomic_assign_expand_fenv. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228502 138bc75d-0d04-0410-961f-82ee72b054a4
* [PR other/65021] mkoffloads -save-temps handling, and cleanup cleanuptschwinge2015-10-052-17/+50
| | | | | | | | | | | | | | | | | | | | | | | | gcc/ PR other/65021 * config/i386/intelmic-mkoffload.c (mkoffload_atexit): Rename function to... (mkoffload_cleanup): ... this. Adjust all users. (maybe_unlink): Look at save_temps and verbose flags instead of debug flag. (main): Parse "-save-temps" flag. (generate_target_descr_file, generate_target_offloadend_file) (generate_host_descr_file, prepare_target_image): Pass it on. * config/nvptx/mkoffload.c (tool_cleanup): Implement. (mkoffload_cleanup): New function. (maybe_unlink): Look at save_temps and verbose flags instead of debug flag. (main): Instead of calling utils_cleanup, register atexit handler for mkoffload_cleanup. (main): Parse "-save-temps" flag. (compile_native, main): Pass it on. * lto-wrapper.c (compile_offload_image): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228488 138bc75d-0d04-0410-961f-82ee72b054a4
* [AArch64] Fix output assembly bug under TLSIE ILP32jiwang2015-10-051-1/+1
| | | | | | | | | | | 2015-10-05 James Greenhalgh <james.greenhalgh@arm.com> Jiong Wang <jiong.wang@arm.com> * config/aarch64/aarch64.md (tlsie_tiny_sidi): Replace "<w>" with "w". git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228482 138bc75d-0d04-0410-961f-82ee72b054a4
* Remove REAL_VALUE_FROM_CONST_DOUBLErsandifo2015-10-0546-362/+172
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To maintain symmetry after the previous removal of CONST_DOUBLE_FROM_REAL_VALUE, this patch also gets rid of REAL_VALUE_FROM_CONST_DOUBLE. All the macro did was copy the contents of CONST_DOUBLE_REAL_VALUE into a temporary real_value structure. In many cases there was no need for this temporary and we could simply use the CONST_DOUBLE_REAL_VALUE directly. For that reason this patch is less automatic than the others. Bootstrapped & regression-tested on x86_64-linux-gnu. Also tested by building one target per CPU directory and checking that there were no new warnings and no changes in testsuite output at -O2. gcc/ * real.h (REAL_VALUE_FROM_CONST_DOUBLE): Delete. * config/aarch64/aarch64.c (aarch64_float_const_zero_rtx_p) (aarch64_print_operand, aarch64_float_const_representable_p) (aarch64_output_simd_mov_immediate): Use CONST_DOUBLE_REAL_VALUE instead of REAL_VALUE_FROM_CONST_DOUBLE. * config/arc/arc.c (arc_print_operand): Likewise. * config/arm/arm.c (arm_const_double_rtx, vfp3_const_double_index) (neon_valid_immediate, arm_print_operand, arm_emit_fp16_const) (vfp3_const_double_for_fract_bits, vfp3_const_double_for_bits): Likewise. * config/arm/arm.md (*arm32_movhf, consttable_4, consttable_8) (consttable_16): Likewise. * config/arm/vfp.md (*movhf_vfp_neon, *movhf_vfp): Likewise. * config/avr/avr.c (avr_print_operand): Likewise. * config/bfin/bfin.md: Likewise (in a define_split). * config/c6x/c6x.md: Likewise (in a define_split). * config/cr16/cr16.c (cr16_const_double_ok): Likewise. (cr16_print_operand): Likewise. * config/cris/cris.c (cris_print_operand): Likewise. * config/epiphany/epiphany.c (epiphany_print_operand): Likewise. * config/fr30/fr30.c (fr30_print_operand): Likewise. (fr30_const_double_is_zero): Likewise. * config/frv/frv.c (frv_print_operand, output_move_single): Likewise. * config/frv/frv.md: Likewise (in a define_split). * config/frv/predicates.md (int_2word_operand): Likewise. * config/h8300/h8300.c (h8300_print_operand): Likewise. * config/i386/i386.c (standard_80387_constant_p): Likewise. (ix86_print_operand, ix86_split_to_parts): Likewise. * config/i386/i386.md: Likewise (in a define_split). * config/ia64/ia64.c (ia64_split_tmode, ia64_print_operand): Likewise. * config/iq2000/iq2000.md (movsf_lo_sum, movsf_high): Likewise. * config/m32r/m32r.c (easy_df_const, m32r_print_operand): Likewise. * config/m68k/m68k.c (handle_move_double, standard_68881_constant_p) (print_operand): Likewise. * config/m68k/m68k.md (movsf_cf_hard, movdf_cf_hard): Likewise. * config/mep/mep.md: Likewise (in define_split). * config/microblaze/microblaze.c (microblaze_const_double_ok) (print_operand): Likewise. * config/mips/mips.md (consttable_float): Likewise. * config/mmix/mmix.c (mmix_intval): Likewise. * config/mn10300/mn10300.c (mn10300_print_operand): Likewise. * config/nvptx/nvptx.c (nvptx_print_operand): Likewise. * config/pa/pa.c (pa_singlemove_string): Likewise. * config/pdp11/pdp11.c (pdp11_expand_operands): Likewise. (pdp11_asm_print_operand, legitimate_const_double_p): Likewise. * config/rs6000/rs6000.c (num_insns_constant, rs6000_emit_cmove) (output_toc): Likewise. * config/rs6000/rs6000.md: Likewise (in define_splits). * config/rx/rx.c (rx_print_operand): Likewise. * config/s390/s390.c (s390_output_pool_entry): Likewise. * config/sh/sh.c (fp_zero_operand, fp_one_operand): Likewise. * config/sh/sh.md (consttable_sf, consttable_df): Likewise (and also in define_splits). * config/sparc/sparc.c (fp_sethi_p, fp_mov_p): Likewise. (fp_high_losum_p): Likewise. * config/sparc/sparc.md (*movsf_insn, *movsf_lo_sum): Likewise. (*movsf_high): Likewise. * config/spu/spu.c (const_double_to_hwint): Likewise. * config/v850/v850.c (const_double_split): Likewise. * config/vax/vax.c (vax_float_literal): Likewise. * config/visium/visium.c (visium_expand_copysign): Likewise. * config/visium/visium.md: Likewise (in define_split). * config/xtensa/predicates.md (const_float_1_operand): Likewise. * config/xtensa/xtensa.c (print_operand): Likewise. (xtensa_output_literal): Likewise. * cprop.c (implicit_set_cond_p): Likewise. * dwarf2out.c (insert_float): Likewise. * expmed.c (expand_mult, make_tree): Likewise. * expr.c (compress_float_constant): Likewise. * rtlanal.c (split_double): Likewise. * simplify-rtx.c (avoid_constant_pool_reference): Likewise. (simplify_const_unary_operation, simplify_binary_operation_1) (simplify_const_binary_operation): Likewise. (simplify_const_relational_operation): Likewise. * varasm.c (output_constant_pool_2): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228478 138bc75d-0d04-0410-961f-82ee72b054a4
* Remove remaining uses of CONST_DOUBLE_FROM_REAL_VALUErsandifo2015-10-0513-36/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch replaces all uses of CONST_DOUBLE_FROM_REAL_VALUE with the already-existing const_double_from_real_value. Bootstrapped & regression-tested on x86_64-linux-gnu. Also tested by building one target per CPU directory and checking that there were no new warnings and no changes in testsuite output at -O2. gcc/ * real.h (CONST_DOUBLE_ATOF): Use const_double_from_real_value instead of CONST_DOUBLE_FROM_REAL_VALUE. (CONST_DOUBLE_FROM_REAL_VALUE): Delete. * config/c6x/c6x.md (divsf3, divdf3): Use const_double_from_real_value instead of CONST_DOUBLE_FROM_REAL_VALUE. * config/epiphany/epiphany.md (fixuns_truncsfsi2): Likewise. * config/i386/i386.c (standard_80387_constant_rtx): Likewise. (ix86_expand_builtin, ix86_emit_i387_log1p, ix86_emit_i387_round) (ix86_emit_swsqrtsf): Likewise. * config/ia64/ia64.c (ia64_expand_builtin): Likewise. * config/mips/mips.md (fixuns_truncdfsi2, fixuns_truncdfdi2) (fixuns_truncsfsi2, fixuns_truncsfdi2): Likewise. * config/pa/pa.c (pa_expand_builtin): Likewise. * config/rs6000/rs6000.c (rs6000_load_constant_and_splat): Likewise. (rs6000_scale_v2df): Likewise. * config/rs6000/rs6000.md (*cmptf_internal2): Likewise. * config/s390/s390.md (fixuns_truncdddi2, fixuns_trunctddi2) (fixuns_trunc<BFP:mode><GPR:mode>2): Likewise. * config/s390/vx-builtins.md (vec_ctd_s64, vec_ctd_u64, vec_ctsl) (vec_ctul): Likewise. * config/sparc/sparc.c (sparc_emit_fixunsdi): Likewise. * config/spu/spu.c (hwint_to_const_double, spu_float_const): Likewise. * config/spu/spu.md (floatunsdisf2, floatunstisf2): Likewise. * cse.c (fold_rtx): Likewise. * emit-rtl.c (immed_double_const): Likewise (in comments). (init_emit_once): Likewise. * expr.c (compress_float_constant, expand_expr_real_1) (const_vector_from_tree): Likewise. * optabs.c (expand_float, expand_fix): Likewise. * reg-stack.c (reg_to_stack): Likewise. * simplify-rtx.c (avoid_constant_pool_reference): Likewise. (simplify_const_unary_operation, simplify_binary_operation_1) (simplify_const_binary_operation, simplify_relational_operation) (simplify_immed_subreg): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228477 138bc75d-0d04-0410-961f-82ee72b054a4
* Remove remaining uses of REAL_ARITHMETICrsandifo2015-10-052-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch replaces all remaining uses of the old target macro REAL_ARITHMETIC with calls to the (now generic) real_arithmetic function. Bootstrapped & regression-tested on x86_64-linux-gnu. Also tested by building one target per CPU directory and checking that there were no new warnings and no changes in testsuite output at -O2. gcc/ada/ * gcc-interface/trans.c (convert_with_check): Use real_arithmetic instead of REAL_ARITHMETIC. gcc/ * doc/tm.texi.in (REAL_ARITHMETIC): Delete. * doc/tm.texi: Regenerate. * real.h (REAL_ARITHMETIC): Delete. * config/i386/i386.c (ix86_expand_lround, ix86_expand_round) (ix86_expand_round_sse4): Use real_arithmetic instead of REAL_ARITHMETIC. * config/i386/sse.md (round<mode>2): Likewise. * rtl.h (rtx_to_tree_code): Likewise (in comment). * explow.c (rtx_to_tree_code): Likewise (in comment). * match.pd: Likewise. * simplify-rtx.c (simplify_binary_operation_1): Likewise. * tree-ssa-math-opts.c (representable_as_half_series_p): Likewise. (expand_pow_as_sqrts): Likewise. * tree-pretty-print.c (dump_generic_node): Remove code that was conditional on REAL_ARITHMETIC being undefined. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228476 138bc75d-0d04-0410-961f-82ee72b054a4
* Replace REAL_VALUES_LESS with real_lessrsandifo2015-10-052-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch continues the removal of real-related macros by replacing REAL_VALUES_LESS with real_less. Bootstrapped & regression-tested on x86_64-linux-gnu. Also tested by building one target per CPU directory and checking that there were no new warnings and no changes in testsuite output at -O2. gcc/ada/ * gcc-interface/trans.c (convert_with_check): Use real_less instead of REAL_VALUES_LESS. gcc/ * doc/tm.texi.in (REAL_VALUES_LESS): Delete. * doc/tm.texi: Regenerate. * real.h (real_less): Declare. (REAL_VALUES_LESS): Delete. * real.c (real_less): New function. (real_compare): Use it. * config/m68k/m68k.c (floating_exact_log2): Use real_less instead of REAL_VALUES_LESS. * config/microblaze/microblaze.c (microblaze_const_double_ok): Likewise. * fold-const.c (fold_convert_const_int_from_real): Likewise. * simplify-rtx.c (simplify_const_unary_operation): Likewise. (simplify_const_relational_operation): Likewise. * tree-call-cdce.c (check_pow): Likewise. (gen_conditions_for_pow_cst_base): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228475 138bc75d-0d04-0410-961f-82ee72b054a4
* Remove remaining uses of REAL_VALUES_IDENTICALrsandifo2015-10-051-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch continues the removal of real-related macros. We already had both the old-style REAL_VALUES_IDENTICAL and the new-style real_identical, so this patch replaces all remaining uses of the former with the latter. Bootstrapped & regression-tested on x86_64-linux-gnu. Also tested by building one target per CPU directory and checking that there were no new warnings and no changes in testsuite output at -O2. gcc/ * real.h (REAL_VALUES_IDENTICAL): Delete. * config/m68k/m68k.c (standard_68881_constant_p): Use real_identical instead of REAL_VALUES_IDENTICAL. * fold-const.c (operand_equal_p): Likewise. * ipa-icf.c (sem_variable::equals): Likewise. * tree-complex.c (some_nonzerop): Likewise. (expand_complex_multiplication): Likewise. * tree.c (simple_cst_equal): Likewise. * varasm.c (compare_constant): Likewise. --- gcc/config/m68k/m68k.c | 5 ++--- gcc/fold-const.c | 3 +-- gcc/ipa-icf.c | 4 ++-- gcc/real.h | 1 - gcc/tree-complex.c | 4 ++-- gcc/tree.c | 2 +- gcc/varasm.c | 2 +- 7 files changed, 9 insertions(+), 12 deletions(-) git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228474 138bc75d-0d04-0410-961f-82ee72b054a4
* Replace REAL_VALUES_EQUAL with real_equalrsandifo2015-10-057-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Richard B suggested we should replace dconsthalf etc. with dconst<1, 2> (). When I tried that, the extra comma caused problems with some lingering uses of the old target macros for handling reals (e.g. REAL_ARITHMETIC instead of real_arithmetic), since the constant was then treated as two macro parameters. It would have been possible to add an extra level of brackets to avoid this, but I thought I might as well take the opportunity to remove the macros instead. (Note that I'm only removing macros that caused a problem directly, or are closely related to ones that did.) This first patch replaces REAL_VALUES_EQUAL with a real_equal function. The prototype is the same as for real_identical, which has already undergone a half-transition in this direction. Bootstrapped & regression-tested on x86_64-linux-gnu. Also tested by building one target per CPU directory and checking that there were no new warnings and no changes in testsuite output at -O2. gcc/c-family/ * c-lex.c (interpret_float): Use real_equal instead of REAL_VALUES_EQUAL. gcc/c/ * c-typeck.c (c_tree_equal): Use real_equal instead of REAL_VALUES_EQUAL. gcc/cp/ * tree.c (cp_tree_equal): Use real_equal instead of REAL_VALUES_EQUAL. gcc/ * real.h (real_equal): Declare. (REAL_VALUES_EQUAL): Delete. * real.c (real_equal): New function. (real_compare): Use it. * doc/tm.texi.in (REAL_VALUES_EQUAL): Delete. * doc/tm.texi: Regenerate. * builtins.c (fold_builtin_pow, fold_builtin_load_exponent): Use real_equal instead of REAL_VALUES_EQUAL. * config/aarch64/aarch64.c (aarch64_float_const_zero_rtx_p): Likewise. * config/arm/arm.c (arm_const_double_rtx, neon_valid_immediate) (fp_const_from_val): Likewise. * config/fr30/fr30.c (fr30_const_double_is_zero): Likewise. * config/m68k/m68k.c (standard_68881_constant_p): Likewise. (floating_exact_log2): Likewise. * config/sh/sh.c (fp_zero_operand, fp_one_operand): Likewise. * config/vax/vax.c (vax_float_literal): Likewise. * config/xtensa/predicates.md (const_float_1_operand): Likewise. * cprop.c (implicit_set_cond_p): Likewise. * expmed.c (expand_mult): Likewise. * fold-const.c (const_binop): Likewise. * simplify-rtx.c (simplify_binary_operation_1): Likewise. (simplify_const_binary_operation): Likewise. (simplify_const_relational_operation): Likewise. * tree-call-cdce.c (check_pow): Likewise. (gen_conditions_for_pow_cst_base): Likewise. * tree-inline.c (estimate_num_insns): Likewise. * tree-ssa-dom.c (record_equality): Likewise. * tree-ssa-math-opts.c (representable_as_half_series_p): Likewise. (gimple_expand_builtin_pow): Likewise. (pass_optimize_widening_mul::execute): Likewise. * tree-ssa-uncprop.c (associate_equivalences_with_edges): Likewise. * tree-vect-patterns.c (vect_recog_pow_pattern): Likewise. * tree.c (real_zerop, real_onep, real_minus_onep): Likewise. --- gcc/builtins.c | 14 +++++++------- gcc/c-family/c-lex.c | 6 +++--- gcc/c/c-typeck.c | 2 +- gcc/config/aarch64/aarch64.c | 2 +- gcc/config/arm/arm.c | 6 +++--- gcc/config/fr30/fr30.c | 2 +- gcc/config/m68k/m68k.c | 6 +++--- gcc/config/sh/sh.c | 4 ++-- gcc/config/vax/vax.c | 4 ++-- gcc/config/xtensa/predicates.md | 2 +- gcc/cp/tree.c | 2 +- gcc/cprop.c | 2 +- gcc/doc/tm.texi | 7 ------- gcc/doc/tm.texi.in | 7 ------- gcc/expmed.c | 2 +- gcc/fold-const.c | 2 +- gcc/real.c | 10 +++++++++- gcc/real.h | 4 ++-- gcc/simplify-rtx.c | 16 ++++++++-------- gcc/tree-call-cdce.c | 4 ++-- gcc/tree-inline.c | 5 +++-- gcc/tree-ssa-dom.c | 2 +- gcc/tree-ssa-math-opts.c | 16 ++++++++-------- gcc/tree-ssa-uncprop.c | 2 +- gcc/tree-vect-patterns.c | 4 ++-- gcc/tree.c | 6 +++--- 26 files changed, 67 insertions(+), 72 deletions(-) git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228473 138bc75d-0d04-0410-961f-82ee72b054a4
* * config/i386/i386.c (ix86_nsaved_regs): Use GENERAL_REGNO_P touros2015-10-041-7/+7
| | | | | | | | | | | | check for general register. (ix86_emit_save_regs): Ditto. (ix86_emit_save_regs_using_mov): Ditto. (ix86_emit_restore_regs_using_pop): Ditto. (ix86_emit_restore_regs_using_mov): Ditto. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228460 138bc75d-0d04-0410-961f-82ee72b054a4
* xtensa: add uclinux supportjcmvbkbc2015-10-032-0/+101
| | | | | | | | | | | | | | | 2015-10-03 Max Filippov <jcmvbkbc@gmail.com> gcc/ * config.gcc (xtensa*-*-uclinux*): New configuration. * config/xtensa/uclinux.h: New file. * config/xtensa/uclinux.opt: New file. libgcc/ * config.host (xtensa*-*-uclinux*): New configuration. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228450 138bc75d-0d04-0410-961f-82ee72b054a4
* nvptx offloading linkingtschwinge2015-10-021-632/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | gcc/ * config/nvptx/mkoffload.c (Kind, Vis): Remove enums. (Token, Stmt): Remove structs. (decls, vars, fns): Remove variables. (alloc_comment, append_stmt, is_keyword): Remove macros. (tokenize, write_token, write_tokens, alloc_stmt, rev_stmts) (write_stmt, write_stmts, parse_insn, parse_list_nosemi) (parse_init, parse_file): Remove functions. (read_file): Accept a pointer to a length and store into it. (process): Don't try to parse the input file, just write it out as a string, but looking for maps. Also write out the length. (main): Don't use "-S" to compile PTX code. libgomp/ * oacc-ptx.h: Remove file, moving its content into... * config/nvptx/fortran.c: ... here... * config/nvptx/oacc-init.c: ..., here... * config/nvptx/oacc-parallel.c: ..., and here. * config/nvptx/openacc.f90: New file. * plugin/plugin-nvptx.c: Don't include "oacc-ptx.h". (link_ptx): Don't link in predefined bits of PTX code. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228418 138bc75d-0d04-0410-961f-82ee72b054a4
* [PR target/67822] OpenMP offloading to nvptx failstschwinge2015-10-021-2/+5
| | | | | | | | | gcc/ PR target/67822 * config/nvptx/mkoffload.c (main): Scan the argument vector for -fopenmp, and skip generating an offloading image if specified. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228414 138bc75d-0d04-0410-961f-82ee72b054a4
* * system.h (ROUND_UP): New macro definition.uros2015-10-022-14/+13
| | | | | | | | | | | | | | | | | | | (ROUND_DOWN): Ditto. * ggc-page.c (ROUND_UP): Remove local macro definition. (PAGE_ALIGN): Implement using ROUND_UP macro. * config/i386/i386.h (PUSH_ROUNDING): Implement using ROUND_UP macro. * config/i386/i386.c (function_arg_advance_64): Use ROUND_UP macro to align values. (ix86_compute_frame_layout): Ditto. (ix86_expand_prologue): Ditto. (ix86_adjust_stack_and_probe): Use ROUND_DOWN macro to round down values. (expand_set_or_movmem_via_rep): Ditto. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228410 138bc75d-0d04-0410-961f-82ee72b054a4
* AVX-512. Add missing features to cpuinfo.ckyukhin2015-10-021-0/+4
| | | | | | | | | | | | | | | | gcc/ * config/i386/i386.c (processor_features): Add F_AVX512VBMI, F_AVX512IFMA. (isa_names_table): Handle F_AVX512VBMI and F_AVX512IFMA. libgcc/ * config/i386/cpuinfo.c (processor_features): Add FEATURE_AVX512VBMI and FEATURE_AVX512VBMI. testsuite/ * gcc.target/i386/builtin_target.c: Handle "avx512ifma" and "avx512vbmi". git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228399 138bc75d-0d04-0410-961f-82ee72b054a4
* [AArch64] Use default_elf_asm_named_section instead of special cased hookramana2015-10-021-3/+0
| | | | | | | * config/aarch64/aarch64-elf.h (TARGET_ASM_NAMED_SECTION): Delete. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228397 138bc75d-0d04-0410-961f-82ee72b054a4
* Update extract_even_odd w/ AVX-512BW insns.kyukhin2015-10-022-12/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gcc/ * config/i386/i386.c (expand_vec_perm_even_odd_trunc): New. (expand_vec_perm_even_odd_1): Handle V64QImode. (ix86_expand_vec_perm_const_1): Try expansion with expand_vec_perm_even_odd_trunc as well. * config/i386/sse.md (VI124_AVX512F): Rename to ... (define_mode_iterator VI124_AVX2_24_AVX512F_1_AVX512BW): This. Extend to V54QI. (define_mode_iterator VI248_AVX2_8_AVX512F): Rename to ... (define_mode_iterator VI248_AVX2_8_AVX512F_24_AVX512BW): This. Extend to V32HI and V16SI. (define_insn "avx512bw_<code>v32hiv32qi2"): Unhide pattern name. (define_expand "vec_pack_trunc_<mode>"): Update iterator name. (define_expand "vec_unpacks_lo_<mode>"): Ditto. (define_expand "vec_unpacks_hi_<mode>"): Ditto. (define_expand "vec_unpacku_lo_<mode>"): Ditto. (define_expand "vec_unpacku_hi_<mode>"): Ditto. gcc/testsuite/ * gcc.target/i386/vect-pack-trunc-1.c: New test. * gcc.target/i386/vect-pack-trunc-2.c: Ditto. * gcc.target/i386/vect-perm-even-1.c: Ditto. * gcc.target/i386/vect-perm-odd-1.c: Ditto. * gcc.target/i386/vect-unpack-1.c: Ditto. * gcc.target/i386/vect-unpack-2.c: Ditto. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228394 138bc75d-0d04-0410-961f-82ee72b054a4
* [AArch64] Use default_elf_asm_named_section instead of special cased hookramana2015-10-021-74/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hi, The hook for TARGET_ASM_NAMED_SECTION was defined separately in the backend around the time frame for GCC 4.7 under the assumption that '@' would be used as a comment character in the binutils port. This was indeed true in versions of the AArch64 port that never made it into the FSF tree. However this practice was killed before the binutils port made it upstream. Doing archaeology into various revisions including the first commit of upstream binutils, talking to Marcus about the history of this and actually testing the first commit of binutils, I can confidently say that the upstream binutils port never had any use of '@' as a comment character for AArch64 However we never got rid of the special cased handling in GCC and the duplication of code in the AArch64 backend. This was found when I was playing with Virtual Table verification on ARM and AArch64 and discovered ICEs which were similar but manifested in different places begging the obvious question. Tested on aarch64-none-elf with no regressions. Ok to apply ? Ramana 2015-10-02 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> * config/aarch64/aarch64.c (aarch64_elf_asm_named_section): Delete. (TLS_SECTION_ASM_FLAG): Delete. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228390 138bc75d-0d04-0410-961f-82ee72b054a4
* [PATCH][AARCH64]Add csneg3_uxtw_insn patternrenlin2015-10-021-0/+12
| | | | | | | | | | | | | | | | | | gcc/ 2015-10-02 Renlin Li <renlin.li@arm.com> * config/aarch64/aarch64.md (csneg3_uxtw_insn): New pattern. gcc/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * gcc.target/aarch64/csneg-1.c: Update test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228387 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/olegendo2015-10-021-0/+40
| | | | | | | | * config/sh/sh.md: Add new unnamed split pattern to handle movt-movt sequences. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228386 138bc75d-0d04-0410-961f-82ee72b054a4
* [PATCH][AARCH64][PR66776]Add cmovdi_insn_uxtw pattern.renlin2015-10-021-0/+12
| | | | | | | | | | | | | | | | | | | gcc/ 2015-10-02 Renlin Li <renlin.li@arm.com> PR target/66776 * config/aarch64/aarch64.md (cmovdi_insn_uxtw): New pattern. gcc/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> PR target/66776 * gcc.target/aarch64/pr66776.c: New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228384 138bc75d-0d04-0410-961f-82ee72b054a4
* [Patch AArch64] Improve SIMD concatenation with zeroesjgreenhalgh2015-10-021-10/+20
| | | | | | | | | | | | | | | | | gcc/ * config/aarch64/aarch64-simd.md (*aarch64_combinez<mode>): Add alternatives for reads from memory and moves from general-purpose registers. (*aarch64_combinez_be<mode>): Likewise. gcc/testsuite/ * gcc.target/aarch64/vect_combine_zeroes_1.c: New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228374 138bc75d-0d04-0410-961f-82ee72b054a4
* PR target/51726ktietz2015-10-021-23/+13
| | | | | | | | | | * config/i386/winnt.c (ix86_handle_selectany_attribute): Handle selectany within this function without need to keep attribute. (i386_pe_encode_section_info): Remove selectany-code. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228370 138bc75d-0d04-0410-961f-82ee72b054a4
* rs6000: Add "cannot_copy" attribute, use it (PR67788, PR67789)segher2015-10-022-2/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After the shrink-wrapping patches the prologue will often be pushed "deeper" into the function, which in turn means the software trace cache pass will more often want to duplicate the basic block containing the prologue. This caused failures for 32-bit SVR4 with -msecure-plt PIC. This configuration uses the load_toc_v4_PIC_1 instruction, which creates assembler labels without using the normal machinery for that. If now the compiler decides to duplicate the insn, it will emit the same label twice. Boom. It isn't so easy to fix this to use labels the compiler knows about (let alone test that properly). Instead, this patch wires up a "cannot_copy" attribute to be used by TARGET_CANNOT_COPY_P, and sets that attribute on these insns we do not want copied. 2015-10-01 Segher Boessenkool <segher@kernel.crashing.org> PR target/67788 PR target/67789 * config/rs6000/rs6000.c (TARGET_CANNOT_COPY_INSN_P): New. (rs6000_cannot_copy_insn_p): New function. * config/rs6000/rs6000.md (cannot_copy): New attribute. (load_toc_v4_PIC_1_normal): Set cannot_copy. (load_toc_v4_PIC_1_476): Ditto. gcc/testsuite/ PR target/67788 PR target/67789 * gcc.target/powerpc/pr67789.c: New testcase. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228366 138bc75d-0d04-0410-961f-82ee72b054a4
* PR c/65345mpolacek2015-10-011-7/+9
| | | | | | | | | | | * config/i386/i386.c (ix86_atomic_assign_expand_fenv): Adjust to use create_tmp_var_raw rather than create_tmp_var. * gcc.dg/atomic/pr65345-4.c: New test. * gcc.dg/pr65345-3.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228343 138bc75d-0d04-0410-961f-82ee72b054a4
* Enable bt and and movzx for Lakemonthjl2015-10-011-2/+2
| | | | | | | | | * config/i386/x86-tune.def (X86_TUNE_USE_BT): Enable for Lakemont. (X86_TUNE_ZERO_EXTEND_WITH_AND): Disable for Lakemont. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228337 138bc75d-0d04-0410-961f-82ee72b054a4
* [Patch 2/2 ARM/AArch64] Add a new Cortex-A53 scheduling modeljgreenhalgh2015-10-013-201/+664
| | | | | | | | | | | | | * config/arm/aarch-common-protos.h (aarch_accumulator_forwarding): New. (aarch_forward_to_shift_is_not_shifted_reg): Likewise. * config/arm/aarch-common.c (aarch_accumulator_forwarding): New. (aarch_forward_to_shift_is_not_shifted_reg): Liekwise. * config/arm/cortex-a53.md: Rewrite. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228324 138bc75d-0d04-0410-961f-82ee72b054a4
* PR target/66870ian2015-09-301-0/+8
| | | | | | | | | | | | | | | * config/rs6000/sysv4.h (TARGET_CAN_SPLIT_STACK_64BIT): Define. * configure.ac: Define HAVE_GOLD_ALTERNATE_SPLIT_STACK on Power based on gold linker version. * gcc.c: Add -fuse-ld=gold to STACK_SPLIT_SPEC if HAVE_GOLD_ALTERNATE_SPLIT_STACK defined. * configure, config.in: Regenerate. go: * gospec.c (lang_specific_driver): Set appropriate split stack options for 64 bit compiles based on TARGET_CAN_SPLIT_STACK_64BIT. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228311 138bc75d-0d04-0410-961f-82ee72b054a4
* [RS6000] Make -msingle-pic-base remove the ELFv2 global entry codeamodra2015-09-301-4/+5
| | | | | | | | | | | | | | For other ABIs, -msingle-pic-base makes gcc omit loading of the PIC register in function prologues. This patch makes the option affect ELFv2 too. * config/rs6000/rs6000.c (rs6000_emit_prologue): Don't set r2_setup_needed when TARGET_SINGLE_PIC_BASE. (rs6000_output_mi_thunk): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228309 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/nathan2015-09-301-7/+21
| | | | | | | | | | | | | | | * config/nvptx/mkoffload.c (process): Change offload data format. libgomp/ * plugin/plugin-nvptx.c (targ_fn_launch): Use GOMP_DIM_MAX. (struct targ_ptx_obj): New. (nvptx_tdata): Move earlier, change data format. (link_ptx): Take targ_ptx_obj ptr and count. Allow multiple objects. (GOMP_OFFLOAD_load_image): Adjust. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228308 138bc75d-0d04-0410-961f-82ee72b054a4
* * config/nvptx/nvptx.c (nvptx_goacc_validate_dims): New.nathan2015-09-301-0/+19
| | | | | | | | | | | | | | | | | | | | | (TARGET_GOACC_VALIDATE_DIMS): Override. * target.def (TARGET_GOACC): New target hook prefix. (validate_dims): New hook. * targhooks.h (default_goacc_validate_dims): New. * omp-low.c (oacc_validate_dims): New. (execute_oacc_device_lower): New. (default_goacc_validate_dims): New. (pass_data_oacc_device_lower): New. (pass_oacc_device_lower): New pass. (make_pass_oacc_device_lower): New. * tree-pass.h (make_pass_oacc_device_lower): Declare. * passes.def (pass_oacc_device_lower): Add it. * doc/tm.texi: Rebuilt. * doc/tm.texi.in (TARGET_GOACC_VALIDATE_DIMS): Add hook. * doc/invoke.texi (oaccdevlow): Document tree dump flag. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228304 138bc75d-0d04-0410-961f-82ee72b054a4
* Pass on the verbose flag "-v" to/in the mkoffloadstschwinge2015-09-302-0/+16
| | | | | | | | | | | | | gcc/ * config/i386/intelmic-mkoffload.c (main): Parse "-v" flag. (generate_target_descr_file, generate_target_offloadend_file) (generate_host_descr_file, prepare_target_image, main): Pass it on. * config/nvptx/mkoffload.c (main): Parse "-v" flag. (compile_native, main): Pass it on. * lto-wrapper.c (compile_offload_image): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228301 138bc75d-0d04-0410-961f-82ee72b054a4
* Refactor intelmic-mkoffload.c argv building to use obstackstschwinge2015-09-301-60/+72
| | | | | | | | | | | That is, restore and adapt the code as originally proposed. gcc/ * config/i386/intelmic-mkoffload.c (generate_host_descr_file) (prepare_target_image, main): Refactor argv building to use obstacks. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228300 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/uweigand2015-09-303-0/+184
| | | | | | | | | | | | | | | | | | | | | | | | * config/spu/spu-protos.h (spu_expand_atomic_op): Add prototype. * config/spu/spu.c (spu_expand_atomic_op): New function. * config/spu/spu.md (AINT): New mode iterator. (ATOMIC): New code iterator. (atomic_name, atomic_pred): New code predicates. ("atomic_load<mode>", "atomic_store<mode>"): New expanders. ("atomic_compare_and_swap<mode>", "atomic_exchange<mode>"): Likewise. (""atomic_<atomic_name><mode>", "atomic_fetch_<atomic_name><mode>", "atomic_<atomic_name>_fetch<mode>"): Likewise. gcc/testsuite/ * lib/target-supports.exp (check_effective_target_sync_int_128): Return 1 on spu-*-* targets. (check_effective_target_sync_int_128_runtime): Likewise. (check_effective_target_sync_long_long): Likewise. (check_effective_target_sync_long_long_runtime): Likewise. (check_effective_target_sync_int_long): Likewise. (check_effective_target_sync_char_short): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228297 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/ienkovich2015-09-301-1/+5
| | | | | | | | | | | | | * config/i386/i386.c (scalar_chain::analyze_register_chain): Ignore debug insns. (scalar_chain::convert_reg): Likewise. gcc/testsuite/ * gcc.target/i386/pr67761.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228292 138bc75d-0d04-0410-961f-82ee72b054a4
* Use gcc/coretypes.h:enum offload_abi in mkoffloadstschwinge2015-09-302-45/+101
| | | | | | | | | | gcc/ * config/i386/intelmic-mkoffload.c (target_ilp32): Remove variable, replacing it with... (offload_abi): ... this new variable. Adjust all users. * config/nvptx/mkoffload.c (target_ilp32, offload_abi): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228283 138bc75d-0d04-0410-961f-82ee72b054a4
* Limit the MEMSET (setmemsi pattern) and MEMCPY (movmemsi pattern)jamesbowman2015-09-292-7/+11
| | | | | | | | | | | | | | | | instructions to 0-511 bytes. There is a hardware limitation on large MEMSET, MEMCPY operations that the library versions of memset() and memcpy() deal with. 2015-09-29 James Bowman <james.bowman@ftdichip.com> * config/ft32/predicates.md (ft32_imm_operand): New predicate. * config/ft32/ft32.md (movmemsi, setmemsi): Use ft32_imm_operand predicate, disallow register for operand 2. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228271 138bc75d-0d04-0410-961f-82ee72b054a4
* Fix typos in comments in i386.chjl2015-09-291-2/+2
| | | | | | | | * config/i386/i386.c (ix86_function_arg): Fix typo in comments. (ix86_nsaved_sseregs): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228266 138bc75d-0d04-0410-961f-82ee72b054a4
* [PATCH] Fix building microblaze targets with trunklaw2015-09-291-1/+1
| | | | | | | * config/microblaze/microblaze.c (microblaze_version_to_int): Remove computation of unused value. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228263 138bc75d-0d04-0410-961f-82ee72b054a4
* [PATCH] Fix warnings building pdp11 portlaw2015-09-293-2/+8
| | | | | | | | * config/pdp11/pdp11.c (pdp11_branch_cost): New function. * config/pdp11/pdp11.h (BRANCH_COST): Call function rather than inline macro expansion. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228259 138bc75d-0d04-0410-961f-82ee72b054a4
* [PATCH] Fix building interix targetslaw2015-09-291-1/+1
| | | | | | * config/i386/t-interix (winnt-stubs.o): Fix compilation rule. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228258 138bc75d-0d04-0410-961f-82ee72b054a4
* [PATCH] Fix undefined behaviour in SH portlaw2015-09-292-4/+4
| | | | | | | | | | * config/sh/sh.c (gen_shl_and): Fix undefined left shift behaviour. (gen_shl_sext): Likewise. * config/sh/sh.md (divsi3): Likewise. (imm->ext_dest_operand splitter): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228257 138bc75d-0d04-0410-961f-82ee72b054a4
* [PATCH] Fix undefined behaviour in rx portlaw2015-09-292-6/+6
| | | | | | | | | * config/rx/constraints.md (Int08): Fix undefined left shift behaviour. (Sint08, Sint16, Sint24): Likewise. * config/rx/rx.c (rx_get_stack_layout): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228254 138bc75d-0d04-0410-961f-82ee72b054a4
* add separate insn sched class for vector LDP & STPspop2015-09-294-6/+18
| | | | | | | | | | | | | | | | 2015-09-29 Evandro Menezes <e.menezes@samsung.com> * config/arm/types.md (neon_ldp, neon_ldp_q, neon_stp, neon_stp_q): Add new insn types for vector load and store pairs. * config/arm/cortex-a53.md (cortex_a53_f_load_2reg): Add insn types "neon_ldp{,_q}". * config/arm/cortex-a57.md (neon_load_c): Add insn types "neon_ldp{,_q}". (neon_store_complex): Add insn types "neon_stp{,_q}". * config/aarch64/aarch64-simd.md (aarch64_be_movoi): Add insn types "neon_{ldp,stp}_q". git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228253 138bc75d-0d04-0410-961f-82ee72b054a4
* [PATCH] Fix undefined behaviour in rl78 portlaw2015-09-291-1/+1
| | | | | | | * config/rl78/rl78-expand.md (movqi): Fix undefined left shift behaviour. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228252 138bc75d-0d04-0410-961f-82ee72b054a4
* [PATCH] Fix undefined behaviour in msp430 portlaw2015-09-292-3/+3
| | | | | | | | | * config/msp430/msp430.c (msp430_legitimate_constant): Fix undefined left shift behaviour. * config/msp430/constraints.md ('L' constraint): Similarly. ('Ys' constraint): Similarly. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228251 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/ienkovich2015-09-293-20/+1048
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PR target/65105 * config/i386/i386.c: Include dbgcnt.h. (has_non_address_hard_reg): New. (convertible_comparison_p): New. (scalar_to_vector_candidate_p): New. (remove_non_convertible_regs): New. (scalar_chain): New. (scalar_chain::scalar_chain): New. (scalar_chain::~scalar_chain): New. (scalar_chain::add_to_queue): New. (scalar_chain::mark_dual_mode_def): New. (scalar_chain::analyze_register_chain): New. (scalar_chain::add_insn): New. (scalar_chain::build): New. (scalar_chain::compute_convert_gain): New. (scalar_chain::replace_with_subreg): New. (scalar_chain::replace_with_subreg_in_insn): New. (scalar_chain::emit_conversion_insns): New. (scalar_chain::make_vector_copies): New. (scalar_chain::convert_reg): New. (scalar_chain::convert_op): New. (scalar_chain::convert_insn): New. (scalar_chain::convert): New. (convert_scalars_to_vector): New. (pass_data_stv): New. (pass_stv): New. (make_pass_stv): New. (ix86_option_override): Created and register stv pass. (flag_opts): Add -mstv. (ix86_option_override_internal): Likewise. * config/i386/i386.md (SWIM1248x): New. (*movdi_internal): Add xmm to mem alternative for TARGET_STV. (and<mode>3): Use SWIM1248x iterator instead of SWIM. (*anddi3_doubleword): New. (*zext<mode>_doubleword): New. (*zextsi_doubleword): New. (<code><mode>3): Use SWIM1248x iterator instead of SWIM. (*<code>di3_doubleword): New. * config/i386/i386.opt (mstv): New. * dbgcnt.def (stv_conversion): New. gcc/testsuite/ PR target/65105 * gcc.target/i386/pr65105-1.c: New. * gcc.target/i386/pr65105-2.c: New. * gcc.target/i386/pr65105-3.c: New. * gcc.target/i386/pr65105-4.C: New. * gcc.dg/lower-subreg-1.c: Add -mno-stv options for ia32. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228231 138bc75d-0d04-0410-961f-82ee72b054a4
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