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* * config/aarch64/aarch64.c (aarch64_legitimize_address): New function.rearnsha2014-10-161-0/+44
* gcc/olegendo2014-10-163-18/+3
* gcc/olegendo2014-10-161-3/+36
* AVX-512. 79/n. Extend expand_mul_widen_hilo.kyukhin2014-10-161-0/+3
* AVX-512. 78/n. Use blend for inserting.kyukhin2014-10-161-0/+73
* gcc/olegendo2014-10-164-341/+294
* AVX-512. 76/n. Extend int 2 float conversions.kyukhin2014-10-161-0/+8
* PR go/59432uros2014-10-154-91/+11
* [AARCH64] Add ACLE 2.0 predefined macrosjiwang2014-10-151-2/+16
* AVX-512. 56/n. Add plus/minus/abs/neg/andnot insn.kyukhin2014-10-151-26/+150
* AVX-512. 52.1/n. Add vec2mask and mask2vec insn.kyukhin2014-10-152-0/+76
* [AArch64] Remove unused variable and marcojiwang2014-10-151-4/+0
* xtensa: use pre- and postincrement FP load/store when availablejcmvbkbc2014-10-152-2/+38
* xtensa: drop unimplemented floating point operationsjcmvbkbc2014-10-151-43/+1
* * config/msp430/msp430-modes.def (PSI): Add.dj2014-10-145-20/+139
* PR target/63534iverbin2014-10-141-4/+9
* AVX-512. 77/n. Use blend for cond-set V32HI and V64QI.kyukhin2014-10-141-0/+8
* AVX-512. 74/n. Add byte/word max/mix reduction.kyukhin2014-10-142-3/+7
* AVX-512. 73/n. Extend reduc min/max autogen.kyukhin2014-10-141-1/+2
* AVX-512. 72/n. Extend VI itterator.kyukhin2014-10-142-2/+4
* AVX-512. 71/n. Remove redudant iterator attribute.kyukhin2014-10-141-6/+0
* AVX-512. 70/n. Add vpmaxmin.kyukhin2014-10-141-12/+16
* AVX-512. 69/n. Add vpmulhrsw insn support.kyukhin2014-10-141-0/+58
* AVX-512. 68/n. Add vpmullw, vpacksdw, pmaddwd insn.kyukhin2014-10-141-56/+64
* AVX-512. 67/n. Update constraints in vec_dup insn.kyukhin2014-10-141-2/+2
* AVX-512. 66/n. Extend vpalignr insn patterns.kyukhin2014-10-141-4/+26
* AVX-512. 65/n. Add rest of VI1-AVX2: mul insn pattern.kyukhin2014-10-141-2/+2
* AVX-512. 64/n. Add rest of VI1-AVX2: vpack[us]wb.kyukhin2014-10-141-13/+13
* AVX-512. 62/n. Add vpmaddubsw,vdbpsadbw insn patterns.kyukhin2014-10-141-0/+33
* AVX-512. 61/n. Update FP logic insn patterns.kyukhin2014-10-141-65/+141
* AVX-512. 60/n. Update 128bit ashrv insn pattern.kyukhin2014-10-141-11/+29
* AVX-512. 59/n. Add vptest[n]m, ucmp, cmpeq insn patterns.kyukhin2014-10-142-18/+96
* AVX-512. 58/n. Add vpmul[u]dq insn patterns.kyukhin2014-10-141-34/+49
* AVX-512. 57/n. Extend blend/cmp/brodcast insn patterns.kyukhin2014-10-141-24/+91
* gcc/olegendo2014-10-141-56/+20
* * config/rs6000/rs6000.h (DBX_REGISTER_NUMBER): Pass format argumentuweigand2014-10-1310-23/+50
* gcc/kyukhin2014-10-131-0/+9
* gcc/kyukhin2014-10-132-75/+108
* gcc/kyukhin2014-10-131-2/+2
* PR libfortran/63471danglin2014-10-131-0/+2
* gcc/olegendo2014-10-122-26/+59
* move many gc hashtab to hash_tabletbsaunde2014-10-125-241/+168
* gcc/olegendo2014-10-116-30/+26
* [AArch64] Add --enable-fix-cortex-a53-835769 configure-time optionktkachov2014-10-102-1/+10
* [AArch64] Implement workaround for ARM Cortex-A53 erratum 835769ktkachov2014-10-104-0/+137
* * config/avr/avr.opt (mmcu=): Change to have a string value.amylaar2014-10-0915-1207/+453
* gcc/olegendo2014-10-081-2/+12
* 2014-10-08 Steve Ellcey <sellcey@mips.com>sje2014-10-081-1/+1
* 2014-10-08 Steve Ellcey <sellcey@mips.com>sje2014-10-084-106/+37
* 2014-10-07 Iain Sandoe <iain@codesourcery.com>mrs2014-10-071-3/+5
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