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* [sched-deps] Generalise usage of macro fusion to work on any two insns.ktkachov2014-08-041-0/+3
* Compute extend family info for AMD CPU and update for BTVER2gganesh2014-08-041-2/+3
* Removed unused get_lane and dup_lane builtins.alalaw012014-08-011-3/+0
* [AArch64] Improve TARGET_LEGITIMIZE_ADDRESS_P hookjiwang2014-08-011-0/+15
* [AArch64][2/2] Add constrain to address offset in storewb_pair/loadwb_pair insnsjiwang2014-08-014-10/+15
* [AArch64][1/2] Fix offset glitch in load reg pair patternjiwang2014-08-012-12/+10
* MIPS REGISTER_PREFIX definitionmpf2014-08-011-0/+6
* [AArch64] arm_neon.h - add vpaddd_f64, vpaddd_s64, vpaddd_u64 intrinsicsjgreenhalgh2014-07-311-56/+59
* gcc/olegendo2014-07-312-0/+34
* [AArch64_be] Don't fold reduction intrinsics.jgreenhalgh2014-07-311-0/+14
* [AArch64_be] Fix vec_select hi/lo mask confusions.jgreenhalgh2014-07-314-54/+67
* PR target/61948cbaylis2014-07-311-2/+6
* gcc/uweigand2014-07-301-1/+4
* Fix Thumb2 testsuite fallout.ramana2014-07-301-1/+1
* 2014-07-29 Olivier Hainque <hainque@adacore.com>hainque2014-07-291-0/+4
* 2014-07-28 Trevor Saunders <tsaunders@mozilla.com>tbsaunde2014-07-281-1/+1
* * config.gcc (powerpc*-*-linux*): Include gnu-user.h in tm_file.bergner2014-07-283-48/+1
* Add moxiebox target.green2014-07-271-0/+47
* 2014-07-26 Andrew Pinski <apinski@cavium.com>pinskia2014-07-271-1/+1
* gcc/rsandifo2014-07-265-60/+10
* * config/avr/avr-c.c (avr_cpu_cpp_builtins): Add __AVR_DEVICE_NAME__.denisc2014-07-241-1/+5
* AArch64: emit .note.GNU-stackrth2014-07-241-0/+2
* gcc/uweigand2014-07-245-3/+30
* gcc/uweigand2014-07-241-7/+41
* gcc/uweigand2014-07-241-2/+59
* * config/alpha/elf.h: Define TARGET_UNWIND_TABLES_DEFAULT.uros2014-07-241-0/+4
* gcc/rsandifo2014-07-241-1/+1
* [AArch64] Optimize epilogue when there is no frame pointer.mshawcroft2014-07-241-10/+45
* [AArch64] Optimize prologue when there is no frame pointer.mshawcroft2014-07-241-14/+44
* [AArch64] Infrastructure to allow optional use of write back.mshawcroft2014-07-241-15/+32
* [AArch64] Extend frame state to track WB candidates.mshawcroft2014-07-242-0/+17
* Another MIPS/R6000 IPA C++ refactoring fix.marxin2014-07-242-5/+5
* IPA C++ refactoring fix.marxin2014-07-241-3/+3
* IPA C++ refactoring 1/Nmarxin2014-07-241-10/+10
* [AArch64] Optimize epilogue in the presence of an outgoing args area.mshawcroft2014-07-241-17/+7
* * config/rx/rx.md (stack_push): Adjust RTL to account for the factnickc2014-07-243-3/+2
* remove useless unused attributes in i386 codetbsaunde2014-07-245-85/+55
* [AArch64] Simplify epilogue expansion using new helper functions.mshawcroft2014-07-232-48/+67
* [AArch64] Simplify prologue expand using new helper functions.mshawcroft2014-07-232-35/+59
* [AArch64] Split save restore path.mshawcroft2014-07-231-35/+69
* [AArch64] Unify vector and core register save/restore code.mshawcroft2014-07-231-76/+24
* [AArch64] Use helper functions to handle multiple modes.mshawcroft2014-07-231-4/+38
* [AArch64] Refactor code out into aarch64_next_callee_savemshawcroft2014-07-231-99/+89
* [AArch64] Hoist calculation of register rtx.mshawcroft2014-07-231-36/+18
* [AArch64] Remove useless variable 'increment'mshawcroft2014-07-231-5/+2
* [AArch64] Use register offset in cfun->machine->frame.reg_offsetmshawcroft2014-07-231-27/+22
* Revert r212893:amker2014-07-233-609/+26
* [AArch64] Remove useless parameter base_rtx.mshawcroft2014-07-231-7/+6
* [AArch64] Remove useless local variable.mshawcroft2014-07-231-2/+1
* [AArch64] Consistent parameter types in prologue/epilogue generation.mshawcroft2014-07-231-1/+1
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