summaryrefslogtreecommitdiff
path: root/gcc/doc
Commit message (Expand)AuthorAgeFilesLines
* Implement x86 interrupt attributehjl/interrupt/middleH.J. Lu2015-11-251-0/+63
* Update TARGET_FUNCTION_INCOMING_ARG documentationH.J. Lu2015-11-251-0/+4
* [gcc]meissner2015-11-251-1/+5
* 2015-11-25 David Sherwood <david.sherwood@arm.com>davids2015-11-251-0/+9
* [AArch64] Documentation fix for -fpicnsz2015-11-241-2/+2
* Add uaddv4_optab and usubv4_optabrth2015-11-231-4/+9
* libsanitizer merge from upstream r253555, compiler part.chefmax2015-11-231-2/+4
* * doc/md.texi (Standard Names): Move entry for addptr3 around,ebotcazou2015-11-201-14/+37
* Fix typo in doc/gty.texidmalcolm2015-11-191-2/+2
* * config/avr/avr-mcus.def: Add new avr4 devices atmega48pb anddenisc2015-11-181-2/+2
* * regrename.h (struct du_head): Add target_data_1 and target_data_2bernds2015-11-181-1/+9
* 2015-11-17 Sandra Loosemore <sandra@codesourcery.com>sandra2015-11-171-0/+9
* Make builtin_vectorized_function take a combined_fnrsandifo2015-11-172-3/+11
* Add null identifiers to genmatchrsandifo2015-11-171-0/+5
* 2015-11-17 Sandra Loosemore <sandra@codesourcery.com>sandra2015-11-172-119/+150
* [Patch AArch64] Add support for Cortex-A35jgreenhalgh2015-11-171-2/+3
* 2015-11-16 Thomas Preud'homme <thomas.preudhomme@arm.com>sandra2015-11-171-1/+1
* 2015-11-16 Sandra Loosemore <sandra@codesourcery.com>sandra2015-11-171-1/+1
* inline asm and multi-alternative constraintslaw2015-11-161-2/+3
* [Patch ARM] Add support for Cortex-A35jgreenhalgh2015-11-161-1/+1
* Add __attribute__((__simd__)) to GCC.kyukhin2015-11-161-0/+16
* 2015-11-16 Christian Bruel <christian.bruel@st.com>chrbr2015-11-162-1/+10
* remove conditional compilation of sdb debug infotbsaunde2015-11-152-2/+2
* [Patch,tree-optimization]: Add new path Splitting pass on tree ssalaw2015-11-131-1/+15
* [gcc]meissner2015-11-131-0/+29
* gcc/ienkovich2015-11-131-1/+35
* [PATCH] gcc.c: new macro POST_LINK_SPECS to be able to add additionallaw2015-11-132-0/+10
* Add initial qualcomm support.wilson2015-11-121-1/+2
* 2015-11-11 Claudiu Zissulescu <claziss@synopsys.com>claziss2015-11-111-2/+71
* * config/nvptx/nvptx.opt (moptimize): New flag.nathan2015-11-101-1/+6
* [optabs][ifcvt][1/3] Define negcc, notcc optabsktkachov2015-11-101-0/+15
* Change behavior of -fsched-verbose optionlaw2015-11-091-6/+1
* 2015-11-09 Michael Meissner <meissner@linux.vnet.ibm.com>meissner2015-11-091-6/+42
* i386: Add address spaces for fs/gs segments and tlsrth2015-11-091-2/+45
* Add hook for modifying debug info for address spacesrth2015-11-092-0/+7
* Add TARGET_ADDR_SPACE_ZERO_ADDRESS_VALIDrth2015-11-092-0/+7
* Merge of the scalar-storage-order branch.ebotcazou2015-11-082-12/+79
* inline asm and multi-alternative constraintslaw2015-11-061-3/+17
* [Patch ARM] Unified assembler in ARM state.ramana2015-11-061-4/+3
* 2015-11-06 Benedikt Huber <benedikt.huber@theobroma-systems.com>ptomsich2015-11-061-0/+12
* PR c++/67942 - diagnose placement new buffer overflowmsebor2015-11-051-1/+8
* * target.def (goacc.dim_limit): New hook.nathan2015-11-052-0/+7
* * internal-fn.def (GOACC_REDUCTION): New.nathan2015-11-042-0/+11
* 2015-10-30 Evgeny Stupachenko <evstupac@gmail.com>iverbin2015-10-301-0/+13
* Re: [Docs] Reword the documentation for -fdump-rtl-jgreenhalgh2015-10-301-10/+12
* libgcc changes for AMD znver1.vekumar2015-10-301-0/+3
* [gcc]meissner2015-10-292-6/+39
* 2015-10-28 Richard Biener <rguenther@suse.de>rguenth2015-10-281-1/+7
* * internal-fn.def (IFN_GOACC_DIM_SIZE, IFN_GOACC_DIM_POS,nathan2015-10-271-5/+7
* * target-insns.def (oacc_fork, oacc_join): Define.nathan2015-10-272-1/+11