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* Require split_stack target for gcc.target/i386/pr46285.c.hjl2010-11-041-0/+1
* Set use_avx256_p if 256bit AVX register is used in vector move.hjl2010-11-031-0/+15
* Add SF min/max under VSX, using the normal double operationsmeissner2010-11-031-0/+18
* Revert revision 164552.hjl2010-11-034-98/+0
* Generate avx_vzeroupper after reload is completed.hjl2010-11-031-0/+5
* Emit vzerouppers after reload.hjl2010-11-025-0/+85
* Add -mtune=generic to fma3-builtin-2.c/fma4-builtin-2.c.hjl2010-10-312-2/+2
* PR rtl-opt/46226rth2010-10-291-0/+35
* PR target/46153uros2010-10-281-0/+9
* Add -mvzeroupper to x86.hjl2010-10-2714-2/+215
* Properly align parameters on stack for x86.hjl2010-10-267-3/+76
* * stor-layout.c (layout_decl): Use the field's type tojiez2010-10-263-0/+54
* * gcc.dg/march-generic.c: Skip for -march in multilib options.jsm282010-10-233-1/+4
* Fix regexp in powerpc testmeissner2010-10-221-1/+1
* Add __builtin_fma vector transform for i386.rth2010-10-222-0/+194
* PR target/46098uros2010-10-221-0/+9
* 2010-10-22 Marcus Shawcroft <marcus.shawcroft@arm.com>mshawcroft2010-10-221-1/+1
* PR target/45946uros2010-10-211-0/+14
* Correct reduc_splus_v8sf and reduc_splus_v4df.hjl2010-10-202-0/+94
* * config/rs6000/rs6000.c (rs6000_reg_live_or_pic_offset_p):hainque2010-10-201-0/+15
* Add patterns for FMA3.rth2010-10-193-0/+246
* Add FMA patterns for ia64.rth2010-10-192-0/+44
* * gcc.target/ia64/20101014.c: Fix double-paste of test case.rth2010-10-181-67/+1
* PR testsuite/45987uros2010-10-171-15/+0
* PR target/46051uros2010-10-171-0/+34
* Add fma supportmeissner2010-10-156-0/+617
* gcc/qiyao2010-10-151-0/+3
* Add -mtune=generic to 256bit AVX tests.hjl2010-10-149-9/+9
* Add another 256bit vectorizer test.hjl2010-10-141-0/+13
* Scan 256bit AVX register and xfail vectorize4-avx.c.hjl2010-10-141-1/+1
* Scan 256bit AVX register.hjl2010-10-142-2/+2
* * sel-sched-ir.c (init_global_and_expr_for_insn): Set CANT_MOVE on RTX_FR...abel2010-10-141-0/+132
* Add more 256bit AVX testcases.hjl2010-10-143-0/+64
* Add testcases for 256bit AVX copysign.hjl2010-10-142-0/+54
* Add a testcase for PR middle-end/44130.hjl2010-10-141-0/+26
* Add a testcase for PR middle-end/44144.hjl2010-10-141-0/+11
* Add a testcase for PR target/44180.hjl2010-10-141-0/+35
* Support "andhi/andsi/anddi" as a zero-extending move.hjl2010-10-091-0/+23
* PR tree-optimization/45903jakub2010-10-081-0/+44
* * config/i386/i386.md (*ashl<mode>3_mask): New insn_and_split pattern.uros2010-10-011-0/+31
* Check in support for Xilinx MicroBlaze processor. eager2010-09-3033-0/+876
* PR target/40457bernds2010-09-291-0/+10
* gcc/testsuite:ro2010-09-283-0/+15
* PR middle-end/45234jakub2010-09-241-0/+18
* * config/i386/i386.md (UNSPECV_NOPS): Rename from UNSPEC_NOPS anduros2010-09-2315-29/+25
* PR rtl-optimization/44374bernds2010-09-234-0/+98
* PR rtl-optimization/45739jakub2010-09-221-2/+2
* PR target/35664ebotcazou2010-09-221-0/+90
* PR rtl-optimization/45739jakub2010-09-211-0/+24
* Pass -fno-pic to gcc.target/i386/pad-3.c.hjl2010-09-181-1/+1
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