From 9405661001d6a96c44dbb838da645611ddd0113c Mon Sep 17 00:00:00 2001 From: mshawcroft Date: Thu, 2 Sep 2010 09:01:56 +0000 Subject: 2010-09-02 Marcus Shawcroft * config/arm/predicates.md (arm_sync_memory_operand): New. * config/arm/sync.md (arm_sync_compare_and_swapsi): Change predicate to arm_sync_memory_operand and constraint to Q. (arm_sync_compare_and_swap): Likewise. (arm_sync_compare_and_swap): Likewise. (arm_sync_lock_test_and_setsi): Likewise. (arm_sync_lock_test_and_set): Likewise. (arm_sync_new_si): Likewise. (arm_sync_new_nandsi): Likewise. (arm_sync_new_): Likewise. (arm_sync_new_nand): Likewise. (arm_sync_old_si): Likewise. (arm_sync_old_nandsi): Likewise. (arm_sync_old_): Likewise. (arm_sync_old_nand): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@163765 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/config/arm/predicates.md | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'gcc/config/arm/predicates.md') diff --git a/gcc/config/arm/predicates.md b/gcc/config/arm/predicates.md index 032b2ecaaf3..54f4861a008 100644 --- a/gcc/config/arm/predicates.md +++ b/gcc/config/arm/predicates.md @@ -619,6 +619,11 @@ (and (match_test "TARGET_32BIT") (match_operand 0 "arm_di_operand")))) +;; True if the operand is memory reference suitable for a ldrex/strex. +(define_predicate "arm_sync_memory_operand" + (and (match_operand 0 "memory_operand") + (match_code "reg" "0"))) + ;; Predicates for parallel expanders based on mode. (define_special_predicate "vect_par_constant_high" (match_code "parallel") -- cgit v1.2.1