From 7e564f7304a4050ea56fed5b6d3158e48b6d0389 Mon Sep 17 00:00:00 2001 From: rsandifo Date: Tue, 24 Apr 2007 05:51:57 +0000 Subject: gcc/ 2007-xx-xx Chao-ying Fu Richard Sandiford * doc/md.texi (madd@var{m}@var{n}4, umadd@var{m}@var{n}4): Document. * optabs.h (OTI_smadd_widen, OTI_umadd_widen): New optab_indexes. (smadd_widen_optab, umadd_widen_optab): Define. * optabs.c (init_optabs): Initialize smadd_widen_optab and umadd_widen_optab. * genopinit.c (optabs): Fill in smadd_widen_optab and umadd_widen_optab. * expr.c (expand_expr_real_1): Try to use smadd_widen_optab and umadd_widen_optab to implement multiply-add sequences. * config/mips/mips.md (*mul_acc_di): Rename to... (maddsidi4): ...this. Extend condition to include GENERATE_MADD_MSUB and TARGET_DSPR2. Change the constraint of operand 0 to "ka" and use the three-operand form of madd for TARGET_DSPR2. * config/mips/mips-dspr2.md (mips_madd, mips_maddu): Convert to define_expands. * config/mips/constraints.md (ka): New register constraint. gcc/testsuite/ 2007-xx-xx Richard Sandiford * gcc.target/mips/madd-1.c, gcc.target/mips/madd-2.c, * gcc.target/mips/madd-3.c, gcc.target/mips/madd-4.c, * gcc.target/mips/maddu-1.c, gcc.target/mips/maddu-2.c, * gcc.target/mips/maddu-3.c, gcc.target/mips/maddu-4.c: New tests. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@124095 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/doc/md.texi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'gcc/doc/md.texi') diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index 01705ad282d..56cc60f2e1e 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -3669,6 +3669,24 @@ The least significant half of the product is discarded. @item @samp{umul@var{m}3_highpart} Similar, but the multiplication is unsigned. +@cindex @code{madd@var{m}@var{n}4} instruction pattern +@item @samp{madd@var{m}@var{n}4} +Multiply operands 1 and 2, sign-extend them to mode @var{n}, add +operand 3, and store the result in operand 0. Operands 1 and 2 +have mode @var{m} and operands 0 and 3 have mode @var{n}. +Both modes must be integer modes and @var{n} must be twice +the size of @var{m}. + +In other words, @code{madd@var{m}@var{n}4} is like +@code{mul@var{m}@var{n}3} except that it also adds operand 3. + +These instructions are not allowed to @code{FAIL}. + +@cindex @code{umadd@var{m}@var{n}4} instruction pattern +@item @samp{umadd@var{m}@var{n}4} +Like @code{madd@var{m}@var{n}4}, but zero-extend the multiplication +operands instead of sign-extending them. + @cindex @code{divmod@var{m}4} instruction pattern @item @samp{divmod@var{m}4} Signed division that produces both a quotient and a remainder. -- cgit v1.2.1