From 6b0059e43767e8bf56af3288b14dffaa19aac007 Mon Sep 17 00:00:00 2001 From: ro Date: Mon, 19 Jul 2010 08:20:59 +0000 Subject: gcc: * doc/sourcebuild.texi (Effective-Target Keywords): Document sse_runtime, sse2_runtime. gcc/testsuite: * lib/target-supports.exp (check_sse_os_support_available): New proc. (check_sse_hw_available): New proc. (check_effective_target_sse_runtime): New proc. (check_effective_target_sse2_runtime): New proc. * lib/fortran-torture.exp (get-fortran-torture-options): Only add -msse2 if check_sse_os_support_available. * g++.dg/vect/vect.exp: Only run -msse2 tests if check_sse_os_support_available. * gcc.dg/vect/vect.exp: Likewise. * gfortran.dg/vect/vect.exp: Likewise. * gcc.target/i386/sol2-check: Renamed to ... * gcc.target/i386/sse-os-support.h: ... this. (sol2_check): Renamed to ... (sse_os_support): ... this. Only test movss with xmm registers. * gcc.target/i386/sse-check.h: Reflect new header and function names. Removed ILL_INSN, ILL_INSN_LEN. * gcc.target/i386/sse2-check.h: Likewise. * gcc.target/i386/sse3-check.h: Likewise. * gcc.dg/pr40550.c: Use dg-require-effective-target sse_runtime. Removed cpuid.h, __get_cpuid test. * g++.dg/other/i386-1.C: Use dg-require-effective-target sse2_runtime. Removed cpuid.h, __get_cpuid test. * g++.dg/other/pr40446.C: Likewise. * gcc.dg/compat/union-m128-1_main.c: Likewise. * gcc.dg/compat/vector-1a_main.c: Likewise. * gcc.dg/compat/vector-2a_main.c: Likewise. * gcc.dg/pr36584.c: Likewise. * gcc.dg/pr37544.c: Likewise. * gcc.dg/torture/pr16104-1.c: Likewise. * gcc.dg/torture/stackalign/alloca-2.c: Likewise. * gcc.dg/torture/stackalign/alloca-3.c: Likewise. * gcc.dg/torture/stackalign/push-1.c: Likewise. * gcc.dg/torture/stackalign/vararg-3.c: Likewise. * gcc.dg/torture/pr35771.h: Removed cpuid.h, __get_cpuid test. * gcc.dg/torture/pr35771-1.c: Use dg-require-effective-target sse2_runtime. * gcc.dg/torture/pr35771-2.c: Likewise. * gcc.dg/torture/pr35771-3.c: Likewise. * gcc.target/i386/pr39315-2.c: Likewise. * gcc.target/i386/pr39315-4.c: Likewise. * gcc.target/i386/vperm-v2df.c: Likewise. * gcc.target/i386/vperm-v2di.c: Likewise. * gcc.target/i386/vperm-v4si-1.c: Likewise. * gcc.target/i386/vperm-v4sf-1.c: Use dg-require-effective-target sse_runtime. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@162295 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/testsuite/ChangeLog | 50 ++++++++++++++++ gcc/testsuite/g++.dg/other/i386-1.C | 13 +---- gcc/testsuite/g++.dg/other/pr40446.C | 12 +--- gcc/testsuite/g++.dg/vect/vect.exp | 2 +- gcc/testsuite/gcc.dg/compat/union-m128-1_main.c | 13 +---- gcc/testsuite/gcc.dg/compat/vector-1a_main.c | 13 +---- gcc/testsuite/gcc.dg/compat/vector-2a_main.c | 13 +---- gcc/testsuite/gcc.dg/pr36584.c | 15 +---- gcc/testsuite/gcc.dg/pr37544.c | 16 +----- gcc/testsuite/gcc.dg/pr40550.c | 17 +----- gcc/testsuite/gcc.dg/torture/pr16104-1.c | 13 +---- gcc/testsuite/gcc.dg/torture/pr35771-1.c | 1 + gcc/testsuite/gcc.dg/torture/pr35771-2.c | 1 + gcc/testsuite/gcc.dg/torture/pr35771-3.c | 1 + gcc/testsuite/gcc.dg/torture/pr35771.h | 12 +--- gcc/testsuite/gcc.dg/torture/stackalign/alloca-2.c | 11 +--- gcc/testsuite/gcc.dg/torture/stackalign/alloca-3.c | 11 +--- gcc/testsuite/gcc.dg/torture/stackalign/push-1.c | 16 ++---- gcc/testsuite/gcc.dg/torture/stackalign/vararg-3.c | 12 +--- gcc/testsuite/gcc.dg/vect/vect.exp | 2 +- gcc/testsuite/gcc.target/i386/pr39315-2.c | 1 + gcc/testsuite/gcc.target/i386/pr39315-4.c | 1 + gcc/testsuite/gcc.target/i386/sol2-check.h | 48 ---------------- gcc/testsuite/gcc.target/i386/sse-check.h | 10 +--- gcc/testsuite/gcc.target/i386/sse-os-support.h | 55 ++++++++++++++++++ gcc/testsuite/gcc.target/i386/sse2-check.h | 9 +-- gcc/testsuite/gcc.target/i386/sse3-check.h | 10 +--- gcc/testsuite/gcc.target/i386/vperm-v2df.c | 1 + gcc/testsuite/gcc.target/i386/vperm-v2di.c | 1 + gcc/testsuite/gcc.target/i386/vperm-v4sf-1.c | 2 + gcc/testsuite/gcc.target/i386/vperm-v4si-1.c | 1 + gcc/testsuite/gfortran.dg/vect/vect.exp | 2 +- gcc/testsuite/lib/fortran-torture.exp | 3 +- gcc/testsuite/lib/target-supports.exp | 67 ++++++++++++++++++++++ 34 files changed, 220 insertions(+), 235 deletions(-) delete mode 100644 gcc/testsuite/gcc.target/i386/sol2-check.h create mode 100644 gcc/testsuite/gcc.target/i386/sse-os-support.h (limited to 'gcc/testsuite') diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 73fb7b78465..100d605e9cc 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,53 @@ +2010-07-19 Rainer Orth + + * lib/target-supports.exp (check_sse_os_support_available): New + proc. + (check_sse_hw_available): New proc. + (check_effective_target_sse_runtime): New proc. + (check_effective_target_sse2_runtime): New proc. + * lib/fortran-torture.exp (get-fortran-torture-options): Only add + -msse2 if check_sse_os_support_available. + * g++.dg/vect/vect.exp: Only run -msse2 tests if + check_sse_os_support_available. + * gcc.dg/vect/vect.exp: Likewise. + * gfortran.dg/vect/vect.exp: Likewise. + * gcc.target/i386/sol2-check: Renamed to ... + * gcc.target/i386/sse-os-support.h: ... this. + (sol2_check): Renamed to ... + (sse_os_support): ... this. + Only test movss with xmm registers. + * gcc.target/i386/sse-check.h: Reflect new header and function names. + Removed ILL_INSN, ILL_INSN_LEN. + * gcc.target/i386/sse2-check.h: Likewise. + * gcc.target/i386/sse3-check.h: Likewise. + * gcc.dg/pr40550.c: Use dg-require-effective-target sse_runtime. + Removed cpuid.h, __get_cpuid test. + * g++.dg/other/i386-1.C: Use dg-require-effective-target sse2_runtime. + Removed cpuid.h, __get_cpuid test. + * g++.dg/other/pr40446.C: Likewise. + * gcc.dg/compat/union-m128-1_main.c: Likewise. + * gcc.dg/compat/vector-1a_main.c: Likewise. + * gcc.dg/compat/vector-2a_main.c: Likewise. + * gcc.dg/pr36584.c: Likewise. + * gcc.dg/pr37544.c: Likewise. + * gcc.dg/torture/pr16104-1.c: Likewise. + * gcc.dg/torture/stackalign/alloca-2.c: Likewise. + * gcc.dg/torture/stackalign/alloca-3.c: Likewise. + * gcc.dg/torture/stackalign/push-1.c: Likewise. + * gcc.dg/torture/stackalign/vararg-3.c: Likewise. + * gcc.dg/torture/pr35771.h: Removed cpuid.h, __get_cpuid test. + * gcc.dg/torture/pr35771-1.c: Use dg-require-effective-target + sse2_runtime. + * gcc.dg/torture/pr35771-2.c: Likewise. + * gcc.dg/torture/pr35771-3.c: Likewise. + * gcc.target/i386/pr39315-2.c: Likewise. + * gcc.target/i386/pr39315-4.c: Likewise. + * gcc.target/i386/vperm-v2df.c: Likewise. + * gcc.target/i386/vperm-v2di.c: Likewise. + * gcc.target/i386/vperm-v4si-1.c: Likewise. + * gcc.target/i386/vperm-v4sf-1.c: Use dg-require-effective-target + sse_runtime. + 2010-07-19 Paul Thomas PR fortran/44353 diff --git a/gcc/testsuite/g++.dg/other/i386-1.C b/gcc/testsuite/g++.dg/other/i386-1.C index 5a91e603660..51048686f7f 100644 --- a/gcc/testsuite/g++.dg/other/i386-1.C +++ b/gcc/testsuite/g++.dg/other/i386-1.C @@ -1,11 +1,10 @@ /* { dg-do run { target i?86-*-* x86_64-*-* } } */ /* { dg-options "-msse2" } */ /* { dg-require-effective-target sse2 } */ +/* { dg-require-effective-target sse2_runtime } */ #include -#include "cpuid.h" - static void sse2_test (void) { @@ -25,14 +24,6 @@ sse2_test (void) int main () { - unsigned int eax, ebx, ecx, edx; - - if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)) - return 0; - - /* Run SSE2 test only if host has SSE2 support. */ - if (edx & bit_SSE2) - sse2_test (); - + sse2_test (); return 0; } diff --git a/gcc/testsuite/g++.dg/other/pr40446.C b/gcc/testsuite/g++.dg/other/pr40446.C index dd0aa482075..b4be0d05617 100644 --- a/gcc/testsuite/g++.dg/other/pr40446.C +++ b/gcc/testsuite/g++.dg/other/pr40446.C @@ -2,9 +2,9 @@ // { dg-do run { target i?86-*-* x86_64-*-* } } // { dg-options "-O1 -msse2" } // { dg-require-effective-target sse2 } +// { dg-require-effective-target sse2_runtime } #include -#include "cpuid.h" extern "C" void abort (); @@ -34,14 +34,6 @@ sse2_test () int main () { - unsigned int eax, ebx, ecx, edx; - - if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)) - return 0; - - /* Run SSE2 test only if host has SSE2 support. */ - if (edx & bit_SSE2) - sse2_test (); - + sse2_test (); return 0; } diff --git a/gcc/testsuite/g++.dg/vect/vect.exp b/gcc/testsuite/g++.dg/vect/vect.exp index aa450661107..18e8355cd7a 100644 --- a/gcc/testsuite/g++.dg/vect/vect.exp +++ b/gcc/testsuite/g++.dg/vect/vect.exp @@ -79,7 +79,7 @@ if [istarget "powerpc-*paired*"] { return } lappend DEFAULT_VECTCFLAGS "-msse2" - if [check_sse2_hw_available] { + if { [check_sse2_hw_available] && [check_sse_os_support_available] } { set dg-do-what-default run } else { set dg-do-what-default compile diff --git a/gcc/testsuite/gcc.dg/compat/union-m128-1_main.c b/gcc/testsuite/gcc.dg/compat/union-m128-1_main.c index cfd081db896..602acf8c112 100644 --- a/gcc/testsuite/gcc.dg/compat/union-m128-1_main.c +++ b/gcc/testsuite/gcc.dg/compat/union-m128-1_main.c @@ -1,8 +1,7 @@ /* { dg-skip-if "test SSE2 support" { ! { i?86-*-* x86_64-*-* } } } */ /* { dg-options "-O" } */ /* { dg-require-effective-target sse2 } */ - -#include "cpuid.h" +/* { dg-require-effective-target sse2_runtime } */ /* Test function argument passing. PR target/15301. */ @@ -12,14 +11,6 @@ extern void exit (int); int main () { - unsigned int eax, ebx, ecx, edx; - - if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)) - return 0; - - /* Run SSE vector test only if host has SSE2 support. */ - if (edx & bit_SSE2) - union_m128_1_x (); - + union_m128_1_x (); exit (0); } diff --git a/gcc/testsuite/gcc.dg/compat/vector-1a_main.c b/gcc/testsuite/gcc.dg/compat/vector-1a_main.c index c5acc35f4d8..11b4511749e 100644 --- a/gcc/testsuite/gcc.dg/compat/vector-1a_main.c +++ b/gcc/testsuite/gcc.dg/compat/vector-1a_main.c @@ -1,12 +1,11 @@ /* { dg-skip-if "test SSE2 vector" { ! { i?86-*-* x86_64-*-* } } } */ /* { dg-require-effective-target sse2 } */ +/* { dg-require-effective-target sse2_runtime } */ /* Test compatibility of vector types: layout between separately-compiled modules, parameter passing, and function return. This test uses vectors of integer values. */ -#include "cpuid.h" - extern void vector_1_x (void); extern void exit (int); int fails; @@ -14,14 +13,6 @@ int fails; int main () { - unsigned int eax, ebx, ecx, edx; - - if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)) - return 0; - - /* Run SSE vector test only if host has SSE2 support. */ - if (edx & bit_SSE2) - vector_1_x (); - + vector_1_x (); exit (0); } diff --git a/gcc/testsuite/gcc.dg/compat/vector-2a_main.c b/gcc/testsuite/gcc.dg/compat/vector-2a_main.c index 164c4b25e2e..8457e5aedc3 100644 --- a/gcc/testsuite/gcc.dg/compat/vector-2a_main.c +++ b/gcc/testsuite/gcc.dg/compat/vector-2a_main.c @@ -1,12 +1,11 @@ /* { dg-skip-if "test SSE2 support" { ! { i?86-*-* x86_64-*-* } } } */ /* { dg-require-effective-target sse2 } */ +/* { dg-require-effective-target sse2_runtime } */ /* Test compatibility of vector types: layout between separately-compiled modules, parameter passing, and function return. This test uses vectors of floating points values. */ -#include "cpuid.h" - extern void vector_2_x (void); extern void exit (int); int fails; @@ -14,14 +13,6 @@ int fails; int main () { - unsigned int eax, ebx, ecx, edx; - - if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)) - return 0; - - /* Run SSE vector test only if host has SSE2 support. */ - if (edx & bit_SSE2) - vector_2_x (); - + vector_2_x (); exit (0); } diff --git a/gcc/testsuite/gcc.dg/pr36584.c b/gcc/testsuite/gcc.dg/pr36584.c index a39eb572e1d..2af71aea122 100644 --- a/gcc/testsuite/gcc.dg/pr36584.c +++ b/gcc/testsuite/gcc.dg/pr36584.c @@ -2,10 +2,7 @@ /* { dg-options "-O2 -lm" } */ /* { dg-options "-O2 -msse2 -mfpmath=sse" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */ /* { dg-require-effective-target sse2 { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */ - -#ifdef __i386__ -#include "cpuid.h" -#endif +/* { dg-require-effective-target sse2_runtime { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */ extern double fabs (double); extern void abort (void); @@ -263,16 +260,6 @@ main () double roots[7]; int nroots; -#ifdef __i386__ - unsigned int eax, ebx, ecx, edx; - - if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)) - return 0; - - if (!(edx & bit_SSE2)) - return 0; -#endif - nroots = sbisect (6, sseq, 0.0, 10000000.0, 5, 1, roots); if (nroots != 4) abort (); diff --git a/gcc/testsuite/gcc.dg/pr37544.c b/gcc/testsuite/gcc.dg/pr37544.c index efca1db6d4a..dec321bf721 100644 --- a/gcc/testsuite/gcc.dg/pr37544.c +++ b/gcc/testsuite/gcc.dg/pr37544.c @@ -2,10 +2,7 @@ /* { dg-options "-O2" } */ /* { dg-options "-O2 -msse2 -mtune=core2 -mfpmath=387" { target { i?86-*-* x86_64-*-* } } } */ /* { dg-require-effective-target sse2 { target { i?86-*-* x86_64-*-* } } } */ - -#ifdef __i386__ -#include "cpuid.h" -#endif +/* { dg-require-effective-target sse2_runtime { target { i?86-*-* x86_64-*-* } } } */ extern void abort (void); @@ -16,17 +13,6 @@ int main(void) int i; -#ifdef __i386__ - unsigned int eax, ebx, ecx, edx; - - if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)) - return 0; - - /* Run SSE2 test only if host has SSE2 support. */ - if (!(edx & bit_SSE2)) - return 0; -#endif - for (i = 0; i < 1000; i++) arr[i] = 4294967296.0 + (double)i; diff --git a/gcc/testsuite/gcc.dg/pr40550.c b/gcc/testsuite/gcc.dg/pr40550.c index 3dd11eb6c71..2e477293ed1 100644 --- a/gcc/testsuite/gcc.dg/pr40550.c +++ b/gcc/testsuite/gcc.dg/pr40550.c @@ -1,10 +1,7 @@ /* { dg-do run } */ /* { dg-options "-msse" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */ /* { dg-require-effective-target sse { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */ - -#ifdef __i386__ -#include "cpuid.h" -#endif +/* { dg-require-effective-target sse_runtime { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */ typedef float v2sf __attribute__ ((vector_size (2 * sizeof(float)))); @@ -18,18 +15,6 @@ static void test (void) int main () { - -#ifdef __i386__ - unsigned int eax, ebx, ecx, edx; - - if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)) - return 0; - - if (!(edx & bit_SSE)) - return 0; -#endif - test (); - return 0; } diff --git a/gcc/testsuite/gcc.dg/torture/pr16104-1.c b/gcc/testsuite/gcc.dg/torture/pr16104-1.c index 3eb405906a2..d4aed810a3b 100644 --- a/gcc/testsuite/gcc.dg/torture/pr16104-1.c +++ b/gcc/testsuite/gcc.dg/torture/pr16104-1.c @@ -2,8 +2,7 @@ /* { dg-do run { target i?86-*-* x86_64-*-* } } */ /* { dg-options "-msse2" } */ /* { dg-require-effective-target sse2 } */ - -#include "cpuid.h" +/* { dg-require-effective-target sse2_runtime } */ extern void abort (void); @@ -76,14 +75,6 @@ do_test (void) int main (void) { - unsigned int eax, ebx, ecx, edx; - - if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)) - return 0; - - /* Run SSE2 test only if host has SSE2 support. */ - if (edx & bit_SSE2) - do_test (); - + do_test (); return 0; } diff --git a/gcc/testsuite/gcc.dg/torture/pr35771-1.c b/gcc/testsuite/gcc.dg/torture/pr35771-1.c index 8def464aa6d..4e95700c72b 100644 --- a/gcc/testsuite/gcc.dg/torture/pr35771-1.c +++ b/gcc/testsuite/gcc.dg/torture/pr35771-1.c @@ -1,6 +1,7 @@ /* { dg-do run { target i?86-*-* x86_64-*-* } } */ /* { dg-options "-msse2" } */ /* { dg-require-effective-target sse2 } */ +/* { dg-require-effective-target sse2_runtime } */ typedef float __m128 __attribute__ ((__vector_size__ (16), __may_alias__)); diff --git a/gcc/testsuite/gcc.dg/torture/pr35771-2.c b/gcc/testsuite/gcc.dg/torture/pr35771-2.c index 3d6add10de9..ae5bb00d91f 100644 --- a/gcc/testsuite/gcc.dg/torture/pr35771-2.c +++ b/gcc/testsuite/gcc.dg/torture/pr35771-2.c @@ -1,6 +1,7 @@ /* { dg-do run { target i?86-*-* x86_64-*-* } } */ /* { dg-options "-msse2" } */ /* { dg-require-effective-target sse2 } */ +/* { dg-require-effective-target sse2_runtime } */ typedef double __m128d __attribute__ ((__vector_size__ (16), __may_alias__)); diff --git a/gcc/testsuite/gcc.dg/torture/pr35771-3.c b/gcc/testsuite/gcc.dg/torture/pr35771-3.c index 9a69b21a511..556f786dfaa 100644 --- a/gcc/testsuite/gcc.dg/torture/pr35771-3.c +++ b/gcc/testsuite/gcc.dg/torture/pr35771-3.c @@ -1,6 +1,7 @@ /* { dg-do run { target i?86-*-* x86_64-*-* } } */ /* { dg-options "-msse2" } */ /* { dg-require-effective-target sse2 } */ +/* { dg-require-effective-target sse2_runtime } */ typedef long long __m128i __attribute__ ((__vector_size__ (16), __may_alias__)); diff --git a/gcc/testsuite/gcc.dg/torture/pr35771.h b/gcc/testsuite/gcc.dg/torture/pr35771.h index 01c248751c1..7b921c41ba9 100644 --- a/gcc/testsuite/gcc.dg/torture/pr35771.h +++ b/gcc/testsuite/gcc.dg/torture/pr35771.h @@ -1,7 +1,5 @@ typedef TYPE __attribute__((aligned(1))) unaligned; -#include "cpuid.h" - extern void abort (void); @@ -27,14 +25,6 @@ do_test (void) int main (void) { - unsigned int eax, ebx, ecx, edx; - - if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)) - return 0; - - /* Run SSE2 test only if host has SSE2 support. */ - if (edx & bit_SSE2) - do_test (); - + do_test (); return 0; } diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/alloca-2.c b/gcc/testsuite/gcc.dg/torture/stackalign/alloca-2.c index cbbb9d03a4c..54232bfae69 100644 --- a/gcc/testsuite/gcc.dg/torture/stackalign/alloca-2.c +++ b/gcc/testsuite/gcc.dg/torture/stackalign/alloca-2.c @@ -2,9 +2,9 @@ /* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */ /* { dg-options "-msse2" } */ /* { dg-require-effective-target sse2 } */ +/* { dg-require-effective-target sse2_runtime } */ #include -#include "cpuid.h" #include "check.h" #ifndef ALIGNMENT @@ -44,14 +44,7 @@ int main (void) { __m128 x = { 1.0 }; - unsigned int eax, ebx, ecx, edx; - - if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)) - return 0; - - /* Run SSE2 test only if host has SSE2 support. */ - if (edx & bit_SSE2) - foo (x, x, x, 5); + foo (x, x, x, 5); return 0; } diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/alloca-3.c b/gcc/testsuite/gcc.dg/torture/stackalign/alloca-3.c index ffe52f2a3e0..8a91121febe 100644 --- a/gcc/testsuite/gcc.dg/torture/stackalign/alloca-3.c +++ b/gcc/testsuite/gcc.dg/torture/stackalign/alloca-3.c @@ -2,9 +2,9 @@ /* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */ /* { dg-options "-msse2" } */ /* { dg-require-effective-target sse2 } */ +/* { dg-require-effective-target sse2_runtime } */ #include -#include "cpuid.h" #include "check.h" #ifndef ALIGNMENT @@ -44,14 +44,7 @@ int main (void) { __m128 x = { 1.0 }; - unsigned int eax, ebx, ecx, edx; - - if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)) - return 0; - - /* Run SSE2 test only if host has SSE2 support. */ - if (edx & bit_SSE2) - foo (x, x, x, x, 5); + foo (x, x, x, x, 5); return 0; } diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/push-1.c b/gcc/testsuite/gcc.dg/torture/stackalign/push-1.c index c020d731293..c58d1ec61aa 100644 --- a/gcc/testsuite/gcc.dg/torture/stackalign/push-1.c +++ b/gcc/testsuite/gcc.dg/torture/stackalign/push-1.c @@ -2,9 +2,9 @@ /* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */ /* { dg-options "-msse2 -mpreferred-stack-boundary=2" } */ /* { dg-require-effective-target sse2 } */ +/* { dg-require-effective-target sse2_runtime } */ #include -#include "cpuid.h" typedef __PTRDIFF_TYPE__ ptrdiff_t; typedef float __m128 __attribute__ ((__vector_size__ (16), __may_alias__)); @@ -42,19 +42,11 @@ int main (void) { __m128 x = { 1.0 }; - unsigned int eax, ebx, ecx, edx; - - if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)) - return 0; - /* Run SSE2 test only if host has SSE2 support. */ - if (edx & bit_SSE2) - { - foo (x, x, x, x, 5); + foo (x, x, x, x, 5); - if (__builtin_memcmp (&r, &x, sizeof (r))) - abort (); - } + if (__builtin_memcmp (&r, &x, sizeof (r))) + abort (); return 0; } diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/vararg-3.c b/gcc/testsuite/gcc.dg/torture/stackalign/vararg-3.c index 3e34cf148b7..734cf71bcae 100644 --- a/gcc/testsuite/gcc.dg/torture/stackalign/vararg-3.c +++ b/gcc/testsuite/gcc.dg/torture/stackalign/vararg-3.c @@ -2,10 +2,10 @@ /* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */ /* { dg-options "-msse2" } */ /* { dg-require-effective-target sse2 } */ +/* { dg-require-effective-target sse2_runtime } */ #include #include -#include "cpuid.h" #include "check.h" #ifndef ALIGNMENT @@ -72,14 +72,8 @@ int main (void) { __m128 x = { 1.0 }; - unsigned int eax, ebx, ecx, edx; - - if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)) - return 0; - - /* Run SSE2 test only if host has SSE2 support. */ - if (edx & bit_SSE2) - foo ("foo", 5, 5.0, x); + + foo ("foo", 5, 5.0, x); return 0; } diff --git a/gcc/testsuite/gcc.dg/vect/vect.exp b/gcc/testsuite/gcc.dg/vect/vect.exp index 98477c4c8cd..eecb13a7823 100644 --- a/gcc/testsuite/gcc.dg/vect/vect.exp +++ b/gcc/testsuite/gcc.dg/vect/vect.exp @@ -71,7 +71,7 @@ if [istarget "powerpc-*paired*"] { return } lappend DEFAULT_VECTCFLAGS "-msse2" - if [check_sse2_hw_available] { + if { [check_sse2_hw_available] && [check_sse_os_support_available] } { set dg-do-what-default run } else { set dg-do-what-default compile diff --git a/gcc/testsuite/gcc.target/i386/pr39315-2.c b/gcc/testsuite/gcc.target/i386/pr39315-2.c index 5363e97509b..ee74def2246 100644 --- a/gcc/testsuite/gcc.target/i386/pr39315-2.c +++ b/gcc/testsuite/gcc.target/i386/pr39315-2.c @@ -2,6 +2,7 @@ /* { dg-do run } */ /* { dg-options "-O -msse2 -mtune=generic" } */ /* { dg-require-effective-target sse2 } */ +/* { dg-require-effective-target sse2_runtime } */ /* { dg-additional-sources pr39315-check.c } */ typedef float __m128 __attribute__ ((__vector_size__ (16))); diff --git a/gcc/testsuite/gcc.target/i386/pr39315-4.c b/gcc/testsuite/gcc.target/i386/pr39315-4.c index 4a62a1d51b9..107933fa0c0 100644 --- a/gcc/testsuite/gcc.target/i386/pr39315-4.c +++ b/gcc/testsuite/gcc.target/i386/pr39315-4.c @@ -2,6 +2,7 @@ /* { dg-do run } */ /* { dg-options "-O -msse2 -mtune=generic" } */ /* { dg-require-effective-target sse2 } */ +/* { dg-require-effective-target sse2_runtime } */ /* { dg-additional-sources pr39315-check.c } */ typedef float __m128 __attribute__ ((__vector_size__ (16))); diff --git a/gcc/testsuite/gcc.target/i386/sol2-check.h b/gcc/testsuite/gcc.target/i386/sol2-check.h deleted file mode 100644 index 25a915e17d1..00000000000 --- a/gcc/testsuite/gcc.target/i386/sol2-check.h +++ /dev/null @@ -1,48 +0,0 @@ -#if defined(__sun__) && defined(__svr4__) -/* Make sure sigaction() is declared even with -std=c99. */ -#define __EXTENSIONS__ -#include -#include - -static volatile sig_atomic_t sigill_caught; - -static void -sigill_hdlr (int sig __attribute((unused)), - siginfo_t *sip __attribute__((unused)), - ucontext_t *ucp) -{ - sigill_caught = 1; - /* Set PC to the instruction after the faulting one to skip over it, - otherwise we enter an infinite loop. */ - ucp->uc_mcontext.gregs[EIP] += ILL_INSN_LEN; - setcontext (ucp); -} -#endif - -/* Solaris 2 before Solaris 9 4/04 cannot execute SSE/SSE2 instructions - even if the CPU supports them. Programs receive SIGILL instead, so - check for that at runtime. */ -static int -sol2_check (void) -{ -#if defined(__sun__) && defined(__svr4__) - struct sigaction act, oact; - - act.sa_handler = sigill_hdlr; - sigemptyset (&act.sa_mask); - /* Need to set SA_SIGINFO so a ucontext_t * is passed to the handler. */ - act.sa_flags = SA_SIGINFO; - sigaction (SIGILL, &act, &oact); - - ILL_INSN; - - sigaction (SIGILL, &oact, NULL); - - if (sigill_caught) - exit (0); - else - return 1; -#else - return 1; -#endif /* __sun__ && __svr4__ */ -} diff --git a/gcc/testsuite/gcc.target/i386/sse-check.h b/gcc/testsuite/gcc.target/i386/sse-check.h index d6c92a35a44..11b71bc3e97 100644 --- a/gcc/testsuite/gcc.target/i386/sse-check.h +++ b/gcc/testsuite/gcc.target/i386/sse-check.h @@ -1,13 +1,7 @@ #include #include "m128-check.h" - #include "cpuid.h" - -/* We need a single SSE instruction here so the handler can safely skip - over it. */ -#define ILL_INSN __asm__ volatile ("movss %xmm2,%xmm1") -#define ILL_INSN_LEN 4 -#include "sol2-check.h" +#include "sse-os-support.h" static void sse_test (void); @@ -27,7 +21,7 @@ main () return 0; /* Run SSE test only if host has SSE support. */ - if ((edx & bit_SSE) && sol2_check ()) + if ((edx & bit_SSE) && sse_os_support ()) do_test (); return 0; diff --git a/gcc/testsuite/gcc.target/i386/sse-os-support.h b/gcc/testsuite/gcc.target/i386/sse-os-support.h new file mode 100644 index 00000000000..a2b4e2d3c7e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-os-support.h @@ -0,0 +1,55 @@ +#if defined(__sun__) && defined(__svr4__) +/* Make sure sigaction() is declared even with -std=c99. */ +#define __EXTENSIONS__ +#include +#include + +static volatile sig_atomic_t sigill_caught; + +static void +sigill_hdlr (int sig __attribute((unused)), + siginfo_t *sip __attribute__((unused)), + ucontext_t *ucp) +{ + sigill_caught = 1; + /* Set PC to the instruction after the faulting one to skip over it, + otherwise we enter an infinite loop. */ + ucp->uc_mcontext.gregs[EIP] += 4; + setcontext (ucp); +} +#endif + +/* Check if the OS supports executing SSE instructions. This function is + only used in sse-check.h, sse2-check.h, and sse3-check.h so far since + Solaris 8 and 9 won't run on newer CPUs anyway. */ + +static int +sse_os_support (void) +{ +#if defined(__sun__) && defined(__svr4__) + /* Solaris 2 before Solaris 9 4/04 cannot execute SSE instructions + even if the CPU supports them. Programs receive SIGILL instead, so + check for that at runtime. */ + + struct sigaction act, oact; + + act.sa_handler = sigill_hdlr; + sigemptyset (&act.sa_mask); + /* Need to set SA_SIGINFO so a ucontext_t * is passed to the handler. */ + act.sa_flags = SA_SIGINFO; + sigaction (SIGILL, &act, &oact); + + /* We need a single SSE instruction here so the handler can safely skip + over it. */ + __asm__ volatile ("movss %xmm2,%xmm1"); + + sigaction (SIGILL, &oact, NULL); + + if (sigill_caught) + exit (0); + else + return 1; +#else + return 1; +#endif /* __sun__ && __svr4__ */ +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-check.h b/gcc/testsuite/gcc.target/i386/sse2-check.h index 7e91192f8c3..fd4a6ce1dbf 100644 --- a/gcc/testsuite/gcc.target/i386/sse2-check.h +++ b/gcc/testsuite/gcc.target/i386/sse2-check.h @@ -1,12 +1,7 @@ #include #include "cpuid.h" #include "m128-check.h" - -/* We need a single SSE2 instruction here so the handler can safely skip - over it. */ -#define ILL_INSN __asm__ volatile ("unpcklpd %xmm0,%xmm2") -#define ILL_INSN_LEN 4 -#include "sol2-check.h" +#include "sse-os-support.h" static void sse2_test (void); @@ -26,7 +21,7 @@ main () return 0; /* Run SSE2 test only if host has SSE2 support. */ - if ((edx & bit_SSE2) && sol2_check ()) + if ((edx & bit_SSE2) && sse_os_support ()) do_test (); return 0; diff --git a/gcc/testsuite/gcc.target/i386/sse3-check.h b/gcc/testsuite/gcc.target/i386/sse3-check.h index c7b1896cf12..5a0a0b1a02e 100644 --- a/gcc/testsuite/gcc.target/i386/sse3-check.h +++ b/gcc/testsuite/gcc.target/i386/sse3-check.h @@ -1,13 +1,7 @@ #include #include - #include "cpuid.h" - -/* We need a single SSE3 instruction here so the handler can safely skip - over it. */ -#define ILL_INSN __asm__ volatile ("movddup %xmm1,%xmm2") -#define ILL_INSN_LEN 4 -#include "sol2-check.h" +#include "sse-os-support.h" static void sse3_test (void); @@ -27,7 +21,7 @@ main () return 0; /* Run SSE3 test only if host has SSE3 support. */ - if ((ecx & bit_SSE3) && sol2_check ()) + if ((ecx & bit_SSE3) && sse_os_support ()) do_test (); return 0; diff --git a/gcc/testsuite/gcc.target/i386/vperm-v2df.c b/gcc/testsuite/gcc.target/i386/vperm-v2df.c index d0394635c59..1a237f04b5d 100644 --- a/gcc/testsuite/gcc.target/i386/vperm-v2df.c +++ b/gcc/testsuite/gcc.target/i386/vperm-v2df.c @@ -1,6 +1,7 @@ /* { dg-do run } */ /* { dg-options "-O -msse2" } */ /* { dg-require-effective-target sse2 } */ +/* { dg-require-effective-target sse2_runtime } */ #include "isa-check.h" diff --git a/gcc/testsuite/gcc.target/i386/vperm-v2di.c b/gcc/testsuite/gcc.target/i386/vperm-v2di.c index 940de68af19..b587d90b8fb 100644 --- a/gcc/testsuite/gcc.target/i386/vperm-v2di.c +++ b/gcc/testsuite/gcc.target/i386/vperm-v2di.c @@ -1,6 +1,7 @@ /* { dg-do run } */ /* { dg-options "-O -msse2" } */ /* { dg-require-effective-target sse2 } */ +/* { dg-require-effective-target sse2_runtime } */ #include "isa-check.h" diff --git a/gcc/testsuite/gcc.target/i386/vperm-v4sf-1.c b/gcc/testsuite/gcc.target/i386/vperm-v4sf-1.c index b9fc9b172fe..d8cb9e6b794 100644 --- a/gcc/testsuite/gcc.target/i386/vperm-v4sf-1.c +++ b/gcc/testsuite/gcc.target/i386/vperm-v4sf-1.c @@ -1,5 +1,7 @@ /* { dg-do run } */ /* { dg-options "-O -msse" } */ +/* { dg-require-effective-target sse } */ +/* { dg-require-effective-target sse_runtime } */ #include "isa-check.h" diff --git a/gcc/testsuite/gcc.target/i386/vperm-v4si-1.c b/gcc/testsuite/gcc.target/i386/vperm-v4si-1.c index 93c25c6826a..3c2717dd751 100644 --- a/gcc/testsuite/gcc.target/i386/vperm-v4si-1.c +++ b/gcc/testsuite/gcc.target/i386/vperm-v4si-1.c @@ -1,6 +1,7 @@ /* { dg-do run } */ /* { dg-options "-O -msse2" } */ /* { dg-require-effective-target sse2 } */ +/* { dg-require-effective-target sse2_runtime } */ #include "isa-check.h" diff --git a/gcc/testsuite/gfortran.dg/vect/vect.exp b/gcc/testsuite/gfortran.dg/vect/vect.exp index 39a1f9d811a..2a09df5a92e 100644 --- a/gcc/testsuite/gfortran.dg/vect/vect.exp +++ b/gcc/testsuite/gfortran.dg/vect/vect.exp @@ -72,7 +72,7 @@ if [istarget "powerpc-*paired*"] { return } lappend DEFAULT_VECTCFLAGS "-msse2" - if [check_sse2_hw_available] { + if { [check_sse2_hw_available] && [check_sse_os_support_available] } { set dg-do-what-default run } else { set dg-do-what-default compile diff --git a/gcc/testsuite/lib/fortran-torture.exp b/gcc/testsuite/lib/fortran-torture.exp index 72ce9d682cd..cd24ace426f 100644 --- a/gcc/testsuite/lib/fortran-torture.exp +++ b/gcc/testsuite/lib/fortran-torture.exp @@ -46,7 +46,8 @@ proc get-fortran-torture-options { } { set test_tree_vectorize 1 } elseif { ( [istarget "i?86-*-*"] || [istarget "x86_64-*-*"] ) && [check_effective_target_sse2] - && [check_sse2_hw_available] } { + && [check_sse2_hw_available] + && [check_sse_os_support_available] } { lappend vectorizer_options "-msse2" set test_tree_vectorize 1 } elseif { [istarget "mips*-*-*"] diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index bb28a770748..0378f807d63 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -910,6 +910,53 @@ proc check_750cl_hw_available { } { }] } +# Return 1 if the target OS supports running SSE executables, 0 +# otherwise. Cache the result. + +proc check_sse_os_support_available { } { + return [check_cached_effective_target sse_os_support_available { + # If this is not the right target then we can skip the test. + if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } { + expr 0 + } elseif { [istarget i?86-*-solaris2*] } { + # The Solaris 2 kernel doesn't save and restore SSE registers + # before Solaris 9 4/04. Before that, executables die with SIGILL. + check_runtime_nocache sse_os_support_available { + int main () + { + __asm__ volatile ("movss %xmm2,%xmm1"); + return 0; + } + } "-msse" + } else { + expr 1 + } + }] +} + +# Return 1 if the target supports executing SSE instructions, 0 +# otherwise. Cache the result. + +proc check_sse_hw_available { } { + return [check_cached_effective_target sse_hw_available { + # If this is not the right target then we can skip the test. + if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } { + expr 0 + } else { + check_runtime_nocache sse_hw_available { + #include "cpuid.h" + int main () + { + unsigned int eax, ebx, ecx, edx = 0; + if (__get_cpuid (1, &eax, &ebx, &ecx, &edx)) + return !(edx & bit_SSE); + return 1; + } + } "" + } + }] +} + # Return 1 if the target supports executing SSE2 instructions, 0 # otherwise. Cache the result. @@ -933,6 +980,26 @@ proc check_sse2_hw_available { } { }] } +# Return 1 if the target supports running SSE executables, 0 otherwise. + +proc check_effective_target_sse_runtime { } { + if { [check_sse_hw_available] && [check_sse_os_support_available] } { + return 1 + } else { + return 0 + } +} + +# Return 1 if the target supports running SSE2 executables, 0 otherwise. + +proc check_effective_target_sse2_runtime { } { + if { [check_sse2_hw_available] && [check_sse_os_support_available] } { + return 1 + } else { + return 0 + } +} + # Return 1 if the target supports executing VSX instructions, 0 # otherwise. Cache the result. -- cgit v1.2.1