diff options
| author | Jason Molenda <jsm@bugshack.cygnus.com> | 1999-12-07 03:55:56 +0000 |
|---|---|---|
| committer | Jason Molenda <jsm@bugshack.cygnus.com> | 1999-12-07 03:55:56 +0000 |
| commit | 90a10a551076bdbf1ec24ceecc83cd36d620abcc (patch) | |
| tree | a93a81b5ebf12843c74af98465c1a2b467869173 | |
| parent | fa2c4f1c5af199df2631e32dba1d10381049eef6 (diff) | |
| download | gdb-90a10a551076bdbf1ec24ceecc83cd36d620abcc.tar.gz | |
import gdb-1999-12-06 snapshotgdb-1999-12-06
115 files changed, 19930 insertions, 1068 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 6881a3ce439..ab232fb29d9 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,340 @@ +1999-12-06 Christopher Faylor <cgf@cygnus.com> + + * dcache.c (set_dcache_state): New function. + * dcache.h: Declare set_dcache_state(). + +Sat Dec 4 15:17:44 1999 Andrew Cagney <cagney@b1.cygnus.com> + + * remote.c (build_remote_packet_sizes): Reduce the default packet + size of 400 bytes by one to 399. Stops GDB trashing stubs that + append a trailing NUL to an already full buffer. + +Sat Dec 4 01:16:47 1999 Andrew Cagney <cagney@b1.cygnus.com> + + * tracepoint.c (remote_get_noisy_reply): Add parameter sizeof_buf. + (finish_tfind_command): Add parameter sizeof_msg. + + * remote.c (remote_threads_info): Move assignment operator to + outside of function call. + (remote_send): Add parameter sizeof_buf. + (getpkt): Add parameter sizeof_buf. Call read_frame passing in + sizeof_buf. + + * remote.h (getpkt): Update. + + * tracepoint.c (remote_set_transparent_ranges, + remote_get_noisy_reply, trace_start_command, trace_stop_command, + trace_status_command, finish_tfind_command, trace_find_pc_command, + trace_find_tracepoint_command, trace_find_line_command, + trace_find_range_command, trace_find_outside_command): Update. + + * remote.c (set_thread, remote_thread_alive, + remote_get_threadinfo, remote_get_threadlist, + remote_current_thread, remote_threads_info, + extended_remote_restart, get_offsets, remote_open_1, + remote_async_open_1, remote_wait, remote_async_wait, + remote_fetch_registers, check_binary_download, remote_write_bytes, + remote_read_bytes, remote_send, remote_detach, + remote_async_detach, remote_fetch_registers, + store_register_using_P, store_register_using_P, + remote_fetch_registers, remote_store_registers, putpkt_binary, + remote_insert_breakpoint, remote_remove_breakpoint, + compare_sections_command, remote_rcmd, packet_command, + remote_info_process, remote_query, remote_insert_watchpoint, + remote_search, remote_remove_watchpoint, + remote_insert_hw_breakpoint, remote_remove_hw_breakpoint): Update. + +Fri Dec 3 17:38:06 1999 Andrew Cagney <cagney@b1.cygnus.com> + + * (read_frame): Add sizeof_buf parameter. Don't allow repeat when + first character. Always leave space at the end of the buffer. + Return size of packet or -1. + (getpkt): Update. Pass in PBUFSIZ. + +Thu Dec 2 17:14:53 1999 Andrew Cagney <cagney@b1.cygnus.com> + + * ser-pipe.c: Include <string.h> for memset(). + +1999-12-01 Christopher Faylor <cgf@cygnus.com> + + * config/i386/tm-cygwin.h: Change tm-i386.h include back to tm-i386v.h. + +1999-12-01 Elena Zannoni <ezannoni@kwikemart.cygnus.com> + + * inf-loop.c (inferior_event_handler): In case of + INF_EXEC_CONTINUE, don't do all the regular continuations, but + just the intermediate ones. + + * infcmd.c (step_once): Add the continuation to the + intermediate_continuation list instead of the regular continuation + list. + + * utils.c (add_intermediate_continuation): New function, to add + continuations to the intermedite_continuation list. + (do_all_intermediate_continuations): New function, do all the + continuations in the intermediate list. + (discard_all_intermediate_continuations): New function, discard + all the continuations in the intermediate list. + (intermediate_continuation): New global list for use by step_1(). + + * defs.h: Export intermediate_continuation, + add_intermediate_continuation, do_all_intermediate_continuations, + discard_all_intermediate_continuations. + +1999-11-30 Christopher Faylor <cgf@cygnus.com> + + * win32-nat.c (mappings): Reorganize slightly for new uniform i386 + register configuration. + (do_child_fetch_inferior_registers): Handle special case floating point + registers. + (handle_output_debug_string): Handle cygwin-specific signals broadcast + from the cygwin DLL. + (handle_exceptions): Add code to properly allow continuation after a + CTRL-C. + (child_continue): Accept propagated "continue_status" which controls + how the inferior should be continued. + (get_child_debug_event): New function. + (child_wait): Use above function to handle debug events. + (child_create_inferior): Add more intelligent method for running the + inferior to the appropriate point before handing it off to the rest of + gdb. + (child_stop): Specifically send a CTRL-C to the debugged process. + (child_kill_inferior): Set global continue status here to cause + inferior to run to completion. + (child_resume): Eliminate code which attempts to decide how to continue + the inferior. This is now handled by child_continue. + * config/i386/tm-cygwin.h: Gut and reorganize for consistency with new + tm-i386.h. + + Patch from Egor Duda (deo@logos-m.ru) + * win32-nat.c (psapi_get_dll_name): New function. + (handle_load_dll): Correctly load DLL symbol tables after attaching to + a running pid. + +1999-11-30 Michael Snyder <msnyder@cleaver.cygnus.com> + + * infrun.c (handle_inferior_pid): revert 11-29 change: resuming + a thread other than the current thread with a signal. Apparently + target_resume with a specific pid, a specific signal, and no step + means to continue ALL threads but to only send the signal to one + (and not, as I had assumed, to continue only the specified thread). + * i386-linux-nat.c (fill_gregset): guard against invalid input. + +1999-11-30 Elena Zannoni <ezannoni@kwikemart.cygnus.com> + + * infcmd.c (step_once): New function. Used to do just one step + operation. + (step_1_continuation): New function. Figure out if we need to step + again before returning control to the user. + (step_1): If we are in asynchronous mode, don't do the for loop, + but rather delegate to continuations the task of repeating the + step operation. + + * utils.c (do_all_continuations): Copy the continuation list aside + before working on it. + + * target.h (enum inferior_event_type): Add new enum + INF_EXEC_CONTINUE. + + * inf-loop.c (inferior_event_handler): Handle new case + INF_EXEC_CONTINUE. + + * infrun.c (fetch_inferior_event): If we are in the middle of a + 'step n' type command, don't say that the execution is complete, + but that it will have to continue. + +1999-11-30 Kevin Buettner <kevinb@cygnus.com> + + * utils.c (verror): Don't traverse va_list argument twice. Also, + removed extraneous va_end() call. + +1999-11-29 Michael Snyder <msnyder@cleaver.cygnus.com> + + * infrun.c (handle_inferior_pid): If a child thread stops on a + signal that we are ignoring, and GDB silently resumes the child, + resume ALL threads (not just the one that got the signal). All + threads are stopped, so all must be resumed. + (handle_inferior_pid): on detecting a thread context switch, + swap infrun_state ONLY if both the old thread and the new one + are in the thread list. Otherwise state information will be lost! + Problem may arise with flaky back-ends. + +1999-11-29 Elena Zannoni <ezannoni@kwikemart.cygnus.com> + + * breakpoint.c (bpstat_stop_status): Don't decrease hit_count + in case of a wp that has not changed. + +Mon Nov 29 12:14:10 1999 Andrew Cagney <cagney@b1.cygnus.com> + + * gdbtypes.c (init_simd_type): Make static. + + * configure.in (AC_CHECK_HEADERS): Check for <sys/ioctl.h>. + * configure, config.h: Re-generate. + * inflow.c: Include <sys/ioctl.h> + + * i386b-nat.c: Include "gdbcore.h". + * fork-child.c: Include "command.h". + + * remote.c (remote_cisco_section_offsets, + remote_start_remote_dummy, store_register_using_P, + remote_info_process, remote_cisco_open, remote_cisco_close, + readsocket, readtty, minitelnet, remote_cisco_wait, + init_remote_async_ops, init_extended_async_remote_ops, + set_remote_cmd), infrun.c (default_skip_permanent_breakpoint): Use + ISO-C syntax for function definition. + +Mon Nov 29 11:28:21 1999 Andrew Cagney <cagney@b1.cygnus.com> + + * stabsread.c: Revert 1999-11-09 Jim Blandy + <jimb@zwingli.cygnus.com> and 1999-11-08 Jim Blandy + <jimb@zenia.red-bean.com>. Broken on non-Linux targets. + +1999-11-26 Elena Zannoni <ezannoni@kwikemart.cygnus.com> + + * symfile.c (show_load_progress): Add total sent so far to the + information passsed to the hook users. + (generic_load): Collect total sent so far and pass that to the + progress hook. + + * defs.h (show_load_progress): Update. + +1999-11-25 Nick Clifton <nickc@cygnus.com> + + * coffread.c (coff_symfile_read): Treat "epoc-pe" targets as "pe" + targets. + * dbxread.c (dbx_read_symfile): Treat "epoc-pe" targets as "pe" + targets. + +Wed Nov 24 17:07:28 1999 Andrew Cagney <cagney@b1.cygnus.com> + + * Makefile.in (init.c): Add SUBDIR_INIT_FILES so that sub + directories can hook in extra init files. + +1999-11-23 Elena Zannoni <ezannoni@kwikemart.cygnus.com> + + * defs.h (show_load_progress): Export. + + * symfile.c (show_load_progress): New hook for download. + (generic_load): Collect total size of executable to load. + Call progress hook when downloading. + +Thu Nov 18 11:54:24 1999 Andrew Cagney <cagney@b1.cygnus.com> + + * arc-tdep.c (codestream_fill): Rewrite byte swap code using + function extract_unsigned_integer. + +Wed Nov 17 17:01:06 1999 Andrew Cagney <cagney@b1.cygnus.com> + + * arm-xdep.c: #include "arm-opcode.h" -> "opcode/arm.h". + +1999-11-22 Jim Blandy <jimb@cygnus.com> + + * Makefile.in (i386-tdep.o): Update list of dependencies. + +1999-11-22 Jim Blandy <jimb@zenia.red-bean.com> + + * config/i386/tm-i386v.h (NUM_REGS, REGISTER_NAMES, + REGISTER_BYTES, REGISTER_BYTE, REGISTER_RAW_SIZE, + REGISTER_VIRTUAL_SIZE, MAX_REGISTER_RAW_SIZE, + MAX_REGISTER_VIRTUAL_SIZE, REGISTER_VIRTUAL_TYPE): Deleted. All + of these should inherit identical or compatible values from + tm-i386.h, as long as you don't define HAVE_SSE_REGS or + HAVE_I387_REGS, which are new anyway. + +Mon Nov 22 21:39:27 1999 Andrew Cagney <cagney@b1.cygnus.com> + + * target.c (do_target_signal_to_host): New function. Indicate of + the conversion was successful to the caller via an additional + parameter. + (target_signal_to_host_p): New function. Return non-zero if the + GDB signal exists on the host system. + (target_signal_to_host): Rewrite. Use do_target_signal_to_host. + * target.h (target_signal_to_host_p): Add declaration. Document + target_singal vs host signal vs target OS signal confusion. + + From 1999-11-08 Jimmy Guo <guo@cup.hp.com>: + * hppah-nat.c (require_notification_of_events): Start by ignoring + all signals and then adding back in ones we're interested in. + +Thu Nov 18 18:12:48 1999 Andrew Cagney <cagney@b1.cygnus.com> + + * jv-typeprint.c (java_type_print_base), kod-cisco.c + (cisco_kod_open), kod.c (kod_set_os), xcoffread.c + (process_linenos), symfile.c (add_symbol_file_command), + remote-rdi.c (arm_rdi_open, rdilogfile_command), main.c + (captured_main), go32-nat.c (go32_create_inferior), exec.c + (exec_file_attach), corefile.c (core_file_command, + reopen_exec_file): Replace strdup with xstrdup. + +Mon Nov 22 12:02:47 1999 Andrew Cagney <cagney@b1.cygnus.com> + + * bcache.c (print_bcache_statistics): Fix printf_filtered + arguments. + (print_percentage): Make function void. + +1999-11-21 Jim Blandy <jimb@zenia.red-bean.com> + + Make the bcache hash table grow. + * bcache.h (BCACHE_NUM_BUCKETS): Delete definition. + (struct bcache): Add new element: num_buckets. Make bucket be a + pointer to an array, not an array. + (free_bcache): New extern declaration. + * bcache.c (CHAIN_LENGTH_THRESHOLD): New constant. + (expand_hash_table): New function. + (bcache): Grow the hash table if the average chain length reaches + CHAIN_LENGTH_THRESHOLD. + (free_bcache): New function. + (print_bcache_statistics): Don't assume that the number of buckets + is constant any more. + (BSTRING_SIZE): Moved down to just above 'bcache' function, where + it's used. + * objfiles.c (free_objfile): Call free_bcache, instead of just + freeing the bcache's obstack directly. + * symfile.c (reread_symbols): Same. + +1999-11-20 Jim Blandy <jimb@zenia.red-bean.com> + + * bcache.c, bcache.h: Rewritten. New version imposes less memory + overhead, and has a more effective hash function, so it's probably + faster, too. + + * config/nm-linux.h: No need to check whether __STDC__ is + #defined --- GDB requires ANSI C now. + + * config/i386/nm-linux.h (linuxthreads_pid_to_str, + linuxthreads_prepare_to_proceed): Delete declarations --- they're + provided by config/nm-linux.h now. + +1999-11-19 Elena Zannoni <ezannoni@kwikemart.cygnus.com> + + * top.c (print_command_lines): Remove unused var. + +1999-11-19 Jim Kingdon <kingdon@redhat.com> + + Patch applied by Jim Blandy <jimb@cygnus.com>: + + Enable threads for all linux architectures: + * config/nm-linux.h: New file. + config/alpha/nm-linux.h, config/i386/nm-linux.h, + config/m68k/nm-linux.h, config/sparc/nm-linux.h: Use it. + * config/tm-linux.h: New file. + * config/i386/tm-linux.h, config/m68k/tm-linux.h, + config/sparc/tm-linux.h, config/alpha/tm-alphalinux.h: Use it. + * config/m68k/linux.mh, config/sparc/linux.mh, + config/alpha/alpha-linux.mh: Add linux-thread.o. + +1999-11-18 Tom Tromey <tromey@cygnus.com> + + * tracepoint.h (get_tracepoint_by_number): Updated declaration. + * tracepoint.c (trace_pass_command): Better error message. Fixed + logic when `all' not specified. + (get_tracepoint_by_number): Added `optional_p' argument. Fixed + all callers. + +Wed Nov 17 17:40:30 1999 Andrew Cagney <cagney@b1.cygnus.com> + + * findvar.c (SWAP_FLOATING): Delete macro. Unused. + 1999-11-16 Mark Salter <msalter@cygnus.com> * monitor.c (monitor_supply_register): Initialize value to zero. @@ -4885,6 +5222,7 @@ Mon Jun 7 21:08:50 1999 Andrew Cagney <cagney@amy.cygnus.com> * config/mips/tm-mips.h (mips_init_extra_frame_info), mips-tdep.c: Rename init_extra_frame_info. Add argument ``fromleaf''. + mips-tdep.c (mips_gdbarch_init): Add mips_init_extra_frame_info. * config/mips/tm-mips.h (mips_print_extra_frame_info), mips-tdep.c: New function. @@ -4902,6 +5240,7 @@ Mon Jun 7 20:11:07 1999 Andrew Cagney <cagney@amy.cygnus.com> (mips_register_name): New function. (mips_set_processor_type): Update mips_processor_reg_names. (mips_generic_reg_names): Initialize using MIPS_REGISTER_NAMES. + (mips_gdbarch_init): Add mips_register_name. Sun Jun 6 11:09:19 1999 Andrew Cagney <cagney@b1.cygnus.com> @@ -5993,6 +6332,15 @@ Fri Apr 16 15:39:10 1999 Andrew Cagney <cagney@b1.cygnus.com> HAVE_NONSTEPPABLE_WATCHPOINT, HAVE_CONTINUABLE_WATCHPOINT]: Test at runtime instead of compile time. +Thu Apr 15 15:15:07 1999 Andrew Cagney <cagney@amy.cygnus.com> + + * mips-tdep.c (struct gdbarch_tdep): Rename elf_abi to + elf_flags. Check ABFD is elf_flavour before extracting elf_flags. + Match ARCH against entire elf_flags instead of just the + EF_MIPS_ABI field. + (mips_gdbarch_init): Extract/print ef_mips_arch and + ef_mips_bitptrs and ef_mips_abi fields from elf_flags. + 1999-04-14 Philippe De Muyter <phdm@macqel.be> * breakpoint.c (maintenance_info_breakpoints): Function made @@ -6357,6 +6705,8 @@ Thu Mar 25 19:30:02 1999 Andrew Cagney <cagney@amy.cygnus.com> pc_in_call_dummy_at_entry_point): Convert PC_IN_CALL_DUMMY macro's into functions. + * mips-tdep.c (mips_gdbarch_init): Initialize above + Tue Mar 23 17:22:57 1999 Philippe De Muyter <phdm@macqel.be> * remote.c, parse.c: Include ctype.h. @@ -6989,6 +7339,28 @@ Fri Jan 29 16:51:11 1999 Andrew Cagney <cagney@chook.cygnus.com> return_value_location. For store, ensure that remainder of register is zero. +Thu Jan 28 18:58:02 1999 Andrew Cagney <cagney@chook.cygnus.com> + + From John Metzler <jmetzler@cygnus.com>: + * mips-tdep.c (struct gdbarch_tdep): Add mips_saved_regsize. + (MIPS_SAVED_REGSIZE): Define. + (mips_find_saved_regs, read_next_frame_reg, mips_pop_frame): + Read/write MIPS_SAVED_REGSIZE bytes of register on stack instead + of MIPS_REGSIZE. + (mips_gdbarch_init): Initialize mips_saved_regsize. + + * mips-tdep.c (mips_frame_saved_pc, mips16_heuristic_proc_desc, + mips_push_arguments, mips_push_dummy_frame, + mips_use_struct_convention): Ditto. For MIPS_SAVED_REGSIZE < + REGISTER_RAW_SIZE, handle little/big endian issues from only using + half the register. + (STACK_ARGSIZE): Default to MIPS_SAVED_REGSIZE instead of + MIPS_REGSIZE. + + * mips-tdep.c (struct gdbarch_tdep, FP_REGISTER_DOUBLE, + mips_gdbarch_init): Apply similar changes. Add + mips_fp_register_double to struct. + Wed Feb 17 10:10:27 1999 Stu Grossman <grossman@babylon-5.cygnus.com> * gdbtypes.h (get_discrete_bounds): Remove duplicate decl. @@ -7358,6 +7730,11 @@ Wed Jan 27 13:20:25 1999 Elena Zannoni <ezannoni@kwikemart.cygnus.com> * hp-psymtab-read.c: Reformat comments, update copyright. +Wed Jan 27 15:09:22 1999 Andrew Cagney <cagney@chook.cygnus.com> + + * mips-tdep.c (mips_gdbarch_init): Trace e_flags from BFD + elf_info. + Tue Jan 26 16:02:47 1999 Mark Alexander <marka@cygnus.com> * v850-tdep.c (v850_generic_reg_names, v850e_reg_names, @@ -7614,6 +7991,8 @@ Fri Jan 15 17:11:48 EST 1999 Zdenek Radouch (radouch@cygnus.com) Thu Jan 14 18:29:17 1999 David Taylor <taylor@texas.cygnus.com> + * mips-tdep.c (mips_gdbarch_init): fix stream arg in + fprintf_unfiltered calls. * remote-mm.c (mm_wait): fix stream arg to gdb_flush. * remote-udi.c (udi_wait): fix stream arg to fwrite. * symmisc.c (maintenance_check_symtabs): fix stream argument to diff --git a/gdb/ChangeLog-98 b/gdb/ChangeLog-98 index 5f3fd1106c4..8a3db20379b 100644 --- a/gdb/ChangeLog-98 +++ b/gdb/ChangeLog-98 @@ -3354,6 +3354,10 @@ Fri Dec 18 14:23:34 1998 Andrew Cagney <cagney@chook> functions, handle commands. (mips_push_arguments, mips_push_dummy_frame, mips_pop_frame, mips_extract_return_value): Update. + (_initialize_mips_tdep): Set mips_fpu_type according to current + processor. + (_initialize_mips_tdep): Only define ``set processor'' command + when not multi-sim. Fri Dec 18 12:56:56 1998 Andrew Cagney <cagney@chook> @@ -3361,6 +3365,7 @@ Fri Dec 18 12:56:56 1998 Andrew Cagney <cagney@chook> by-value. (struct gdbarch_info): Add struct gdbarch_tdep_info *tdep_info. * gdbarch.c (gdbarch_update): Update. + * mips-tdep.c: (mips_gdbarch_init): Update * gdbarch.c (gdbarch_update): Add more tracing. @@ -3368,7 +3373,18 @@ Thu Dec 17 02:15:40 1998 Andrew Cagney <cagney@chook.cygnus.com> * configure.tgt (gdb_target): Identify mips64*vr4100*-*-elf* as vr4100. + * config/mips/vr4100.mt, config/mips/tm-vr4100.h: Replace + vr4xxx.mt and tm-vr4xxx.h. +Thu Dec 17 02:06:17 1998 Andrew Cagney <cagney@chook.cygnus.com> + + * mips-tdep.c (mips_gdbarch_init): New function. Initialize a MIPS + architecture vector. + (_initialize_mips_tdep): Register MIPS with GDBARCH. + (struct gdbarch_tdep): Define. + (MIPS_EABI, MIPS_LAST_FP_ARG_REGNUM, MIPS_LAST_ARG_REGNUM): When + multi-arch, get value from gdbarch->tdep. + Thu Dec 17 02:01:58 1998 Andrew Cagney <cagney@chook> * gdbtypes.c (_initialize_gdbtypes): Register all builtin types @@ -4933,6 +4949,13 @@ Thu Jul 30 13:53:50 1998 Mark Alexander <marka@cygnus.com> * symfile.c (add_symbol_file_command): Test for the from_tty parameter and avoid query when not interactive. +Wed Jul 29 10:39:29 1998 Jeffrey A Law (law@cygnus.com) + + * mn10300-tdep.c (set_movm_offsets): Do nothing for the am33 + registers if we are not in am33 mode. + (mn10300_frame_chain, mn10300_frame_saved_pc): Similarly. + (set_machine_hook): Keep track of whether or not we're in am33 mode. + Mon Jul 27 16:11:42 1998 Michael Snyder <msnyder@cleaver.cygnus.com> * tracepoint.c (remote_set_transparent_ranges): new function. @@ -4959,6 +4982,12 @@ Mon Jul 27 10:45:56 1998 Martin M. Hunt <hunt@cygnus.com> stack pointer et al are synthesized from the SP_REGNUM (etc) defines and should not be mentioned in REGISTER_NAMES. +Mon Jul 27 08:54:41 1998 Jeffrey A Law (law@cygnus.com) + + * mn10300-tdep.c (mn10300_frame_chain): Account for space saved + by am33 register saves. + (mn10300_frame_saved_pc): Similarly. + Fri Jul 24 14:41:19 1998 Michael Snyder <msnyder@cleaver.cygnus.com> * tracepoint.c (encode_actions): Treat register names and simple @@ -5062,6 +5091,9 @@ Thu Jul 9 16:16:47 1998 Jeffrey A Law (law@cygnus.com) * tm-mn10300 (NUM_REGS): Bump to 32. (REGISTER_NAMES): Updated accordingly. + * mn10300-tdep.c (am33_register_names): New variable. + (mn10300_analyze_prologue): Handle regs saved by am33 prologues. + * tm-mn10300.h (E0_REGNUM): Define. Tue Jul 7 7:40:13 1998 Ron Unrau <runrau@cygnus.com> diff --git a/gdb/Makefile.in b/gdb/Makefile.in index acffdb02f89..9ae47468b32 100644 --- a/gdb/Makefile.in +++ b/gdb/Makefile.in @@ -229,7 +229,7 @@ CDEPS = $(XM_CDEPS) $(TM_CDEPS) $(NAT_CDEPS) $(SIM) $(BFD) $(READLINE) \ ADD_FILES = $(REGEX) $(XM_ADD_FILES) $(TM_ADD_FILES) $(NAT_ADD_FILES) ADD_DEPS = $(REGEX1) $(XM_ADD_FILES) $(TM_ADD_FILES) $(NAT_ADD_FILES) -VERSION = 19991116 +VERSION = 19991206 DIST=gdb LINT=/usr/5bin/lint @@ -624,10 +624,11 @@ uninstall: force # of the functions might change, so this files needs to depend on all the # object files that will be linked into gdb. -init.c: $(OBS) $(TSOBS) +INIT_FILES = $(OBS) $(TSOBS) $(SUBDIR_INIT_FILES) +init.c: $(INIT_FILES) @echo Making init.c @rm -f init.c-tmp init.l-tmp - @-echo $(OBS) $(TSOBS) | \ + @-echo $(INIT_FILES) | \ tr ' ' '\012' | \ sed -e '/^Onindy.o/d' \ -e '/^init.o/d' \ @@ -1195,8 +1196,9 @@ hppah-nat.o: hppah-nat.c $(bfd_h) $(defs_h) $(inferior_h) target.h i386gnu-nat.o: gnu-nat.h -i386-tdep.o: i386-tdep.c $(defs_h) $(gdbcore_h) $(inferior_h) target.h \ - gdb_string.h +i386-tdep.o: i386-tdep.c $(defs_h) gdb_string.h $(frame_h) \ + $(inferior_h) $(gdbcore_h) target.h $(floatformat_h) \ + $(symtab_h) $(gdbcmd_h) $(command_h) i386aix-nat.o: i386aix-nat.c $(defs_h) $(frame_h) $(inferior_h) \ language.h $(gdbcore_h) $(floatformat_h) target.h diff --git a/gdb/arc-tdep.c b/gdb/arc-tdep.c index c8e4cc7d4aa..2a1f0006702 100644 --- a/gdb/arc-tdep.c +++ b/gdb/arc-tdep.c @@ -97,6 +97,7 @@ static unsigned int codestream_fill PARAMS ((int)); #define CODESTREAM_BUFSIZ 16 static CORE_ADDR codestream_next_addr; static CORE_ADDR codestream_addr; +/* FIXME assumes sizeof (int) == 32? */ static unsigned int codestream_buf[CODESTREAM_BUFSIZ]; static int codestream_off; static int codestream_cnt; @@ -124,16 +125,15 @@ codestream_fill (peek_flag) CODESTREAM_BUFSIZ * sizeof (codestream_buf[0])); /* FIXME: check return code? */ - /* Handle byte order differences. */ - if (HOST_BYTE_ORDER != TARGET_BYTE_ORDER) - { - register unsigned int i, j, n = sizeof (codestream_buf[0]); - register char tmp, *p; - for (i = 0, p = (char *) codestream_buf; i < CODESTREAM_BUFSIZ; - ++i, p += n) - for (j = 0; j < n / 2; ++j) - tmp = p[j], p[j] = p[n - 1 - j], p[n - 1 - j] = tmp; - } + + /* Handle byte order differences -> convert to host byte ordering. */ + { + int i; + for (i = 0; i < CODESTREAM_BUFSIZ; i++) + codestream_buf[i] = + extract_unsigned_integer (&codestream_buf[i], + sizeof (codestream_buf[i])); + } if (peek_flag) return codestream_peek (); diff --git a/gdb/arm-xdep.c b/gdb/arm-xdep.c index 09b3d5ca42f..3c253c58809 100644 --- a/gdb/arm-xdep.c +++ b/gdb/arm-xdep.c @@ -21,7 +21,7 @@ #include "defs.h" #include "frame.h" #include "inferior.h" -#include "arm-opcode.h" +#include "opcode/arm.h" #include <sys/param.h> #include <sys/dir.h> diff --git a/gdb/bcache.c b/gdb/bcache.c index 97485ddda3a..8ac330583e3 100644 --- a/gdb/bcache.c +++ b/gdb/bcache.c @@ -1,6 +1,7 @@ /* Implement a cached obstack. - Written by Fred Fish (fnf@cygnus.com) - Copyright 1995, 1998 Free Software Foundation, Inc. + Written by Fred Fish <fnf@cygnus.com> + Rewritten by Jim Blandy <jimb@cygnus.com> + Copyright 1999 Free Software Foundation, Inc. This file is part of GDB. @@ -19,198 +20,290 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +#include <stddef.h> +#include <stdlib.h> + #include "defs.h" #include "obstack.h" #include "bcache.h" #include "gdb_string.h" /* For memcpy declaration */ -/* Prototypes for local functions. */ -static unsigned int hash PARAMS ((void *, int)); + +/* The hash function. */ -static void *lookup_cache PARAMS ((void *, int, int, struct bcache *)); +unsigned long +hash (void *addr, int length) +{ + /* If it's a short string, hash on every character. Otherwise, sample + characters from throughout the string. */ + if (length <= 64) + { + char *byte = addr; + unsigned long h = 0; + int i; -/* FIXME: Incredibly simplistic hash generator. Probably way too expensive - (consider long strings) and unlikely to have good distribution across hash - values for typical input. */ + for (i = 0; i < length; i++) + h = h * 65793 ^ (h >> (sizeof (h) * 8 - 6)) ^ byte[i]; -static unsigned int -hash (bytes, count) - void *bytes; - int count; -{ - unsigned int len; - unsigned long hashval; - unsigned int c; - const unsigned char *data = bytes; - - hashval = 0; - len = 0; - while (count-- > 0) + return h; + } + else { - c = *data++; - hashval += c + (c << 17); - hashval ^= hashval >> 2; - ++len; + char *byte = addr; + int n, i; + unsigned long h = 0; + + for (n = i = 0; n < 64; n++) + { + h = h * 65793 + (h >> (sizeof (h) * 8 - 6)) + byte[i]; + i = h % length; + } + + return h; } - hashval += len + (len << 17); - hashval ^= hashval >> 2; - return (hashval % BCACHE_HASHSIZE); } -static void * -lookup_cache (bytes, count, hashval, bcachep) - void *bytes; - int count; - int hashval; - struct bcache *bcachep; + +/* Growing the bcache's hash table. */ + +/* If the average chain length grows beyond this, then we want to + resize our hash table. */ +#define CHAIN_LENGTH_THRESHOLD (5) + +static void +expand_hash_table (struct bcache *bcache) { - void *location = NULL; - struct hashlink **hashtablep; - struct hashlink *linkp; + /* A table of good hash table sizes. Whenever we grow, we pick the + next larger size from this table. sizes[i] is close to 1 << (i+10), + so we roughly double the table size each time. After we fall off + the end of this table, we just double. Don't laugh --- there have + been executables sighted with a gigabyte of debug info. */ + static unsigned long sizes[] = { + 1021, 2053, 4099, 8191, 16381, 32771, + 65537, 131071, 262144, 524287, 1048573, 2097143, + 4194301, 8388617, 16777213, 33554467, 67108859, 134217757, + 268435459, 536870923, 1073741827, 2147483659UL + }; + int new_num_buckets; + struct bstring **new_buckets; + int i; + + /* Find the next size. */ + for (i = 0; i < (sizeof (sizes) / sizeof (sizes[0])); i++) + if (sizes[i] > bcache->num_buckets) + { + new_num_buckets = sizes[i]; + break; + } + if (i >= (sizeof (sizes) / sizeof (sizes[0]))) + new_num_buckets = bcache->num_buckets * 2; + + /* Allocate the new table. */ + { + size_t new_size = new_num_buckets * sizeof (new_buckets[0]); + new_buckets = (struct bstring **) xmalloc (new_size); + memset (new_buckets, 0, new_size); + + bcache->structure_size -= (bcache->num_buckets + * sizeof (bcache->bucket[0])); + bcache->structure_size += new_size; + } - hashtablep = bcachep->indextable[count]; - if (hashtablep != NULL) + /* Rehash all existing strings. */ + for (i = 0; i < bcache->num_buckets; i++) { - linkp = hashtablep[hashval]; - while (linkp != NULL) + struct bstring *s, *next; + + for (s = bcache->bucket[i]; s; s = next) { - if (memcmp (BCACHE_DATA (linkp), bytes, count) == 0) - { - location = BCACHE_DATA (linkp); - break; - } - linkp = linkp->next; + struct bstring **new_bucket; + next = s->next; + + new_bucket = &new_buckets[(hash (&s->d.data, s->length) + % new_num_buckets)]; + s->next = *new_bucket; + *new_bucket = s; } } - return (location); + + /* Plug in the new table. */ + if (bcache->bucket) + free (bcache->bucket); + bcache->bucket = new_buckets; + bcache->num_buckets = new_num_buckets; } + +/* Looking up things in the bcache. */ + +/* The number of bytes needed to allocate a struct bstring whose data + is N bytes long. */ +#define BSTRING_SIZE(n) (offsetof (struct bstring, d.data) + (n)) + +/* Find a copy of the LENGTH bytes at ADDR in BCACHE. If BCACHE has + never seen those bytes before, add a copy of them to BCACHE. In + either case, return a pointer to BCACHE's copy of that string. */ void * -bcache (bytes, count, bcachep) - void *bytes; - int count; - struct bcache *bcachep; +bcache (void *addr, int length, struct bcache *bcache) { - int hashval; - void *location; - struct hashlink *newlink; - struct hashlink **linkpp; - struct hashlink ***hashtablepp; + int hash_index; + struct bstring *s; - if (count >= BCACHE_MAXLENGTH) - { - /* Rare enough to just stash unique copies */ - location = (void *) obstack_alloc (&bcachep->cache, count); - bcachep->cache_bytes += count; - memcpy (location, bytes, count); - bcachep->bcache_overflows++; - } - else - { - hashval = hash (bytes, count); - location = lookup_cache (bytes, count, hashval, bcachep); - if (location != NULL) - { - bcachep->cache_savings += count; - bcachep->cache_hits++; - } - else - { - bcachep->cache_misses++; - hashtablepp = &bcachep->indextable[count]; - if (*hashtablepp == NULL) - { - *hashtablepp = (struct hashlink **) - obstack_alloc (&bcachep->cache, BCACHE_HASHSIZE * sizeof (struct hashlink *)); - bcachep->cache_bytes += BCACHE_HASHSIZE * sizeof (struct hashlink *); - memset (*hashtablepp, 0, BCACHE_HASHSIZE * sizeof (struct hashlink *)); - } - linkpp = &(*hashtablepp)[hashval]; - newlink = (struct hashlink *) - obstack_alloc (&bcachep->cache, BCACHE_DATA_ALIGNMENT + count); - bcachep->cache_bytes += BCACHE_DATA_ALIGNMENT + count; - memcpy (BCACHE_DATA (newlink), bytes, count); - newlink->next = *linkpp; - *linkpp = newlink; - location = BCACHE_DATA (newlink); - } - } - return (location); + /* If our average chain length is too high, expand the hash table. */ + if (bcache->unique_count >= bcache->num_buckets * CHAIN_LENGTH_THRESHOLD) + expand_hash_table (bcache); + + bcache->total_count++; + bcache->total_size += length; + + hash_index = hash (addr, length) % bcache->num_buckets; + + /* Search the hash bucket for a string identical to the caller's. */ + for (s = bcache->bucket[hash_index]; s; s = s->next) + if (s->length == length + && ! memcmp (&s->d.data, addr, length)) + return &s->d.data; + + /* The user's string isn't in the list. Insert it after *ps. */ + { + struct bstring *new + = obstack_alloc (&bcache->cache, BSTRING_SIZE (length)); + memcpy (&new->d.data, addr, length); + new->length = length; + new->next = bcache->bucket[hash_index]; + bcache->bucket[hash_index] = new; + + bcache->unique_count++; + bcache->unique_size += length; + bcache->structure_size += BSTRING_SIZE (length); + + return &new->d.data; + } } + +/* Freeing bcaches. */ + +/* Free all the storage associated with BCACHE. */ void -print_bcache_statistics (bcachep, id) - struct bcache *bcachep; - char *id; +free_bcache (struct bcache *bcache) { - struct hashlink **hashtablep; - struct hashlink *linkp; - int tidx, tcount, hidx, hcount, lcount, lmax, temp, lmaxt, lmaxh; + obstack_free (&bcache->cache, 0); + free (bcache->bucket); - for (lmax = lcount = tcount = hcount = tidx = 0; tidx < BCACHE_MAXLENGTH; tidx++) - { - hashtablep = bcachep->indextable[tidx]; - if (hashtablep != NULL) - { - tcount++; - for (hidx = 0; hidx < BCACHE_HASHSIZE; hidx++) - { - linkp = hashtablep[hidx]; - if (linkp != NULL) - { - hcount++; - for (temp = 0; linkp != NULL; linkp = linkp->next) - { - lcount++; - temp++; - } - if (temp > lmax) - { - lmax = temp; - lmaxt = tidx; - lmaxh = hidx; - } - } - } - } - } - printf_filtered (" Cached '%s' statistics:\n", id); - printf_filtered (" Cache hits: %d\n", bcachep->cache_hits); - printf_filtered (" Cache misses: %d\n", bcachep->cache_misses); - printf_filtered (" Cache hit ratio: "); - if (bcachep->cache_hits + bcachep->cache_misses > 0) - { - printf_filtered ("%d%%\n", ((bcachep->cache_hits) * 100) / - (bcachep->cache_hits + bcachep->cache_misses)); - } - else - { - printf_filtered ("(not applicable)\n"); - } - printf_filtered (" Space used for caching: %d\n", bcachep->cache_bytes); - printf_filtered (" Space saved by cache hits: %d\n", bcachep->cache_savings); - printf_filtered (" Number of bcache overflows: %d\n", bcachep->bcache_overflows); - printf_filtered (" Number of index buckets used: %d\n", tcount); - printf_filtered (" Number of hash table buckets used: %d\n", hcount); - printf_filtered (" Number of chained items: %d\n", lcount); - printf_filtered (" Average hash table population: "); - if (tcount > 0) - { - printf_filtered ("%d%%\n", (hcount * 100) / (tcount * BCACHE_HASHSIZE)); - } + /* This isn't necessary, but at least the bcache is always in a + consistent state. */ + memset (bcache, 0, sizeof (*bcache)); +} + + + +/* Printing statistics. */ + +static int +compare_ints (const void *ap, const void *bp) +{ + /* Because we know we're comparing two ints which are positive, + there's no danger of overflow here. */ + return * (int *) ap - * (int *) bp; +} + + +static void +print_percentage (int portion, int total) +{ + if (total == 0) + printf_filtered ("(not applicable)\n"); else - { - printf_filtered ("(not applicable)\n"); - } - printf_filtered (" Average chain length "); - if (hcount > 0) - { - printf_filtered ("%d\n", lcount / hcount); - } + printf_filtered ("%3d%%\n", portion * 100 / total); +} + + +/* Print statistics on BCACHE's memory usage and efficacity at + eliminating duplication. NAME should describe the kind of data + BCACHE holds. Statistics are printed using `printf_filtered' and + its ilk. */ +void +print_bcache_statistics (struct bcache *c, char *type) +{ + int occupied_buckets; + int max_chain_length; + int median_chain_length; + + /* Count the number of occupied buckets, and measure chain lengths. */ + { + int b; + int *chain_length + = (int *) alloca (c->num_buckets * sizeof (*chain_length)); + + occupied_buckets = 0; + + for (b = 0; b < c->num_buckets; b++) + { + struct bstring *s = c->bucket[b]; + + chain_length[b] = 0; + + if (s) + { + occupied_buckets++; + + while (s) + { + chain_length[b]++; + s = s->next; + } + } + } + + /* To compute the median, we need the set of chain lengths sorted. */ + qsort (chain_length, c->num_buckets, sizeof (chain_length[0]), + compare_ints); + + if (c->num_buckets > 0) + { + max_chain_length = chain_length[c->num_buckets - 1]; + median_chain_length = chain_length[c->num_buckets / 2]; + } + else + { + max_chain_length = 0; + median_chain_length = 0; + } + } + + printf_filtered (" Cached '%s' statistics:\n", type); + printf_filtered (" Total object count: %ld\n", c->total_count); + printf_filtered (" Unique object count: %ld\n", c->unique_count); + printf_filtered (" Percentage of duplicates, by count: "); + print_percentage (c->total_count - c->unique_count, c->total_count); + printf_filtered ("\n"); + + printf_filtered (" Total object size: %ld\n", c->total_size); + printf_filtered (" Unique object size: %ld\n", c->unique_size); + printf_filtered (" Percentage of duplicates, by size: "); + print_percentage (c->total_size - c->unique_size, c->total_size); + printf_filtered ("\n"); + + printf_filtered (" Total memory used by bcache, including overhead: %ld\n", + c->structure_size); + printf_filtered (" Percentage memory overhead: "); + print_percentage (c->structure_size - c->unique_size, c->unique_size); + printf_filtered (" Net memory savings: "); + print_percentage (c->total_size - c->structure_size, c->total_size); + printf_filtered ("\n"); + + printf_filtered (" Hash table size: %3d\n", c->num_buckets); + printf_filtered (" Hash table population: "); + print_percentage (occupied_buckets, c->num_buckets); + printf_filtered (" Median hash chain length: %3d\n", + median_chain_length); + printf_filtered (" Average hash chain length: "); + if (c->num_buckets > 0) + printf_filtered ("%3ld\n", c->unique_count / c->num_buckets); else - { - printf_filtered ("(not applicable)\n"); - } - printf_filtered (" Maximum chain length %d at %d:%d\n", lmax, lmaxt, lmaxh); + printf_filtered ("(not applicable)\n"); + printf_filtered (" Maximum hash chain length: %3d\n", max_chain_length); + printf_filtered ("\n"); } diff --git a/gdb/bcache.h b/gdb/bcache.h index ec383244a47..1350bea66a0 100644 --- a/gdb/bcache.h +++ b/gdb/bcache.h @@ -1,6 +1,7 @@ /* Include file cached obstack implementation. - Written by Fred Fish (fnf@cygnus.com) - Copyright 1995 Free Software Foundation, Inc. + Written by Fred Fish <fnf@cygnus.com> + Rewritten by Jim Blandy <jimb@cygnus.com> + Copyright 1999 Free Software Foundation, Inc. This file is part of GDB. @@ -22,52 +23,107 @@ #ifndef BCACHE_H #define BCACHE_H 1 -#define BCACHE_HASHLENGTH 12 /* Number of bits in hash value */ -#define BCACHE_HASHSIZE (1 << BCACHE_HASHLENGTH) -#define BCACHE_MAXLENGTH 128 - -/* Note that the user data is stored in data[]. Since it can be any type, - it needs to have the same alignment as the most strict alignment of - any type on the host machine. So do it the same way obstack does. */ - -struct hashlink - { - struct hashlink *next; - union - { - char data[1]; - double dummy; - } - d; - }; - -/* BCACHE_DATA is used to get the address of the cached data. */ - -#define BCACHE_DATA(p) ((p)->d.data) - -/* BCACHE_DATA_ALIGNMENT is used to get the offset of the start of - cached data within the hashlink struct. This value, plus the - size of the cached data, is the amount of space to allocate for - a hashlink struct to hold the next pointer and the data. */ - -#define BCACHE_DATA_ALIGNMENT \ - (((char *) BCACHE_DATA((struct hashlink*) 0) - (char *) 0)) - -struct bcache +/* A bcache is a data structure for factoring out duplication in + read-only structures. You give the bcache some string of bytes S. + If the bcache already contains a copy of S, it hands you back a + pointer to its copy. Otherwise, it makes a fresh copy of S, and + hands you back a pointer to that. In either case, you can throw + away your copy of S, and use the bcache's. + + The "strings" in question are arbitrary strings of bytes --- they + can contain zero bytes. You pass in the length explicitly when you + call the bcache function. + + This means that you can put ordinary C objects in a bcache. + However, if you do this, remember that structs can contain `holes' + between members, added for alignment. These bytes usually contain + garbage. If you try to bcache two objects which are identical from + your code's point of view, but have different garbage values in the + structure's holes, then the bcache will treat them as separate + strings, and you won't get the nice elimination of duplicates you + were hoping for. So, remember to memset your structures full of + zeros before bcaching them! + + You shouldn't modify the strings you get from a bcache, because: + + - You don't necessarily know who you're sharing space with. If I + stick eight bytes of text in a bcache, and then stick an + eight-byte structure in the same bcache, there's no guarantee + those two objects don't actually comprise the same sequence of + bytes. If they happen to, the bcache will use a single byte + string for both of them. Then, modifying the structure will + change the string. In bizarre ways. + + - Even if you know for some other reason that all that's okay, + there's another problem. A bcache stores all its strings in a + hash table. If you modify a string's contents, you will probably + change its hash value. This means that the modified string is + now in the wrong place in the hash table, and future bcache + probes will never find it. So by mutating a string, you give up + any chance of sharing its space with future duplicates. */ + + +/* The type used to hold a single bcache string. The user data is + stored in d.data. Since it can be any type, it needs to have the + same alignment as the most strict alignment of any type on the host + machine. I don't know of any really correct way to do this in + stock ANSI C, so just do it the same way obstack.h does. + + It would be nicer to have this stuff hidden away in bcache.c, but + struct objstack contains a struct bcache directly --- not a pointer + to one --- and then the memory-mapped stuff makes this a real pain. + We don't strictly need to expose struct bstring, but it's better to + have it all in one place. */ + +struct bstring { + struct bstring *next; + size_t length; + + union { - struct obstack cache; - struct hashlink **indextable[BCACHE_MAXLENGTH]; - int cache_hits; - int cache_misses; - int cache_bytes; - int cache_savings; - int bcache_overflows; - }; - -extern void * - bcache PARAMS ((void *bytes, int count, struct bcache * bcachep)); - -extern void -print_bcache_statistics PARAMS ((struct bcache *, char *)); + char data[1]; + double dummy; + } + d; +}; + + +/* The structure for a bcache itself. + To initialize a bcache, just fill it with zeros. */ +struct bcache { + /* All the bstrings are allocated here. */ + struct obstack cache; + + /* How many hash buckets we're using. */ + int num_buckets; + + /* Hash buckets. This table is allocated using malloc, so when we + grow the table we can return the old table to the system. */ + struct bstring **bucket; + + /* Statistics. */ + long unique_count; /* number of unique strings */ + long total_count; /* total number of strings cached, including dups */ + long unique_size; /* size of unique strings, in bytes */ + long total_size; /* total number of bytes cached, including dups */ + long structure_size; /* total size of bcache, including infrastructure */ +}; + + +/* Find a copy of the LENGTH bytes at ADDR in BCACHE. If BCACHE has + never seen those bytes before, add a copy of them to BCACHE. In + either case, return a pointer to BCACHE's copy of that string. */ +extern void *bcache (void *addr, int length, struct bcache *bcache); + +/* Free all the storage that BCACHE refers to. The result is a valid, + but empty, bcache. This does not free BCACHE itself, since that + might be part of some larger object. */ +extern void free_bcache (struct bcache *bcache); + +/* Print statistics on BCACHE's memory usage and efficacity at + eliminating duplication. TYPE should be a string describing the + kind of data BCACHE holds. Statistics are printed using + `printf_filtered' and its ilk. */ +extern void print_bcache_statistics (struct bcache *bcache, char *type); #endif /* BCACHE_H */ diff --git a/gdb/breakpoint.c b/gdb/breakpoint.c index 62dcb27b0c8..06d9471c8ed 100644 --- a/gdb/breakpoint.c +++ b/gdb/breakpoint.c @@ -2071,8 +2071,8 @@ print_it_typical (bs) here. */ case bp_finish: - case bp_none: case bp_until: + case bp_none: case bp_longjmp: case bp_longjmp_resume: case bp_step_resume: @@ -2428,8 +2428,6 @@ bpstat_stop_status (pc, not_a_breakpoint) /* Don't stop. */ bs->print_it = print_it_noop; bs->stop = 0; - /* Don't consider this a hit. */ - --(b->hit_count); continue; default: /* Can't happen. */ diff --git a/gdb/coffread.c b/gdb/coffread.c index b98e8ce24c5..037fb87a0e9 100644 --- a/gdb/coffread.c +++ b/gdb/coffread.c @@ -610,7 +610,9 @@ coff_symfile_read (objfile, mainline) int stringtab_offset; struct cleanup *back_to; int stabstrsize; - + int len; + char * target; + info = (struct coff_symfile_info *) objfile->sym_private; dbxinfo = objfile->sym_stab_info; symfile_bfd = abfd; /* Kludge for swap routines */ @@ -643,7 +645,9 @@ coff_symfile_read (objfile, mainline) from the section address, rather than as absolute addresses. FIXME: We should use BFD to read the symbol table, and thus avoid this problem. */ - pe_file = strncmp (bfd_get_target (objfile->obfd), "pe", 2) == 0; + pe_file = ! + ( strncmp (bfd_get_target (objfile->obfd), "pe", 2) + | strncmp (bfd_get_target (objfile->obfd), "epoc-pe", 7)); /* End of warning */ diff --git a/gdb/config.in b/gdb/config.in index 5660f45b129..fb29b6843fd 100644 --- a/gdb/config.in +++ b/gdb/config.in @@ -243,6 +243,9 @@ /* Define if you have the <sys/debugreg.h> header file. */ #undef HAVE_SYS_DEBUGREG_H +/* Define if you have the <sys/ioctl.h> header file. */ +#undef HAVE_SYS_IOCTL_H + /* Define if you have the <sys/param.h> header file. */ #undef HAVE_SYS_PARAM_H diff --git a/gdb/config/alpha/alpha-linux.mh b/gdb/config/alpha/alpha-linux.mh index aa4a06956b8..05e0cb697de 100644 --- a/gdb/config/alpha/alpha-linux.mh +++ b/gdb/config/alpha/alpha-linux.mh @@ -3,7 +3,7 @@ XDEPFILES= ser-tcp.o XM_FILE= xm-alphalinux.h NAT_FILE= nm-linux.h NATDEPFILES= infptrace.o inftarg.o corelow.o core-regset.o alpha-nat.o \ - fork-child.o solib.o + fork-child.o solib.o linux-thread.o MMALLOC = MMALLOC_CFLAGS = -DNO_MMALLOC diff --git a/gdb/config/alpha/nm-linux.h b/gdb/config/alpha/nm-linux.h index 99df5c681e0..49b4fc38f4e 100644 --- a/gdb/config/alpha/nm-linux.h +++ b/gdb/config/alpha/nm-linux.h @@ -18,6 +18,8 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +#include "nm-linux.h" + /* Figure out where the longjmp will land. We expect that we have just entered longjmp and haven't yet setup the stack frame, so the args are still in the argument regs. A0_REGNUM points at the jmp_buf structure from which we @@ -28,13 +30,12 @@ extern int get_longjmp_target PARAMS ((CORE_ADDR *)); -/* Tell gdb that we can attach and detach other processes */ -#define ATTACH_DETACH - /* ptrace register ``addresses'' are absolute. */ #define U_REGS_OFFSET 0 +/* FIXME: This is probably true, or should be, on all Linux ports. + IA64? Sparc64? */ #define PTRACE_ARG3_TYPE long /* ptrace transfers longs, the ptrace man page is lying. */ @@ -51,10 +52,7 @@ get_longjmp_target PARAMS ((CORE_ADDR *)); /* Support for shared libraries. */ -#include "solib.h" - #ifdef __ELF__ -#define SVR4_SHARED_LIBS #define TARGET_ELF64 #endif @@ -65,3 +63,4 @@ get_longjmp_target PARAMS ((CORE_ADDR *)); /* Given a pointer to either a gregset_t or fpregset_t, return a pointer to the first register. */ #define ALPHA_REGSET_BASE(regsetp) ((long *) (regsetp)) + diff --git a/gdb/config/alpha/tm-alphalinux.h b/gdb/config/alpha/tm-alphalinux.h index 313667e7828..a2a993e0720 100644 --- a/gdb/config/alpha/tm-alphalinux.h +++ b/gdb/config/alpha/tm-alphalinux.h @@ -75,7 +75,6 @@ extern long alpha_linux_sigtramp_offset PARAMS ((CORE_ADDR)); #undef FRAME_PAST_SIGTRAMP_FRAME #define FRAME_PAST_SIGTRAMP_FRAME(frame, pc) (0) -/* We need this for the SOLIB_TRAMPOLINE stuff. */ -#include "tm-sysv4.h" +#include "tm-linux.h" #endif /* TM_LINUXALPHA_H */ diff --git a/gdb/config/i386/nm-linux.h b/gdb/config/i386/nm-linux.h index 1ce0a3082ff..93dfe46bbd7 100644 --- a/gdb/config/i386/nm-linux.h +++ b/gdb/config/i386/nm-linux.h @@ -23,15 +23,13 @@ #define NM_LINUX_H #include "i386/nm-i386v.h" +#include "nm-linux.h" /* Return sizeof user struct to callers in less machine dependent routines */ #define KERNEL_U_SIZE kernel_u_size() extern int kernel_u_size PARAMS ((void)); -/* Tell gdb that we can attach and detach other processes */ -#define ATTACH_DETACH - #define U_REGS_OFFSET 0 /* GNU/Linux supports the 386 hardware debugging registers. */ @@ -74,14 +72,4 @@ i386_insert_watchpoint PARAMS ((int pid, CORE_ADDR addr, int len, int rw)); extern int i386_remove_watchpoint PARAMS ((int pid, CORE_ADDR addr, int len)); -/* Support for the glibc linuxthreads package. */ - -extern char * -linuxthreads_pid_to_str PARAMS ((int pid)); -#define target_pid_to_str(PID) linuxthreads_pid_to_str (PID) - -extern int -linuxthreads_prepare_to_proceed PARAMS ((int step)); -#define PREPARE_TO_PROCEED(select_it) linuxthreads_prepare_to_proceed (1) - #endif /* #ifndef NM_LINUX_H */ diff --git a/gdb/config/i386/tm-cygwin.h b/gdb/config/i386/tm-cygwin.h index 309e1ff8df9..2faa4bf2003 100644 --- a/gdb/config/i386/tm-cygwin.h +++ b/gdb/config/i386/tm-cygwin.h @@ -1,5 +1,5 @@ /* Macro definitions for i386 running under the win32 API Unix. - Copyright 1995, 1996 Free Software Foundation, Inc. + Copyright 1995 - 1999 Free Software Foundation, Inc. This file is part of GDB. @@ -19,104 +19,10 @@ Boston, MA 02111-1307, USA. */ -#include "i386/tm-i386v.h" - -#undef MAX_REGISTER_RAW_SIZE -#undef MAX_REGISTER_VIRTUAL_SIZE -#undef NUM_REGS -#undef REGISTER_BYTE -#undef REGISTER_BYTES -#undef REGISTER_CONVERTIBLE -#undef REGISTER_CONVERT_TO_RAW -#undef REGISTER_CONVERT_TO_VIRTUAL -#undef REGISTER_NAMES -#undef REGISTER_RAW_SIZE -#undef REGISTER_VIRTUAL_SIZE -#undef REGISTER_VIRTUAL_TYPE - -/* Number of machine registers */ - -#define NUM_REGS 24 - -/* Initializer for an array of names of registers. - There should be NUM_REGS strings in this initializer. */ - -/* the order of the first 8 registers must match the compiler's - * numbering scheme (which is the same as the 386 scheme) - * also, this table must match regmap in i386-pinsn.c. - */ - -#define REGISTER_NAMES { "eax", "ecx", "edx", "ebx", \ - "esp", "ebp", "esi", "edi", \ - "eip", "ps", "cs", "ss", \ - "ds", "es", "fs", "gs", \ - "st", "st(1)","st(2)","st(3)",\ - "st(4)","st(5)","st(6)","st(7)",} - -#define FP0_REGNUM 16 - -/* Total amount of space needed to store our copies of the machine's - register state, the array `registers'. */ - -#define REGISTER_BYTES (16 * 4 + 8 * 10) - -/* Index within `registers' of the first byte of the space for - register N. */ - -#define REGISTER_BYTE(N) (((N) < 16) ? (N) * 4 : (((N) - 16) * 10) + (16 * 4)) - -/* Number of bytes of storage in the actual machine representation - for register N. */ - -#define REGISTER_RAW_SIZE(N) (((N) < 16) ? 4 : 10) - -/* Number of bytes of storage in the program's representation - for register N. */ +#undef HAVE_SSE_REGS /* FIXME! win32-nat.c needs to support XMMi registers */ +#define HAVE_I387_REGS -#define REGISTER_VIRTUAL_SIZE(N) (((N) < 16) ? 4 : 10) - -/* Largest value REGISTER_RAW_SIZE can have. */ - -#define MAX_REGISTER_RAW_SIZE 10 - -/* Largest value REGISTER_VIRTUAL_SIZE can have. */ - -#define MAX_REGISTER_VIRTUAL_SIZE 10 - -/* Nonzero if register N requires conversion - from raw format to virtual format. */ - -#define REGISTER_CONVERTIBLE(N) \ - ((N < FP0_REGNUM) ? 0 : 1) - -/* Convert data from raw format for register REGNUM in buffer FROM - to virtual format with type TYPE in buffer TO. */ -extern void -i387_to_double PARAMS ((char *, char *)); - - -#define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,TYPE,FROM,TO) \ -{ \ - double val; \ - i387_to_double ((FROM), (char *)&val); \ - store_floating ((TO), TYPE_LENGTH (TYPE), val); \ -} - -extern void -double_to_i387 PARAMS ((char *, char *)); - -#define REGISTER_CONVERT_TO_RAW(TYPE,REGNUM,FROM,TO) \ -{ \ - double val = extract_floating ((FROM), TYPE_LENGTH (TYPE)); \ - double_to_i387((char *)&val, (TO)); \ -} - -/* Return the GDB type object for the "standard" data type - of data in register N. */ - -#define REGISTER_VIRTUAL_TYPE(N) \ - ((N < FP0_REGNUM) ? builtin_type_int : \ - builtin_type_double) +#include "i386/tm-i386v.h" #define IN_SOLIB_CALL_TRAMPOLINE(pc, name) skip_trampoline_code (pc, name) #define SKIP_TRAMPOLINE_CODE(pc) skip_trampoline_code (pc, 0) diff --git a/gdb/config/i386/tm-i386v.h b/gdb/config/i386/tm-i386v.h index 308da1fa2e3..5e7826d231b 100644 --- a/gdb/config/i386/tm-i386v.h +++ b/gdb/config/i386/tm-i386v.h @@ -32,73 +32,6 @@ #undef START_INFERIOR_TRAPS_EXPECTED #define START_INFERIOR_TRAPS_EXPECTED 4 -/* Number of machine registers */ - -#undef NUM_REGS -#define NUM_REGS 16 - -/* Initializer for an array of names of registers. - There should be NUM_REGS strings in this initializer. */ - -/* the order of the first 8 registers must match the compiler's - * numbering scheme (which is the same as the 386 scheme) - * also, this table must match regmap in i386-pinsn.c. - */ - -#undef REGISTER_NAMES -#define REGISTER_NAMES { "eax", "ecx", "edx", "ebx", \ - "esp", "ebp", "esi", "edi", \ - "eip", "ps", "cs", "ss", \ - "ds", "es", "fs", "gs", \ - } - -/* Total amount of space needed to store our copies of the machine's - register state, the array `registers'. */ - -#undef REGISTER_BYTES -#define REGISTER_BYTES (NUM_REGS * 4) - -/* Index within `registers' of the first byte of the space for - register N. */ - -#undef REGISTER_BYTE -#define REGISTER_BYTE(N) ((N)*4) - -/* Number of bytes of storage in the actual machine representation - for register N. */ - -#undef REGISTER_RAW_SIZE -#define REGISTER_RAW_SIZE(N) (4) - -/* Number of bytes of storage in the program's representation - for register N. */ - -#undef REGISTER_VIRTUAL_SIZE -#define REGISTER_VIRTUAL_SIZE(N) (4) - -/* Largest value REGISTER_RAW_SIZE can have. */ - -#undef MAX_REGISTER_RAW_SIZE -#define MAX_REGISTER_RAW_SIZE 4 - -/* Largest value REGISTER_VIRTUAL_SIZE can have. */ - -#undef MAX_REGISTER_VIRTUAL_SIZE -#define MAX_REGISTER_VIRTUAL_SIZE 4 - -/* Return the GDB type object for the "standard" data type - of data in register N. */ -/* Perhaps si and di should go here, but potentially they could be - used for things other than address. */ - -#undef REGISTER_VIRTUAL_TYPE -#define REGISTER_VIRTUAL_TYPE(N) \ - ((N) == PC_REGNUM || (N) == FP_REGNUM || (N) == SP_REGNUM ? \ - lookup_pointer_type (builtin_type_void) : builtin_type_int) - -/* Store the address of the place in which to copy the structure the - subroutine will return. This is called from call_function. */ - #undef STORE_STRUCT_RETURN #define STORE_STRUCT_RETURN(ADDR, SP) \ { char buf[REGISTER_SIZE]; \ diff --git a/gdb/config/i386/tm-linux.h b/gdb/config/i386/tm-linux.h index 42daaeae5bf..a04348910bc 100644 --- a/gdb/config/i386/tm-linux.h +++ b/gdb/config/i386/tm-linux.h @@ -28,6 +28,7 @@ #endif #include "i386/tm-i386.h" +#include "tm-linux.h" /* Size of sigcontext, from <asm/sigcontext.h>. */ #define LINUX_SIGCONTEXT_SIZE (88) @@ -38,10 +39,6 @@ /* Offset to saved SP in sigcontext, from <asm/sigcontext.h>. */ #define LINUX_SIGCONTEXT_SP_OFFSET (28) -/* We need this file for the SOLIB_TRAMPOLINE stuff. */ - -#include "tm-sysv4.h" - #define LOW_RETURN_REGNUM 0 /* holds low four bytes of result */ #define HIGH_RETURN_REGNUM 2 /* holds high four bytes of result */ @@ -167,18 +164,6 @@ extern CORE_ADDR i386_linux_sigtramp_saved_pc PARAMS ((struct frame_info *)); extern CORE_ADDR i386_linux_sigtramp_saved_sp PARAMS ((struct frame_info *)); -/* Some versions of Linux have real-time signal support in the C library, and - some don't. We have to include this file to find out. */ -#include <signal.h> - -#ifdef __SIGRTMIN -#define REALTIME_LO __SIGRTMIN -#define REALTIME_HI (__SIGRTMAX + 1) -#else -#define REALTIME_LO 32 -#define REALTIME_HI 64 -#endif - /* When we call a function in a shared library, and the PLT sends us into the dynamic linker to find the function's real address, we need to skip over the dynamic linker call. This function decides diff --git a/gdb/config/m68k/linux.mh b/gdb/config/m68k/linux.mh index c3850b16470..510248df030 100644 --- a/gdb/config/m68k/linux.mh +++ b/gdb/config/m68k/linux.mh @@ -4,6 +4,7 @@ XM_FILE= xm-linux.h XDEPFILES= ser-tcp.o NAT_FILE= nm-linux.h -NATDEPFILES= infptrace.o solib.o inftarg.o fork-child.o corelow.o core-aout.o core-regset.o m68klinux-nat.o +NATDEPFILES= infptrace.o solib.o inftarg.o fork-child.o \ + corelow.o core-aout.o core-regset.o m68klinux-nat.o linux-thread.o GDBSERVER_DEPFILES= low-linux.o diff --git a/gdb/config/m68k/nm-linux.h b/gdb/config/m68k/nm-linux.h index 197076e5403..e5846c6d2bf 100644 --- a/gdb/config/m68k/nm-linux.h +++ b/gdb/config/m68k/nm-linux.h @@ -21,24 +21,15 @@ #ifndef NM_LINUX_H #define NM_LINUX_H +#include "nm-linux.h" + /* Return sizeof user struct to callers in less machine dependent routines */ #define KERNEL_U_SIZE kernel_u_size() extern int kernel_u_size PARAMS ((void)); -/* Tell gdb that we can attach and detach other processes */ -#define ATTACH_DETACH - #define U_REGS_OFFSET 0 -/* We define this if link.h is available, because with ELF we use SVR4 style - shared libraries. */ - -#ifdef HAVE_LINK_H -#define SVR4_SHARED_LIBS -#include "solib.h" /* Support for shared libraries. */ -#endif - #define REGISTER_U_ADDR(addr, blockend, regno) \ (addr) = m68k_linux_register_u_addr ((blockend),(regno)); diff --git a/gdb/config/m68k/tm-linux.h b/gdb/config/m68k/tm-linux.h index 9f597348143..ccf4a7ac08e 100644 --- a/gdb/config/m68k/tm-linux.h +++ b/gdb/config/m68k/tm-linux.h @@ -72,7 +72,7 @@ } \ } -#include "tm-sysv4.h" +#include "tm-linux.h" #include "m68k/tm-m68k.h" /* Extract from an array REGBUF containing the (raw) register state diff --git a/gdb/config/mips/tm-vr4xxx.h b/gdb/config/mips/tm-vr4xxx.h new file mode 100644 index 00000000000..1f2a1313389 --- /dev/null +++ b/gdb/config/mips/tm-vr4xxx.h @@ -0,0 +1,25 @@ +/* Copyright (C) 1998 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. */ + +#define GDB_MULTI_ARCH 1 +#define MIPS_DEFAULT_FPU_TYPE MIPS_FPU_DOUBLE +#define TARGET_BYTE_ORDER_SELECTABLE_P 1 +#define TARGET_MONITOR_PROMPT "<RISQ> " + +#include "mips/tm-bigmips64.h" diff --git a/gdb/config/mips/tm-vr4xxxel.h b/gdb/config/mips/tm-vr4xxxel.h new file mode 100644 index 00000000000..ae5227b5180 --- /dev/null +++ b/gdb/config/mips/tm-vr4xxxel.h @@ -0,0 +1,25 @@ +/* Copyright (C) 1998 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. */ + +#define GDB_MULTI_ARCH 1 +#define MIPS_DEFAULT_FPU_TYPE MIPS_FPU_DOUBLE +#define TARGET_BYTE_ORDER_SELECTABLE_P 1 +#define TARGET_MONITOR_PROMPT "<RISQ> " + +#include "mips/tm-mips64.h" diff --git a/gdb/config/mips/tm-vr5000.h b/gdb/config/mips/tm-vr5000.h index 39663102d8a..e3f66f01e0c 100644 --- a/gdb/config/mips/tm-vr5000.h +++ b/gdb/config/mips/tm-vr5000.h @@ -17,6 +17,7 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +#define GDB_MULTI_ARCH 1 #define TARGET_BYTE_ORDER_SELECTABLE_P 1 #define TARGET_MONITOR_PROMPT "<RISQ> " #define MIPS_EABI 1 diff --git a/gdb/config/mips/tm-vr5000el.h b/gdb/config/mips/tm-vr5000el.h index eae58045091..9fa47002c0b 100644 --- a/gdb/config/mips/tm-vr5000el.h +++ b/gdb/config/mips/tm-vr5000el.h @@ -17,6 +17,7 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +#define GDB_MULTI_ARCH 1 #define TARGET_BYTE_ORDER_SELECTABLE_P 1 #define TARGET_MONITOR_PROMPT "<RISQ> " #define MIPS_EABI 1 diff --git a/gdb/config/mips/vr4xxx.mt b/gdb/config/mips/vr4xxx.mt new file mode 100644 index 00000000000..4c79ec7552d --- /dev/null +++ b/gdb/config/mips/vr4xxx.mt @@ -0,0 +1,5 @@ +# Target: Big-endian SIM monitor board. +TDEPFILES= mips-tdep.o remote-mips.o +TM_FILE= tm-vr4xxx.h +SIM_OBS = remote-sim.o +SIM = ../sim/mips/libsim.a diff --git a/gdb/config/mips/vr4xxxel.mt b/gdb/config/mips/vr4xxxel.mt new file mode 100644 index 00000000000..5124dd75461 --- /dev/null +++ b/gdb/config/mips/vr4xxxel.mt @@ -0,0 +1,5 @@ +# Target: Big-endian SIM monitor board. +TDEPFILES= mips-tdep.o remote-mips.o +TM_FILE= tm-vr4xxxel.h +SIM_OBS = remote-sim.o +SIM = ../sim/mips/libsim.a diff --git a/gdb/config/nm-linux.h b/gdb/config/nm-linux.h new file mode 100644 index 00000000000..980530681e3 --- /dev/null +++ b/gdb/config/nm-linux.h @@ -0,0 +1,50 @@ +/* Native support for GNU/Linux, for GDB, the GNU debugger. + Copyright (C) 1999 + Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. */ + +/* Linux is svr4ish but not that much */ +#undef USE_PROC_FS + +/* Tell gdb that we can attach and detach other processes */ +#define ATTACH_DETACH + +/* We define this if link.h is available, because with ELF we use SVR4 style + shared libraries. */ + +#ifdef HAVE_LINK_H +#define SVR4_SHARED_LIBS +#include "solib.h" /* Support for shared libraries. */ +#endif + +/* Support for the glibc linuxthreads package. */ + +struct objfile; + +extern void +linuxthreads_new_objfile PARAMS ((struct objfile *objfile)); +#define target_new_objfile(OBJFILE) linuxthreads_new_objfile (OBJFILE) + +extern char * +linuxthreads_pid_to_str PARAMS ((int pid)); +#define target_pid_to_str(PID) linuxthreads_pid_to_str (PID) + +extern int +linuxthreads_prepare_to_proceed PARAMS ((int step)); +#define PREPARE_TO_PROCEED(select_it) linuxthreads_prepare_to_proceed (1) diff --git a/gdb/config/sparc/linux.mh b/gdb/config/sparc/linux.mh index 954398fb2dd..4ad98c224bf 100644 --- a/gdb/config/sparc/linux.mh +++ b/gdb/config/sparc/linux.mh @@ -2,6 +2,7 @@ XDEPFILES= ser-tcp.o XM_FILE= xm-linux.h NAT_FILE= nm-linux.h -NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o sparc-nat.o +NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o sparc-nat.o \ + linux-thread.o HOST_IPC=-DBSD_IPC GDBSERVER_DEPFILES= low-sparc.o diff --git a/gdb/config/sparc/nm-linux.h b/gdb/config/sparc/nm-linux.h index f6f26bcf8a1..1b798237202 100644 --- a/gdb/config/sparc/nm-linux.h +++ b/gdb/config/sparc/nm-linux.h @@ -27,6 +27,3 @@ #define KERNEL_U_SIZE kernel_u_size() extern int kernel_u_size PARAMS ((void)); - -/* Linux is svr4ish but not that much */ -#undef USE_PROC_FS diff --git a/gdb/config/sparc/tm-linux.h b/gdb/config/sparc/tm-linux.h index 8822f1dfed0..906aaec1657 100644 --- a/gdb/config/sparc/tm-linux.h +++ b/gdb/config/sparc/tm-linux.h @@ -25,6 +25,6 @@ #define SIGCONTEXT_PC_OFFSET 12 -#include "tm-sysv4.h" +#include "tm-linux.h" #endif /* TM_SPARCLINUX_H */ diff --git a/gdb/config/tm-linux.h b/gdb/config/tm-linux.h new file mode 100644 index 00000000000..d1040ac2df6 --- /dev/null +++ b/gdb/config/tm-linux.h @@ -0,0 +1,36 @@ +/* Native support for GNU/Linux, for GDB, the GNU debugger. + Copyright (C) 1999 + Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. */ + +/* Some versions of Linux have real-time signal support in the C library, and + some don't. We have to include this file to find out. */ +#include <signal.h> + +#ifdef __SIGRTMIN +#define REALTIME_LO __SIGRTMIN +#define REALTIME_HI (__SIGRTMAX + 1) +#else +#define REALTIME_LO 32 +#define REALTIME_HI 64 +#endif + +/* We need this file for the SOLIB_TRAMPOLINE stuff. */ + +#include "tm-sysv4.h" diff --git a/gdb/configure b/gdb/configure index 9306516db85..2016ab62156 100755 --- a/gdb/configure +++ b/gdb/configure @@ -3228,7 +3228,7 @@ for ac_hdr in ctype.h curses.h endian.h link.h \ string.h sys/procfs.h sys/ptrace.h sys/reg.h \ term.h termio.h termios.h unistd.h wait.h sys/wait.h \ wchar.h wctype.h asm/debugreg.h sys/debugreg.h sys/select.h \ - time.h + time.h sys/ioctl.h do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 diff --git a/gdb/configure.in b/gdb/configure.in index 8435420a91a..3dae4a3070c 100644 --- a/gdb/configure.in +++ b/gdb/configure.in @@ -84,7 +84,7 @@ AC_CHECK_HEADERS(ctype.h curses.h endian.h link.h \ string.h sys/procfs.h sys/ptrace.h sys/reg.h \ term.h termio.h termios.h unistd.h wait.h sys/wait.h \ wchar.h wctype.h asm/debugreg.h sys/debugreg.h sys/select.h \ - time.h) + time.h sys/ioctl.h) AC_HEADER_STAT AC_C_CONST diff --git a/gdb/configure.tgt b/gdb/configure.tgt index 3dc6875deec..a80a5b6a372 100644 --- a/gdb/configure.tgt +++ b/gdb/configure.tgt @@ -169,6 +169,8 @@ mips*-dec-mach3*) gdb_target=mach3 ;; mips*-dec-*) gdb_target=decstation ;; mips64*el-*-ecoff*) gdb_target=embedl64 ;; mips64*-*-ecoff*) gdb_target=embed64 ;; +mips64*vr4xxx*el-*-elf*)gdb_target=vr4xxxel ;; +mips64*vr4xxx*-*-elf*) gdb_target=vr4xxx ;; mips64*vr4300*el-*-elf*) gdb_target=vr4300el ;; mips64*vr4300*-*-elf*) gdb_target=vr4300 ;; mips64*vr4100*el-*-elf*) gdb_target=vr4300el ;; diff --git a/gdb/corefile.c b/gdb/corefile.c index f41cc55b66e..ea9ce8550d2 100644 --- a/gdb/corefile.c +++ b/gdb/corefile.c @@ -90,7 +90,7 @@ core_file_command (filename, from_tty) symfile = t->to_core_file_to_sym_file (filename); if (symfile) { - char *symfile_copy = strdup (symfile); + char *symfile_copy = xstrdup (symfile); make_cleanup (free, symfile_copy); symbol_file_command (symfile_copy, from_tty); @@ -185,7 +185,7 @@ reopen_exec_file () return; /* If the timestamp of the exec file has changed, reopen it. */ - filename = strdup (bfd_get_filename (exec_bfd)); + filename = xstrdup (bfd_get_filename (exec_bfd)); make_cleanup (free, filename); mtime = bfd_get_mtime (exec_bfd); res = stat (filename, &st); diff --git a/gdb/dbxread.c b/gdb/dbxread.c index 368880d59f6..9e72314b59c 100644 --- a/gdb/dbxread.c +++ b/gdb/dbxread.c @@ -604,6 +604,7 @@ dbx_symfile_read (objfile, mainline) || (0 == strncmp (bfd_get_target (sym_bfd), "som", 3)) || (0 == strncmp (bfd_get_target (sym_bfd), "coff", 4)) || (0 == strncmp (bfd_get_target (sym_bfd), "pe", 2)) + || (0 == strncmp (bfd_get_target (sym_bfd), "epoc-pe", 7)) || (0 == strncmp (bfd_get_target (sym_bfd), "nlm", 3))); val = bfd_seek (sym_bfd, DBX_SYMTAB_OFFSET (objfile), SEEK_SET); diff --git a/gdb/dcache.c b/gdb/dcache.c index 5f09ca88686..c43413965ae 100644 --- a/gdb/dcache.c +++ b/gdb/dcache.c @@ -538,6 +538,13 @@ dcache_info (exp, tty) } } +/* Turn dcache on or off. */ +void +set_dcache_state (int what) +{ + dcache_enabled_p = !!what; +} + void _initialize_dcache () { diff --git a/gdb/dcache.h b/gdb/dcache.h index 0a80cab19e6..78d17efd181 100644 --- a/gdb/dcache.h +++ b/gdb/dcache.h @@ -48,4 +48,8 @@ int dcache_xfer_memory PARAMS ((DCACHE * cache, CORE_ADDR mem, char *my, int len /* Write the bytes at ADDR into the data cache and the remote machine. */ int dcache_poke_block PARAMS ((DCACHE * cache, CORE_ADDR mem, char *my, int len)); + +/* Turn dcache state on or off */ +void set_dcache_state (int); + #endif /* DCACHE_H */ diff --git a/gdb/defs.h b/gdb/defs.h index 3d8f83007b2..99a9eb6b583 100644 --- a/gdb/defs.h +++ b/gdb/defs.h @@ -689,6 +689,8 @@ struct continuation continuation; /* In infrun.c. */ extern struct continuation *cmd_continuation; +/* Used only by the step_1 function. */ +extern struct continuation *intermediate_continuation; /* From utils.c */ extern void add_continuation (void (*)(struct continuation_arg *), @@ -696,6 +698,11 @@ extern void add_continuation (void (*)(struct continuation_arg *), extern void do_all_continuations (void); extern void discard_all_continuations (void); +extern void add_intermediate_continuation (void (*)(struct continuation_arg *), + struct continuation_arg *); +extern void do_all_intermediate_continuations (void); +extern void discard_all_intermediate_continuations (void); + /* String containing the current directory (what getwd would return). */ extern char *current_directory; @@ -1181,6 +1188,11 @@ extern int event_loop_p; extern void (*init_ui_hook) (char *argv0); extern void (*command_loop_hook) (void); +extern void (*show_load_progress) (const char *section, + unsigned long section_sent, + unsigned long section_size, + unsigned long total_sent, + unsigned long total_size); /* NOTE: cagney/1999-10-14: fputs_unfiltered_hook is deprecated. Instead code wanting to control GDB's output should be overriding the gdb_std* files. */ diff --git a/gdb/exec.c b/gdb/exec.c index 8a7da9df88a..6381e63e358 100644 --- a/gdb/exec.c +++ b/gdb/exec.c @@ -227,7 +227,7 @@ exec_file_attach (args, from_tty) same malloc'd string. However exec_close() will attempt to free it via the exec_bfd->name pointer, so we need to make another copy and leave exec_bfd as the new owner of the original copy. */ - scratch_pathname = strdup (scratch_pathname); + scratch_pathname = xstrdup (scratch_pathname); make_cleanup (free, scratch_pathname); if (!bfd_check_format (exec_bfd, bfd_object)) diff --git a/gdb/findvar.c b/gdb/findvar.c index 3ff8eccb656..163e9f7905a 100644 --- a/gdb/findvar.c +++ b/gdb/findvar.c @@ -258,25 +258,6 @@ store_address (addr, len, val) store_unsigned_integer (addr, len, val); } -/* Swap LEN bytes at BUFFER between target and host byte-order. */ -#define SWAP_FLOATING(buffer,len) \ - do \ - { \ - if (TARGET_BYTE_ORDER != HOST_BYTE_ORDER) \ - { \ - char tmp; \ - char *p = (char *)(buffer); \ - char *q = ((char *)(buffer)) + len - 1; \ - for (; p < q; p++, q--) \ - { \ - tmp = *q; \ - *q = *p; \ - *p = tmp; \ - } \ - } \ - } \ - while (0) - /* Extract a floating-point number from a target-order byte-stream at ADDR. Returns the value as type DOUBLEST. @@ -680,20 +661,22 @@ registers_fetched () register_valid[i] = 1; } -/* read_register_bytes and write_register_bytes are generally a *BAD* idea. - They are inefficient because they need to check for partial updates, which - can only be done by scanning through all of the registers and seeing if the - bytes that are being read/written fall inside of an invalid register. [The - main reason this is necessary is that register sizes can vary, so a simple - index won't suffice.] It is far better to call read_register_gen if you - want to get at the raw register contents, as it only takes a regno as an - argument, and therefore can't do a partial register update. It would also - be good to have a write_register_gen for similar reasons. - - Prior to the recent fixes to check for partial updates, both read and - write_register_bytes always checked to see if any registers were stale, and - then called target_fetch_registers (-1) to update the whole set. This - caused really slowed things down for remote targets. */ +/* read_register_bytes and write_register_bytes are generally a *BAD* + idea. They are inefficient because they need to check for partial + updates, which can only be done by scanning through all of the + registers and seeing if the bytes that are being read/written fall + inside of an invalid register. [The main reason this is necessary + is that register sizes can vary, so a simple index won't suffice.] + It is far better to call read_register_gen and write_register_gen + if you want to get at the raw register contents, as it only takes a + regno as an argument, and therefore can't do a partial register + update. + + Prior to the recent fixes to check for partial updates, both read + and write_register_bytes always checked to see if any registers + were stale, and then called target_fetch_registers (-1) to update + the whole set. This caused really slowed things down for remote + targets. */ /* Copy INLEN bytes of consecutive data from registers starting with the INREGBYTE'th byte of register data @@ -720,7 +703,6 @@ read_register_bytes (inregbyte, myaddr, inlen) for (regno = 0; regno < NUM_REGS; regno++) { int regstart, regend; - int startin, endin; if (register_valid[regno]) continue; @@ -731,15 +713,12 @@ read_register_bytes (inregbyte, myaddr, inlen) regstart = REGISTER_BYTE (regno); regend = regstart + REGISTER_RAW_SIZE (regno); - startin = regstart >= inregbyte && regstart < inregend; - endin = regend > inregbyte && regend <= inregend; - - if (!startin && !endin) + if (regend <= inregbyte || inregend <= regstart) + /* The range the user wants to read doesn't overlap with regno. */ continue; /* We've found an invalid register where at least one byte will be read. Update it from the target. */ - target_fetch_registers (regno); if (!register_valid[regno]) @@ -832,40 +811,41 @@ write_register_bytes (myregstart, myaddr, inlen) for (regno = 0; regno < NUM_REGS; regno++) { int regstart, regend; - int startin, endin; - char regbuf[MAX_REGISTER_RAW_SIZE]; regstart = REGISTER_BYTE (regno); regend = regstart + REGISTER_RAW_SIZE (regno); - startin = regstart >= myregstart && regstart < myregend; - endin = regend > myregstart && regend <= myregend; + /* Is this register completely outside the range the user is writing? */ + if (myregend <= regstart || regend <= myregstart) + /* do nothing */ ; - if (!startin && !endin) - continue; /* Register is completely out of range */ + /* Is this register completely within the range the user is writing? */ + else if (myregstart <= regstart && regend <= myregend) + write_register_gen (regno, myaddr + (regstart - myregstart)); - if (startin && endin) /* register is completely in range */ + /* The register partially overlaps the range being written. */ + else { - write_register_gen (regno, myaddr + (regstart - myregstart)); - continue; - } + char regbuf[MAX_REGISTER_RAW_SIZE]; + /* What's the overlap between this register's bytes and + those the caller wants to write? */ + int overlapstart = max (regstart, myregstart); + int overlapend = min (regend, myregend); - /* We may be doing a partial update of an invalid register. Update it - from the target before scribbling on it. */ - read_register_gen (regno, regbuf); - - if (startin) - memcpy (registers + regstart, - myaddr + regstart - myregstart, - myregend - regstart); - else /* endin */ - memcpy (registers + myregstart, - myaddr, - regend - myregstart); - target_store_registers (regno); + /* We may be doing a partial update of an invalid register. + Update it from the target before scribbling on it. */ + read_register_gen (regno, regbuf); + + memcpy (registers + overlapstart, + myaddr + (overlapstart - myregstart), + overlapend - overlapstart); + + target_store_registers (regno); + } } } + /* Return the raw contents of register REGNO, regarding it as an integer. */ /* This probably should be returning LONGEST rather than CORE_ADDR. */ diff --git a/gdb/fork-child.c b/gdb/fork-child.c index 33cbb33559e..ae11791df67 100644 --- a/gdb/fork-child.c +++ b/gdb/fork-child.c @@ -28,6 +28,7 @@ #include "gdbcore.h" #include "terminal.h" #include "gdbthread.h" +#include "command.h" /* for dont_repeat () */ #include <signal.h> diff --git a/gdb/gdbtypes.c b/gdb/gdbtypes.c index e8917d06855..6a2fb1dfee4 100644 --- a/gdb/gdbtypes.c +++ b/gdb/gdbtypes.c @@ -66,6 +66,10 @@ struct type *builtin_type_int64; struct type *builtin_type_uint64; struct type *builtin_type_bool; struct type *builtin_type_v4sf; +struct type *builtin_type_v4si; +struct type *builtin_type_v8qi; +struct type *builtin_type_v4hi; +struct type *builtin_type_v2si; int opaque_type_resolution = 1; @@ -644,7 +648,7 @@ create_set_type (result_type, domain_type) init_simd_type ("__builtin_v4sf", builtin_type_float, "f", 4) The type returned is a permanent type, allocated using malloc; it doesn't live in any objfile's obstack. */ -struct type * +static struct type * init_simd_type (char *name, struct type *elt_type, char *elt_name, @@ -2968,6 +2972,14 @@ build_gdbtypes () /* Build SIMD types. */ builtin_type_v4sf = init_simd_type ("__builtin_v4sf", builtin_type_float, "f", 4); + builtin_type_v4si + = init_simd_type ("__builtin_v4si", builtin_type_int32, "f", 4); + builtin_type_v8qi + = init_simd_type ("__builtin_v8qi", builtin_type_int8, "f", 8); + builtin_type_v4hi + = init_simd_type ("__builtin_v4hi", builtin_type_int16, "f", 4); + builtin_type_v2si + = init_simd_type ("__builtin_v2si", builtin_type_int32, "f", 2); } @@ -3007,5 +3019,9 @@ _initialize_gdbtypes () register_gdbarch_swap (&builtin_type_int64, sizeof (struct type *), NULL); register_gdbarch_swap (&builtin_type_uint64, sizeof (struct type *), NULL); register_gdbarch_swap (&builtin_type_v4sf, sizeof (struct type *), NULL); + register_gdbarch_swap (&builtin_type_v4si, sizeof (struct type *), NULL); + register_gdbarch_swap (&builtin_type_v8qi, sizeof (struct type *), NULL); + register_gdbarch_swap (&builtin_type_v4hi, sizeof (struct type *), NULL); + register_gdbarch_swap (&builtin_type_v2si, sizeof (struct type *), NULL); register_gdbarch_swap (NULL, 0, build_gdbtypes); } diff --git a/gdb/gdbtypes.h b/gdb/gdbtypes.h index f723c79fee0..923b0b1086a 100644 --- a/gdb/gdbtypes.h +++ b/gdb/gdbtypes.h @@ -855,7 +855,13 @@ extern struct type *builtin_type_int32; extern struct type *builtin_type_uint32; extern struct type *builtin_type_int64; extern struct type *builtin_type_uint64; + +/* SIMD types. We inherit these names from GCC. */ extern struct type *builtin_type_v4sf; +extern struct type *builtin_type_v4si; +extern struct type *builtin_type_v8qi; +extern struct type *builtin_type_v4hi; +extern struct type *builtin_type_v2si; /* We use this for the '/c' print format, because builtin_type_char is just a one-byte integral type, which languages less laid back than diff --git a/gdb/go32-nat.c b/gdb/go32-nat.c index dae43439988..2620dcd9332 100644 --- a/gdb/go32-nat.c +++ b/gdb/go32-nat.c @@ -692,7 +692,7 @@ go32_create_inferior (char *exec_file, char *args, char **env) error ("Syntax error in command line."); } else - child_cmd.command = strdup (args); + child_cmd.command = xstrdup (args); cmdline = (char *) alloca (strlen (args) + 4); cmdline[0] = strlen (args); diff --git a/gdb/hppah-nat.c b/gdb/hppah-nat.c index 03157ed2eca..643232c9116 100644 --- a/gdb/hppah-nat.c +++ b/gdb/hppah-nat.c @@ -698,6 +698,8 @@ require_notification_of_events (pid) #if defined(PT_SET_EVENT_MASK) int pt_status; ptrace_event_t ptrace_events; + int nsigs; + int signum; /* Instruct the kernel as to the set of events we wish to be informed of. (This support does not exist before HPUX 10.0. @@ -709,7 +711,29 @@ require_notification_of_events (pid) the kernel to keep certain signals hidden from us, we do it by calling sigdelset (ptrace_events.pe_signals, signal) for each such signal here, before doing PT_SET_EVENT_MASK. */ - sigemptyset (&ptrace_events.pe_signals); + /* RM: The above comment is no longer true. We start with ignoring + all signals, and then add the ones we are interested in. We could + do it the other way: start by looking at all signals and then + deleting the ones that we aren't interested in, except that + multiple gdb signals may be mapped to the same host signal + (eg. TARGET_SIGNAL_IO and TARGET_SIGNAL_POLL both get mapped to + signal 22 on HPUX 10.20) We want to be notified if we are + interested in either signal. */ + sigfillset (&ptrace_events.pe_signals); + + /* RM: Let's not bother with signals we don't care about */ + nsigs = (int) TARGET_SIGNAL_LAST; + for (signum = nsigs; signum > 0; signum--) + { + if ((signal_stop_state (signum)) || + (signal_print_state (signum)) || + (!signal_pass_state (signum))) + { + if (target_signal_to_host_p (signum)) + sigdelset (&ptrace_events.pe_signals, + target_signal_to_host (signum)); + } + } ptrace_events.pe_set_event = 0; diff --git a/gdb/i386-linux-nat.c b/gdb/i386-linux-nat.c index 15debfcfb59..ba1f9d28d1e 100644 --- a/gdb/i386-linux-nat.c +++ b/gdb/i386-linux-nat.c @@ -58,6 +58,13 @@ static int regmap[] = file may or may not define it, and even if it is defined, the kernel will return EIO if it's running on a pre-SSE processor. + PTRACE_GETXFPREGS is a Cygnus invention, since we wrote our own + Linux kernel patch for SSE support. That patch may or may not + actually make it into the official distribution. If you find that + years have gone by since this stuff was added, and Linux isn't + using PTRACE_GETXFPREGS, that means that our patch didn't make it, + and you can delete this, and the related code. + My instinct is to attach this to some architecture- or target-specific data structure, but really, a particular GDB process can only run on top of one kernel at a time. So it's okay @@ -121,7 +128,7 @@ fill_gregset (gregset_t *gregsetp, { if (regno == -1) convert_to_gregset (gregsetp, registers, 0); - else + else if (regno >= 0 && regno < NUM_GREGS) { signed char valid[NUM_GREGS]; memset (valid, 0, sizeof (valid)); diff --git a/gdb/i386b-nat.c b/gdb/i386b-nat.c index 642b19b5a92..dfa0a70b913 100644 --- a/gdb/i386b-nat.c +++ b/gdb/i386b-nat.c @@ -26,6 +26,7 @@ #include <machine/reg.h> #include <machine/frame.h> #include "inferior.h" +#include "gdbcore.h" /* for registers_fetched() */ void fetch_inferior_registers (regno) diff --git a/gdb/inf-loop.c b/gdb/inf-loop.c index 487aa57a0e4..ed60cc32301 100644 --- a/gdb/inf-loop.c +++ b/gdb/inf-loop.c @@ -78,6 +78,12 @@ inferior_event_handler (enum inferior_event_type event_type, complete_execution (); break; + case INF_EXEC_CONTINUE: + /* Is there anything left to do for the command issued to + complete? */ + do_all_intermediate_continuations (); + break; + case INF_QUIT_REQ: /* FIXME: ezannoni 1999-10-04. This call should really be a target vector entry, so that it can be used for any kind of diff --git a/gdb/infcmd.c b/gdb/infcmd.c index ac093ed09e5..726c80d63f4 100644 --- a/gdb/infcmd.c +++ b/gdb/infcmd.c @@ -88,6 +88,8 @@ static void signal_command PARAMS ((char *, int)); static void jump_command PARAMS ((char *, int)); static void step_1 PARAMS ((int, int, char *)); +static void step_once (int skip_subroutines, int single_inst, int count); +static void step_1_continuation (struct continuation_arg *arg); void nexti_command PARAMS ((char *, int)); @@ -472,11 +474,131 @@ step_1 (skip_subroutines, single_inst, count_string) if (!single_inst || skip_subroutines) /* leave si command alone */ { enable_longjmp_breakpoint (); - cleanups = make_cleanup ((make_cleanup_func) disable_longjmp_breakpoint, - 0); + if (!event_loop_p || !target_can_async_p ()) + cleanups = make_cleanup ((make_cleanup_func) disable_longjmp_breakpoint, + 0); + else + make_exec_cleanup ((make_cleanup_func) disable_longjmp_breakpoint, 0); } - for (; count > 0; count--) + /* In synchronous case, all is well, just use the regular for loop. */ + if (!event_loop_p || !target_can_async_p ()) + { + for (; count > 0; count--) + { + clear_proceed_status (); + + frame = get_current_frame (); + if (!frame) /* Avoid coredump here. Why tho? */ + error ("No current frame"); + step_frame_address = FRAME_FP (frame); + step_sp = read_sp (); + + if (!single_inst) + { + find_pc_line_pc_range (stop_pc, &step_range_start, &step_range_end); + if (step_range_end == 0) + { + char *name; + if (find_pc_partial_function (stop_pc, &name, &step_range_start, + &step_range_end) == 0) + error ("Cannot find bounds of current function"); + + target_terminal_ours (); + printf_filtered ("\ +Single stepping until exit from function %s, \n\ +which has no line number information.\n", name); + } + } + else + { + /* Say we are stepping, but stop after one insn whatever it does. */ + step_range_start = step_range_end = 1; + if (!skip_subroutines) + /* It is stepi. + Don't step over function calls, not even to functions lacking + line numbers. */ + step_over_calls = 0; + } + + if (skip_subroutines) + step_over_calls = 1; + + step_multi = (count > 1); + proceed ((CORE_ADDR) -1, TARGET_SIGNAL_DEFAULT, 1); + + if (!stop_step) + break; + + /* FIXME: On nexti, this may have already been done (when we hit the + step resume break, I think). Probably this should be moved to + wait_for_inferior (near the top). */ +#if defined (SHIFT_INST_REGS) + SHIFT_INST_REGS (); +#endif + } + + if (!single_inst || skip_subroutines) + do_cleanups (cleanups); + return; + } + /* In case of asynchronous target things get complicated, do only + one step for now, before returning control to the event loop. Let + the continuation figure out how many other steps we need to do, + and handle them one at the time, through step_once(). */ + else + { + if (event_loop_p && target_can_async_p ()) + step_once (skip_subroutines, single_inst, count); + } +} + +/* Called after we are done with one step operation, to check whether + we need to step again, before we print the prompt and return control + to the user. If count is > 1, we will need to do one more call to + proceed(), via step_once(). Basically it is like step_once and + step_1_continuation are co-recursive. */ +static void +step_1_continuation (arg) + struct continuation_arg *arg; +{ + int count; + int skip_subroutines; + int single_inst; + + skip_subroutines = (int) arg->data; + single_inst = (int) (arg->next)->data; + count = (int) ((arg->next)->next)->data; + + if (stop_step) + { + /* FIXME: On nexti, this may have already been done (when we hit the + step resume break, I think). Probably this should be moved to + wait_for_inferior (near the top). */ +#if defined (SHIFT_INST_REGS) + SHIFT_INST_REGS (); +#endif + step_once (skip_subroutines, single_inst, count - 1); + } + else + if (!single_inst || skip_subroutines) + do_exec_cleanups (ALL_CLEANUPS); +} + +/* Do just one step operation. If count >1 we will have to set up a + continuation to be done after the target stops (after this one + step). This is useful to implement the 'step n' kind of commands, in + case of asynchronous targets. We had to split step_1 into two parts, + one to be done before proceed() and one afterwards. This function is + called in case of step n with n>1, after the first step operation has + been completed.*/ +static void +step_once (int skip_subroutines, int single_inst, int count) +{ + struct continuation_arg *arg1; struct continuation_arg *arg2; + struct continuation_arg *arg3; struct frame_info *frame; + + if (count > 0) { clear_proceed_status (); @@ -517,21 +639,23 @@ which has no line number information.\n", name); step_over_calls = 1; step_multi = (count > 1); + arg1 = + (struct continuation_arg *) xmalloc (sizeof (struct continuation_arg)); + arg2 = + (struct continuation_arg *) xmalloc (sizeof (struct continuation_arg)); + arg3 = + (struct continuation_arg *) xmalloc (sizeof (struct continuation_arg)); + arg1->next = arg2; + arg1->data = (PTR) skip_subroutines; + arg2->next = arg3; + arg2->data = (PTR) single_inst; + arg3->next = NULL; + arg3->data = (PTR) count; + add_intermediate_continuation (step_1_continuation, arg1); proceed ((CORE_ADDR) -1, TARGET_SIGNAL_DEFAULT, 1); - if (!stop_step) - break; - - /* FIXME: On nexti, this may have already been done (when we hit the - step resume break, I think). Probably this should be moved to - wait_for_inferior (near the top). */ -#if defined (SHIFT_INST_REGS) - SHIFT_INST_REGS (); -#endif } - - if (!single_inst || skip_subroutines) - do_cleanups (cleanups); } + /* Continue program at specified address. */ diff --git a/gdb/inflow.c b/gdb/inflow.c index c2b6d567ec8..3747a7d73d5 100644 --- a/gdb/inflow.c +++ b/gdb/inflow.c @@ -52,6 +52,10 @@ #endif #endif /* sgtty */ +#ifdef HAVE_SYS_IOCTL_H +#include <sys/ioctl.h> +#endif + #if defined (SIGIO) && defined (FASYNC) && defined (FD_SET) && defined (F_SETOWN) static void handle_sigio PARAMS ((int)); diff --git a/gdb/infptrace.c b/gdb/infptrace.c index 32bd52cc545..a21eaa17f99 100644 --- a/gdb/infptrace.c +++ b/gdb/infptrace.c @@ -24,7 +24,13 @@ #include "inferior.h" #include "target.h" #include "gdb_string.h" -#include "wait.h" +#ifdef HAVE_WAIT_H +#include <wait.h> +#else +#ifdef HAVE_SYS_WAIT_H +#include <sys/wait.h> +#endif +#endif #include "command.h" #ifdef USG diff --git a/gdb/infrun.c b/gdb/infrun.c index c00da0a882b..7e37228a0b5 100644 --- a/gdb/infrun.c +++ b/gdb/infrun.c @@ -270,7 +270,7 @@ static int use_thread_step_needed = USE_THREAD_STEP_NEEDED; #ifndef SKIP_PERMANENT_BREAKPOINT #define SKIP_PERMANENT_BREAKPOINT (default_skip_permanent_breakpoint) static void -default_skip_permanent_breakpoint () +default_skip_permanent_breakpoint (void) { error_begin (); fprintf_filtered (gdb_stderr, "\ @@ -1341,7 +1341,10 @@ fetch_inferior_event (client_data) if there are any. */ do_exec_cleanups (old_cleanups); normal_stop (); - inferior_event_handler (INF_EXEC_COMPLETE, NULL); + if (step_multi && stop_step) + inferior_event_handler (INF_EXEC_CONTINUE, NULL); + else + inferior_event_handler (INF_EXEC_COMPLETE, NULL); } } @@ -1351,6 +1354,7 @@ fetch_inferior_event (client_data) void init_execution_control_state (struct execution_control_state *ecs) { + /* ecs->another_trap? */ ecs->random_signal = 0; ecs->remove_breakpoints_on_following_step = 0; ecs->handling_longjmp = 0; /* FIXME */ @@ -1897,35 +1901,43 @@ handle_inferior_event (struct execution_control_state *ecs) /* It's a SIGTRAP or a signal we're interested in. Switch threads, and fall into the rest of wait_for_inferior(). */ - /* Save infrun state for the old thread. */ - save_infrun_state (inferior_pid, prev_pc, - prev_func_start, prev_func_name, - trap_expected, step_resume_breakpoint, - through_sigtramp_breakpoint, - step_range_start, step_range_end, - step_frame_address, ecs->handling_longjmp, - ecs->another_trap, - ecs->stepping_through_solib_after_catch, - ecs->stepping_through_solib_catchpoints, - ecs->stepping_through_sigtramp); - + /* Caution: it may happen that the new thread (or the old one!) + is not in the thread list. In this case we must not attempt + to "switch context", or we run the risk that our context may + be lost. This may happen as a result of the target module + mishandling thread creation. */ + + if (in_thread_list (inferior_pid) && in_thread_list (ecs->pid)) + { /* Perform infrun state context switch: */ + /* Save infrun state for the old thread. */ + save_infrun_state (inferior_pid, prev_pc, + prev_func_start, prev_func_name, + trap_expected, step_resume_breakpoint, + through_sigtramp_breakpoint, + step_range_start, step_range_end, + step_frame_address, ecs->handling_longjmp, + ecs->another_trap, + ecs->stepping_through_solib_after_catch, + ecs->stepping_through_solib_catchpoints, + ecs->stepping_through_sigtramp); + + /* Load infrun state for the new thread. */ + load_infrun_state (ecs->pid, &prev_pc, + &prev_func_start, &prev_func_name, + &trap_expected, &step_resume_breakpoint, + &through_sigtramp_breakpoint, + &step_range_start, &step_range_end, + &step_frame_address, &ecs->handling_longjmp, + &ecs->another_trap, + &ecs->stepping_through_solib_after_catch, + &ecs->stepping_through_solib_catchpoints, + &ecs->stepping_through_sigtramp); + } if (may_switch_from_inferior_pid) switched_from_inferior_pid = inferior_pid; inferior_pid = ecs->pid; - /* Load infrun state for the new thread. */ - load_infrun_state (inferior_pid, &prev_pc, - &prev_func_start, &prev_func_name, - &trap_expected, &step_resume_breakpoint, - &through_sigtramp_breakpoint, - &step_range_start, &step_range_end, - &step_frame_address, &ecs->handling_longjmp, - &ecs->another_trap, - &ecs->stepping_through_solib_after_catch, - &ecs->stepping_through_solib_catchpoints, - &ecs->stepping_through_sigtramp); - if (context_hook) context_hook (pid_to_thread_id (ecs->pid)); diff --git a/gdb/jv-typeprint.c b/gdb/jv-typeprint.c index 884bc127046..c7bd349f311 100644 --- a/gdb/jv-typeprint.c +++ b/gdb/jv-typeprint.c @@ -281,7 +281,7 @@ java_type_print_base (type, stream, show, level) DMGL_ANSI | DMGL_PARAMS | DMGL_JAVA); if (demangled_name == NULL) - demangled_name = strdup (mangled_name); + demangled_name = xstrdup (mangled_name); { char *demangled_no_class; diff --git a/gdb/kod-cisco.c b/gdb/kod-cisco.c index ac82635d723..06ea9a7b311 100644 --- a/gdb/kod-cisco.c +++ b/gdb/kod-cisco.c @@ -85,7 +85,7 @@ cisco_kod_open (kod_display_callback_ftype *display_func, /* Return name, version, and description. I hope we have enough space. */ - return (strdup ("gdbkodcisco v0.0.0 - Cisco Kernel Object Display")); + return (xstrdup ("gdbkodcisco v0.0.0 - Cisco Kernel Object Display")); } /* Close the connection. */ diff --git a/gdb/kod.c b/gdb/kod.c index e9b5ebc0890..0a90677746c 100644 --- a/gdb/kod.c +++ b/gdb/kod.c @@ -145,7 +145,7 @@ kod_set_os (char *arg, int from_tty, struct cmd_list_element *command) delete_cmd (old_operating_system, &infolist); free (old_operating_system); } - old_operating_system = strdup (operating_system); + old_operating_system = xstrdup (operating_system); if (! operating_system || ! *operating_system) { diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c index a6f689b521f..97076b40dff 100644 --- a/gdb/mips-tdep.c +++ b/gdb/mips-tdep.c @@ -35,6 +35,9 @@ #include "target.h" #include "opcode/mips.h" +#include "elf/mips.h" +#include "elf-bfd.h" + struct frame_extra_info { @@ -70,6 +73,56 @@ static enum mips_fpu_type mips_fpu_type = MIPS_DEFAULT_FPU_TYPE; #endif +/* MIPS specific per-architecture information */ +struct gdbarch_tdep + { + /* from the elf header */ + int elf_flags; + /* mips options */ + int mips_eabi; + enum mips_fpu_type mips_fpu_type; + int mips_last_arg_regnum; + int mips_last_fp_arg_regnum; + int mips_saved_regsize; + int mips_fp_register_double; + }; + +#if GDB_MULTI_ARCH +#undef MIPS_EABI +#define MIPS_EABI (gdbarch_tdep (current_gdbarch)->mips_eabi) +#endif + +#if GDB_MULTI_ARCH +#undef MIPS_LAST_FP_ARG_REGNUM +#define MIPS_LAST_FP_ARG_REGNUM (gdbarch_tdep (current_gdbarch)->mips_last_fp_arg_regnum) +#endif + +#if GDB_MULTI_ARCH +#undef MIPS_LAST_ARG_REGNUM +#define MIPS_LAST_ARG_REGNUM (gdbarch_tdep (current_gdbarch)->mips_last_arg_regnum) +#endif + +#if GDB_MULTI_ARCH +#undef MIPS_FPU_TYPE +#define MIPS_FPU_TYPE (gdbarch_tdep (current_gdbarch)->mips_fpu_type) +#endif + +#if GDB_MULTI_ARCH +#undef MIPS_SAVED_REGSIZE +#define MIPS_SAVED_REGSIZE (gdbarch_tdep (current_gdbarch)->mips_saved_regsize) +#endif + +/* Indicate that the ABI makes use of double-precision registers + provided by the FPU (rather than combining pairs of registers to + form double-precision values). Do not use "TARGET_IS_MIPS64" to + determine if the ABI is using double-precision registers. See also + MIPS_FPU_TYPE. */ +#if GDB_MULTI_ARCH +#undef FP_REGISTER_DOUBLE +#define FP_REGISTER_DOUBLE (gdbarch_tdep (current_gdbarch)->mips_fp_register_double) +#endif + + #define VM_MIN_ADDRESS (CORE_ADDR)0x400000 #if 0 @@ -3130,6 +3183,10 @@ set_mipsfpu_single_command (args, from_tty) { mips_fpu_type = MIPS_FPU_SINGLE; mips_fpu_type_auto = 0; + if (GDB_MULTI_ARCH) + { + gdbarch_tdep (current_gdbarch)->mips_fpu_type = MIPS_FPU_SINGLE; + } } static void set_mipsfpu_double_command PARAMS ((char *, int)); @@ -3140,6 +3197,10 @@ set_mipsfpu_double_command (args, from_tty) { mips_fpu_type = MIPS_FPU_DOUBLE; mips_fpu_type_auto = 0; + if (GDB_MULTI_ARCH) + { + gdbarch_tdep (current_gdbarch)->mips_fpu_type = MIPS_FPU_DOUBLE; + } } static void set_mipsfpu_none_command PARAMS ((char *, int)); @@ -3150,6 +3211,10 @@ set_mipsfpu_none_command (args, from_tty) { mips_fpu_type = MIPS_FPU_NONE; mips_fpu_type_auto = 0; + if (GDB_MULTI_ARCH) + { + gdbarch_tdep (current_gdbarch)->mips_fpu_type = MIPS_FPU_NONE; + } } static void set_mipsfpu_auto_command PARAMS ((char *, int)); @@ -3565,12 +3630,256 @@ mips_call_dummy_address () +static gdbarch_init_ftype mips_gdbarch_init; +static struct gdbarch * +mips_gdbarch_init (info, arches) + struct gdbarch_info info; + struct gdbarch_list *arches; +{ + static LONGEST mips_call_dummy_words[] = + {0}; + struct gdbarch *gdbarch; + struct gdbarch_tdep *tdep; + int elf_flags; + char *ef_mips_abi; + int ef_mips_bitptrs; + int ef_mips_arch; + + /* Extract the elf_flags if available */ + if (info.abfd != NULL + && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour) + elf_flags = elf_elfheader (info.abfd)->e_flags; + else + elf_flags = 0; + + /* try to find a pre-existing architecture */ + for (arches = gdbarch_list_lookup_by_info (arches, &info); + arches != NULL; + arches = gdbarch_list_lookup_by_info (arches->next, &info)) + { + /* MIPS needs to be pedantic about which ABI the object is + using. */ + if (gdbarch_tdep (current_gdbarch)->elf_flags != elf_flags) + continue; + return arches->gdbarch; + } + + /* Need a new architecture. Fill in a target specific vector. */ + tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep)); + gdbarch = gdbarch_alloc (&info, tdep); + tdep->elf_flags = elf_flags; + + /* Initially set everything according to the ABI. */ + set_gdbarch_short_bit (gdbarch, 16); + set_gdbarch_int_bit (gdbarch, 32); + set_gdbarch_float_bit (gdbarch, 32); + set_gdbarch_double_bit (gdbarch, 64); + set_gdbarch_long_double_bit (gdbarch, 64); + switch ((elf_flags & EF_MIPS_ABI)) + { + case E_MIPS_ABI_O32: + ef_mips_abi = "o32"; + tdep->mips_eabi = 0; + tdep->mips_saved_regsize = 4; + tdep->mips_fp_register_double = 0; + set_gdbarch_long_bit (gdbarch, 32); + set_gdbarch_ptr_bit (gdbarch, 32); + set_gdbarch_long_long_bit (gdbarch, 64); + break; + case E_MIPS_ABI_O64: + ef_mips_abi = "o64"; + tdep->mips_eabi = 0; + tdep->mips_saved_regsize = 8; + tdep->mips_fp_register_double = 1; + set_gdbarch_long_bit (gdbarch, 32); + set_gdbarch_ptr_bit (gdbarch, 32); + set_gdbarch_long_long_bit (gdbarch, 64); + break; + case E_MIPS_ABI_EABI32: + ef_mips_abi = "eabi32"; + tdep->mips_eabi = 1; + tdep->mips_saved_regsize = 4; + tdep->mips_fp_register_double = 0; + set_gdbarch_long_bit (gdbarch, 32); + set_gdbarch_ptr_bit (gdbarch, 32); + set_gdbarch_long_long_bit (gdbarch, 64); + break; + case E_MIPS_ABI_EABI64: + ef_mips_abi = "eabi64"; + tdep->mips_eabi = 1; + tdep->mips_saved_regsize = 8; + tdep->mips_fp_register_double = 1; + set_gdbarch_long_bit (gdbarch, 64); + set_gdbarch_ptr_bit (gdbarch, 64); + set_gdbarch_long_long_bit (gdbarch, 64); + break; + default: + ef_mips_abi = "default"; + tdep->mips_eabi = 0; + tdep->mips_saved_regsize = MIPS_REGSIZE; + tdep->mips_fp_register_double = (REGISTER_VIRTUAL_SIZE (FP0_REGNUM) == 8); + set_gdbarch_long_bit (gdbarch, 32); + set_gdbarch_ptr_bit (gdbarch, 32); + set_gdbarch_long_long_bit (gdbarch, 64); + break; + } + + /* determine the ISA */ + switch (elf_flags & EF_MIPS_ARCH) + { + case E_MIPS_ARCH_1: + ef_mips_arch = 1; + break; + case E_MIPS_ARCH_2: + ef_mips_arch = 2; + break; + case E_MIPS_ARCH_3: + ef_mips_arch = 3; + break; + case E_MIPS_ARCH_4: + ef_mips_arch = 0; + break; + default: + break; + } + +#if 0 + /* determine the size of a pointer */ + if ((elf_flags & EF_MIPS_32BITPTRS)) + { + ef_mips_bitptrs = 32; + } + else if ((elf_flags & EF_MIPS_64BITPTRS)) + { + ef_mips_bitptrs = 64; + } + else + { + ef_mips_bitptrs = 0; + } +#endif + + /* Select either of the two alternative ABI's */ + if (tdep->mips_eabi) + { + /* EABI uses R4 through R11 for args */ + tdep->mips_last_arg_regnum = 11; + /* EABI uses F12 through F19 for args */ + tdep->mips_last_fp_arg_regnum = FP0_REGNUM + 19; + } + else + { + /* old ABI uses R4 through R7 for args */ + tdep->mips_last_arg_regnum = 7; + /* old ABI uses F12 through F15 for args */ + tdep->mips_last_fp_arg_regnum = FP0_REGNUM + 15; + } + + /* enable/disable the MIPS FPU */ + if (!mips_fpu_type_auto) + tdep->mips_fpu_type = mips_fpu_type; + else if (info.bfd_arch_info != NULL + && info.bfd_arch_info->arch == bfd_arch_mips) + switch (info.bfd_arch_info->mach) + { + case bfd_mach_mips4100: + tdep->mips_fpu_type = MIPS_FPU_NONE; + break; + default: + tdep->mips_fpu_type = MIPS_FPU_DOUBLE; + break; + } + else + tdep->mips_fpu_type = MIPS_FPU_DOUBLE; + + /* MIPS version of register names. NOTE: At present the MIPS + register name management is part way between the old - + #undef/#define REGISTER_NAMES and the new REGISTER_NAME(nr). + Further work on it is required. */ + set_gdbarch_register_name (gdbarch, mips_register_name); + set_gdbarch_read_pc (gdbarch, generic_target_read_pc); + set_gdbarch_write_pc (gdbarch, generic_target_write_pc); + set_gdbarch_read_fp (gdbarch, generic_target_read_fp); + set_gdbarch_write_fp (gdbarch, generic_target_write_fp); + set_gdbarch_read_sp (gdbarch, generic_target_read_sp); + set_gdbarch_write_sp (gdbarch, generic_target_write_sp); + + /* Initialize a frame */ + set_gdbarch_init_extra_frame_info (gdbarch, mips_init_extra_frame_info); + + /* MIPS version of CALL_DUMMY */ + + set_gdbarch_call_dummy_p (gdbarch, 1); + set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0); + set_gdbarch_use_generic_dummy_frames (gdbarch, 0); + set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT); + set_gdbarch_call_dummy_address (gdbarch, mips_call_dummy_address); + set_gdbarch_call_dummy_start_offset (gdbarch, 0); + set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); + set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0); + set_gdbarch_call_dummy_length (gdbarch, 0); + set_gdbarch_pc_in_call_dummy (gdbarch, pc_in_call_dummy_at_entry_point); + set_gdbarch_call_dummy_words (gdbarch, mips_call_dummy_words); + set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (mips_call_dummy_words)); + set_gdbarch_push_return_address (gdbarch, mips_push_return_address); + set_gdbarch_push_arguments (gdbarch, mips_push_arguments); + set_gdbarch_register_convertible (gdbarch, generic_register_convertible_not); + + set_gdbarch_frame_chain_valid (gdbarch, default_frame_chain_valid); + set_gdbarch_get_saved_register (gdbarch, default_get_saved_register); + + if (gdbarch_debug) + { + fprintf_unfiltered (gdb_stderr, + "mips_gdbarch_init: (info)elf_flags = 0x%x\n", + elf_flags); + fprintf_unfiltered (gdb_stderr, + "mips_gdbarch_init: (info)ef_mips_abi = %s\n", + ef_mips_abi); + fprintf_unfiltered (gdb_stderr, + "mips_gdbarch_init: (info)ef_mips_arch = %d\n", + ef_mips_arch); + fprintf_unfiltered (gdb_stderr, + "mips_gdbarch_init: (info)ef_mips_bitptrs = %d\n", + ef_mips_bitptrs); + fprintf_unfiltered (gdb_stderr, + "mips_gdbarch_init: MIPS_EABI = %d\n", + tdep->mips_eabi); + fprintf_unfiltered (gdb_stderr, + "mips_gdbarch_init: MIPS_LAST_ARG_REGNUM = %d\n", + tdep->mips_last_arg_regnum); + fprintf_unfiltered (gdb_stderr, + "mips_gdbarch_init: MIPS_LAST_FP_ARG_REGNUM = %d (%d)\n", + tdep->mips_last_fp_arg_regnum, + tdep->mips_last_fp_arg_regnum - FP0_REGNUM); + fprintf_unfiltered (gdb_stderr, + "mips_gdbarch_init: tdep->mips_fpu_type = %d (%s)\n", + tdep->mips_fpu_type, + (tdep->mips_fpu_type == MIPS_FPU_NONE ? "none" + : tdep->mips_fpu_type == MIPS_FPU_SINGLE ? "single" + : tdep->mips_fpu_type == MIPS_FPU_DOUBLE ? "double" + : "???")); + fprintf_unfiltered (gdb_stderr, + "mips_gdbarch_init: tdep->mips_saved_regsize = %d\n", + tdep->mips_saved_regsize); + fprintf_unfiltered (gdb_stderr, + "mips_gdbarch_init: tdep->mips_fp_register_double = %d (%s)\n", + tdep->mips_fp_register_double, + (tdep->mips_fp_register_double ? "true" : "false")); + } + + return gdbarch; +} + + void _initialize_mips_tdep () { static struct cmd_list_element *mipsfpulist = NULL; struct cmd_list_element *c; + if (GDB_MULTI_ARCH) + register_gdbarch_init (bfd_arch_mips, mips_gdbarch_init); if (!tm_print_insn) /* Someone may have already set it */ tm_print_insn = gdb_print_insn_mips; @@ -3602,6 +3911,7 @@ _initialize_mips_tdep () "Show current use of MIPS floating-point coprocessor target.", &showlist); +#if !GDB_MULTI_ARCH c = add_set_cmd ("processor", class_support, var_string_noescape, (char *) &tmp_mips_processor_type, "Set the type of MIPS processor in use.\n\ @@ -3614,6 +3924,7 @@ Set this to be able to access processor-type-specific registers.\n\ tmp_mips_processor_type = strsave (DEFAULT_MIPS_TYPE); mips_set_processor_type_command (strsave (DEFAULT_MIPS_TYPE), 0); +#endif /* We really would like to have both "0" and "unlimited" work, but command.c doesn't deal with that. So make it a var_zinteger diff --git a/gdb/mn10300-tdep.c b/gdb/mn10300-tdep.c index f884f054652..d6369600ea9 100644 --- a/gdb/mn10300-tdep.c +++ b/gdb/mn10300-tdep.c @@ -49,6 +49,13 @@ static char *mn10300_generic_register_names[] = "", "", "", "", "", "", "", "fp"}; static char **mn10300_register_names = mn10300_generic_register_names; +static char *am33_register_names[] = +{ + "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", + "sp", "pc", "mdr", "psw", "lir", "lar", "", + "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", + "ssp", "msp", "usp", "mcrh", "mcrl", "mcvf", "", "", ""}; +static int am33_mode; char * mn10300_register_name (i) @@ -205,6 +212,13 @@ set_movm_offsets (fi, movm_args) fi->saved_regs[D2_REGNUM] = fi->frame + offset; offset += 4; } + if (am33_mode && movm_args & 0x02) + { + fi->saved_regs[E0_REGNUM + 5] = fi->frame + offset; + fi->saved_regs[E0_REGNUM + 4] = fi->frame + offset + 4; + fi->saved_regs[E0_REGNUM + 3] = fi->frame + offset + 8; + fi->saved_regs[E0_REGNUM + 2] = fi->frame + offset + 12; + } } @@ -550,6 +564,13 @@ mn10300_frame_chain (fi) adjust += (fi->saved_regs[D3_REGNUM] ? 4 : 0); adjust += (fi->saved_regs[A2_REGNUM] ? 4 : 0); adjust += (fi->saved_regs[A3_REGNUM] ? 4 : 0); + if (am33_mode) + { + adjust += (fi->saved_regs[E0_REGNUM + 5] ? 4 : 0); + adjust += (fi->saved_regs[E0_REGNUM + 4] ? 4 : 0); + adjust += (fi->saved_regs[E0_REGNUM + 3] ? 4 : 0); + adjust += (fi->saved_regs[E0_REGNUM + 2] ? 4 : 0); + } /* Our caller does not have a frame pointer. So his frame starts at the base of our frame (fi->frame) + register save space @@ -740,6 +761,13 @@ mn10300_frame_saved_pc (fi) adjust += (fi->saved_regs[D3_REGNUM] ? 4 : 0); adjust += (fi->saved_regs[A2_REGNUM] ? 4 : 0); adjust += (fi->saved_regs[A3_REGNUM] ? 4 : 0); + if (am33_mode) + { + adjust += (fi->saved_regs[E0_REGNUM + 5] ? 4 : 0); + adjust += (fi->saved_regs[E0_REGNUM + 4] ? 4 : 0); + adjust += (fi->saved_regs[E0_REGNUM + 3] ? 4 : 0); + adjust += (fi->saved_regs[E0_REGNUM + 2] ? 4 : 0); + } return (read_memory_integer (fi->frame + adjust, REGISTER_SIZE)); } @@ -815,6 +843,13 @@ set_machine_hook (filename) mn10300_register_names = mn10300_generic_register_names; } + am33_mode = 0; + if (bfd_get_mach (exec_bfd) == bfd_mach_am33) + { + + mn10300_register_names = am33_register_names; + am33_mode = 1; + } } void diff --git a/gdb/objfiles.c b/gdb/objfiles.c index 1cdb175e353..ebcdcd49d12 100644 --- a/gdb/objfiles.c +++ b/gdb/objfiles.c @@ -486,7 +486,7 @@ free_objfile (objfile) if (objfile->static_psymbols.list) mfree (objfile->md, objfile->static_psymbols.list); /* Free the obstacks for non-reusable objfiles */ - obstack_free (&objfile->psymbol_cache.cache, 0); + free_bcache (&objfile->psymbol_cache); obstack_free (&objfile->psymbol_obstack, 0); obstack_free (&objfile->symbol_obstack, 0); obstack_free (&objfile->type_obstack, 0); diff --git a/gdb/remote-rdi.c b/gdb/remote-rdi.c index 73327628ece..01433c82375 100644 --- a/gdb/remote-rdi.c +++ b/gdb/remote-rdi.c @@ -236,7 +236,7 @@ device is attached to the remote system (e.g. /dev/ttya)."); /* split name after whitespace, pass tail as arg to open command */ - devName = strdup (name); + devName = xstrdup (name); p = strchr (devName, ' '); if (p) { @@ -1011,7 +1011,7 @@ rdilogfile_command (char *arg, int from_tty) if (log_filename) free (log_filename); - log_filename = strdup (arg); + log_filename = xstrdup (arg); Adp_SetLogfile (log_filename); } @@ -1050,7 +1050,7 @@ _initialize_remote_rdi () init_rdi_ops (); add_target (&arm_rdi_ops); - log_filename = strdup ("rdi.log"); + log_filename = xstrdup ("rdi.log"); Adp_SetLogfile (log_filename); Adp_SetLogEnable (log_enable); diff --git a/gdb/remote.c b/gdb/remote.c index e63813628a3..d66ec500cbd 100644 --- a/gdb/remote.c +++ b/gdb/remote.c @@ -112,7 +112,7 @@ static void extended_remote_async_create_inferior PARAMS ((char *, char *, char static void remote_mourn_1 PARAMS ((struct target_ops *)); -static void remote_send PARAMS ((char *buf)); +static void remote_send (char *buf, long sizeof_buf); static int readchar PARAMS ((int timeout)); @@ -139,7 +139,7 @@ static int remote_thread_alive PARAMS ((int)); static void get_offsets PARAMS ((void)); -static int read_frame PARAMS ((char *)); +static long read_frame (char *buf, long sizeof_buf); static int remote_insert_breakpoint PARAMS ((CORE_ADDR, char *)); @@ -497,9 +497,14 @@ register_remote_packet_sizes (void) static void build_remote_packet_sizes (void) { - /* Maximum number of characters in a packet. This default m68k-stub.c and - i386-stub.c stubs. */ - remote_packet_size = 400; + /* Default maximum number of characters in a packet body. Many + remote stubs have a hardwired buffer size of 400 bytes + (c.f. BUFMAX in m68k-stub.c and i386-stub.c). BUFMAX-1 is used + as the maximum packet-size to ensure that the packet and an extra + NUL character can always fit in the buffer. This stops GDB + trashing stubs that try to squeeze an extra NUL into what is + already a full buffer (As of 1999-12-04 that was most stubs. */ + remote_packet_size = 400 - 1; /* Should REGISTER_BYTES needs more space than the default, adjust the size accordingly. Remember that each byte is encoded as two characters. 32 is the overhead for the packet header / @@ -782,7 +787,7 @@ set_thread (th, gen) else sprintf (&buf[2], "%x", th); putpkt (buf); - getpkt (buf, 0); + getpkt (buf, PBUFSIZ, 0); if (gen) general_thread = th; else @@ -802,7 +807,7 @@ remote_thread_alive (tid) else sprintf (buf, "T%08x", tid); putpkt (buf); - getpkt (buf, 0); + getpkt (buf, sizeof (buf), 0); return (buf[0] == 'O' && buf[1] == 'K'); } @@ -1342,7 +1347,7 @@ remote_get_threadinfo (threadid, fieldset, info) pack_threadinfo_request (threadinfo_pkt, fieldset, threadid); putpkt (threadinfo_pkt); - getpkt (threadinfo_pkt, 0); + getpkt (threadinfo_pkt, PBUFSIZ, 0); result = remote_unpack_thread_info_response (threadinfo_pkt + 2, threadid, info); return result; @@ -1436,7 +1441,7 @@ remote_get_threadlist (startflag, nextthread, result_limit, pack_threadlist_request (threadlist_packet, startflag, result_limit, nextthread); putpkt (threadlist_packet); - getpkt (t_response, 0); + getpkt (t_response, PBUFSIZ, 0); *result_count = parse_threadlist_response (t_response + 2, result_limit, &echo_nextthread, @@ -1549,7 +1554,7 @@ remote_current_thread (oldpid) char *buf = alloca (PBUFSIZ); putpkt ("qC"); - getpkt (buf, 0); + getpkt (buf, PBUFSIZ, 0); if (buf[0] == 'Q' && buf[1] == 'C') return strtol (&buf[2], NULL, 16); else @@ -1578,7 +1583,8 @@ remote_threads_info (void) error ("Command can only be used when connected to the remote target."); putpkt ("qfThreadInfo"); - getpkt (bufp = buf, 0); + bufp = buf; + getpkt (bufp, PBUFSIZ, 0); if (bufp[0] == '\0') /* q packet not recognized! */ { /* try old jmetzler method */ remote_find_new_threads (); @@ -1595,7 +1601,8 @@ remote_threads_info (void) } while (*bufp++ == ','); /* comma-separated list */ putpkt ("qsThreadInfo"); - getpkt (bufp = buf, 0); + bufp = buf; + getpkt (bufp, PBUFSIZ, 0); } } @@ -1616,7 +1623,7 @@ extended_remote_restart () /* Now query for status so this looks just like we restarted gdbserver from scratch. */ putpkt ("?"); - getpkt (buf, 0); + getpkt (buf, PBUFSIZ, 0); } /* Clean up connection to a remote debugger. */ @@ -1644,7 +1651,7 @@ get_offsets () putpkt ("qOffsets"); - getpkt (buf, 0); + getpkt (buf, PBUFSIZ, 0); if (buf[0] == '\000') return; /* Return silently. Stub doesn't support @@ -1728,14 +1735,12 @@ get_offsets () */ static int -remote_cisco_section_offsets (text_addr, data_addr, bss_addr, - text_offs, data_offs, bss_offs) - bfd_vma text_addr; - bfd_vma data_addr; - bfd_vma bss_addr; - bfd_signed_vma *text_offs; - bfd_signed_vma *data_offs; - bfd_signed_vma *bss_offs; +remote_cisco_section_offsets (bfd_vma text_addr, + bfd_vma data_addr, + bfd_vma bss_addr, + bfd_signed_vma *text_offs, + bfd_signed_vma *data_offs, + bfd_signed_vma *bss_offs) { bfd_vma text_base, data_base, bss_base; struct minimal_symbol *start; @@ -1835,8 +1840,7 @@ remote_cisco_objfile_relocate (text_off, data_off, bss_off) /* Stub for catch_errors. */ static int -remote_start_remote_dummy (dummy) - char *dummy; +remote_start_remote_dummy (void *dummy) { start_remote (); /* Initialize gdb process mechanisms */ return 1; @@ -1989,7 +1993,7 @@ serial device is attached to the remote system (e.g. /dev/ttya)."); /* tell the remote that we're using the extended protocol. */ char *buf = alloca (PBUFSIZ); putpkt ("!"); - getpkt (buf, 0); + getpkt (buf, PBUFSIZ, 0); } } @@ -2088,7 +2092,7 @@ serial device is attached to the remote system (e.g. /dev/ttya)."); /* tell the remote that we're using the extended protocol. */ char *buf = alloca (PBUFSIZ); putpkt ("!"); - getpkt (buf, 0); + getpkt (buf, PBUFSIZ, 0); } } @@ -2109,7 +2113,7 @@ remote_detach (args, from_tty) /* Tell the remote target to detach. */ strcpy (buf, "D"); - remote_send (buf); + remote_send (buf, PBUFSIZ); pop_target (); if (from_tty) @@ -2130,7 +2134,7 @@ remote_async_detach (args, from_tty) /* Tell the remote target to detach. */ strcpy (buf, "D"); - remote_send (buf); + remote_send (buf, PBUFSIZ); /* Unregister the file descriptor from the event loop. */ if (SERIAL_IS_ASYNC_P (remote_desc)) @@ -2490,7 +2494,7 @@ remote_wait (pid, status) unsigned char *p; ofunc = signal (SIGINT, remote_interrupt); - getpkt ((char *) buf, 1); + getpkt (buf, PBUFSIZ, 1); signal (SIGINT, ofunc); /* This is a hook for when we need to do something (perhaps the @@ -2712,7 +2716,7 @@ remote_async_wait (pid, status) _never_ wait for ever -> test on target_is_async_p(). However, before we do that we need to ensure that the caller knows how to take the target into/out of async mode. */ - getpkt ((char *) buf, wait_forever_enabled_p); + getpkt (buf, PBUFSIZ, wait_forever_enabled_p); if (!SERIAL_IS_ASYNC_P (remote_desc)) signal (SIGINT, ofunc); @@ -2933,7 +2937,7 @@ remote_fetch_registers (regno) set_thread (inferior_pid, 1); sprintf (buf, "g"); - remote_send (buf); + remote_send (buf, PBUFSIZ); /* Save the size of the packet sent to us by the target. Its used as a heuristic when determining the max size of packets that the @@ -2954,7 +2958,7 @@ remote_fetch_registers (regno) if (remote_debug) fprintf_unfiltered (gdb_stdlog, "Bad register packet; fetching a new packet\n"); - getpkt (buf, 0); + getpkt (buf, PBUFSIZ, 0); } /* Reply describes registers byte by byte, each byte encoded as two @@ -3021,8 +3025,7 @@ remote_prepare_to_store () packet was not recognized. */ static int -store_register_using_P (regno) - int regno; +store_register_using_P (int regno) { /* Try storing a single register. */ char *buf = alloca (PBUFSIZ); @@ -3039,7 +3042,7 @@ store_register_using_P (regno) *p++ = tohex (regp[i] & 0xf); } *p = '\0'; - remote_send (buf); + remote_send (buf, PBUFSIZ); return buf[0] != '\0'; } @@ -3101,7 +3104,7 @@ remote_store_registers (regno) } *p = '\0'; - remote_send (buf); + remote_send (buf, PBUFSIZ); } /* Use of the data cache *used* to be disabled because it loses for looking @@ -3239,7 +3242,7 @@ check_binary_download (addr) *p = '\0'; putpkt_binary (buf, (int) (p - buf)); - getpkt (buf, 0); + getpkt (buf, PBUFSIZ, 0); if (buf[0] == '\0') { @@ -3276,6 +3279,7 @@ remote_write_bytes (CORE_ADDR memaddr, char *myaddr, int len) int max_buf_size; /* Max size of packet output buffer */ unsigned char *p; unsigned char *plen; + long sizeof_buf; int plenlen; int todo; int nr_bytes; @@ -3285,7 +3289,8 @@ remote_write_bytes (CORE_ADDR memaddr, char *myaddr, int len) /* Determine the max packet size. */ max_buf_size = get_memory_write_packet_size (); - buf = alloca (max_buf_size + 1); + sizeof_buf = max_buf_size + 1; /* Space for trailing NUL */ + buf = alloca (sizeof_buf); /* Subtract header overhead from max payload size - $M<memaddr>,<len>:#nn */ max_buf_size -= 2 + hexnumlen (memaddr + len - 1) + 1 + hexnumlen (len) + 4; @@ -3377,7 +3382,7 @@ remote_write_bytes (CORE_ADDR memaddr, char *myaddr, int len) } putpkt_binary (buf, (int) (p - buf)); - getpkt (buf, 0); + getpkt (buf, sizeof_buf, 0); if (buf[0] == 'E') { @@ -3417,11 +3422,13 @@ remote_read_bytes (memaddr, myaddr, len) { char *buf; int max_buf_size; /* Max size of packet output buffer */ + long sizeof_buf; int origlen; /* Create a buffer big enough for this packet. */ max_buf_size = get_memory_read_packet_size (); - buf = alloca (max_buf_size); + sizeof_buf = max_buf_size + 1; /* Space for trailing NUL */ + buf = alloca (sizeof_buf); origlen = len; while (len > 0) @@ -3443,7 +3450,7 @@ remote_read_bytes (memaddr, myaddr, len) *p = '\0'; putpkt (buf); - getpkt (buf, 0); + getpkt (buf, sizeof_buf, 0); if (buf[0] == 'E') { @@ -3534,7 +3541,7 @@ remote_search (len, data, mask, startaddr, increment, lorange, hirange data_long = extract_unsigned_integer (data, len); sprintf (buf, "t%x:%x,%x", startaddr, data_long, mask_long); putpkt (buf); - getpkt (buf, 0); + getpkt (buf, PBUFSIZ, 0); if (buf[0] == '\0') { /* The stub doesn't support the 't' request. We might want to @@ -3621,11 +3628,11 @@ readchar (timeout) into BUF. Report an error if we get an error reply. */ static void -remote_send (buf) - char *buf; +remote_send (char *buf, + long sizeof_buf) { putpkt (buf); - getpkt (buf, 0); + getpkt (buf, sizeof_buf, 0); if (buf[0] == 'E') error ("Remote failure reply: %s", buf); @@ -3663,7 +3670,8 @@ putpkt_binary (buf, cnt) int i; unsigned char csum = 0; char *buf2 = alloca (cnt + 6); - char *junkbuf = alloca (PBUFSIZ); + long sizeof_junkbuf = PBUFSIZ; + char *junkbuf = alloca (sizeof_junkbuf); int ch; int tcount = 0; @@ -3736,7 +3744,7 @@ putpkt_binary (buf, cnt) { /* It's probably an old response, and we're out of sync. Just gobble up the packet and ignore it. */ - getpkt (junkbuf, 0); + getpkt (junkbuf, sizeof_junkbuf, 0); continue; /* Now, go look for + */ } default: @@ -3773,45 +3781,50 @@ static int remote_cisco_mode; /* Come here after finding the start of the frame. Collect the rest into BUF, verifying the checksum, length, and handling run-length - compression. Returns 0 on any error, 1 on success. */ + compression. No more than sizeof_buf-1 characters are read so that + the buffer can be NUL terminated. -static int -read_frame (buf) - char *buf; + Returns -1 on error, number of characters in buffer (ignoring the + trailing NULL) on success. (could be extended to return one of the + SERIAL status indications). */ + +static long +read_frame (char *buf, + long sizeof_buf) { unsigned char csum; - char *bp; + long bc; int c; csum = 0; - bp = buf; + bc = 0; while (1) { + /* ASSERT (bc < sizeof_buf - 1) - space for trailing NUL */ c = readchar (remote_timeout); - switch (c) { case SERIAL_TIMEOUT: if (remote_debug) fputs_filtered ("Timeout in mid-packet, retrying\n", gdb_stdlog); - return 0; + return -1; case '$': if (remote_debug) fputs_filtered ("Saw new packet start in middle of old one\n", gdb_stdlog); - return 0; /* Start a new packet, count retries */ + return -1; /* Start a new packet, count retries */ case '#': { unsigned char pktcsum; - *bp = '\000'; + buf[bc] = '\0'; pktcsum = fromhex (readchar (remote_timeout)) << 4; pktcsum |= fromhex (readchar (remote_timeout)); if (csum == pktcsum) - return 1; + return bc; if (remote_debug) { @@ -3821,7 +3834,9 @@ read_frame (buf) fputs_filtered (buf, gdb_stdlog); fputs_filtered ("\n", gdb_stdlog); } - return 0; + /* Number of characters in buffer ignoring trailing + NUL. */ + return -1; } case '*': /* Run length encoding */ { @@ -3847,47 +3862,50 @@ read_frame (buf) repeat += fromhex (c); } + /* The character before ``*'' is repeated. */ + if (repeat > 0 && repeat <= 255 - && bp + repeat - 1 < buf + PBUFSIZ - 1) + && bc > 0 + && bc + repeat < sizeof_buf - 1) { - memset (bp, *(bp - 1), repeat); - bp += c; + memset (&buf[bc], buf[bc - 1], repeat); + bc += repeat; continue; } - *bp = '\0'; + buf[bc] = '\0'; printf_filtered ("Repeat count %d too large for buffer: ", repeat); puts_filtered (buf); puts_filtered ("\n"); - return 0; + return -1; } default: - if (bp < buf + PBUFSIZ - 1) + if (bc < sizeof_buf - 1) { - *bp++ = c; + buf[bc++] = c; csum += c; continue; } - *bp = '\0'; + buf[bc] = '\0'; puts_filtered ("Remote packet too long: "); puts_filtered (buf); puts_filtered ("\n"); - return 0; + return -1; } } } /* Read a packet from the remote machine, with error checking, and - store it in BUF. BUF is expected to be of size PBUFSIZ. If - FOREVER, wait forever rather than timing out; this is used while - the target is executing user code. */ + store it in BUF. If FOREVER, wait forever rather than timing out; + this is used (in synchronous mode) to wait for a target that is is + executing user code to stop. */ void -getpkt (buf, forever) - char *buf; - int forever; +getpkt (char *buf, + long sizeof_buf, + int forever) { int c; int tries; @@ -3937,9 +3955,9 @@ getpkt (buf, forever) /* We've found the start of a packet, now collect the data. */ - val = read_frame (buf); + val = read_frame (buf, sizeof_buf); - if (val == 1) + if (val >= 0) { if (remote_debug) { @@ -4171,7 +4189,7 @@ remote_insert_breakpoint (addr, contents_cache) sprintf (p, ",%d", bp_size); putpkt (buf); - getpkt (buf, 0); + getpkt (buf, PBUFSIZ, 0); if (buf[0] != '\0') { @@ -4236,7 +4254,7 @@ remote_remove_breakpoint (addr, contents_cache) sprintf (p, ",%d", bp_size); putpkt (buf); - getpkt (buf, 0); + getpkt (buf, PBUFSIZ, 0); return (buf[0] == 'E'); } @@ -4268,7 +4286,7 @@ remote_insert_watchpoint (addr, len, type) sprintf (p, ",%x", len); putpkt (buf); - getpkt (buf, 0); + getpkt (buf, PBUFSIZ, 0); if (buf[0] == '\0' || buf [0] == 'E') return -1; @@ -4291,7 +4309,7 @@ remote_remove_watchpoint (addr, len, type) p += hexnumstr (p, (ULONGEST) addr); sprintf (p, ",%x", len); putpkt (buf); - getpkt (buf, 0); + getpkt (buf, PBUFSIZ, 0); if (buf[0] == '\0' || buf [0] == 'E') return -1; @@ -4319,7 +4337,7 @@ remote_insert_hw_breakpoint (addr, len) *p = '\0'; putpkt (buf); - getpkt (buf, 0); + getpkt (buf, PBUFSIZ, 0); if (buf[0] == '\0' || buf [0] == 'E') return -1; @@ -4344,7 +4362,7 @@ remote_remove_hw_breakpoint (addr, len) *p = '\0'; putpkt(buf); - getpkt (buf, 0); + getpkt (buf, PBUFSIZ, 0); if (buf[0] == '\0' || buf [0] == 'E') return -1; @@ -4481,7 +4499,7 @@ compare_sections_command (args, from_tty) bfd_get_section_contents (exec_bfd, s, sectdata, 0, size); host_crc = crc32 ((unsigned char *) sectdata, size, 0xffffffff); - getpkt (buf, 0); + getpkt (buf, PBUFSIZ, 0); if (buf[0] == 'E') error ("target memory fault, section %s, range 0x%08x -- 0x%08x", sectname, lma, lma + size); @@ -4575,7 +4593,7 @@ remote_query (query_type, buf, outbuf, bufsiz) if (i < 0) return i; - getpkt (outbuf, 0); + getpkt (outbuf, *bufsiz, 0); return 0; } @@ -4618,7 +4636,7 @@ remote_rcmd (char *command, { /* XXX - see also tracepoint.c:remote_get_noisy_reply() */ buf[0] = '\0'; - getpkt (buf, 0); + getpkt (buf, PBUFSIZ, 0); if (buf[0] == '\0') error ("Target does not support this command\n"); if (buf[0] == 'O' && buf[1] != 'K') @@ -4660,7 +4678,7 @@ packet_command (args, from_tty) puts_filtered ("\n"); putpkt (args); - getpkt (buf, 0); + getpkt (buf, PBUFSIZ, 0); puts_filtered ("received: "); print_packet (buf); puts_filtered ("\n"); @@ -4900,9 +4918,7 @@ Specify the serial device it is connected to (e.g. /dev/ttya).", */ static void -remote_info_process (args, from_tty) - char *args; - int from_tty; +remote_info_process (char *args, int from_tty) { char *buf = alloca (PBUFSIZ); @@ -4910,7 +4926,7 @@ remote_info_process (args, from_tty) error ("Command can only be used when connected to the remote target."); putpkt ("qfProcessInfo"); - getpkt (buf, 0); + getpkt (buf, PBUFSIZ, 0); if (buf[0] == 0) return; /* Silently: target does not support this feature. */ @@ -4921,7 +4937,7 @@ remote_info_process (args, from_tty) { remote_console_output (&buf[1]); putpkt ("qsProcessInfo"); - getpkt (buf, 0); + getpkt (buf, PBUFSIZ, 0); } } @@ -4930,9 +4946,7 @@ remote_info_process (args, from_tty) */ static void -remote_cisco_open (name, from_tty) - char *name; - int from_tty; +remote_cisco_open (char *name, int from_tty) { if (name == 0) error ( @@ -5012,8 +5026,7 @@ device is attached to the remote system (e.g. host:port)."); } static void -remote_cisco_close (quitting) - int quitting; +remote_cisco_close (int quitting) { remote_cisco_mode = 0; remote_close (quitting); @@ -5043,7 +5056,7 @@ static int echo_check; extern int quit_flag; static int -readsocket () +readsocket (void) { int data; @@ -5110,7 +5123,7 @@ readsocket () } static int -readtty () +readtty (void) { int tty_bytecount; @@ -5150,7 +5163,7 @@ readtty () } static int -minitelnet () +minitelnet (void) { fd_set input; /* file descriptors for select */ int tablesize; /* max number of FDs for select */ @@ -5233,9 +5246,7 @@ minitelnet () } static int -remote_cisco_wait (pid, status) - int pid; - struct target_waitstatus *status; +remote_cisco_wait (int pid, struct target_waitstatus *status) { if (minitelnet () != ENTER_DEBUG) { @@ -5329,7 +5340,7 @@ remote_async (void (*callback) (enum inferior_event_type event_type, void *conte target. */ static void -init_remote_async_ops () +init_remote_async_ops (void) { remote_async_ops.to_shortname = "async"; remote_async_ops.to_longname = "Remote serial target in async version of the gdb-specific protocol"; @@ -5375,7 +5386,7 @@ Specify the serial device it is connected to (e.g. /dev/ttya)."; remote vector and adding to it. */ static void -init_extended_async_remote_ops () +init_extended_async_remote_ops (void) { extended_async_remote_ops = remote_async_ops; @@ -5391,9 +5402,7 @@ Specify the serial device it is connected to (e.g. /dev/ttya).", } static void -set_remote_cmd (args, from_tty) - char *args; - int from_tty; +set_remote_cmd (char *args, int from_tty) { } diff --git a/gdb/remote.h b/gdb/remote.h index f6fb450e2eb..b8fdf1162a5 100644 --- a/gdb/remote.h +++ b/gdb/remote.h @@ -28,7 +28,7 @@ FOREVER, wait forever rather than timing out; this is used while the target is executing user code. */ -extern void getpkt (char *buf, int forever); +extern void getpkt (char *buf, long sizeof_buf, int forever); /* Send a packet to the remote machine, with error checking. The data of the packet is in BUF. The string in BUF can be at most PBUFSIZ diff --git a/gdb/ser-pipe.c b/gdb/ser-pipe.c index 6a8a97eb1fe..c3d1ccd6f57 100644 --- a/gdb/ser-pipe.c +++ b/gdb/ser-pipe.c @@ -31,6 +31,7 @@ #include <sys/socket.h> #include <sys/time.h> #include <fcntl.h> +#include <string.h> #include "signals.h" diff --git a/gdb/stabsread.c b/gdb/stabsread.c index c62a136b64a..464fce1701d 100644 --- a/gdb/stabsread.c +++ b/gdb/stabsread.c @@ -91,7 +91,7 @@ static char * static struct type * dbx_alloc_type PARAMS ((int[2], struct objfile *)); -static LONGEST read_huge_number PARAMS ((char **, int, int *)); +static long read_huge_number PARAMS ((char **, int, int *)); static struct type *error_type PARAMS ((char **, struct objfile *)); @@ -4480,7 +4480,7 @@ read_sun_floating_type (pp, typenums, objfile) If encounter garbage, set *BITS to -1 and return 0. */ -static LONGEST +static long read_huge_number (pp, end, bits) char **pp; int end; @@ -4488,12 +4488,12 @@ read_huge_number (pp, end, bits) { char *p = *pp; int sign = 1; - LONGEST n = 0; + long n = 0; int radix = 10; char overflow = 0; int nbits = 0; int c; - LONGEST upper_limit; + long upper_limit; if (*p == '-') { @@ -4510,9 +4510,9 @@ read_huge_number (pp, end, bits) } if (os9k_stabs) - upper_limit = ULONGEST_MAX / radix; + upper_limit = ULONG_MAX / radix; else - upper_limit = LONGEST_MAX / radix; + upper_limit = LONG_MAX / radix; while ((c = *p++) >= '0' && c < ('0' + radix)) { @@ -4593,7 +4593,7 @@ read_range_type (pp, typenums, objfile) { char *orig_pp = *pp; int rangenums[2]; - LONGEST n2, n3; + long n2, n3; int n2bits, n3bits; int self_subrange; struct type *result_type; @@ -4646,8 +4646,8 @@ read_range_type (pp, typenums, objfile) fit in a long but <large number>-1 does. */ else if ((n2bits != 0 && n3bits != 0 && n2bits == n3bits + 1) || (n2bits != 0 && n3bits == 0 - && (n2bits == sizeof (LONGEST) * HOST_CHAR_BIT) - && n3 == LONGEST_MAX)) + && (n2bits == sizeof (long) * HOST_CHAR_BIT) + && n3 == LONG_MAX)) { got_signed = 1; nbits = n2bits; diff --git a/gdb/symfile.c b/gdb/symfile.c index 80f99029503..c74a59323c7 100644 --- a/gdb/symfile.c +++ b/gdb/symfile.c @@ -64,6 +64,11 @@ extern int hp_cxx_exception_support_initialized; #endif int (*ui_load_progress_hook) (const char *section, unsigned long num); +void (*show_load_progress) (const char *section, + unsigned long section_sent, + unsigned long section_size, + unsigned long total_sent, + unsigned long total_size); void (*pre_add_symbol_hook) PARAMS ((char *)); void (*post_add_symbol_hook) PARAMS ((void)); void (*target_new_objfile_hook) PARAMS ((struct objfile *)); @@ -1225,6 +1230,8 @@ generic_load (char *args, int from_tty) char *filename; struct cleanup *old_cleanups; char *offptr; + CORE_ADDR total_size = 0; + CORE_ADDR total_sent = 0; /* Parse the input argument - the user can specify a load offset as a second argument. */ @@ -1262,6 +1269,10 @@ generic_load (char *args, int from_tty) bfd_errmsg (bfd_get_error ())); } + for (s = loadfile_bfd->sections; s; s = s->next) + if (s->flags & SEC_LOAD) + total_size += bfd_get_section_size_before_reloc (s); + start_time = time (NULL); for (s = loadfile_bfd->sections; s; s = s->next) @@ -1331,10 +1342,14 @@ generic_load (char *args, int from_tty) buffer += len; write_count += 1; sent += len; + total_sent += len; if (quit_flag || (ui_load_progress_hook != NULL && ui_load_progress_hook (sect_name, sent))) error ("Canceled the download"); + + if (show_load_progress != NULL) + show_load_progress (sect_name, sent, size, total_sent, total_size); } while (sent < size); @@ -1435,7 +1450,7 @@ add_symbol_file_command (args, from_tty) /* Make a copy of the string that we can safely write into. */ - args = strdup (args); + args = xstrdup (args); make_cleanup (free, args); /* Ensure section_addrs is initialized */ @@ -1560,7 +1575,7 @@ add_symbol_file_command (args, from_tty) text data or bss section. This is redundent but eventually, none will be given special treatment */ { - section_addrs.other[sec_num].name = strdup (sec); + section_addrs.other[sec_num].name = xstrdup (sec); make_cleanup (free, section_addrs.other[sec_num].name); section_addrs.other[sec_num++].addr = addr; printf_filtered ("\t%s_addr = %s\n", @@ -1715,9 +1730,7 @@ reread_symbols () sizeof (objfile->static_psymbols)); /* Free the obstacks for non-reusable objfiles */ - obstack_free (&objfile->psymbol_cache.cache, 0); - memset (&objfile->psymbol_cache, 0, - sizeof (objfile->psymbol_cache)); + free_bcache (&objfile->psymbol_cache); obstack_free (&objfile->psymbol_obstack, 0); obstack_free (&objfile->symbol_obstack, 0); obstack_free (&objfile->type_obstack, 0); diff --git a/gdb/target.c b/gdb/target.c index 3a6e423d75a..a74e3623b6d 100644 --- a/gdb/target.c +++ b/gdb/target.c @@ -1675,10 +1675,16 @@ target_signal_from_host (hostsig) return TARGET_SIGNAL_UNKNOWN; } -int -target_signal_to_host (oursig) - enum target_signal oursig; +/* Convert a OURSIG (an enum target_signal) to the form used by the + target operating system (refered to as the ``host'') or zero if the + equivalent host signal is not available. Set/clear OURSIG_OK + accordingly. */ + +static int +do_target_signal_to_host (enum target_signal oursig, + int *oursig_ok) { + *oursig_ok = 1; switch (oursig) { case TARGET_SIGNAL_0: @@ -1913,12 +1919,34 @@ target_signal_to_host (oursig) return retsig; } #endif + *oursig_ok = 0; + return 0; + } +} + +int +target_signal_to_host_p (enum target_signal oursig) +{ + int oursig_ok; + do_target_signal_to_host (oursig, &oursig_ok); + return oursig_ok; +} + +int +target_signal_to_host (enum target_signal oursig) +{ + int oursig_ok; + int targ_signo = do_target_signal_to_host (oursig, &oursig_ok); + if (!oursig_ok) + { /* The user might be trying to do "signal SIGSAK" where this system doesn't have SIGSAK. */ warning ("Signal %s does not exist on this system.\n", target_signal_to_name (oursig)); return 0; } + else + return targ_signo; } /* Helper function for child_wait and the Lynx derivatives of child_wait. diff --git a/gdb/target.h b/gdb/target.h index 9a853cfaa6c..73b07391898 100644 --- a/gdb/target.h +++ b/gdb/target.h @@ -278,7 +278,12 @@ enum inferior_event_type /* We are called because a timer went off. */ INF_TIMER, /* We are called to do stuff after the inferior stops. */ - INF_EXEC_COMPLETE + INF_EXEC_COMPLETE, + /* We are called to do some stuff after the inferior stops, but we + are expected to reenter the proceed() and + handle_inferior_event() functions. This is used only in case of + 'step n' like commands. */ + INF_EXEC_CONTINUE }; /* Return the string for a signal. */ @@ -1343,7 +1348,23 @@ extern asection *target_memory_bfd_section; /* This is for native targets which use a unix/POSIX-style waitstatus. */ extern void store_waitstatus PARAMS ((struct target_waitstatus *, int)); -/* Convert between host signal numbers and enum target_signal's. */ +/* Predicate to target_signal_to_host(). Return non-zero if the enum + targ_signal SIGNO has an equivalent ``host'' representation. */ +/* FIXME: cagney/1999-11-22: The name below was chosen in preference + to the shorter target_signal_p() because it is far less ambigious. + In this context ``target_signal'' refers to GDB's internal + representation of the target's set of signals while ``host signal'' + refers to the target operating system's signal. Confused? */ +extern int target_signal_to_host_p (enum target_signal signo); + +/* Convert between host signal numbers and enum target_signal's. + target_signal_to_host() returns 0 and prints a warning() on GDB's + console if SIGNO has no equivalent host representation. */ +/* FIXME: cagney/1999-11-22: Here ``host'' is used incorrectly, it is + refering to the target operating system's signal numbering. + Similarly, ``enum target_signal'' is named incorrectly, ``enum + gdb_signal'' would probably be better as it is refering to GDB's + internal representation of a target operating system's signal. */ extern enum target_signal target_signal_from_host PARAMS ((int)); extern int target_signal_to_host PARAMS ((enum target_signal)); diff --git a/gdb/testsuite/ChangeLog b/gdb/testsuite/ChangeLog index 872aa7b9c31..0bd354b7672 100644 --- a/gdb/testsuite/ChangeLog +++ b/gdb/testsuite/ChangeLog @@ -1,3 +1,65 @@ +Sat Dec 4 15:21:18 1999 Andrew Cagney <cagney@b1.cygnus.com> + + * gdb.base/remote.c: Fill the buffer with truely random data. + Change the buffer type to ``unsigned char'' to simplify size + arithmetic. + + * gdb.base/remote.exp: Reduce download numbers by one. Typical + stub only handles 400-1 byte packets. Verify that the download + worked. + +1999-11-30 Fernando Nasser <fnasser@totem.to.cygnus.com> + + * lib/gdb.exp (gdb_expect_list): FAIL only once on multiple pattern + tests, using UNRESOLVED for the untested cases. Also, does not wait + for a timeout if the prompt was received before a recognizable pattern. + +1999-11-29 Fernando Nasser <fnasser@totem.to.cygnus.com> + + * lib/gdb.exp (gdb_expect_list): Fix spelling. + +1999-11-29 Elena Zannoni <ezannoni@kwikemart.cygnus.com> + + * gdb.base/watchpoint.exp: Add tests cases for the hit count of + watchpoints. + +1999-11-24 Jason Merrill <jason@casey.cygnus.com> + + * gdb.base/condbreak.exp: Add missing '$gdb_prompt $'. + + * gdb.c++/local.exp: Be more flexible in recognizing local class + name mangling. Don't allow horribly truncated method names. + * gdb.c++/derivation.exp: Expect protected inheritance. + * gdb.c++/inherit.exp: Be more flexible in recognizing vbase pointers. + * gdb.c++/virtfunc.exp: Likewise. + * gdb.c++/classes.exp: Likewise. Don't require the enclosing scope + when printing a nested enum. + +1999-11-22 Jim Blandy <jimb@cygnus.com> + + * gdb.base/step-test.exp: Properly await GDB's response to setting + a breakpoint on the call to large_struct_by_value. + + * gdb.base/ending-run.exp ("step to end of run 1"): Don't fail + just because we have debug info for the `start' function. + +1999-11-19 Jim Blandy <jimb@zenia.red-bean.com> + + * gdb.threads/linux-dp.exp ("create philosopher"): Recognize the + "Unknown signal" messages, which indicate (on LinuxThreads) that + GDB doesn't know how to debug threads on this system. This is + better than hanging while philosopher 0 dumps chatter into gdb.log. + +1999-11-18 Tom Tromey <tromey@cygnus.com> + + * gdb.trace/deltrace.exp: Updated test to reflect new error text. + +1999-11-18 Fred Fish <fnf@cygnus.com> + + * gdb.base/coremaker2.c: Add sample program for generating + cores that is more self contained than coremaker.c. Eventually + I'll add more code to this and tie it into the testsuite. + 1999-11-12 Stan Shebs <shebs@andros.cygnus.com> * gdb.base/dollar.exp: Remove, now in gdb.hp. @@ -84,7 +146,6 @@ Mon Oct 11 13:57:21 1999 Andrew Cagney <cagney@amy.cygnus.com> attempt a start more than three times. Check return value from gdb_load. - Wed Oct 6 12:05:58 1999 Andrew Cagney <cagney@b1.cygnus.com> * gdb.base/watchpoint.exp: Match fail ``finish from marker1'' with @@ -1332,6 +1393,17 @@ Fri Sep 11 13:58:02 1998 Michael Snyder <msnyder@cleaver.cygnus.com> * gdb.base/setshow.exp: Fix error introduced by call to runto_main. +Fri Jul 24 15:51:34 1998 Jeffrey A Law (law@cygnus.com) + + * gdb.disasm/am33.s: Add tests for autoincrement instructions. + * gdb.disasm/am33.exp: Run time. Update tests which use r8-r15 + to use a0-a3/d0-d3 as needed. + +Thu Jul 16 18:20:46 1998 Jeffrey A Law (law@cygnus.com) + + * gdb.disasm/am33.s: Add 4 operand mul and mulu tests. + * gdb.disasm/am33.exp: Corresponding changes. + 1998-07-11 Felix Lee <flee@cygnus.com> * gdb.base/callfuncs.exp: add cmp10 test. @@ -1350,12 +1422,22 @@ Fri Jun 26 14:52:47 1998 Peter Schauer <pes@regent.e-technik.tu-muenchen.de> * gdb.base/scope.exp: Remove extraneous newline in filelocal_bss before run test. +Fri Jun 26 11:12:17 1998 Jeffrey A Law (law@cygnus.com) + + * am33.exp: Just compile, do not link the testcase. + * am33.s: Add ".am33" pseudoop to force am33 mode. + 1998-06-25 Felix Lee <flee@cygnus.com> * gdb.base/setshow.exp: make sure $pc is sane. * gdb.stabs/weird.exp: split expect patterns properly. +Wed Jun 24 13:03:15 1998 Jeffrey A Law (law@cygnus.com) + + * gdb.disasm/am33.s: New disassembler testfile for the am33. + * gdb.disasm/am33.exp: Run it. + Tue Jun 23 11:45:01 1998 Michael Snyder <msnyder@cleaver.cygnus.com> * gdb.base/funcargs.exp: simplify expect strings to ease pattern diff --git a/gdb/testsuite/gdb.base/condbreak.exp b/gdb/testsuite/gdb.base/condbreak.exp index e73f2ab1429..0d4731faba3 100644 --- a/gdb/testsuite/gdb.base/condbreak.exp +++ b/gdb/testsuite/gdb.base/condbreak.exp @@ -182,10 +182,10 @@ gdb_test "continue" "Continuing\\..*Breakpoint \[0-9\]+, main \\(argc=.*, argv=. # Until the Dwarf2 writer gets fixed, I'm going to XFAIL its behavior. send_gdb "continue\n" gdb_expect { - -re "Continuing\\..*Breakpoint \[0-9\]+, marker1 \\(\\) at .*$srcfile:4\[38\].*4\[38\]\[\t \]+.*" { + -re "Continuing\\..*Breakpoint \[0-9\]+, marker1 \\(\\) at .*$srcfile:4\[38\].*4\[38\]\[\t \]+.*$gdb_prompt $" { pass "run until breakpoint at marker1" } - -re "Continuing\\..*Breakpoint \[0-9\]+, $hex in marker1 \\(\\) at .*$srcfile:4\[38\].*4\[38\]\[\t \]+.*" { + -re "Continuing\\..*Breakpoint \[0-9\]+, $hex in marker1 \\(\\) at .*$srcfile:4\[38\].*4\[38\]\[\t \]+.*$gdb_prompt $" { xfail "run until breakpoint at marker1" } -re "$gdb_prompt $" { diff --git a/gdb/testsuite/gdb.base/coremaker2.c b/gdb/testsuite/gdb.base/coremaker2.c new file mode 100644 index 00000000000..94f9d000f48 --- /dev/null +++ b/gdb/testsuite/gdb.base/coremaker2.c @@ -0,0 +1,58 @@ +/* Simple little program that just generates a core dump from inside some + nested function calls. Keep this as self contained as possible, I.E. + use no environment resources other than possibly abort(). */ + +#ifndef __STDC__ +#define const /**/ +#endif + +#ifndef HAVE_ABORT +#define HAVE_ABORT 1 +#endif + +#if HAVE_ABORT +#define ABORT abort() +#else +#define ABORT {char *invalid = 0; *invalid = 0xFF;} +#endif + +/* Don't make these automatic vars or we will have to walk back up the + stack to access them. */ + +char *buf1; +char *buf2; + +int coremaker_data = 1; /* In Data section */ +int coremaker_bss; /* In BSS section */ + +const int coremaker_ro = 201; /* In Read-Only Data section */ + +void +func2 (int x) +{ + int coremaker_local[5]; + int i; + static int y; + + /* Make sure that coremaker_local doesn't get optimized away. */ + for (i = 0; i < 5; i++) + coremaker_local[i] = i; + coremaker_bss = 0; + for (i = 0; i < 5; i++) + coremaker_bss += coremaker_local[i]; + coremaker_data = coremaker_ro + 1; + y = 10 * x; + ABORT; +} + +void +func1 (int x) +{ + func2 (x * 2); +} + +int main () +{ + func1 (10); + return 0; +} diff --git a/gdb/testsuite/gdb.base/ending-run.exp b/gdb/testsuite/gdb.base/ending-run.exp index d67af48259b..0e76d89605f 100644 --- a/gdb/testsuite/gdb.base/ending-run.exp +++ b/gdb/testsuite/gdb.base/ending-run.exp @@ -175,6 +175,12 @@ gdb_expect { if {![target_info exists use_cygmon] || ![target_info use_cygmon]} { send_gdb "n\n" gdb_expect { + -re "Program exited normally.*$gdb_prompt $" { + # If we actually have debug info for the start function, + # then we won't get the "Single-stepping until function + # exit" message. + pass "step to end of run 1" + } -re ".*Single.*Program exited.*$gdb_prompt $" { pass "step to end of run 1" } diff --git a/gdb/testsuite/gdb.base/remote.c b/gdb/testsuite/gdb.base/remote.c index b297e5e86d1..34c47f31384 100644 --- a/gdb/testsuite/gdb.base/remote.c +++ b/gdb/testsuite/gdb.base/remote.c @@ -11,16 +11,6173 @@ downloads, this would have to become a bunch of real random data. Here's a quick way of generating such a bunch: -yes | awk '{printf ("%4d,", rand()*1000);}' | fold -w80 -s | head -4096 +awk < /dev/null ' +BEGIN { + for (i = 0; i < 3; i++) { + for (j = 0; j < 16384; j++) { + printf ("%4d,", rand()*256); + if (j % 8 == 7) print; + } + } +}' */ -unsigned long random_data[65536] = { 1 }; +/* Use a character buffer to avoid byte order problems. 48k is + chosen so that the buffer required at least 3 16k packets but + targets often have no more than 64k of data. */ +/* If you change this data, you will also have to change the checks + for the data in remote.c */ +unsigned char random_data[3 * 2048 * 8] = { + 60, 74, 216, 38, 149, 49, 207, 44, + 124, 38, 93, 125, 232, 67, 228, 56, + 161, 146, 85, 26, 128, 145, 218, 10, + 27, 163, 3, 184, 26, 123, 65, 173, + 229, 194, 184, 232, 237, 96, 230, 199, + 83, 49, 254, 41, 181, 128, 239, 183, + 26, 53, 143, 180, 20, 130, 50, 70, + 163, 114, 10, 119, 19, 9, 40, 101, + 176, 136, 175, 69, 119, 70, 115, 239, + 22, 116, 242, 219, 30, 3, 60, 221, + 111, 197, 223, 96, 241, 204, 214, 242, + 150, 153, 81, 107, 231, 40, 213, 187, + 125, 54, 30, 12, 109, 83, 26, 109, + 159, 158, 199, 124, 253, 237, 164, 191, + 244, 132, 56, 76, 207, 1, 71, 235, + 94, 104, 223, 243, 253, 38, 140, 60, + 197, 117, 187, 50, 121, 236, 219, 242, + 102, 88, 51, 82, 86, 146, 111, 223, + 164, 132, 229, 214, 163, 121, 108, 2, + 155, 237, 89, 64, 105, 63, 250, 120, + 174, 205, 217, 70, 154, 180, 34, 194, + 96, 40, 165, 162, 143, 52, 243, 232, + 108, 165, 241, 193, 194, 10, 245, 83, + 188, 156, 143, 141, 179, 64, 124, 66, + 183, 115, 165, 30, 11, 231, 217, 63, + 152, 203, 30, 116, 6, 118, 85, 250, + 127, 100, 59, 222, 88, 196, 199, 98, + 80, 169, 234, 83, 146, 141, 5, 180, + 129, 91, 161, 60, 241, 19, 214, 54, + 95, 4, 167, 54, 106, 94, 70, 178, + 87, 73, 10, 205, 215, 205, 33, 221, + 122, 9, 151, 75, 139, 8, 74, 2, + 117, 27, 58, 69, 45, 6, 70, 222, + 169, 199, 60, 66, 184, 14, 8, 136, + 236, 39, 6, 94, 35, 234, 77, 157, + 70, 49, 132, 23, 164, 169, 93, 222, + 58, 219, 23, 9, 28, 243, 41, 137, + 141, 52, 107, 214, 52, 122, 45, 133, + 206, 217, 167, 126, 76, 110, 76, 198, + 208, 103, 178, 62, 70, 145, 148, 10, + 37, 96, 166, 211, 217, 32, 254, 168, + 112, 172, 238, 166, 181, 189, 70, 50, + 90, 96, 191, 226, 205, 26, 183, 254, + 47, 180, 203, 111, 24, 118, 85, 143, + 106, 130, 139, 168, 155, 197, 78, 220, + 16, 124, 82, 135, 1, 47, 181, 132, + 93, 4, 131, 208, 63, 139, 82, 35, + 138, 61, 124, 194, 84, 232, 242, 24, + 121, 31, 242, 204, 237, 235, 148, 4, + 177, 159, 70, 251, 185, 255, 50, 140, + 237, 172, 143, 93, 119, 47, 46, 94, + 18, 221, 76, 101, 219, 48, 191, 42, + 173, 57, 226, 126, 67, 146, 110, 127, + 252, 78, 213, 215, 7, 188, 64, 158, + 162, 38, 247, 54, 194, 20, 55, 194, + 0, 124, 63, 148, 124, 111, 136, 1, + 33, 19, 224, 205, 185, 77, 82, 3, + 163, 234, 230, 160, 160, 210, 95, 77, + 249, 137, 230, 94, 141, 188, 26, 44, + 9, 86, 188, 151, 200, 135, 178, 96, + 153, 124, 250, 62, 208, 63, 191, 187, + 10, 224, 184, 191, 124, 188, 90, 253, + 36, 27, 81, 19, 40, 95, 34, 34, + 159, 223, 115, 239, 95, 232, 233, 10, + 30, 255, 205, 134, 212, 38, 42, 205, + 184, 158, 63, 223, 178, 17, 94, 88, + 226, 201, 39, 181, 113, 139, 184, 194, + 24, 212, 108, 52, 188, 110, 207, 104, + 228, 222, 29, 238, 45, 237, 169, 180, + 148, 76, 12, 136, 69, 159, 157, 193, + 220, 45, 65, 105, 200, 235, 13, 173, + 140, 255, 239, 79, 55, 33, 44, 75, + 74, 24, 158, 115, 153, 196, 146, 74, + 233, 40, 8, 186, 204, 42, 131, 102, + 47, 87, 12, 126, 10, 194, 132, 157, + 114, 222, 18, 207, 62, 13, 118, 90, + 57, 86, 69, 114, 96, 10, 190, 82, + 159, 172, 53, 122, 26, 183, 120, 85, + 131, 196, 45, 246, 225, 239, 157, 41, + 41, 25, 104, 160, 193, 237, 57, 131, + 155, 58, 173, 71, 11, 158, 232, 209, + 250, 2, 188, 136, 179, 55, 157, 205, + 36, 49, 175, 186, 124, 1, 158, 16, + 239, 1, 209, 15, 28, 146, 237, 39, + 126, 195, 54, 150, 160, 94, 177, 81, + 254, 51, 173, 199, 127, 247, 77, 208, + 148, 194, 184, 154, 138, 39, 81, 122, + 147, 252, 156, 93, 75, 132, 8, 164, + 223, 141, 213, 224, 127, 103, 57, 51, + 54, 243, 123, 47, 103, 5, 210, 247, + 40, 216, 146, 15, 16, 175, 192, 175, + 177, 130, 145, 174, 65, 47, 86, 212, + 151, 206, 100, 5, 100, 22, 103, 102, + 153, 70, 14, 141, 133, 210, 162, 55, + 249, 178, 77, 215, 254, 80, 202, 94, + 90, 247, 84, 160, 37, 46, 210, 177, + 62, 19, 244, 115, 219, 20, 72, 126, + 113, 237, 29, 132, 138, 92, 83, 124, + 84, 231, 246, 7, 182, 119, 38, 215, + 90, 236, 154, 220, 11, 98, 54, 206, + 156, 1, 6, 107, 129, 233, 79, 232, + 47, 61, 202, 80, 34, 197, 252, 246, + 169, 246, 205, 204, 28, 231, 69, 160, + 151, 236, 141, 178, 224, 179, 101, 164, + 184, 172, 32, 252, 17, 89, 216, 73, + 55, 84, 217, 99, 192, 20, 144, 229, + 204, 194, 202, 129, 248, 30, 246, 80, + 61, 215, 180, 192, 34, 89, 39, 196, + 197, 204, 55, 185, 162, 241, 218, 9, + 70, 17, 97, 132, 73, 70, 60, 229, + 220, 170, 118, 147, 123, 193, 97, 249, + 230, 115, 38, 7, 187, 32, 196, 124, + 41, 74, 70, 87, 177, 137, 211, 10, + 95, 56, 156, 92, 112, 1, 230, 178, + 117, 63, 193, 185, 216, 206, 31, 92, + 52, 233, 169, 203, 36, 76, 16, 214, + 162, 218, 147, 53, 39, 1, 11, 81, + 99, 197, 73, 147, 217, 22, 252, 216, + 130, 249, 141, 8, 201, 43, 37, 11, + 127, 166, 174, 105, 138, 78, 203, 244, + 63, 133, 221, 143, 24, 235, 246, 85, + 142, 42, 135, 248, 249, 224, 146, 8, + 72, 9, 194, 154, 105, 137, 229, 26, + 3, 172, 120, 156, 232, 248, 206, 113, + 75, 223, 21, 60, 62, 73, 155, 254, + 196, 13, 161, 122, 145, 141, 102, 233, + 227, 112, 121, 67, 111, 148, 160, 32, + 199, 117, 223, 105, 184, 131, 119, 182, + 60, 26, 169, 194, 173, 164, 249, 135, + 178, 57, 50, 44, 12, 159, 167, 240, + 249, 188, 86, 192, 73, 47, 74, 77, + 250, 114, 15, 247, 240, 191, 49, 125, + 92, 113, 173, 235, 52, 208, 206, 146, + 160, 65, 188, 78, 220, 66, 44, 15, + 128, 250, 61, 172, 65, 225, 2, 201, + 62, 30, 136, 64, 195, 59, 242, 47, + 73, 243, 181, 99, 7, 1, 136, 59, + 117, 167, 211, 224, 127, 38, 22, 16, + 204, 35, 228, 46, 93, 168, 246, 240, + 99, 114, 106, 91, 26, 75, 200, 37, + 150, 68, 48, 101, 53, 3, 150, 55, + 121, 54, 132, 96, 163, 207, 223, 96, + 90, 152, 68, 133, 103, 105, 51, 114, + 144, 24, 88, 28, 87, 74, 121, 194, + 181, 107, 206, 214, 215, 96, 155, 17, + 184, 140, 108, 235, 18, 41, 58, 6, + 42, 14, 60, 154, 66, 56, 41, 140, + 255, 106, 197, 223, 43, 244, 25, 176, + 244, 36, 137, 190, 194, 89, 145, 11, + 65, 197, 38, 202, 154, 121, 218, 52, + 204, 17, 151, 255, 105, 156, 14, 159, + 183, 16, 44, 132, 206, 72, 10, 192, + 44, 250, 209, 168, 8, 164, 181, 110, + 251, 103, 83, 102, 144, 202, 208, 250, + 8, 69, 223, 33, 89, 130, 15, 15, + 121, 62, 30, 73, 62, 87, 8, 252, + 33, 170, 105, 44, 134, 24, 35, 100, + 42, 80, 27, 181, 46, 9, 61, 10, + 28, 179, 178, 27, 184, 198, 101, 29, + 46, 91, 224, 174, 246, 1, 194, 239, + 234, 187, 99, 108, 17, 198, 53, 48, + 151, 235, 81, 225, 171, 124, 119, 128, + 197, 164, 197, 31, 162, 177, 193, 58, + 120, 151, 224, 31, 119, 127, 123, 157, + 71, 177, 222, 101, 125, 160, 4, 47, + 128, 155, 80, 127, 136, 198, 208, 236, + 160, 83, 111, 39, 237, 83, 113, 159, + 250, 218, 137, 128, 130, 69, 52, 30, + 218, 61, 170, 187, 130, 183, 232, 128, + 107, 189, 159, 75, 199, 63, 191, 132, + 40, 238, 13, 176, 98, 35, 94, 214, + 110, 79, 110, 229, 100, 224, 125, 197, + 118, 85, 187, 56, 216, 221, 12, 140, + 39, 120, 247, 127, 69, 22, 3, 164, + 247, 102, 141, 123, 207, 64, 223, 218, + 181, 63, 192, 66, 136, 188, 219, 181, + 243, 158, 89, 220, 148, 124, 252, 104, + 38, 197, 17, 217, 24, 215, 92, 133, + 115, 129, 50, 148, 183, 21, 236, 90, + 169, 23, 253, 97, 65, 190, 131, 250, + 80, 11, 67, 28, 250, 6, 147, 187, + 51, 43, 170, 240, 7, 10, 174, 166, + 12, 153, 21, 228, 36, 4, 223, 148, + 212, 148, 215, 95, 28, 247, 173, 161, + 63, 153, 117, 10, 135, 132, 236, 18, + 216, 233, 194, 219, 178, 15, 148, 8, + 138, 188, 80, 8, 29, 10, 101, 15, + 38, 35, 133, 198, 133, 9, 3, 84, + 95, 163, 191, 185, 192, 84, 16, 67, + 111, 25, 10, 17, 28, 203, 113, 125, + 23, 44, 17, 53, 58, 25, 174, 130, + 22, 238, 77, 105, 97, 15, 176, 240, + 137, 255, 9, 145, 21, 1, 20, 237, + 215, 154, 117, 40, 55, 203, 212, 94, + 26, 107, 115, 145, 155, 1, 16, 55, + 91, 224, 167, 44, 53, 57, 141, 236, + 143, 79, 9, 202, 30, 47, 114, 226, + 251, 6, 24, 52, 255, 113, 239, 6, + 51, 68, 122, 180, 205, 123, 254, 21, + 3, 81, 186, 28, 44, 221, 205, 86, + 86, 96, 241, 6, 8, 29, 10, 226, + 124, 242, 26, 81, 29, 242, 80, 107, + 215, 75, 220, 120, 121, 137, 192, 27, + 251, 163, 207, 5, 62, 203, 184, 72, + 151, 161, 107, 138, 185, 44, 14, 10, + 17, 41, 93, 93, 207, 190, 196, 248, + 60, 183, 107, 56, 180, 179, 200, 203, + 28, 215, 244, 33, 254, 203, 34, 120, + 217, 202, 209, 217, 246, 1, 228, 96, + 82, 109, 190, 220, 206, 31, 139, 99, + 174, 138, 2, 124, 5, 198, 226, 222, + 129, 80, 86, 148, 96, 24, 96, 248, + 153, 5, 144, 74, 119, 134, 145, 162, + 204, 41, 135, 86, 21, 217, 210, 15, + 198, 49, 106, 31, 210, 155, 103, 132, + 92, 81, 114, 112, 59, 94, 215, 176, + 122, 75, 37, 28, 30, 2, 99, 182, + 35, 226, 191, 142, 173, 57, 156, 74, + 213, 215, 84, 89, 32, 2, 224, 97, + 178, 8, 157, 253, 22, 119, 111, 9, + 15, 160, 235, 98, 233, 123, 29, 233, + 19, 155, 242, 7, 225, 179, 195, 137, + 187, 38, 69, 24, 180, 27, 159, 252, + 77, 191, 47, 107, 201, 160, 81, 203, + 23, 60, 89, 119, 121, 221, 147, 182, + 153, 88, 230, 148, 206, 106, 181, 138, + 97, 182, 15, 48, 50, 19, 116, 39, + 48, 205, 203, 225, 88, 200, 209, 224, + 129, 108, 206, 184, 51, 81, 59, 79, + 235, 221, 229, 198, 122, 61, 199, 130, + 168, 238, 7, 187, 214, 118, 114, 191, + 126, 174, 25, 227, 132, 213, 161, 184, + 245, 78, 198, 63, 28, 176, 103, 0, + 89, 63, 212, 162, 12, 193, 76, 173, + 99, 115, 164, 215, 234, 95, 134, 182, + 132, 79, 49, 137, 82, 35, 4, 133, + 242, 192, 121, 173, 254, 58, 137, 116, + 82, 55, 254, 120, 182, 125, 0, 169, + 151, 159, 90, 49, 168, 26, 218, 89, + 7, 33, 5, 137, 95, 0, 185, 175, + 253, 195, 3, 32, 208, 55, 56, 145, + 209, 165, 71, 84, 22, 98, 16, 116, + 232, 140, 99, 77, 172, 51, 234, 111, + 190, 240, 122, 204, 239, 244, 122, 108, + 45, 166, 83, 82, 140, 22, 138, 220, + 20, 18, 138, 65, 191, 191, 104, 0, + 159, 250, 43, 211, 238, 201, 34, 42, + 76, 81, 219, 58, 59, 245, 164, 162, + 102, 106, 138, 91, 147, 203, 93, 46, + 211, 27, 111, 133, 232, 248, 108, 84, + 224, 67, 145, 62, 114, 92, 203, 138, + 122, 244, 193, 176, 165, 31, 139, 185, + 96, 179, 6, 146, 168, 51, 16, 36, + 54, 193, 2, 193, 129, 233, 234, 138, + 132, 176, 132, 115, 60, 95, 137, 213, + 39, 2, 61, 121, 110, 19, 181, 28, + 134, 17, 109, 0, 204, 41, 88, 43, + 70, 182, 60, 36, 28, 136, 221, 189, + 1, 147, 209, 67, 160, 107, 246, 113, + 102, 39, 216, 125, 157, 41, 226, 66, + 246, 252, 143, 56, 108, 124, 161, 215, + 153, 155, 93, 222, 200, 179, 61, 194, + 115, 248, 107, 168, 7, 145, 102, 142, + 145, 206, 72, 183, 202, 128, 157, 36, + 53, 162, 163, 112, 153, 241, 29, 100, + 26, 86, 122, 151, 31, 252, 186, 188, + 79, 33, 101, 5, 113, 103, 216, 62, + 102, 62, 188, 89, 130, 101, 167, 158, + 155, 43, 99, 208, 76, 237, 197, 94, + 250, 87, 54, 254, 177, 239, 177, 37, + 29, 137, 49, 56, 201, 48, 191, 80, + 31, 103, 30, 233, 106, 7, 43, 97, + 4, 167, 23, 177, 163, 193, 37, 64, + 151, 18, 169, 201, 198, 128, 60, 140, + 173, 18, 24, 137, 241, 201, 8, 111, + 173, 105, 194, 69, 171, 82, 241, 140, + 183, 27, 235, 56, 38, 235, 74, 68, + 156, 211, 209, 131, 115, 37, 74, 103, + 240, 34, 91, 36, 85, 20, 100, 132, + 235, 10, 244, 94, 102, 146, 243, 247, + 159, 183, 104, 12, 205, 243, 52, 203, + 222, 135, 81, 23, 152, 213, 97, 15, + 34, 58, 195, 180, 126, 135, 246, 163, + 13, 208, 22, 193, 20, 5, 146, 73, + 101, 81, 137, 175, 155, 230, 43, 200, + 155, 108, 240, 99, 137, 211, 59, 44, + 78, 169, 206, 36, 57, 158, 34, 14, + 24, 13, 108, 211, 101, 88, 80, 239, + 166, 15, 28, 234, 222, 18, 222, 188, + 68, 149, 173, 69, 26, 124, 139, 174, + 232, 172, 97, 224, 103, 94, 2, 15, + 224, 246, 183, 203, 209, 99, 173, 18, + 99, 237, 157, 57, 31, 75, 19, 174, + 27, 11, 111, 248, 204, 8, 52, 131, + 45, 251, 32, 89, 247, 25, 40, 65, + 78, 187, 142, 243, 76, 156, 140, 51, + 67, 95, 73, 39, 58, 24, 213, 25, + 175, 92, 161, 188, 56, 196, 115, 91, + 8, 105, 73, 177, 15, 17, 32, 0, + 247, 174, 122, 75, 174, 92, 111, 211, + 192, 93, 151, 182, 1, 20, 195, 222, + 234, 89, 82, 31, 39, 92, 223, 12, + 8, 41, 130, 122, 148, 188, 253, 76, + 7, 149, 136, 212, 113, 253, 49, 116, + 211, 29, 69, 127, 152, 109, 135, 54, + 147, 53, 241, 42, 239, 98, 189, 197, + 47, 120, 41, 57, 74, 107, 108, 99, + 17, 140, 215, 134, 226, 82, 37, 229, + 67, 218, 145, 147, 168, 107, 73, 51, + 141, 224, 255, 39, 131, 99, 112, 121, + 162, 37, 160, 52, 241, 238, 58, 66, + 215, 96, 53, 166, 164, 213, 73, 29, + 58, 128, 0, 152, 6, 141, 196, 87, + 140, 126, 168, 151, 249, 183, 125, 172, + 37, 79, 136, 210, 61, 170, 13, 31, + 171, 131, 9, 236, 62, 100, 74, 141, + 104, 249, 140, 52, 159, 233, 28, 170, + 138, 138, 178, 54, 153, 10, 132, 39, + 76, 237, 33, 18, 1, 60, 126, 86, + 182, 236, 147, 55, 13, 87, 116, 175, + 48, 48, 200, 206, 92, 32, 120, 4, + 130, 43, 194, 188, 115, 241, 158, 195, + 19, 155, 110, 172, 86, 99, 131, 47, + 178, 188, 168, 231, 75, 149, 35, 139, + 133, 18, 71, 231, 208, 237, 151, 34, + 172, 95, 149, 47, 57, 189, 229, 49, + 31, 64, 83, 84, 145, 16, 102, 29, + 9, 157, 213, 226, 57, 174, 94, 142, + 190, 135, 86, 178, 211, 75, 80, 210, + 254, 192, 125, 241, 226, 128, 68, 87, + 243, 97, 13, 100, 200, 75, 122, 44, + 233, 145, 121, 197, 91, 126, 10, 144, + 163, 234, 209, 162, 144, 39, 74, 247, + 86, 235, 26, 84, 18, 247, 41, 72, + 137, 220, 49, 194, 211, 57, 87, 97, + 254, 211, 182, 240, 158, 253, 140, 75, + 211, 41, 220, 175, 250, 74, 29, 27, + 220, 89, 74, 45, 173, 242, 73, 60, + 158, 171, 16, 216, 36, 158, 203, 180, + 70, 192, 133, 225, 96, 106, 251, 158, + 137, 91, 253, 141, 181, 255, 246, 77, + 56, 83, 167, 186, 177, 219, 36, 173, + 137, 187, 126, 81, 139, 226, 67, 66, + 22, 204, 188, 91, 88, 229, 48, 3, + 45, 9, 184, 179, 254, 28, 55, 20, + 110, 185, 230, 148, 134, 208, 12, 171, + 87, 103, 63, 99, 2, 206, 131, 201, + 138, 15, 240, 80, 187, 183, 85, 222, + 57, 55, 197, 122, 122, 113, 190, 246, + 74, 241, 172, 94, 57, 93, 11, 148, + 80, 206, 32, 171, 142, 210, 20, 42, + 247, 179, 14, 103, 77, 125, 129, 175, + 184, 112, 36, 34, 62, 118, 139, 249, + 178, 153, 45, 180, 132, 145, 60, 147, + 251, 58, 158, 161, 111, 242, 188, 70, + 86, 70, 151, 83, 10, 96, 62, 120, + 176, 117, 240, 106, 219, 153, 144, 218, + 204, 120, 214, 16, 110, 121, 14, 94, + 45, 77, 249, 135, 89, 109, 152, 143, + 67, 81, 185, 6, 132, 6, 181, 110, + 222, 3, 37, 100, 218, 101, 95, 18, + 171, 217, 141, 18, 163, 224, 116, 111, + 169, 72, 233, 88, 75, 7, 78, 164, + 235, 130, 213, 224, 64, 127, 248, 168, + 30, 14, 120, 83, 237, 125, 87, 35, + 156, 114, 131, 241, 107, 121, 216, 6, + 83, 76, 212, 45, 155, 51, 195, 6, + 88, 18, 25, 158, 165, 90, 200, 167, + 170, 208, 52, 15, 117, 213, 231, 147, + 108, 249, 12, 175, 144, 4, 115, 28, + 101, 78, 166, 242, 249, 72, 236, 215, + 90, 48, 16, 81, 208, 200, 113, 143, + 157, 21, 105, 87, 212, 44, 79, 235, + 94, 226, 211, 63, 185, 145, 151, 235, + 56, 12, 57, 213, 9, 204, 211, 44, + 63, 88, 247, 156, 247, 192, 104, 19, + 227, 24, 40, 157, 114, 90, 237, 89, + 83, 95, 15, 159, 163, 22, 51, 152, + 231, 142, 128, 122, 194, 175, 134, 225, + 18, 35, 116, 68, 13, 126, 13, 171, + 193, 42, 130, 86, 130, 210, 190, 28, + 254, 210, 18, 203, 93, 245, 224, 25, + 37, 95, 52, 61, 10, 222, 10, 74, + 163, 154, 54, 46, 238, 87, 106, 78, + 102, 143, 45, 159, 250, 231, 65, 149, + 245, 5, 164, 72, 95, 146, 43, 19, + 161, 33, 155, 94, 13, 148, 117, 135, + 171, 31, 100, 113, 240, 254, 169, 106, + 149, 23, 109, 240, 194, 128, 157, 156, + 110, 128, 75, 169, 158, 127, 152, 190, + 29, 82, 143, 154, 120, 131, 205, 113, + 11, 66, 112, 95, 183, 33, 111, 214, + 102, 147, 51, 45, 21, 87, 236, 226, + 231, 140, 212, 51, 198, 242, 5, 166, + 200, 99, 194, 207, 99, 217, 96, 11, + 43, 143, 1, 241, 239, 152, 2, 152, + 175, 28, 13, 207, 80, 238, 138, 248, + 121, 197, 110, 12, 139, 36, 226, 255, + 82, 226, 124, 245, 120, 70, 183, 195, + 5, 118, 214, 141, 175, 31, 245, 91, + 239, 34, 79, 100, 188, 168, 139, 114, + 254, 210, 6, 205, 191, 196, 107, 51, + 151, 89, 40, 139, 100, 197, 209, 252, + 140, 141, 127, 110, 7, 10, 162, 81, + 110, 123, 75, 156, 138, 20, 13, 134, + 75, 186, 199, 83, 119, 89, 89, 171, + 141, 10, 255, 120, 190, 118, 57, 63, + 182, 140, 26, 201, 232, 222, 58, 41, + 75, 155, 0, 188, 101, 240, 98, 97, + 52, 58, 7, 199, 140, 247, 42, 193, + 26, 66, 206, 51, 248, 202, 198, 83, + 224, 96, 206, 214, 224, 130, 212, 67, + 190, 10, 166, 48, 69, 82, 216, 36, + 223, 166, 249, 113, 203, 37, 208, 94, + 105, 105, 225, 160, 22, 80, 144, 70, + 210, 236, 182, 158, 124, 182, 224, 43, + 198, 198, 130, 231, 216, 58, 156, 208, + 11, 19, 218, 102, 94, 136, 74, 100, + 167, 117, 168, 161, 107, 50, 133, 102, + 198, 149, 107, 76, 206, 163, 230, 165, + 175, 85, 134, 203, 29, 246, 27, 250, + 161, 155, 13, 216, 253, 206, 45, 150, + 255, 225, 129, 152, 232, 121, 191, 145, + 126, 52, 211, 80, 7, 231, 18, 217, + 160, 35, 11, 227, 30, 186, 139, 150, + 170, 133, 235, 73, 210, 28, 129, 40, + 158, 71, 233, 84, 135, 13, 116, 58, + 208, 60, 136, 87, 250, 225, 134, 53, + 139, 18, 221, 251, 242, 13, 8, 170, + 70, 83, 43, 40, 247, 36, 187, 186, + 155, 29, 181, 158, 23, 214, 104, 231, + 28, 239, 64, 71, 46, 65, 27, 187, + 222, 233, 204, 235, 165, 48, 199, 113, + 246, 226, 44, 255, 27, 157, 198, 100, + 172, 149, 234, 113, 127, 243, 46, 254, + 58, 195, 26, 21, 246, 124, 178, 62, + 80, 46, 41, 27, 41, 50, 220, 34, + 118, 161, 202, 193, 230, 161, 91, 247, + 21, 202, 105, 128, 87, 192, 167, 196, + 179, 243, 59, 105, 171, 198, 129, 96, + 73, 22, 1, 167, 216, 159, 17, 8, + 235, 24, 23, 51, 208, 150, 251, 168, + 61, 40, 154, 25, 12, 58, 57, 116, + 55, 81, 102, 92, 217, 140, 202, 27, + 73, 114, 142, 184, 234, 199, 234, 96, + 2, 204, 142, 116, 21, 113, 105, 126, + 72, 177, 50, 138, 74, 242, 182, 106, + 94, 153, 3, 174, 116, 246, 86, 160, + 182, 184, 95, 55, 215, 233, 241, 221, + 245, 12, 64, 17, 167, 163, 75, 137, + 178, 76, 102, 114, 173, 231, 91, 147, + 228, 75, 168, 130, 14, 217, 244, 61, + 176, 63, 248, 226, 170, 148, 245, 247, + 196, 82, 198, 219, 77, 182, 52, 125, + 46, 97, 236, 54, 40, 222, 73, 167, + 64, 67, 242, 102, 93, 179, 83, 10, + 194, 34, 90, 49, 26, 12, 233, 222, + 235, 44, 61, 229, 136, 212, 94, 16, + 93, 195, 54, 228, 203, 39, 186, 158, + 234, 146, 20, 35, 252, 241, 47, 224, + 31, 23, 250, 165, 58, 47, 39, 235, + 62, 4, 224, 45, 227, 23, 148, 195, + 37, 17, 72, 112, 79, 153, 64, 129, + 197, 183, 29, 123, 46, 130, 141, 80, + 114, 204, 254, 25, 37, 15, 238, 217, + 6, 67, 40, 177, 133, 228, 245, 82, + 22, 76, 49, 252, 35, 222, 125, 103, + 250, 14, 50, 46, 31, 79, 47, 79, + 103, 97, 6, 65, 112, 152, 131, 193, + 198, 166, 212, 184, 207, 100, 40, 78, + 96, 168, 25, 105, 2, 66, 196, 137, + 64, 94, 217, 7, 138, 23, 103, 218, + 166, 165, 190, 227, 242, 225, 186, 192, + 4, 44, 221, 99, 71, 60, 143, 165, + 242, 36, 32, 68, 35, 160, 7, 1, + 16, 66, 113, 145, 224, 15, 95, 198, + 39, 46, 111, 224, 120, 252, 190, 132, + 43, 255, 183, 135, 236, 21, 100, 196, + 108, 133, 239, 241, 52, 248, 129, 193, + 31, 248, 0, 138, 162, 9, 227, 138, + 48, 238, 210, 197, 166, 97, 34, 38, + 83, 48, 148, 219, 24, 168, 78, 65, + 101, 133, 202, 237, 141, 149, 151, 168, + 235, 92, 238, 206, 222, 61, 3, 43, + 90, 202, 171, 35, 32, 222, 98, 142, + 141, 69, 205, 186, 207, 52, 248, 100, + 234, 217, 203, 255, 248, 121, 59, 90, + 83, 84, 222, 129, 138, 110, 249, 42, + 24, 235, 177, 87, 185, 219, 2, 85, + 133, 25, 245, 14, 182, 5, 70, 171, + 49, 252, 233, 119, 13, 165, 77, 57, + 150, 132, 83, 50, 112, 115, 159, 250, + 196, 111, 147, 179, 145, 244, 130, 16, + 86, 35, 222, 173, 226, 218, 63, 41, + 3, 207, 207, 199, 64, 124, 214, 42, + 126, 93, 222, 105, 216, 210, 252, 21, + 0, 177, 9, 194, 157, 160, 245, 122, + 148, 138, 152, 79, 84, 154, 70, 119, + 115, 93, 213, 226, 136, 214, 15, 165, + 42, 125, 175, 31, 147, 51, 45, 242, + 97, 245, 168, 58, 47, 177, 194, 24, + 59, 25, 199, 169, 132, 195, 236, 240, + 191, 142, 86, 151, 19, 233, 20, 147, + 240, 207, 56, 17, 227, 224, 245, 246, + 167, 177, 115, 17, 177, 166, 33, 182, + 64, 217, 40, 125, 24, 94, 214, 73, + 167, 125, 96, 232, 190, 205, 115, 157, + 26, 202, 234, 125, 176, 222, 208, 50, + 39, 208, 11, 58, 236, 174, 198, 2, + 28, 227, 141, 17, 212, 193, 178, 114, + 1, 87, 238, 1, 235, 255, 146, 131, + 82, 139, 156, 128, 96, 85, 75, 243, + 165, 24, 42, 220, 131, 165, 91, 156, + 118, 159, 28, 52, 147, 105, 179, 91, + 216, 56, 32, 222, 172, 31, 188, 215, + 161, 139, 9, 186, 152, 105, 155, 195, + 147, 159, 217, 198, 116, 58, 61, 89, + 60, 202, 220, 176, 114, 36, 150, 151, + 239, 221, 223, 202, 202, 93, 225, 51, + 191, 92, 220, 60, 146, 222, 210, 119, + 144, 187, 151, 26, 192, 27, 184, 46, + 206, 234, 31, 179, 28, 208, 43, 3, + 59, 92, 58, 231, 7, 196, 155, 61, + 201, 211, 141, 38, 143, 43, 238, 129, + 33, 250, 192, 53, 112, 173, 6, 67, + 13, 234, 154, 13, 50, 201, 97, 80, + 45, 13, 215, 162, 255, 224, 20, 211, + 47, 12, 73, 220, 186, 141, 5, 149, + 81, 232, 3, 195, 223, 152, 199, 149, + 128, 160, 83, 112, 64, 107, 110, 170, + 6, 65, 41, 48, 244, 144, 206, 151, + 106, 248, 31, 174, 217, 199, 73, 107, + 101, 38, 92, 204, 121, 127, 195, 209, + 187, 86, 99, 150, 95, 192, 16, 62, + 75, 35, 197, 197, 166, 187, 143, 191, + 203, 20, 240, 171, 56, 62, 212, 37, + 14, 17, 213, 181, 78, 21, 171, 44, + 204, 32, 144, 208, 60, 171, 85, 92, + 157, 198, 247, 235, 124, 74, 225, 76, + 69, 100, 19, 237, 181, 255, 106, 208, + 247, 83, 31, 152, 24, 220, 173, 104, + 191, 35, 185, 24, 216, 233, 39, 115, + 151, 93, 35, 201, 133, 20, 211, 159, + 180, 164, 80, 137, 199, 155, 192, 207, + 224, 182, 108, 186, 208, 123, 167, 116, + 148, 36, 245, 50, 221, 51, 143, 45, + 244, 235, 215, 84, 158, 128, 205, 19, + 119, 139, 121, 46, 46, 152, 104, 95, + 178, 210, 107, 132, 96, 14, 118, 54, + 89, 18, 42, 3, 236, 20, 136, 32, + 125, 160, 106, 239, 4, 216, 119, 43, + 208, 33, 170, 114, 13, 206, 157, 126, + 53, 161, 91, 43, 167, 78, 195, 87, + 124, 114, 164, 130, 181, 69, 114, 103, + 83, 43, 127, 30, 158, 108, 127, 247, + 130, 252, 42, 88, 241, 89, 185, 108, + 63, 170, 46, 143, 157, 20, 74, 164, + 182, 225, 228, 209, 230, 111, 143, 12, + 173, 23, 7, 12, 228, 92, 136, 89, + 122, 37, 151, 165, 115, 17, 144, 197, + 102, 194, 238, 149, 228, 167, 255, 124, + 238, 147, 21, 203, 16, 131, 235, 62, + 106, 233, 8, 166, 18, 145, 137, 11, + 7, 50, 139, 124, 214, 144, 253, 60, + 231, 22, 165, 67, 87, 162, 70, 253, + 222, 195, 149, 124, 235, 122, 135, 53, + 77, 84, 97, 70, 163, 43, 133, 255, + 37, 188, 97, 213, 231, 119, 61, 164, + 103, 85, 235, 207, 119, 118, 242, 225, + 116, 138, 85, 102, 234, 213, 20, 126, + 104, 112, 23, 42, 188, 69, 81, 89, + 139, 22, 147, 106, 250, 247, 52, 27, + 49, 215, 26, 114, 21, 92, 89, 56, + 251, 145, 13, 248, 115, 251, 48, 125, + 210, 51, 122, 29, 73, 206, 206, 243, + 176, 18, 231, 207, 71, 132, 41, 144, + 229, 208, 160, 24, 142, 129, 99, 216, + 98, 184, 30, 8, 222, 242, 113, 218, + 74, 98, 140, 72, 141, 223, 56, 195, + 218, 110, 216, 211, 202, 255, 26, 76, + 35, 62, 176, 198, 34, 123, 179, 175, + 64, 78, 71, 186, 182, 230, 100, 54, + 106, 229, 2, 76, 26, 233, 221, 141, + 160, 135, 87, 158, 35, 76, 220, 194, + 146, 51, 75, 218, 92, 191, 151, 250, + 178, 209, 218, 184, 171, 29, 247, 65, + 164, 48, 121, 7, 230, 30, 226, 189, + 43, 4, 215, 162, 161, 188, 8, 44, + 106, 27, 226, 4, 127, 51, 227, 36, + 114, 185, 116, 42, 17, 117, 172, 23, + 252, 255, 75, 102, 79, 45, 187, 91, + 227, 58, 216, 252, 72, 36, 230, 121, + 173, 248, 211, 47, 239, 135, 129, 52, + 5, 223, 152, 67, 96, 88, 153, 62, + 111, 232, 240, 214, 245, 216, 149, 193, + 197, 156, 63, 225, 157, 166, 211, 62, + 90, 60, 64, 192, 244, 215, 251, 110, + 39, 155, 198, 215, 77, 250, 18, 15, + 14, 90, 193, 17, 62, 249, 84, 55, + 114, 75, 71, 143, 180, 154, 20, 193, + 186, 141, 189, 172, 52, 181, 233, 239, + 207, 103, 171, 12, 100, 254, 60, 171, + 148, 132, 91, 80, 40, 189, 127, 68, + 225, 33, 2, 160, 70, 26, 88, 178, + 239, 47, 240, 228, 188, 184, 38, 77, + 233, 175, 135, 212, 207, 225, 240, 255, + 90, 27, 45, 107, 101, 186, 241, 100, + 175, 246, 133, 57, 212, 232, 169, 100, + 241, 174, 91, 143, 69, 47, 30, 237, + 85, 0, 13, 113, 111, 172, 87, 235, + 112, 203, 27, 68, 2, 129, 197, 167, + 200, 202, 107, 178, 204, 37, 215, 199, + 246, 231, 203, 136, 64, 102, 180, 157, + 77, 212, 169, 120, 89, 74, 73, 164, + 192, 237, 88, 189, 120, 105, 205, 125, + 115, 248, 50, 6, 239, 153, 253, 238, + 157, 249, 136, 206, 253, 28, 10, 95, + 96, 109, 222, 78, 250, 81, 61, 173, + 120, 148, 216, 218, 92, 34, 201, 146, + 93, 200, 122, 70, 107, 67, 10, 1, + 232, 180, 61, 125, 228, 152, 54, 132, + 88, 1, 122, 211, 30, 103, 12, 204, + 185, 18, 207, 71, 177, 127, 252, 112, + 104, 155, 162, 145, 42, 39, 22, 180, + 173, 53, 3, 1, 29, 39, 135, 231, + 85, 51, 129, 124, 205, 11, 185, 50, + 198, 159, 122, 214, 249, 195, 85, 179, + 123, 246, 61, 169, 237, 248, 250, 227, + 151, 213, 82, 54, 207, 6, 138, 227, + 229, 95, 51, 81, 185, 197, 146, 75, + 93, 45, 117, 39, 167, 164, 20, 125, + 24, 186, 76, 118, 158, 180, 104, 21, + 75, 79, 81, 111, 150, 30, 6, 91, + 142, 16, 140, 90, 102, 31, 82, 24, + 184, 51, 9, 3, 198, 27, 206, 74, + 65, 126, 40, 21, 13, 7, 235, 131, + 88, 170, 225, 177, 183, 66, 38, 11, + 107, 158, 240, 169, 111, 1, 76, 170, + 215, 76, 116, 27, 191, 211, 81, 105, + 36, 112, 231, 133, 58, 162, 184, 4, + 84, 165, 20, 171, 201, 207, 43, 186, + 202, 87, 178, 24, 56, 138, 163, 92, + 143, 153, 156, 98, 126, 77, 152, 217, + 88, 128, 149, 163, 171, 150, 25, 113, + 28, 253, 174, 102, 169, 207, 219, 70, + 229, 213, 127, 238, 240, 60, 230, 190, + 11, 127, 155, 90, 46, 127, 233, 13, + 126, 101, 234, 36, 199, 128, 132, 217, + 126, 147, 62, 8, 216, 3, 189, 136, + 224, 147, 172, 228, 111, 19, 111, 254, + 152, 52, 150, 21, 98, 250, 212, 44, + 172, 65, 229, 144, 38, 63, 177, 205, + 202, 121, 224, 138, 89, 53, 124, 98, + 55, 183, 165, 149, 210, 185, 120, 131, + 3, 159, 249, 40, 168, 145, 159, 30, + 131, 110, 147, 90, 219, 96, 57, 184, + 75, 138, 147, 108, 112, 45, 182, 151, + 42, 214, 187, 43, 62, 173, 172, 68, + 120, 15, 37, 135, 130, 86, 130, 46, + 112, 85, 230, 12, 76, 254, 203, 150, + 16, 240, 122, 212, 10, 134, 232, 32, + 215, 125, 19, 230, 159, 24, 156, 159, + 62, 56, 97, 9, 155, 59, 89, 221, + 76, 223, 58, 21, 118, 175, 104, 180, + 62, 210, 62, 174, 220, 147, 42, 85, + 43, 231, 18, 80, 254, 171, 239, 104, + 120, 157, 37, 167, 254, 128, 175, 32, + 118, 92, 105, 182, 180, 127, 22, 38, + 23, 146, 102, 113, 247, 224, 0, 216, + 86, 105, 80, 240, 8, 164, 68, 131, + 188, 29, 39, 195, 254, 88, 54, 130, + 97, 156, 178, 40, 216, 64, 244, 51, + 5, 68, 243, 208, 99, 142, 227, 15, + 246, 8, 89, 87, 2, 242, 90, 211, + 113, 150, 62, 60, 189, 109, 141, 3, + 96, 201, 127, 51, 179, 201, 239, 6, + 152, 255, 112, 104, 72, 73, 34, 120, + 226, 50, 34, 43, 207, 20, 151, 84, + 114, 153, 92, 91, 180, 234, 108, 206, + 106, 28, 68, 28, 93, 81, 133, 139, + 207, 195, 147, 246, 132, 104, 119, 110, + 118, 208, 39, 42, 28, 119, 75, 188, + 82, 144, 205, 138, 247, 132, 136, 232, + 177, 49, 100, 23, 224, 208, 215, 112, + 112, 225, 73, 146, 220, 254, 119, 90, + 140, 175, 218, 170, 191, 87, 171, 29, + 183, 20, 112, 36, 14, 123, 73, 180, + 208, 21, 50, 143, 225, 102, 242, 193, + 132, 23, 14, 147, 251, 115, 225, 88, + 40, 80, 122, 151, 15, 90, 22, 105, + 250, 199, 81, 73, 206, 86, 63, 241, + 34, 134, 158, 127, 79, 39, 151, 7, + 232, 50, 196, 161, 160, 24, 114, 255, + 174, 137, 52, 244, 75, 246, 20, 203, + 224, 80, 116, 130, 254, 71, 251, 204, + 226, 20, 164, 134, 237, 223, 160, 37, + 61, 76, 223, 219, 79, 48, 137, 178, + 2, 125, 21, 36, 127, 149, 255, 249, + 192, 18, 92, 42, 129, 192, 177, 212, + 90, 249, 120, 200, 239, 135, 143, 119, + 170, 110, 16, 176, 200, 59, 58, 233, + 115, 168, 156, 231, 222, 242, 190, 158, + 238, 98, 229, 227, 43, 39, 243, 213, + 234, 142, 20, 1, 225, 130, 167, 229, + 49, 17, 237, 60, 109, 246, 168, 171, + 40, 61, 98, 225, 119, 118, 112, 49, + 68, 160, 203, 76, 13, 191, 147, 238, + 231, 95, 40, 24, 159, 46, 166, 80, + 191, 207, 128, 73, 132, 190, 167, 27, + 195, 95, 70, 36, 23, 214, 116, 99, + 197, 171, 143, 186, 226, 214, 171, 150, + 36, 57, 59, 28, 158, 70, 44, 93, + 111, 92, 153, 6, 253, 166, 82, 123, + 184, 27, 252, 116, 235, 91, 141, 209, + 114, 61, 138, 151, 86, 234, 216, 191, + 31, 71, 96, 255, 46, 212, 36, 227, + 179, 51, 124, 1, 191, 103, 130, 69, + 164, 235, 16, 40, 254, 114, 213, 155, + 71, 214, 145, 115, 73, 245, 139, 176, + 234, 37, 66, 224, 39, 83, 177, 32, + 125, 23, 30, 27, 194, 21, 144, 73, + 100, 97, 213, 193, 29, 170, 124, 238, + 44, 182, 78, 165, 143, 103, 39, 71, + 143, 239, 238, 28, 241, 22, 249, 173, + 225, 94, 95, 31, 134, 9, 78, 243, + 223, 239, 23, 21, 136, 93, 249, 64, + 22, 168, 28, 101, 91, 231, 151, 129, + 167, 233, 202, 241, 68, 246, 22, 148, + 171, 201, 229, 168, 189, 77, 151, 251, + 92, 50, 244, 17, 188, 56, 39, 83, + 9, 87, 252, 140, 244, 27, 99, 242, + 225, 208, 237, 222, 244, 238, 156, 125, + 219, 59, 90, 225, 234, 57, 45, 12, + 252, 19, 41, 177, 15, 9, 73, 96, + 9, 37, 139, 230, 205, 101, 230, 141, + 118, 64, 50, 119, 109, 132, 24, 196, + 141, 115, 28, 217, 39, 190, 186, 23, + 74, 62, 79, 11, 68, 107, 190, 200, + 32, 29, 169, 157, 185, 29, 15, 240, + 193, 174, 140, 129, 112, 12, 137, 101, + 160, 250, 220, 198, 0, 45, 57, 54, + 73, 115, 37, 52, 61, 135, 232, 241, + 22, 161, 136, 86, 187, 162, 47, 166, + 231, 25, 144, 254, 130, 154, 95, 237, + 96, 124, 86, 126, 60, 247, 14, 88, + 150, 230, 242, 54, 162, 96, 41, 73, + 102, 15, 173, 103, 132, 148, 133, 70, + 244, 129, 3, 115, 127, 8, 109, 14, + 8, 228, 171, 171, 217, 19, 73, 147, + 6, 43, 96, 158, 37, 14, 255, 22, + 184, 65, 151, 82, 244, 36, 203, 178, + 204, 93, 91, 221, 120, 215, 196, 37, + 162, 248, 119, 180, 171, 185, 17, 168, + 143, 129, 184, 90, 187, 228, 46, 148, + 164, 82, 185, 62, 210, 87, 158, 146, + 20, 23, 139, 10, 19, 129, 143, 152, + 125, 40, 212, 174, 193, 10, 157, 163, + 207, 47, 205, 243, 1, 0, 23, 207, + 16, 168, 250, 239, 20, 223, 146, 94, + 187, 23, 245, 109, 69, 10, 47, 210, + 203, 66, 246, 161, 90, 108, 21, 164, + 38, 222, 57, 245, 218, 8, 156, 65, + 147, 77, 139, 94, 182, 84, 231, 252, + 20, 159, 169, 188, 62, 205, 101, 226, + 11, 224, 142, 79, 90, 248, 156, 107, + 154, 103, 90, 92, 92, 116, 67, 84, + 252, 247, 230, 251, 218, 108, 203, 134, + 158, 147, 0, 70, 81, 128, 83, 30, + 96, 86, 247, 82, 191, 212, 120, 158, + 125, 183, 172, 134, 143, 44, 109, 0, + 77, 217, 55, 238, 66, 42, 38, 59, + 218, 132, 65, 127, 76, 178, 148, 160, + 129, 15, 95, 186, 178, 78, 185, 84, + 188, 22, 114, 207, 67, 135, 219, 215, + 206, 181, 177, 140, 249, 196, 75, 233, + 124, 125, 196, 21, 150, 233, 7, 104, + 190, 182, 8, 200, 156, 20, 179, 48, + 232, 148, 27, 170, 215, 68, 68, 146, + 107, 163, 146, 213, 255, 38, 97, 60, + 192, 1, 128, 204, 127, 20, 180, 53, + 69, 165, 95, 18, 96, 26, 110, 42, + 65, 180, 132, 200, 79, 43, 2, 209, + 135, 56, 197, 190, 130, 206, 184, 53, + 178, 119, 140, 35, 13, 20, 124, 59, + 241, 250, 194, 95, 115, 39, 88, 64, + 213, 240, 155, 114, 183, 252, 142, 250, + 158, 48, 5, 5, 44, 141, 201, 138, + 139, 11, 216, 87, 108, 32, 86, 156, + 65, 161, 179, 20, 46, 157, 200, 9, + 190, 67, 11, 91, 134, 137, 91, 227, + 28, 225, 159, 34, 240, 169, 222, 145, + 8, 149, 185, 198, 218, 87, 147, 133, + 127, 66, 161, 21, 60, 149, 213, 170, + 155, 54, 169, 97, 93, 236, 230, 133, + 182, 187, 193, 237, 122, 68, 207, 90, + 102, 63, 151, 3, 36, 122, 23, 89, + 250, 174, 194, 241, 142, 86, 96, 31, + 98, 110, 201, 79, 217, 52, 23, 51, + 20, 180, 214, 199, 113, 79, 224, 233, + 126, 55, 253, 216, 48, 195, 72, 200, + 11, 172, 194, 255, 148, 105, 20, 175, + 230, 144, 241, 78, 58, 33, 167, 93, + 24, 217, 199, 66, 134, 86, 176, 23, + 86, 237, 241, 21, 144, 167, 1, 252, + 170, 108, 94, 236, 67, 164, 195, 38, + 148, 93, 173, 135, 187, 211, 6, 27, + 208, 167, 111, 224, 47, 15, 248, 119, + 175, 173, 133, 182, 121, 194, 138, 149, + 66, 5, 4, 152, 2, 23, 198, 173, + 61, 47, 126, 185, 218, 129, 223, 247, + 209, 153, 219, 98, 184, 104, 127, 214, + 196, 181, 203, 91, 3, 4, 0, 171, + 24, 118, 99, 166, 74, 14, 52, 200, + 38, 212, 91, 22, 234, 241, 12, 221, + 132, 243, 211, 2, 18, 11, 130, 49, + 223, 100, 27, 148, 87, 225, 119, 186, + 191, 195, 92, 95, 118, 60, 234, 40, + 87, 213, 143, 105, 235, 202, 194, 148, + 45, 9, 107, 35, 139, 11, 226, 166, + 92, 39, 131, 135, 140, 141, 56, 80, + 199, 42, 208, 27, 41, 94, 39, 77, + 33, 125, 148, 126, 111, 124, 89, 221, + 208, 164, 167, 185, 196, 71, 121, 88, + 189, 216, 109, 196, 166, 29, 216, 151, + 90, 183, 22, 140, 201, 179, 219, 51, + 9, 152, 2, 237, 184, 123, 16, 62, + 71, 178, 213, 97, 109, 79, 246, 82, + 122, 253, 132, 16, 157, 213, 38, 237, + 24, 233, 4, 46, 140, 179, 1, 35, + 160, 52, 179, 34, 159, 248, 214, 167, + 75, 242, 172, 113, 184, 50, 139, 73, + 33, 143, 83, 250, 23, 239, 135, 226, + 153, 175, 60, 5, 184, 148, 199, 208, + 105, 107, 89, 17, 141, 157, 219, 34, + 213, 170, 12, 121, 200, 190, 17, 139, + 136, 13, 29, 187, 145, 184, 165, 190, + 167, 171, 218, 103, 26, 28, 63, 224, + 21, 200, 234, 138, 130, 88, 255, 74, + 61, 233, 91, 19, 70, 210, 27, 61, + 204, 32, 26, 50, 34, 169, 139, 37, + 212, 16, 22, 206, 99, 42, 251, 100, + 208, 41, 58, 200, 101, 65, 100, 57, + 228, 240, 105, 49, 240, 1, 141, 21, + 35, 65, 252, 142, 70, 235, 169, 81, + 252, 215, 62, 88, 117, 180, 148, 169, + 114, 93, 231, 105, 194, 193, 12, 74, + 52, 143, 163, 233, 188, 215, 20, 225, + 2, 28, 79, 113, 27, 166, 204, 160, + 177, 199, 150, 249, 36, 31, 132, 84, + 125, 184, 128, 230, 39, 139, 197, 169, + 153, 2, 52, 37, 39, 180, 202, 237, + 46, 43, 185, 255, 235, 149, 230, 227, + 186, 248, 81, 198, 122, 15, 185, 44, + 137, 112, 218, 156, 94, 107, 181, 233, + 121, 28, 6, 194, 153, 174, 144, 146, + 174, 253, 111, 138, 49, 253, 158, 80, + 23, 174, 167, 203, 235, 112, 196, 66, + 251, 123, 97, 137, 21, 218, 131, 28, + 31, 83, 121, 160, 84, 31, 13, 60, + 103, 33, 32, 12, 161, 136, 107, 38, + 30, 111, 53, 176, 192, 122, 166, 47, + 160, 122, 22, 117, 224, 150, 128, 249, + 21, 27, 222, 119, 38, 182, 73, 248, + 246, 101, 240, 33, 30, 189, 13, 37, + 211, 123, 70, 50, 163, 104, 170, 166, + 33, 131, 13, 34, 252, 127, 156, 187, + 14, 135, 40, 125, 156, 169, 229, 77, + 110, 143, 155, 61, 198, 49, 87, 118, + 229, 27, 204, 141, 7, 174, 222, 126, + 248, 15, 132, 101, 251, 123, 117, 138, + 166, 132, 252, 35, 218, 35, 27, 17, + 119, 103, 136, 167, 101, 114, 151, 106, + 229, 44, 95, 2, 106, 21, 187, 221, + 97, 110, 144, 140, 12, 168, 99, 114, + 250, 34, 159, 60, 229, 203, 25, 135, + 23, 179, 240, 182, 232, 64, 182, 156, + 183, 132, 17, 25, 199, 165, 36, 28, + 44, 177, 23, 18, 142, 4, 142, 53, + 186, 182, 218, 180, 215, 243, 5, 124, + 227, 108, 20, 121, 235, 131, 237, 211, + 0, 95, 97, 204, 225, 156, 122, 219, + 73, 217, 102, 114, 27, 126, 241, 235, + 14, 173, 234, 208, 155, 181, 60, 84, + 7, 247, 174, 151, 215, 141, 41, 225, + 101, 119, 145, 89, 255, 35, 64, 108, + 30, 53, 72, 215, 219, 106, 160, 90, + 17, 235, 159, 119, 107, 112, 236, 208, + 61, 81, 203, 182, 58, 39, 251, 251, + 90, 188, 137, 106, 7, 129, 92, 166, + 127, 230, 89, 116, 243, 228, 208, 222, + 140, 118, 71, 226, 152, 213, 41, 48, + 40, 215, 110, 69, 211, 252, 222, 68, + 187, 77, 166, 165, 201, 9, 118, 149, + 203, 19, 235, 199, 50, 210, 44, 62, + 41, 201, 65, 173, 29, 10, 219, 24, + 106, 53, 235, 37, 77, 73, 68, 159, + 92, 229, 80, 87, 217, 53, 219, 91, + 66, 155, 16, 3, 232, 184, 151, 36, + 155, 226, 197, 93, 50, 91, 140, 180, + 140, 250, 63, 18, 15, 237, 49, 237, + 58, 225, 135, 81, 90, 209, 103, 50, + 70, 49, 248, 42, 253, 42, 104, 146, + 92, 157, 75, 104, 115, 78, 102, 209, + 6, 242, 24, 101, 175, 243, 147, 239, + 213, 37, 124, 85, 139, 103, 195, 5, + 161, 177, 180, 157, 86, 237, 18, 173, + 143, 84, 177, 228, 63, 203, 128, 12, + 7, 71, 90, 105, 87, 137, 118, 177, + 147, 27, 108, 199, 152, 0, 50, 120, + 170, 163, 206, 203, 245, 94, 240, 76, + 234, 53, 158, 17, 95, 198, 151, 157, + 144, 168, 14, 189, 176, 68, 52, 9, + 46, 171, 1, 141, 245, 184, 190, 95, + 16, 197, 99, 185, 167, 185, 102, 245, + 74, 252, 224, 32, 236, 108, 121, 129, + 200, 34, 140, 228, 109, 228, 150, 41, + 68, 177, 120, 17, 17, 68, 188, 103, + 10, 216, 164, 154, 248, 232, 53, 31, + 85, 243, 4, 100, 43, 195, 96, 240, + 153, 167, 100, 21, 89, 141, 151, 197, + 113, 114, 0, 245, 173, 108, 203, 220, + 162, 5, 191, 102, 31, 133, 123, 198, + 194, 163, 195, 175, 28, 150, 23, 224, + 2, 143, 115, 225, 197, 91, 133, 202, + 123, 244, 5, 23, 91, 24, 127, 138, + 99, 7, 161, 153, 130, 183, 214, 43, + 30, 35, 136, 179, 118, 215, 200, 97, + 8, 108, 129, 219, 105, 0, 198, 55, + 170, 170, 159, 77, 185, 133, 98, 4, + 10, 202, 48, 79, 213, 80, 23, 217, + 124, 64, 239, 12, 162, 186, 154, 157, + 44, 160, 129, 70, 162, 40, 242, 110, + 99, 104, 127, 219, 243, 114, 253, 96, + 103, 9, 162, 36, 219, 178, 222, 253, + 32, 168, 91, 210, 169, 113, 210, 219, + 71, 201, 164, 13, 13, 212, 11, 181, + 95, 255, 76, 5, 139, 237, 242, 253, + 199, 247, 71, 28, 109, 132, 94, 219, + 27, 10, 22, 185, 115, 13, 170, 215, + 119, 249, 64, 226, 11, 254, 109, 208, + 56, 184, 147, 134, 249, 246, 86, 190, + 199, 106, 143, 107, 29, 251, 248, 25, + 194, 30, 240, 153, 11, 222, 185, 1, + 202, 111, 125, 138, 95, 106, 32, 128, + 127, 203, 209, 93, 74, 60, 57, 1, + 248, 64, 92, 202, 79, 173, 136, 163, + 174, 197, 126, 241, 254, 169, 128, 248, + 241, 49, 20, 31, 29, 139, 91, 147, + 76, 223, 102, 96, 87, 173, 108, 51, + 158, 45, 152, 182, 178, 170, 196, 134, + 165, 149, 47, 59, 25, 211, 212, 159, + 14, 139, 22, 117, 224, 0, 128, 0, + 203, 157, 250, 69, 129, 187, 189, 181, + 246, 83, 29, 109, 26, 163, 71, 246, + 187, 58, 43, 42, 211, 84, 76, 62, + 112, 132, 164, 194, 77, 168, 60, 136, + 104, 207, 48, 135, 52, 161, 213, 115, + 161, 57, 240, 162, 77, 17, 152, 61, + 211, 2, 62, 87, 43, 255, 159, 174, + 58, 81, 199, 167, 168, 40, 41, 244, + 146, 141, 210, 84, 15, 205, 130, 121, + 204, 233, 86, 113, 21, 93, 83, 15, + 73, 117, 159, 115, 200, 21, 83, 195, + 72, 236, 174, 252, 164, 225, 106, 211, + 162, 210, 89, 142, 47, 4, 120, 25, + 83, 68, 230, 51, 69, 222, 28, 239, + 242, 49, 136, 180, 180, 83, 1, 60, + 141, 84, 252, 164, 205, 246, 235, 126, + 11, 221, 49, 65, 14, 145, 10, 214, + 192, 23, 137, 159, 252, 80, 95, 169, + 30, 189, 49, 249, 14, 98, 37, 110, + 90, 9, 5, 170, 139, 245, 200, 107, + 62, 151, 38, 86, 91, 211, 237, 65, + 133, 108, 160, 230, 196, 225, 209, 196, + 245, 126, 50, 230, 57, 59, 120, 5, + 90, 87, 251, 201, 192, 171, 41, 53, + 18, 68, 134, 148, 38, 49, 7, 200, + 224, 105, 8, 5, 85, 181, 95, 125, + 59, 109, 102, 117, 215, 253, 107, 198, + 208, 213, 128, 11, 1, 202, 54, 116, + 12, 50, 137, 228, 184, 166, 231, 109, + 217, 122, 96, 37, 6, 215, 156, 145, + 15, 66, 40, 98, 158, 22, 28, 118, + 205, 201, 147, 83, 254, 40, 93, 112, + 180, 58, 207, 245, 38, 46, 247, 215, + 65, 74, 79, 165, 91, 186, 56, 115, + 224, 71, 188, 148, 145, 253, 196, 148, + 106, 234, 246, 248, 194, 248, 109, 121, + 172, 53, 26, 210, 121, 97, 206, 168, + 34, 130, 168, 174, 134, 34, 180, 195, + 5, 46, 144, 47, 69, 98, 217, 166, + 112, 3, 86, 85, 126, 220, 76, 1, + 60, 12, 1, 40, 87, 78, 38, 103, + 177, 1, 166, 1, 188, 244, 104, 73, + 144, 77, 225, 115, 112, 53, 201, 51, + 29, 20, 12, 207, 200, 53, 175, 91, + 145, 171, 126, 248, 89, 39, 208, 243, + 118, 30, 204, 83, 117, 41, 237, 243, + 34, 179, 226, 40, 138, 99, 10, 122, + 126, 212, 42, 168, 132, 209, 211, 15, + 27, 29, 70, 157, 236, 19, 122, 44, + 45, 211, 213, 146, 134, 239, 56, 200, + 21, 247, 106, 219, 16, 217, 13, 43, + 63, 76, 27, 227, 25, 200, 36, 181, + 97, 224, 216, 49, 89, 41, 29, 147, + 177, 126, 209, 71, 112, 94, 82, 116, + 39, 10, 50, 188, 32, 42, 165, 35, + 248, 35, 203, 80, 34, 245, 5, 32, + 62, 133, 34, 15, 34, 157, 201, 246, + 202, 159, 50, 184, 167, 223, 168, 190, + 181, 32, 251, 11, 229, 243, 30, 94, + 170, 198, 170, 195, 140, 176, 102, 200, + 168, 128, 178, 11, 53, 82, 230, 151, + 21, 231, 46, 159, 254, 80, 197, 236, + 246, 41, 229, 6, 48, 214, 249, 242, + 21, 225, 50, 84, 74, 79, 112, 174, + 51, 86, 102, 137, 38, 239, 230, 176, + 80, 130, 58, 226, 194, 107, 41, 223, + 255, 250, 6, 236, 223, 254, 93, 8, + 206, 121, 61, 201, 122, 224, 168, 81, + 210, 132, 144, 198, 25, 255, 151, 173, + 148, 195, 98, 97, 177, 118, 99, 90, + 131, 105, 111, 160, 118, 112, 99, 120, + 90, 140, 224, 42, 122, 234, 152, 204, + 35, 137, 18, 57, 40, 14, 191, 15, + 145, 204, 175, 114, 221, 7, 230, 229, + 224, 231, 211, 179, 178, 15, 24, 231, + 96, 157, 102, 224, 193, 106, 187, 142, + 18, 163, 105, 131, 131, 26, 199, 92, + 31, 130, 227, 148, 11, 111, 201, 76, + 182, 37, 198, 61, 173, 16, 137, 227, + 111, 80, 123, 245, 223, 120, 68, 104, + 242, 4, 62, 102, 117, 53, 68, 214, + 163, 83, 197, 162, 170, 144, 118, 86, + 61, 17, 197, 119, 135, 159, 134, 231, + 132, 235, 204, 141, 248, 180, 66, 85, + 248, 98, 229, 104, 131, 74, 166, 198, + 72, 43, 192, 204, 59, 4, 81, 7, + 45, 243, 48, 222, 239, 120, 92, 203, + 27, 151, 140, 107, 227, 40, 145, 131, + 136, 198, 45, 163, 216, 29, 243, 151, + 234, 176, 83, 253, 141, 3, 90, 151, + 169, 110, 229, 108, 12, 147, 122, 254, + 234, 182, 68, 60, 240, 50, 135, 128, + 226, 200, 49, 180, 255, 166, 108, 181, + 225, 162, 110, 169, 174, 0, 7, 53, + 40, 89, 56, 39, 160, 252, 199, 227, + 122, 7, 114, 86, 127, 16, 147, 27, + 226, 15, 178, 139, 168, 156, 51, 30, + 206, 33, 30, 172, 175, 9, 161, 74, + 184, 158, 11, 23, 171, 37, 36, 14, + 196, 8, 69, 53, 104, 240, 112, 83, + 28, 77, 2, 2, 169, 22, 203, 172, + 78, 189, 103, 21, 22, 29, 82, 123, + 213, 13, 53, 213, 209, 153, 124, 247, + 254, 113, 200, 71, 88, 235, 7, 233, + 249, 172, 55, 223, 123, 174, 205, 155, + 188, 219, 135, 55, 64, 226, 44, 229, + 131, 143, 166, 81, 119, 155, 170, 110, + 119, 188, 242, 90, 74, 187, 14, 43, + 121, 123, 126, 39, 61, 9, 181, 4, + 194, 41, 63, 85, 115, 198, 66, 23, + 37, 90, 47, 1, 154, 23, 15, 14, + 127, 72, 144, 232, 212, 220, 198, 191, + 107, 162, 130, 253, 172, 121, 21, 209, + 173, 52, 107, 172, 142, 187, 161, 37, + 180, 91, 173, 36, 192, 106, 216, 80, + 12, 254, 89, 164, 95, 110, 154, 19, + 143, 13, 53, 114, 123, 49, 54, 249, + 34, 98, 184, 43, 242, 52, 75, 113, + 203, 251, 252, 150, 174, 189, 203, 75, + 147, 35, 11, 224, 188, 130, 66, 173, + 80, 211, 208, 125, 247, 12, 222, 139, + 192, 43, 216, 103, 35, 196, 233, 158, + 249, 166, 203, 139, 245, 206, 30, 43, + 42, 132, 40, 136, 247, 145, 164, 51, + 65, 118, 233, 100, 150, 205, 198, 233, + 75, 3, 47, 33, 86, 161, 19, 222, + 218, 215, 110, 28, 217, 164, 240, 131, + 166, 178, 147, 79, 210, 20, 194, 19, + 230, 183, 53, 44, 56, 23, 162, 98, + 142, 102, 205, 240, 181, 159, 61, 54, + 221, 168, 51, 41, 247, 22, 66, 109, + 241, 26, 162, 153, 42, 207, 2, 68, + 186, 163, 8, 158, 108, 50, 27, 102, + 106, 154, 188, 18, 180, 199, 166, 128, + 87, 197, 226, 187, 96, 80, 212, 123, + 45, 193, 16, 226, 247, 186, 205, 180, + 107, 160, 205, 6, 29, 191, 34, 176, + 23, 229, 213, 139, 42, 103, 158, 123, + 36, 87, 128, 120, 143, 209, 63, 48, + 74, 237, 134, 177, 129, 132, 200, 130, + 38, 46, 205, 57, 108, 135, 238, 89, + 243, 175, 194, 118, 61, 228, 100, 188, + 130, 101, 32, 129, 210, 166, 33, 79, + 16, 33, 4, 251, 181, 131, 55, 162, + 67, 16, 22, 52, 243, 22, 199, 222, + 195, 153, 36, 79, 183, 85, 209, 245, + 77, 206, 70, 214, 168, 231, 24, 99, + 80, 215, 137, 10, 142, 86, 217, 0, + 46, 252, 54, 162, 42, 25, 114, 102, + 22, 216, 79, 140, 113, 214, 146, 21, + 122, 155, 29, 240, 150, 184, 8, 25, + 58, 62, 58, 240, 115, 171, 77, 145, + 162, 185, 237, 224, 247, 190, 156, 96, + 249, 30, 109, 36, 122, 76, 65, 143, + 93, 164, 123, 35, 11, 35, 134, 215, + 174, 55, 65, 207, 38, 0, 0, 47, + 43, 98, 5, 47, 73, 188, 34, 57, + 18, 97, 238, 95, 53, 200, 222, 89, + 244, 18, 2, 153, 82, 90, 115, 174, + 237, 39, 24, 139, 54, 132, 22, 184, + 113, 94, 63, 55, 245, 146, 242, 235, + 9, 119, 155, 22, 98, 164, 51, 145, + 53, 177, 212, 223, 3, 137, 96, 15, + 70, 136, 87, 126, 126, 126, 173, 217, + 59, 65, 113, 186, 118, 153, 210, 229, + 70, 53, 148, 202, 147, 113, 202, 191, + 210, 212, 110, 192, 27, 143, 61, 42, + 81, 106, 245, 44, 177, 200, 128, 242, + 81, 145, 200, 189, 79, 65, 45, 55, + 174, 74, 96, 194, 102, 154, 43, 97, + 18, 230, 198, 201, 83, 180, 195, 9, + 145, 233, 104, 230, 101, 19, 236, 40, + 106, 219, 149, 12, 165, 120, 93, 163, + 216, 109, 56, 203, 60, 7, 198, 153, + 109, 220, 156, 184, 71, 132, 174, 0, + 106, 96, 141, 63, 7, 136, 122, 203, + 93, 37, 227, 51, 116, 162, 217, 136, + 210, 50, 244, 91, 245, 32, 130, 148, + 123, 65, 11, 94, 19, 214, 224, 114, + 92, 196, 171, 17, 36, 17, 58, 164, + 127, 21, 33, 198, 62, 155, 63, 24, + 134, 190, 137, 198, 205, 148, 45, 155, + 119, 20, 205, 20, 153, 71, 72, 179, + 20, 162, 225, 233, 113, 235, 183, 20, + 58, 29, 80, 197, 103, 65, 201, 155, + 206, 194, 30, 19, 52, 182, 74, 197, + 7, 18, 113, 133, 91, 60, 175, 11, + 208, 123, 140, 177, 194, 253, 161, 33, + 54, 88, 31, 93, 249, 57, 81, 216, + 150, 32, 230, 180, 73, 119, 19, 139, + 160, 109, 129, 26, 98, 171, 95, 116, + 22, 248, 225, 82, 62, 246, 11, 69, + 98, 179, 120, 224, 34, 236, 135, 85, + 24, 54, 73, 125, 52, 126, 68, 75, + 94, 208, 85, 177, 237, 156, 168, 120, + 244, 129, 50, 245, 242, 148, 181, 236, + 68, 99, 193, 187, 244, 70, 30, 181, + 213, 188, 113, 186, 50, 69, 208, 112, + 221, 95, 122, 221, 137, 232, 92, 115, + 107, 77, 160, 222, 213, 224, 37, 136, + 60, 180, 149, 184, 164, 43, 129, 154, + 208, 26, 152, 204, 75, 143, 219, 57, + 10, 95, 17, 255, 156, 68, 189, 177, + 51, 102, 91, 78, 227, 153, 133, 202, + 46, 239, 171, 160, 231, 5, 187, 144, + 77, 190, 120, 170, 239, 192, 48, 13, + 109, 231, 196, 77, 54, 146, 6, 113, + 190, 94, 61, 18, 243, 24, 161, 221, + 146, 40, 224, 132, 176, 49, 204, 157, + 184, 80, 29, 105, 248, 212, 14, 24, + 120, 137, 137, 37, 105, 38, 216, 11, + 113, 205, 28, 255, 152, 30, 232, 22, + 6, 177, 82, 57, 63, 250, 139, 216, + 150, 15, 186, 170, 106, 154, 168, 21, + 252, 193, 15, 69, 216, 222, 80, 14, + 109, 171, 190, 177, 202, 108, 73, 220, + 4, 228, 104, 24, 74, 22, 179, 107, + 188, 218, 68, 61, 17, 31, 56, 176, + 58, 195, 233, 82, 121, 82, 93, 207, + 156, 184, 184, 81, 111, 87, 110, 116, + 38, 121, 178, 241, 236, 119, 80, 230, + 246, 176, 91, 197, 96, 8, 30, 27, + 220, 236, 49, 9, 231, 55, 70, 180, + 96, 30, 208, 155, 7, 81, 45, 49, + 22, 126, 151, 225, 248, 172, 23, 212, + 175, 243, 48, 65, 97, 153, 74, 133, + 72, 50, 132, 254, 80, 174, 126, 26, + 211, 140, 221, 76, 164, 18, 135, 174, + 39, 217, 203, 183, 47, 128, 103, 93, + 14, 105, 47, 143, 152, 182, 210, 175, + 155, 204, 214, 190, 246, 60, 241, 82, + 113, 65, 220, 228, 53, 98, 148, 170, + 41, 192, 162, 155, 71, 95, 51, 227, + 214, 7, 73, 170, 68, 142, 19, 92, + 142, 19, 18, 98, 17, 143, 170, 126, + 10, 231, 52, 216, 234, 114, 32, 71, + 32, 235, 163, 211, 83, 187, 24, 39, + 144, 191, 79, 231, 158, 112, 31, 186, + 135, 93, 27, 17, 78, 64, 146, 3, + 68, 33, 5, 59, 157, 50, 220, 6, + 198, 105, 4, 75, 170, 222, 193, 152, + 159, 232, 147, 215, 101, 121, 214, 100, + 119, 137, 236, 254, 142, 56, 182, 193, + 169, 221, 181, 160, 18, 50, 121, 154, + 134, 41, 253, 81, 12, 37, 76, 220, + 156, 235, 211, 113, 226, 1, 188, 67, + 160, 187, 204, 27, 91, 237, 240, 53, + 87, 93, 152, 54, 104, 69, 75, 18, + 124, 128, 204, 119, 86, 24, 176, 80, + 57, 204, 164, 9, 131, 89, 190, 54, + 192, 172, 171, 57, 113, 40, 234, 147, + 112, 37, 198, 216, 10, 132, 30, 164, + 206, 204, 29, 42, 79, 156, 121, 21, + 1, 212, 70, 40, 42, 230, 41, 202, + 133, 82, 109, 200, 182, 166, 220, 52, + 145, 42, 96, 201, 15, 90, 109, 234, + 106, 55, 175, 6, 30, 207, 32, 89, + 37, 201, 211, 87, 176, 111, 165, 101, + 18, 189, 246, 104, 145, 123, 14, 127, + 164, 107, 67, 78, 211, 241, 150, 101, + 49, 79, 122, 202, 102, 223, 244, 246, + 203, 17, 58, 100, 75, 116, 63, 196, + 23, 133, 78, 4, 171, 136, 188, 77, + 119, 216, 161, 176, 11, 121, 99, 206, + 6, 181, 187, 218, 169, 201, 35, 72, + 18, 230, 61, 238, 93, 3, 104, 122, + 55, 46, 151, 40, 164, 178, 49, 214, + 65, 133, 212, 167, 153, 47, 149, 198, + 22, 144, 90, 192, 159, 148, 138, 85, + 103, 161, 6, 81, 198, 5, 202, 225, + 103, 181, 185, 101, 237, 169, 247, 110, + 70, 232, 153, 164, 30, 129, 79, 85, + 11, 199, 161, 75, 20, 55, 128, 147, + 122, 184, 166, 4, 8, 112, 234, 34, + 81, 232, 16, 181, 103, 153, 112, 177, + 55, 12, 179, 77, 125, 18, 216, 239, + 127, 217, 154, 58, 207, 89, 175, 23, + 185, 191, 17, 215, 221, 167, 137, 240, + 166, 96, 197, 178, 92, 83, 193, 8, + 241, 138, 46, 76, 206, 29, 115, 126, + 69, 231, 50, 71, 127, 255, 147, 13, + 197, 108, 113, 121, 234, 212, 247, 72, + 49, 65, 247, 94, 248, 104, 26, 81, + 93, 17, 94, 219, 237, 198, 181, 53, + 14, 169, 227, 178, 12, 188, 212, 141, + 76, 94, 53, 19, 187, 68, 53, 220, + 60, 1, 180, 16, 99, 37, 45, 31, + 169, 216, 37, 243, 17, 132, 3, 73, + 49, 99, 170, 42, 42, 189, 203, 144, + 253, 111, 232, 210, 167, 159, 232, 25, + 91, 82, 176, 169, 17, 43, 125, 219, + 236, 75, 38, 20, 219, 144, 197, 212, + 126, 98, 21, 34, 223, 179, 64, 141, + 235, 33, 52, 239, 52, 106, 70, 130, + 132, 56, 72, 172, 209, 255, 30, 199, + 160, 197, 184, 201, 78, 82, 156, 205, + 48, 219, 5, 47, 237, 184, 73, 70, + 181, 158, 113, 25, 184, 161, 186, 21, + 103, 24, 193, 211, 254, 124, 87, 68, + 143, 182, 203, 166, 55, 252, 209, 80, + 178, 199, 233, 200, 124, 188, 74, 53, + 86, 139, 123, 175, 25, 95, 226, 102, + 158, 231, 148, 101, 101, 131, 75, 235, + 176, 105, 51, 130, 212, 112, 61, 110, + 74, 79, 127, 108, 37, 110, 181, 107, + 9, 123, 148, 77, 238, 168, 190, 37, + 62, 0, 211, 210, 78, 165, 233, 120, + 47, 250, 160, 215, 212, 166, 246, 169, + 112, 90, 35, 159, 92, 166, 220, 51, + 190, 57, 233, 3, 99, 69, 171, 74, + 50, 198, 44, 145, 21, 97, 77, 254, + 103, 155, 29, 241, 98, 160, 14, 88, + 168, 40, 149, 186, 41, 222, 73, 83, + 206, 98, 175, 158, 70, 4, 42, 104, + 105, 60, 14, 92, 1, 235, 100, 147, + 141, 46, 5, 218, 128, 119, 32, 145, + 236, 16, 176, 12, 179, 143, 194, 129, + 187, 165, 168, 11, 81, 253, 71, 122, + 64, 109, 254, 20, 117, 195, 193, 41, + 196, 226, 211, 54, 214, 229, 62, 231, + 15, 165, 95, 136, 103, 177, 4, 210, + 53, 229, 131, 202, 207, 250, 98, 204, + 8, 22, 115, 117, 96, 196, 88, 229, + 20, 25, 244, 117, 236, 13, 158, 138, + 154, 74, 87, 10, 154, 93, 222, 154, + 63, 231, 243, 68, 65, 137, 3, 68, + 178, 177, 197, 59, 254, 192, 233, 174, + 144, 100, 154, 113, 87, 149, 124, 140, + 49, 145, 26, 129, 50, 55, 9, 63, + 36, 168, 114, 65, 59, 158, 107, 115, + 138, 253, 115, 211, 152, 241, 214, 235, + 4, 249, 110, 90, 103, 6, 144, 43, + 118, 205, 216, 114, 207, 174, 72, 135, + 111, 98, 166, 232, 113, 117, 186, 108, + 30, 227, 31, 30, 222, 200, 119, 7, + 107, 6, 120, 207, 100, 225, 110, 159, + 48, 74, 204, 255, 54, 64, 127, 163, + 75, 190, 0, 60, 218, 69, 185, 67, + 65, 180, 136, 33, 18, 233, 212, 217, + 210, 65, 155, 3, 9, 154, 198, 60, + 9, 226, 84, 36, 210, 27, 162, 18, + 116, 27, 3, 117, 235, 166, 19, 49, + 21, 52, 82, 49, 249, 112, 120, 228, + 235, 99, 50, 151, 121, 231, 134, 183, + 2, 206, 205, 4, 68, 195, 102, 178, + 112, 112, 172, 135, 205, 135, 202, 12, + 193, 74, 107, 126, 103, 60, 21, 232, + 41, 197, 201, 210, 109, 51, 111, 121, + 91, 176, 213, 167, 195, 102, 120, 236, + 8, 12, 130, 110, 20, 40, 89, 110, + 163, 246, 39, 33, 146, 10, 239, 218, + 62, 112, 8, 129, 105, 240, 167, 169, + 120, 70, 74, 143, 82, 185, 108, 220, + 77, 250, 129, 79, 214, 161, 173, 111, + 185, 37, 163, 11, 71, 93, 70, 112, + 53, 254, 209, 63, 115, 227, 92, 184, + 105, 62, 230, 169, 15, 135, 116, 125, + 138, 12, 122, 143, 183, 16, 127, 34, + 24, 64, 97, 243, 254, 237, 200, 6, + 119, 128, 1, 107, 91, 2, 172, 37, + 108, 182, 70, 152, 82, 190, 155, 232, + 227, 101, 180, 139, 44, 218, 73, 3, + 40, 204, 215, 31, 125, 195, 51, 105, + 104, 58, 122, 237, 208, 45, 229, 79, + 141, 116, 29, 45, 181, 42, 167, 49, + 61, 184, 71, 254, 15, 142, 177, 202, + 10, 107, 95, 94, 76, 20, 27, 146, + 18, 20, 127, 218, 221, 138, 175, 27, + 210, 24, 177, 3, 194, 93, 70, 42, + 143, 67, 207, 251, 214, 32, 35, 76, + 24, 240, 15, 140, 80, 132, 238, 86, + 145, 11, 248, 200, 245, 219, 42, 184, + 44, 74, 119, 44, 86, 254, 47, 109, + 38, 110, 108, 124, 11, 188, 135, 145, + 253, 92, 187, 7, 28, 55, 202, 221, + 241, 113, 76, 42, 180, 100, 128, 83, + 108, 29, 33, 228, 66, 136, 178, 66, + 133, 85, 80, 38, 70, 106, 182, 207, + 191, 207, 92, 172, 48, 31, 117, 6, + 17, 10, 210, 200, 164, 207, 135, 180, + 254, 118, 163, 250, 248, 40, 150, 188, + 42, 151, 20, 31, 220, 99, 244, 241, + 78, 9, 17, 45, 100, 47, 12, 253, + 111, 187, 229, 154, 255, 127, 210, 62, + 92, 126, 98, 164, 45, 224, 34, 168, + 253, 78, 117, 188, 39, 221, 173, 108, + 59, 151, 68, 117, 148, 9, 16, 34, + 45, 0, 200, 109, 60, 196, 120, 119, + 238, 145, 140, 133, 173, 68, 1, 44, + 195, 216, 247, 211, 54, 43, 28, 107, + 117, 134, 179, 24, 71, 83, 81, 193, + 124, 98, 253, 252, 124, 78, 141, 234, + 105, 203, 112, 158, 127, 162, 74, 72, + 151, 13, 201, 240, 206, 123, 231, 35, + 187, 255, 116, 9, 19, 35, 70, 115, + 115, 60, 169, 230, 170, 35, 155, 137, + 27, 167, 44, 218, 30, 32, 76, 16, + 232, 223, 179, 233, 20, 49, 156, 18, + 152, 76, 101, 173, 0, 82, 19, 144, + 243, 240, 237, 105, 184, 70, 48, 153, + 101, 214, 117, 244, 150, 225, 42, 194, + 207, 152, 137, 87, 210, 186, 222, 153, + 152, 13, 22, 41, 77, 147, 7, 123, + 184, 98, 72, 243, 22, 177, 59, 87, + 254, 43, 6, 37, 69, 145, 162, 138, + 106, 29, 6, 27, 77, 233, 252, 148, + 225, 70, 243, 244, 70, 90, 235, 222, + 207, 188, 37, 221, 36, 84, 238, 84, + 43, 160, 149, 44, 14, 57, 251, 202, + 99, 236, 68, 23, 209, 176, 73, 226, + 239, 6, 47, 125, 16, 24, 148, 76, + 174, 247, 234, 1, 179, 238, 70, 68, + 112, 118, 155, 224, 114, 20, 159, 9, + 38, 45, 72, 149, 127, 123, 16, 241, + 56, 43, 32, 103, 193, 172, 139, 90, + 22, 60, 26, 62, 147, 130, 214, 2, + 163, 56, 101, 115, 173, 168, 115, 214, + 195, 7, 30, 240, 160, 234, 204, 187, + 194, 241, 110, 127, 152, 44, 121, 39, + 31, 10, 11, 191, 174, 244, 56, 169, + 31, 187, 156, 15, 35, 194, 203, 242, + 31, 104, 253, 125, 249, 10, 252, 52, + 96, 128, 231, 169, 85, 224, 59, 81, + 142, 168, 230, 121, 252, 210, 213, 120, + 177, 22, 138, 55, 224, 83, 41, 237, + 244, 19, 3, 164, 142, 90, 22, 216, + 202, 56, 184, 80, 125, 246, 30, 61, + 71, 83, 18, 192, 180, 237, 150, 182, + 113, 14, 29, 65, 3, 207, 193, 225, + 73, 71, 197, 190, 201, 197, 249, 89, + 218, 193, 106, 192, 161, 220, 46, 188, + 100, 75, 197, 193, 148, 105, 226, 147, + 170, 53, 109, 77, 161, 203, 184, 172, + 191, 195, 103, 246, 80, 103, 63, 9, + 66, 250, 75, 200, 191, 221, 27, 98, + 182, 200, 137, 61, 42, 193, 119, 233, + 248, 21, 86, 90, 42, 236, 205, 22, + 94, 35, 226, 171, 112, 106, 196, 158, + 95, 202, 138, 43, 8, 54, 242, 87, + 162, 104, 41, 189, 39, 9, 157, 71, + 124, 234, 56, 217, 164, 92, 9, 200, + 140, 244, 234, 59, 162, 225, 235, 46, + 40, 116, 61, 252, 218, 245, 88, 14, + 215, 96, 158, 201, 138, 2, 236, 228, + 250, 80, 171, 214, 194, 143, 166, 4, + 40, 10, 181, 38, 144, 84, 242, 82, + 28, 166, 210, 219, 17, 4, 92, 254, + 103, 144, 78, 117, 127, 28, 99, 224, + 203, 3, 220, 128, 221, 230, 175, 59, + 48, 26, 85, 247, 217, 196, 242, 27, + 144, 206, 202, 165, 155, 243, 2, 218, + 59, 217, 162, 45, 47, 27, 0, 250, + 75, 246, 204, 143, 30, 197, 202, 242, + 252, 178, 216, 104, 189, 175, 2, 30, + 197, 152, 115, 133, 137, 230, 229, 76, + 220, 43, 160, 32, 60, 160, 129, 76, + 80, 44, 173, 138, 113, 33, 93, 141, + 167, 252, 244, 205, 146, 133, 161, 49, + 255, 202, 112, 11, 255, 2, 220, 24, + 241, 148, 193, 240, 12, 12, 6, 82, + 72, 21, 164, 195, 137, 83, 69, 66, + 244, 204, 53, 242, 162, 165, 195, 137, + 34, 150, 27, 165, 139, 112, 188, 153, + 196, 101, 134, 194, 99, 228, 49, 129, + 174, 91, 230, 87, 121, 214, 99, 10, + 7, 252, 202, 92, 226, 131, 181, 180, + 127, 239, 251, 250, 252, 217, 242, 227, + 120, 57, 42, 55, 68, 75, 157, 229, + 251, 160, 100, 237, 64, 134, 201, 189, + 138, 192, 178, 85, 250, 190, 72, 106, + 0, 28, 193, 77, 189, 122, 20, 217, + 63, 197, 136, 235, 207, 1, 130, 48, + 140, 114, 202, 67, 25, 124, 135, 143, + 139, 85, 178, 148, 24, 205, 130, 2, + 241, 237, 231, 228, 190, 176, 148, 13, + 70, 113, 169, 237, 56, 213, 187, 183, + 87, 187, 169, 234, 112, 57, 247, 130, + 66, 245, 74, 68, 3, 75, 181, 182, + 210, 148, 225, 159, 26, 46, 8, 72, + 13, 149, 129, 80, 82, 212, 5, 145, + 4, 206, 18, 43, 168, 48, 192, 76, + 162, 84, 233, 2, 207, 82, 84, 70, + 51, 27, 0, 190, 111, 4, 17, 88, + 202, 115, 97, 153, 111, 42, 225, 57, + 245, 158, 136, 248, 50, 42, 172, 239, + 228, 46, 115, 118, 194, 120, 46, 1, + 149, 118, 21, 48, 94, 103, 175, 189, + 83, 212, 37, 119, 76, 82, 227, 231, + 182, 200, 244, 156, 205, 141, 217, 123, + 208, 186, 188, 140, 222, 51, 122, 173, + 201, 201, 136, 248, 252, 14, 103, 50, + 165, 6, 160, 15, 58, 28, 85, 74, + 232, 113, 106, 156, 199, 116, 99, 71, + 118, 234, 96, 35, 155, 201, 202, 96, + 214, 236, 28, 123, 226, 146, 80, 163, + 120, 157, 21, 98, 180, 152, 127, 54, + 254, 242, 143, 93, 235, 196, 64, 17, + 203, 135, 20, 243, 38, 160, 78, 24, + 225, 106, 98, 95, 110, 214, 8, 174, + 181, 85, 101, 159, 188, 17, 92, 69, + 182, 32, 189, 133, 249, 92, 164, 26, + 4, 101, 136, 36, 237, 184, 24, 239, + 219, 247, 115, 86, 232, 56, 220, 84, + 242, 8, 106, 30, 182, 54, 108, 107, + 94, 238, 75, 55, 251, 60, 77, 25, + 160, 181, 168, 206, 111, 190, 214, 184, + 34, 133, 229, 84, 42, 50, 224, 149, + 235, 80, 240, 173, 191, 27, 97, 24, + 56, 246, 123, 116, 209, 117, 144, 149, + 251, 132, 168, 150, 79, 103, 87, 50, + 42, 157, 243, 220, 21, 241, 70, 57, + 65, 171, 202, 128, 183, 36, 143, 238, + 220, 40, 95, 91, 151, 229, 254, 159, + 84, 252, 203, 58, 248, 206, 135, 169, + 47, 20, 105, 147, 198, 166, 60, 39, + 120, 105, 22, 213, 241, 82, 106, 163, + 154, 21, 138, 91, 209, 98, 248, 243, + 120, 32, 183, 6, 110, 197, 248, 34, + 192, 179, 144, 165, 151, 221, 22, 87, + 3, 205, 78, 5, 41, 185, 167, 131, + 172, 11, 103, 255, 228, 227, 131, 215, + 212, 159, 218, 211, 162, 41, 211, 2, + 23, 128, 20, 218, 129, 190, 230, 94, + 200, 222, 180, 165, 248, 99, 6, 161, + 182, 65, 157, 110, 209, 201, 188, 52, + 85, 12, 19, 129, 71, 63, 98, 34, + 214, 103, 12, 163, 129, 152, 239, 243, + 192, 15, 20, 62, 247, 158, 34, 207, + 218, 66, 65, 38, 9, 141, 100, 57, + 216, 179, 134, 40, 81, 36, 39, 62, + 191, 212, 174, 48, 238, 213, 51, 252, + 218, 142, 52, 44, 143, 150, 56, 238, + 48, 205, 59, 12, 213, 146, 199, 28, + 41, 60, 190, 6, 69, 168, 203, 161, + 9, 21, 185, 58, 211, 194, 182, 119, + 134, 155, 217, 209, 112, 146, 97, 60, + 126, 191, 230, 240, 125, 225, 27, 244, + 167, 45, 86, 168, 205, 244, 51, 243, + 199, 117, 166, 149, 106, 158, 154, 116, + 3, 56, 101, 245, 140, 196, 179, 227, + 176, 236, 249, 206, 97, 40, 68, 110, + 170, 105, 111, 181, 93, 40, 202, 211, + 233, 163, 222, 177, 115, 42, 161, 39, + 194, 156, 109, 221, 112, 210, 14, 141, + 77, 51, 35, 160, 130, 157, 145, 56, + 102, 189, 101, 50, 38, 90, 77, 20, + 138, 48, 197, 47, 206, 104, 220, 224, + 25, 126, 115, 255, 195, 118, 89, 10, + 246, 239, 190, 31, 72, 141, 251, 165, + 15, 126, 52, 145, 186, 133, 89, 66, + 229, 196, 117, 233, 19, 180, 220, 158, + 59, 168, 133, 245, 199, 214, 99, 177, + 228, 8, 168, 43, 200, 90, 147, 250, + 183, 28, 78, 117, 207, 28, 48, 186, + 235, 177, 225, 175, 23, 244, 213, 238, + 108, 223, 222, 162, 24, 114, 124, 114, + 98, 33, 64, 137, 22, 17, 183, 198, + 69, 121, 11, 197, 75, 164, 231, 205, + 145, 6, 239, 2, 183, 147, 50, 109, + 21, 155, 145, 89, 47, 147, 68, 41, + 49, 218, 6, 206, 41, 188, 182, 109, + 138, 217, 78, 30, 59, 107, 38, 18, + 195, 164, 83, 107, 95, 52, 34, 142, + 110, 76, 238, 7, 121, 246, 105, 203, + 236, 45, 182, 204, 222, 149, 91, 161, + 26, 37, 235, 54, 218, 194, 143, 32, + 38, 21, 24, 207, 98, 149, 2, 24, + 179, 69, 158, 206, 98, 167, 208, 2, + 221, 227, 178, 219, 152, 79, 189, 71, + 32, 111, 141, 200, 52, 91, 110, 49, + 214, 42, 149, 244, 40, 75, 217, 72, + 149, 132, 139, 5, 251, 100, 48, 28, + 74, 1, 205, 171, 65, 157, 62, 88, + 126, 106, 160, 123, 61, 204, 237, 19, + 41, 65, 17, 116, 9, 11, 35, 215, + 28, 186, 137, 235, 146, 99, 102, 68, + 39, 218, 181, 78, 157, 90, 162, 194, + 50, 192, 137, 190, 26, 136, 186, 144, + 186, 79, 68, 109, 184, 146, 218, 111, + 243, 127, 132, 128, 228, 20, 49, 124, + 125, 75, 247, 56, 213, 20, 109, 235, + 86, 246, 114, 176, 125, 106, 125, 167, + 233, 250, 110, 119, 131, 166, 126, 154, + 85, 222, 202, 93, 192, 39, 107, 147, + 109, 35, 113, 15, 105, 11, 206, 1, + 193, 75, 9, 35, 172, 102, 246, 177, + 1, 70, 179, 108, 254, 217, 73, 61, + 188, 65, 193, 165, 186, 236, 105, 230, + 50, 41, 98, 56, 76, 185, 165, 251, + 242, 101, 21, 146, 252, 122, 33, 11, + 5, 116, 236, 111, 22, 148, 46, 132, + 98, 45, 138, 75, 114, 222, 114, 223, + 3, 117, 132, 237, 249, 200, 201, 139, + 214, 224, 3, 176, 22, 13, 191, 192, + 7, 186, 38, 37, 254, 71, 133, 65, + 130, 67, 233, 164, 144, 250, 224, 19, + 60, 159, 215, 36, 221, 131, 126, 113, + 214, 235, 125, 122, 244, 22, 34, 40, + 156, 137, 248, 14, 163, 210, 86, 185, + 230, 112, 187, 46, 13, 127, 95, 98, + 216, 92, 74, 67, 12, 213, 97, 56, + 24, 28, 204, 226, 240, 175, 112, 119, + 49, 88, 125, 124, 196, 73, 138, 13, + 81, 58, 223, 112, 106, 74, 93, 154, + 58, 17, 53, 19, 150, 21, 134, 92, + 72, 198, 64, 53, 76, 111, 151, 52, + 189, 181, 196, 104, 58, 144, 73, 48, + 160, 92, 139, 152, 24, 120, 219, 179, + 15, 89, 157, 169, 127, 224, 24, 49, + 77, 25, 252, 237, 156, 12, 132, 182, + 14, 140, 8, 204, 22, 160, 174, 255, + 58, 25, 137, 243, 62, 156, 55, 113, + 131, 185, 204, 99, 120, 255, 92, 164, + 107, 172, 226, 47, 158, 53, 106, 39, + 221, 162, 10, 68, 213, 31, 79, 239, + 76, 215, 112, 137, 1, 220, 144, 159, + 249, 150, 64, 191, 160, 185, 234, 55, + 81, 78, 59, 215, 228, 104, 30, 45, + 185, 193, 142, 164, 69, 243, 243, 45, + 71, 208, 196, 2, 159, 214, 72, 203, + 132, 81, 181, 46, 45, 138, 47, 154, + 70, 41, 88, 247, 45, 151, 191, 156, + 63, 74, 142, 100, 131, 210, 194, 15, + 231, 87, 225, 227, 192, 80, 240, 233, + 128, 192, 128, 33, 219, 197, 253, 79, + 157, 216, 176, 149, 253, 28, 74, 3, + 197, 84, 248, 62, 50, 37, 82, 153, + 106, 46, 49, 208, 167, 239, 187, 64, + 146, 71, 117, 163, 45, 92, 246, 61, + 103, 191, 182, 227, 123, 58, 215, 22, + 96, 239, 84, 215, 170, 109, 124, 99, + 187, 156, 127, 63, 144, 128, 105, 234, + 171, 44, 77, 40, 238, 236, 59, 216, + 177, 97, 247, 245, 17, 91, 95, 36, + 120, 113, 175, 225, 7, 90, 244, 94, + 141, 190, 143, 54, 38, 226, 34, 180, + 251, 113, 20, 66, 158, 149, 211, 58, + 250, 177, 148, 16, 74, 33, 56, 153, + 137, 221, 180, 95, 204, 72, 171, 102, + 3, 131, 195, 83, 211, 61, 40, 211, + 0, 78, 119, 101, 81, 140, 101, 22, + 120, 111, 101, 119, 210, 50, 87, 207, + 65, 241, 211, 218, 52, 40, 134, 20, + 210, 98, 153, 192, 162, 196, 121, 117, + 230, 251, 61, 220, 113, 68, 127, 121, + 42, 191, 207, 26, 60, 116, 14, 151, + 116, 41, 136, 85, 157, 73, 176, 180, + 55, 251, 78, 34, 96, 136, 92, 93, + 171, 34, 136, 218, 103, 204, 227, 92, + 204, 49, 168, 123, 173, 4, 212, 22, + 7, 218, 180, 232, 17, 152, 172, 127, + 225, 122, 58, 221, 161, 27, 144, 119, + 115, 176, 140, 254, 66, 193, 59, 101, + 36, 244, 14, 74, 191, 205, 101, 217, + 3, 140, 225, 127, 201, 122, 46, 102, + 97, 175, 210, 51, 188, 24, 118, 33, + 68, 204, 167, 14, 218, 190, 26, 231, + 24, 192, 60, 234, 239, 195, 217, 224, + 187, 111, 88, 105, 1, 174, 45, 15, + 138, 197, 162, 67, 95, 240, 103, 218, + 139, 24, 22, 89, 27, 86, 188, 224, + 212, 227, 46, 237, 187, 32, 250, 253, + 138, 107, 235, 180, 46, 93, 195, 36, + 212, 167, 218, 150, 175, 37, 71, 139, + 88, 255, 13, 232, 167, 193, 169, 193, + 130, 190, 169, 152, 92, 53, 22, 210, + 65, 154, 3, 5, 180, 226, 241, 123, + 64, 226, 38, 134, 118, 221, 184, 68, + 92, 115, 204, 232, 62, 250, 219, 176, + 147, 193, 175, 107, 139, 134, 131, 14, + 121, 100, 25, 72, 165, 104, 141, 98, + 9, 227, 122, 41, 78, 150, 33, 121, + 121, 135, 111, 22, 216, 129, 67, 197, + 132, 45, 198, 34, 88, 111, 65, 130, + 28, 32, 38, 218, 188, 174, 41, 106, + 77, 116, 250, 112, 78, 6, 75, 168, + 27, 232, 208, 14, 9, 228, 149, 40, + 234, 154, 5, 145, 23, 155, 169, 35, + 136, 161, 233, 143, 248, 133, 231, 241, + 212, 78, 120, 199, 93, 127, 248, 114, + 249, 104, 127, 88, 218, 29, 227, 104, + 150, 92, 127, 215, 70, 135, 10, 39, + 72, 110, 73, 6, 180, 222, 73, 150, + 10, 5, 117, 195, 202, 21, 189, 217, + 193, 145, 160, 169, 141, 35, 75, 54, + 209, 214, 103, 127, 26, 196, 231, 111, + 17, 251, 138, 130, 7, 239, 224, 181, + 4, 124, 68, 161, 32, 25, 139, 132, + 237, 109, 198, 160, 190, 162, 11, 161, + 254, 125, 85, 155, 35, 45, 84, 156, + 11, 84, 91, 16, 239, 56, 207, 218, + 223, 84, 24, 226, 248, 182, 143, 81, + 226, 130, 43, 185, 221, 40, 95, 48, + 7, 111, 238, 9, 205, 181, 36, 54, + 49, 187, 61, 69, 53, 21, 202, 207, + 75, 143, 49, 81, 107, 246, 123, 105, + 214, 157, 61, 252, 159, 170, 76, 74, + 200, 29, 185, 220, 9, 94, 251, 6, + 91, 182, 198, 181, 238, 189, 151, 118, + 203, 228, 199, 191, 118, 6, 87, 58, + 189, 233, 163, 128, 169, 8, 57, 64, + 175, 158, 167, 117, 43, 80, 134, 183, + 115, 177, 247, 44, 65, 12, 220, 39, + 183, 233, 58, 166, 156, 24, 129, 88, + 245, 51, 48, 207, 122, 198, 17, 218, + 248, 177, 141, 151, 246, 241, 247, 82, + 9, 208, 134, 116, 49, 201, 64, 11, + 239, 183, 118, 237, 244, 76, 134, 67, + 45, 208, 80, 249, 2, 59, 124, 43, + 202, 114, 232, 19, 99, 233, 161, 20, + 198, 189, 233, 43, 56, 20, 60, 244, + 221, 24, 190, 91, 115, 244, 77, 66, + 118, 166, 117, 240, 182, 200, 162, 154, + 76, 218, 114, 104, 89, 81, 163, 173, + 125, 3, 119, 169, 115, 179, 191, 175, + 102, 221, 202, 191, 11, 145, 213, 2, + 211, 35, 29, 31, 90, 214, 2, 204, + 62, 38, 58, 157, 135, 41, 61, 3, + 192, 170, 213, 13, 34, 94, 82, 47, + 72, 6, 97, 212, 201, 23, 89, 207, + 118, 236, 220, 147, 91, 254, 153, 229, + 192, 50, 154, 244, 69, 233, 150, 20, + 23, 143, 57, 172, 95, 30, 205, 52, + 17, 220, 155, 166, 56, 14, 16, 227, + 7, 36, 67, 158, 116, 119, 67, 130, + 169, 227, 129, 9, 50, 112, 116, 53, + 223, 180, 194, 228, 66, 149, 197, 13, + 19, 116, 73, 19, 42, 132, 84, 202, + 182, 147, 38, 130, 128, 26, 0, 192, + 243, 142, 130, 199, 176, 71, 91, 115, + 2, 59, 231, 71, 101, 51, 103, 121, + 85, 241, 151, 207, 221, 238, 210, 218, + 254, 65, 224, 84, 204, 15, 146, 60, + 32, 161, 171, 221, 77, 193, 246, 213, + 138, 76, 49, 115, 9, 206, 219, 238, + 99, 173, 193, 236, 112, 197, 144, 71, + 218, 1, 131, 4, 30, 30, 222, 210, + 96, 226, 170, 91, 162, 254, 113, 115, + 175, 150, 221, 67, 119, 223, 88, 174, + 159, 55, 7, 229, 211, 166, 128, 127, + 193, 161, 246, 194, 210, 100, 161, 193, + 99, 14, 235, 57, 251, 241, 199, 82, + 159, 208, 68, 77, 27, 247, 230, 74, + 247, 185, 165, 22, 220, 108, 179, 142, + 143, 19, 23, 53, 83, 50, 4, 101, + 71, 241, 77, 239, 237, 95, 210, 129, + 24, 246, 58, 177, 144, 233, 152, 55, + 111, 118, 91, 47, 214, 86, 213, 151, + 56, 46, 240, 194, 39, 200, 137, 237, + 251, 231, 32, 27, 13, 213, 39, 199, + 151, 219, 41, 69, 60, 34, 108, 100, + 29, 195, 218, 182, 34, 214, 100, 243, + 6, 30, 83, 167, 218, 223, 68, 140, + 125, 203, 186, 168, 7, 218, 92, 116, + 107, 165, 87, 232, 210, 106, 162, 17, + 136, 227, 19, 233, 64, 22, 173, 229, + 20, 4, 199, 239, 183, 65, 46, 42, + 17, 49, 77, 90, 48, 87, 30, 182, + 146, 187, 0, 61, 95, 204, 48, 78, + 18, 236, 162, 196, 154, 255, 243, 250, + 24, 108, 19, 238, 205, 18, 158, 28, + 231, 162, 74, 82, 44, 136, 253, 105, + 15, 102, 79, 33, 140, 46, 64, 201, + 173, 192, 170, 235, 1, 175, 149, 169, + 174, 117, 100, 28, 94, 140, 182, 200, + 249, 71, 161, 210, 41, 72, 255, 145, + 77, 78, 139, 234, 183, 232, 54, 73, + 53, 215, 156, 55, 55, 42, 36, 61, + 169, 188, 171, 121, 139, 42, 70, 46, + 208, 27, 109, 154, 35, 33, 138, 154, + 1, 80, 114, 254, 45, 110, 55, 228, + 164, 79, 58, 59, 235, 128, 41, 215, + 77, 178, 207, 45, 186, 113, 57, 51, + 122, 28, 238, 24, 97, 96, 242, 63, + 141, 25, 4, 187, 163, 218, 35, 89, + 48, 205, 5, 60, 102, 139, 200, 113, + 46, 217, 83, 222, 8, 79, 125, 78, + 105, 215, 113, 148, 182, 64, 219, 220, + 45, 159, 158, 204, 58, 113, 86, 250, + 74, 132, 192, 171, 43, 85, 45, 122, + 45, 252, 41, 227, 84, 142, 193, 59, + 87, 70, 94, 191, 32, 18, 82, 224, + 249, 253, 185, 92, 55, 90, 179, 228, + 178, 184, 244, 91, 230, 175, 32, 79, + 41, 124, 90, 99, 178, 48, 126, 231, + 190, 48, 196, 123, 187, 151, 115, 160, + 64, 223, 171, 229, 87, 173, 168, 242, + 119, 55, 227, 14, 100, 145, 11, 57, + 53, 94, 66, 151, 38, 231, 35, 123, + 193, 31, 222, 254, 17, 99, 67, 61, + 59, 244, 80, 135, 226, 150, 123, 46, + 230, 218, 54, 28, 203, 236, 59, 101, + 225, 60, 159, 82, 130, 0, 231, 166, + 214, 155, 22, 210, 105, 221, 126, 190, + 157, 72, 46, 133, 50, 219, 205, 68, + 124, 95, 110, 210, 100, 111, 168, 222, + 61, 127, 23, 61, 37, 72, 195, 132, + 164, 130, 129, 147, 246, 58, 119, 179, + 167, 248, 128, 98, 249, 116, 163, 137, + 99, 153, 182, 130, 111, 171, 16, 241, + 45, 205, 31, 161, 161, 137, 48, 6, + 161, 184, 138, 243, 209, 79, 13, 171, + 244, 34, 168, 219, 182, 132, 201, 69, + 165, 20, 231, 75, 186, 99, 66, 127, + 255, 22, 84, 121, 194, 134, 10, 175, + 50, 179, 70, 61, 120, 240, 163, 74, + 66, 194, 37, 31, 148, 55, 192, 36, + 190, 116, 247, 102, 17, 33, 19, 64, + 13, 45, 206, 112, 249, 41, 48, 210, + 138, 20, 8, 217, 41, 54, 226, 214, + 249, 161, 124, 51, 183, 128, 198, 108, + 128, 103, 178, 109, 209, 19, 147, 146, + 169, 253, 119, 58, 192, 203, 122, 172, + 96, 166, 228, 92, 76, 240, 58, 125, + 64, 101, 133, 25, 80, 16, 53, 243, + 104, 95, 198, 215, 249, 12, 77, 91, + 136, 86, 199, 192, 234, 27, 237, 120, + 140, 149, 111, 152, 207, 178, 136, 130, + 35, 160, 212, 139, 12, 211, 64, 192, + 40, 218, 72, 25, 45, 192, 83, 252, + 250, 114, 172, 108, 56, 178, 94, 190, + 101, 74, 166, 243, 227, 30, 155, 219, + 65, 198, 223, 48, 65, 118, 106, 210, + 50, 248, 208, 202, 214, 36, 128, 8, + 95, 38, 231, 210, 237, 219, 83, 224, + 118, 230, 126, 78, 0, 137, 11, 47, + 208, 164, 48, 61, 17, 81, 18, 58, + 21, 93, 119, 164, 101, 184, 181, 175, + 34, 206, 59, 115, 38, 132, 67, 169, + 243, 154, 142, 114, 144, 44, 8, 74, + 16, 240, 33, 98, 217, 67, 22, 72, + 65, 17, 220, 179, 215, 87, 96, 192, + 231, 207, 161, 143, 107, 190, 158, 21, + 251, 122, 200, 201, 83, 95, 143, 96, + 4, 53, 115, 132, 214, 232, 34, 55, + 149, 12, 177, 23, 208, 133, 53, 87, + 38, 98, 214, 252, 129, 196, 110, 97, + 252, 138, 253, 142, 186, 195, 13, 30, + 15, 48, 146, 107, 175, 197, 14, 79, + 97, 61, 240, 200, 32, 129, 65, 41, + 248, 153, 41, 148, 83, 241, 7, 2, + 124, 69, 15, 99, 194, 82, 178, 183, + 236, 96, 228, 187, 163, 198, 254, 147, + 160, 81, 104, 57, 190, 243, 75, 113, + 211, 169, 166, 39, 236, 91, 188, 185, + 68, 65, 207, 138, 77, 91, 121, 136, + 185, 75, 183, 103, 44, 59, 138, 236, + 42, 27, 227, 4, 133, 199, 240, 233, + 131, 172, 65, 148, 134, 141, 144, 12, + 82, 97, 196, 135, 217, 139, 66, 47, + 143, 116, 47, 210, 153, 151, 42, 202, + 28, 133, 190, 125, 113, 188, 46, 1, + 171, 82, 122, 102, 193, 126, 56, 124, + 190, 142, 24, 102, 194, 59, 196, 125, + 201, 129, 232, 21, 81, 219, 200, 242, + 14, 242, 246, 124, 68, 53, 30, 162, + 78, 144, 36, 171, 56, 200, 213, 39, + 136, 77, 212, 173, 57, 123, 170, 57, + 173, 221, 175, 72, 224, 11, 214, 242, + 120, 55, 180, 37, 225, 16, 17, 189, + 16, 138, 240, 178, 49, 105, 230, 164, + 50, 75, 177, 115, 175, 116, 242, 188, + 61, 38, 60, 141, 105, 50, 37, 51, + 37, 28, 152, 221, 18, 49, 211, 34, + 178, 215, 130, 187, 131, 89, 128, 9, + 86, 43, 216, 17, 141, 56, 114, 32, + 253, 172, 245, 214, 225, 183, 170, 35, + 90, 14, 52, 22, 38, 56, 246, 6, + 144, 129, 52, 101, 207, 181, 90, 140, + 216, 137, 253, 173, 33, 20, 208, 14, + 53, 113, 255, 105, 155, 192, 244, 25, + 53, 206, 172, 191, 240, 196, 231, 154, + 113, 244, 175, 51, 140, 13, 22, 109, + 152, 112, 130, 15, 72, 186, 218, 215, + 132, 122, 80, 49, 233, 147, 182, 17, + 32, 84, 107, 145, 202, 192, 198, 87, + 217, 14, 115, 67, 249, 83, 224, 185, + 67, 64, 238, 16, 36, 244, 3, 56, + 170, 169, 18, 174, 110, 98, 124, 178, + 129, 45, 236, 221, 162, 137, 35, 149, + 137, 56, 108, 248, 6, 28, 137, 34, + 146, 21, 37, 109, 39, 1, 217, 93, + 215, 39, 89, 66, 214, 141, 158, 190, + 19, 126, 16, 218, 154, 97, 185, 147, + 161, 21, 88, 82, 166, 135, 64, 131, + 196, 178, 195, 231, 220, 223, 23, 194, + 107, 126, 44, 155, 254, 122, 44, 174, + 219, 200, 166, 73, 211, 246, 140, 22, + 79, 187, 180, 186, 215, 96, 131, 21, + 43, 81, 190, 230, 232, 193, 30, 245, + 29, 118, 184, 143, 28, 187, 122, 141, + 12, 29, 247, 146, 244, 174, 65, 226, + 247, 80, 162, 72, 207, 16, 147, 88, + 11, 206, 182, 146, 114, 138, 76, 184, + 54, 98, 253, 251, 118, 163, 81, 44, + 245, 156, 229, 184, 175, 59, 81, 160, + 92, 16, 202, 161, 2, 133, 155, 199, + 24, 214, 189, 165, 102, 133, 122, 151, + 14, 198, 86, 114, 46, 168, 54, 66, + 96, 87, 234, 222, 140, 205, 176, 167, + 247, 153, 226, 178, 194, 86, 175, 186, + 136, 63, 210, 68, 207, 27, 211, 10, + 108, 106, 102, 221, 128, 209, 254, 243, + 143, 117, 45, 220, 24, 106, 10, 103, + 119, 66, 227, 230, 108, 7, 207, 231, + 190, 123, 33, 136, 13, 136, 32, 46, + 245, 75, 190, 236, 148, 202, 13, 109, + 197, 175, 142, 27, 233, 153, 64, 56, + 210, 180, 103, 42, 128, 48, 234, 115, + 178, 132, 201, 152, 180, 136, 146, 255, + 106, 209, 174, 46, 0, 254, 242, 130, + 247, 36, 1, 25, 131, 142, 245, 109, + 175, 147, 121, 229, 237, 188, 164, 98, + 222, 255, 136, 149, 29, 61, 108, 97, + 173, 107, 87, 236, 183, 197, 51, 248, + 168, 55, 82, 59, 212, 21, 77, 31, + 212, 59, 101, 230, 22, 1, 116, 39, + 171, 117, 13, 194, 74, 220, 219, 69, + 23, 197, 244, 244, 243, 230, 104, 96, + 133, 134, 160, 36, 178, 168, 21, 196, + 87, 209, 183, 165, 98, 6, 105, 71, + 71, 207, 101, 131, 193, 45, 143, 60, + 167, 255, 235, 162, 104, 155, 148, 60, + 115, 198, 1, 214, 235, 56, 87, 44, + 103, 205, 179, 202, 203, 63, 103, 18, + 136, 150, 88, 162, 126, 90, 160, 183, + 125, 113, 102, 90, 64, 169, 10, 143, + 22, 183, 219, 142, 54, 76, 17, 105, + 58, 242, 151, 249, 0, 106, 178, 249, + 201, 47, 178, 115, 161, 48, 108, 19, + 18, 254, 161, 9, 164, 56, 117, 233, + 175, 177, 135, 115, 171, 3, 47, 151, + 100, 24, 226, 173, 237, 84, 103, 239, + 133, 221, 128, 255, 90, 250, 178, 47, + 161, 7, 98, 163, 76, 87, 230, 253, + 180, 143, 30, 85, 161, 179, 28, 87, + 73, 225, 219, 219, 69, 248, 242, 188, + 235, 157, 17, 178, 226, 78, 98, 117, + 115, 21, 30, 195, 252, 114, 92, 11, + 189, 69, 184, 100, 104, 152, 47, 148, + 172, 142, 60, 41, 125, 228, 212, 89, + 55, 184, 183, 17, 12, 191, 239, 144, + 152, 250, 157, 234, 65, 40, 37, 218, + 106, 136, 221, 127, 51, 79, 166, 239, + 209, 172, 135, 205, 197, 184, 116, 95, + 253, 14, 192, 163, 241, 84, 201, 60, + 82, 113, 52, 49, 164, 0, 12, 201, + 15, 199, 44, 149, 45, 93, 242, 158, + 45, 105, 146, 15, 244, 200, 34, 90, + 18, 202, 220, 232, 168, 151, 39, 192, + 187, 89, 68, 134, 174, 212, 175, 25, + 162, 128, 0, 51, 130, 41, 25, 234, + 150, 29, 235, 177, 105, 221, 61, 58, + 72, 9, 172, 158, 242, 187, 248, 74, + 187, 240, 34, 198, 199, 211, 157, 172, + 116, 160, 54, 99, 193, 179, 82, 127, + 232, 123, 139, 128, 72, 107, 197, 215, + 161, 126, 102, 15, 166, 206, 142, 74, + 163, 231, 110, 28, 241, 160, 185, 92, + 220, 220, 15, 146, 187, 212, 190, 84, + 114, 94, 15, 121, 87, 148, 206, 23, + 32, 205, 107, 94, 26, 19, 94, 26, + 10, 45, 244, 187, 142, 44, 216, 76, + 237, 35, 135, 73, 253, 79, 207, 184, + 51, 190, 62, 135, 242, 184, 143, 49, + 175, 22, 37, 204, 154, 41, 115, 23, + 255, 109, 138, 123, 28, 214, 50, 14, + 235, 250, 141, 72, 28, 218, 47, 161, + 255, 15, 136, 224, 116, 67, 90, 123, + 73, 181, 19, 45, 65, 159, 185, 196, + 241, 230, 161, 48, 92, 52, 129, 111, + 147, 26, 100, 97, 176, 127, 55, 107, + 42, 105, 240, 227, 155, 43, 93, 13, + 36, 74, 22, 177, 218, 78, 102, 101, + 211, 93, 217, 245, 203, 253, 12, 247, + 242, 127, 200, 228, 191, 238, 143, 143, + 158, 39, 7, 124, 192, 26, 150, 223, + 148, 168, 214, 23, 182, 111, 51, 37, + 11, 172, 221, 57, 110, 240, 95, 242, + 13, 113, 210, 131, 3, 59, 166, 209, + 58, 43, 15, 171, 215, 52, 66, 102, + 177, 199, 120, 83, 161, 7, 109, 64, + 158, 119, 109, 56, 54, 66, 58, 45, + 173, 117, 90, 25, 7, 151, 38, 196, + 236, 243, 112, 48, 75, 226, 193, 86, + 254, 212, 235, 161, 16, 68, 105, 116, + 33, 254, 56, 167, 151, 246, 232, 246, + 103, 57, 189, 192, 252, 162, 116, 174, + 218, 233, 148, 107, 160, 227, 73, 251, + 194, 59, 142, 48, 56, 165, 230, 132, + 252, 105, 161, 216, 26, 85, 131, 48, + 166, 0, 26, 33, 184, 223, 163, 143, + 131, 244, 36, 112, 82, 20, 106, 104, + 61, 40, 202, 219, 31, 137, 253, 31, + 30, 87, 254, 149, 140, 117, 107, 211, + 12, 202, 138, 135, 41, 158, 76, 39, + 16, 165, 17, 178, 149, 223, 218, 157, + 216, 103, 151, 207, 117, 91, 223, 219, + 69, 230, 190, 217, 47, 178, 227, 138, + 139, 165, 198, 127, 94, 2, 146, 21, + 10, 47, 159, 242, 6, 113, 218, 23, + 64, 10, 229, 4, 141, 139, 171, 202, + 33, 32, 181, 66, 184, 36, 247, 3, + 206, 89, 224, 10, 168, 245, 28, 44, + 210, 227, 149, 42, 10, 228, 129, 90, + 193, 89, 40, 158, 249, 217, 181, 250, + 225, 160, 121, 169, 92, 64, 202, 85, + 250, 193, 64, 159, 161, 51, 73, 83, + 130, 34, 21, 28, 141, 104, 127, 192, + 202, 176, 180, 66, 206, 122, 68, 101, + 133, 59, 126, 54, 90, 81, 85, 36, + 125, 93, 103, 15, 5, 33, 77, 32, + 3, 153, 196, 206, 178, 52, 142, 79, + 168, 209, 112, 105, 67, 248, 243, 212, + 116, 238, 152, 244, 52, 255, 85, 79, + 17, 82, 241, 147, 199, 16, 100, 231, + 10, 31, 59, 201, 49, 176, 112, 59, + 235, 160, 227, 178, 44, 113, 215, 93, + 152, 23, 78, 169, 251, 81, 117, 242, + 79, 183, 199, 204, 237, 59, 91, 95, + 248, 188, 139, 61, 114, 0, 80, 249, + 203, 59, 165, 232, 225, 212, 169, 29, + 12, 165, 153, 206, 206, 35, 115, 132, + 214, 200, 91, 34, 51, 152, 128, 138, + 169, 229, 174, 223, 144, 1, 60, 39, + 200, 171, 93, 138, 251, 210, 47, 200, + 223, 46, 215, 210, 35, 152, 139, 219, + 146, 90, 39, 21, 80, 172, 11, 4, + 193, 76, 138, 252, 253, 77, 70, 18, + 77, 242, 219, 188, 144, 57, 87, 100, + 9, 163, 114, 64, 100, 215, 91, 50, + 250, 85, 120, 172, 68, 196, 79, 249, + 222, 141, 108, 252, 253, 58, 97, 41, + 213, 50, 188, 183, 137, 184, 129, 96, + 142, 102, 56, 92, 245, 128, 91, 238, + 73, 112, 134, 214, 131, 143, 147, 84, + 161, 43, 39, 37, 114, 185, 203, 25, + 12, 231, 164, 52, 110, 198, 42, 52, + 215, 74, 139, 239, 198, 34, 84, 78, + 164, 28, 201, 13, 210, 34, 27, 249, + 134, 243, 240, 237, 39, 137, 179, 136, + 187, 119, 47, 185, 114, 243, 83, 226, + 72, 129, 221, 211, 83, 175, 158, 232, + 89, 223, 182, 57, 200, 92, 177, 82, + 126, 166, 203, 62, 247, 195, 221, 233, + 209, 117, 170, 25, 223, 10, 62, 22, + 96, 235, 218, 161, 196, 24, 103, 11, + 40, 241, 255, 210, 244, 15, 9, 144, + 131, 115, 97, 137, 19, 198, 79, 10, + 130, 178, 107, 221, 209, 36, 7, 80, + 210, 175, 131, 215, 135, 37, 14, 103, + 70, 252, 54, 255, 91, 13, 96, 222, + 132, 80, 142, 133, 73, 38, 16, 226, + 88, 3, 28, 251, 5, 68, 90, 187, + 166, 129, 35, 231, 255, 103, 115, 155, + 141, 141, 96, 84, 100, 110, 254, 130, + 246, 87, 225, 244, 187, 10, 21, 151, + 73, 181, 147, 100, 137, 144, 225, 179, + 99, 230, 189, 69, 107, 121, 224, 39, + 36, 91, 90, 182, 195, 36, 2, 135, + 216, 102, 236, 53, 92, 109, 79, 168, + 171, 199, 195, 201, 13, 104, 35, 201, + 75, 110, 86, 86, 189, 48, 204, 90, + 231, 72, 156, 1, 111, 110, 240, 230, + 62, 32, 20, 208, 219, 240, 136, 210, + 135, 26, 127, 8, 153, 122, 45, 144, + 119, 53, 122, 229, 94, 63, 103, 139, + 231, 65, 248, 188, 224, 227, 106, 66, + 169, 149, 203, 40, 149, 229, 142, 57, + 1, 196, 142, 155, 3, 39, 240, 60, + 171, 1, 87, 20, 69, 17, 107, 83, + 155, 56, 57, 169, 23, 7, 238, 45, + 77, 98, 50, 13, 254, 134, 88, 224, + 251, 122, 130, 27, 150, 195, 84, 204, + 1, 123, 97, 192, 255, 102, 242, 218, + 27, 20, 208, 176, 147, 254, 65, 235, + 128, 76, 116, 10, 240, 126, 184, 185, + 126, 12, 168, 171, 210, 195, 0, 171, + 172, 3, 24, 93, 111, 218, 46, 202, + 2, 60, 229, 252, 4, 242, 32, 110, + 208, 3, 17, 16, 150, 239, 208, 204, + 70, 201, 229, 124, 63, 148, 96, 98, + 222, 63, 255, 255, 102, 89, 51, 79, + 99, 51, 228, 119, 118, 184, 163, 35, + 112, 229, 239, 224, 95, 24, 209, 80, + 92, 4, 176, 131, 71, 71, 242, 159, + 163, 187, 25, 136, 99, 145, 91, 94, + 154, 127, 124, 128, 115, 147, 1, 210, + 214, 232, 248, 143, 127, 79, 27, 98, + 44, 18, 142, 206, 98, 195, 38, 4, + 68, 68, 67, 169, 3, 54, 133, 233, + 28, 0, 120, 239, 167, 74, 110, 222, + 196, 180, 148, 244, 12, 222, 46, 139, + 143, 64, 196, 11, 83, 70, 229, 136, + 68, 93, 229, 73, 218, 54, 149, 47, + 175, 43, 171, 31, 178, 180, 135, 93, + 70, 62, 205, 76, 156, 184, 27, 71, + 90, 232, 182, 25, 221, 3, 8, 76, + 144, 212, 126, 129, 184, 62, 39, 67, + 68, 189, 172, 83, 158, 12, 235, 175, + 99, 248, 236, 249, 215, 6, 145, 33, + 97, 37, 49, 132, 202, 175, 56, 124, + 218, 192, 9, 228, 26, 175, 223, 142, + 185, 101, 133, 56, 236, 116, 210, 24, + 86, 36, 112, 13, 197, 224, 40, 130, + 106, 33, 58, 24, 27, 35, 111, 0, + 212, 82, 211, 139, 201, 241, 53, 121, + 54, 226, 54, 212, 225, 204, 124, 224, + 216, 197, 190, 150, 156, 45, 78, 176, + 214, 7, 139, 86, 6, 62, 187, 149, + 85, 94, 66, 93, 13, 236, 123, 53, + 155, 32, 88, 69, 185, 139, 163, 249, + 29, 142, 155, 97, 66, 106, 237, 88, + 121, 180, 204, 231, 11, 123, 124, 80, + 163, 119, 2, 204, 190, 243, 108, 163, + 134, 188, 145, 114, 63, 188, 156, 116, + 58, 248, 142, 42, 88, 167, 87, 45, + 52, 192, 22, 28, 91, 22, 172, 1, + 96, 163, 0, 13, 250, 117, 170, 69, + 101, 190, 3, 188, 71, 234, 228, 2, + 145, 45, 142, 208, 59, 40, 128, 250, + 174, 123, 99, 110, 234, 102, 182, 90, + 209, 212, 161, 95, 82, 191, 98, 233, + 166, 56, 170, 234, 167, 67, 184, 242, + 235, 121, 164, 252, 164, 251, 41, 94, + 30, 53, 82, 173, 196, 112, 114, 210, + 117, 118, 132, 126, 244, 159, 228, 74, + 9, 12, 200, 16, 251, 223, 226, 115, + 160, 47, 0, 59, 100, 229, 223, 141, + 8, 107, 218, 196, 42, 225, 59, 12, + 224, 130, 225, 51, 243, 85, 63, 229, + 29, 200, 179, 90, 158, 86, 73, 52, + 174, 83, 79, 244, 239, 24, 118, 149, + 202, 29, 202, 143, 0, 114, 69, 187, + 50, 182, 53, 41, 200, 173, 248, 1, + 14, 214, 231, 226, 194, 164, 24, 185, + 232, 232, 36, 136, 109, 76, 218, 227, + 79, 41, 238, 25, 251, 54, 67, 36, + 166, 136, 187, 174, 4, 68, 41, 71, + 16, 195, 30, 188, 19, 93, 146, 64, + 147, 227, 215, 199, 223, 86, 235, 182, + 211, 158, 46, 46, 161, 231, 163, 213, + 140, 193, 235, 180, 98, 90, 92, 106, + 65, 40, 11, 205, 114, 138, 67, 43, + 20, 56, 192, 46, 123, 86, 57, 137, + 179, 161, 187, 182, 237, 49, 85, 252, + 132, 64, 239, 244, 56, 98, 170, 186, + 126, 156, 89, 109, 203, 93, 157, 49, + 21, 236, 180, 148, 234, 214, 141, 97, + 0, 46, 93, 254, 230, 137, 95, 236, + 174, 154, 78, 176, 11, 104, 211, 21, + 61, 72, 22, 136, 18, 86, 130, 150, + 207, 144, 190, 58, 144, 201, 83, 6, + 167, 98, 25, 6, 55, 141, 137, 14, + 79, 63, 52, 109, 207, 122, 53, 179, + 80, 170, 24, 227, 64, 222, 15, 36, + 17, 197, 89, 68, 27, 168, 9, 10, + 56, 149, 148, 123, 4, 100, 81, 255, + 153, 232, 152, 164, 13, 224, 245, 51, + 124, 146, 26, 45, 132, 6, 157, 108, + 252, 187, 245, 133, 79, 162, 168, 80, + 178, 203, 210, 9, 150, 32, 47, 126, + 190, 242, 95, 47, 169, 222, 146, 227, + 142, 166, 137, 202, 168, 184, 221, 238, + 180, 14, 83, 110, 23, 33, 43, 100, + 249, 142, 9, 14, 115, 196, 195, 93, + 69, 221, 130, 144, 113, 103, 154, 23, + 169, 196, 241, 117, 124, 25, 133, 130, + 61, 50, 183, 6, 168, 80, 160, 83, + 31, 241, 251, 145, 178, 225, 95, 29, + 15, 111, 158, 72, 39, 185, 157, 43, + 209, 91, 37, 205, 133, 98, 81, 6, + 21, 105, 215, 239, 16, 60, 160, 154, + 40, 49, 64, 179, 119, 59, 152, 221, + 187, 62, 206, 63, 166, 65, 88, 2, + 198, 184, 46, 171, 196, 74, 204, 9, + 59, 242, 249, 161, 242, 146, 230, 5, + 247, 242, 132, 54, 23, 119, 149, 165, + 20, 178, 250, 33, 219, 120, 164, 117, + 208, 245, 195, 72, 171, 252, 3, 24, + 129, 89, 73, 90, 150, 54, 208, 249, + 43, 107, 31, 151, 210, 106, 72, 3, + 65, 16, 80, 247, 57, 146, 148, 91, + 20, 66, 237, 178, 252, 200, 210, 13, + 0, 249, 155, 141, 32, 7, 12, 4, + 247, 123, 177, 201, 64, 213, 122, 143, + 65, 60, 94, 58, 178, 86, 204, 156, + 146, 85, 158, 73, 70, 73, 98, 228, + 62, 135, 225, 120, 174, 127, 121, 164, + 16, 47, 199, 153, 4, 76, 80, 146, + 162, 243, 234, 35, 181, 74, 166, 186, + 253, 235, 157, 153, 98, 53, 66, 67, + 61, 216, 102, 135, 142, 155, 159, 150, + 17, 195, 140, 205, 162, 29, 173, 239, + 43, 138, 196, 119, 206, 154, 55, 201, + 31, 189, 7, 77, 151, 250, 222, 29, + 164, 134, 254, 173, 44, 166, 74, 91, + 139, 82, 236, 240, 61, 141, 31, 194, + 182, 160, 196, 122, 197, 107, 37, 34, + 13, 170, 68, 167, 220, 31, 99, 160, + 121, 223, 103, 245, 144, 47, 198, 216, + 156, 40, 246, 152, 182, 99, 82, 126, + 8, 205, 68, 18, 172, 228, 174, 205, + 139, 147, 224, 120, 114, 81, 110, 18, + 152, 151, 68, 113, 23, 98, 190, 73, + 156, 136, 120, 181, 67, 99, 37, 220, + 124, 65, 187, 129, 236, 17, 51, 65, + 236, 49, 216, 181, 212, 56, 216, 81, + 49, 152, 142, 30, 78, 21, 237, 137, + 178, 168, 65, 248, 92, 175, 45, 54, + 4, 72, 91, 8, 236, 154, 104, 244, + 135, 104, 224, 83, 164, 18, 37, 190, + 85, 153, 10, 34, 132, 66, 140, 40, + 176, 41, 223, 34, 133, 171, 135, 4, + 69, 1, 130, 110, 128, 180, 245, 226, + 19, 236, 161, 118, 174, 135, 216, 10, + 163, 49, 80, 159, 180, 162, 44, 222, + 135, 201, 193, 29, 204, 250, 49, 53, + 126, 217, 226, 206, 105, 209, 198, 77, + 181, 150, 233, 142, 160, 197, 132, 217, + 115, 126, 160, 37, 104, 244, 28, 205, + 247, 214, 248, 126, 41, 176, 180, 250, + 252, 126, 237, 109, 34, 24, 250, 13, + 249, 155, 17, 192, 71, 31, 42, 206, + 0, 80, 239, 164, 70, 114, 81, 216, + 161, 99, 129, 78, 72, 122, 176, 47, + 9, 235, 185, 35, 244, 187, 8, 190, + 85, 63, 205, 110, 52, 184, 145, 4, + 130, 35, 72, 176, 165, 194, 143, 135, + 93, 85, 212, 253, 174, 99, 93, 89, + 216, 198, 51, 86, 110, 104, 118, 111, + 10, 28, 220, 35, 67, 110, 60, 60, + 141, 124, 33, 103, 218, 43, 4, 166, + 10, 139, 217, 34, 156, 77, 124, 133, + 112, 42, 77, 66, 253, 6, 197, 26, + 89, 39, 149, 201, 130, 20, 24, 155, + 191, 8, 184, 94, 32, 176, 55, 148, + 234, 190, 188, 106, 205, 43, 133, 93, + 35, 87, 173, 28, 132, 251, 106, 117, + 146, 110, 146, 214, 68, 128, 189, 74, + 199, 232, 79, 42, 86, 91, 1, 11, + 151, 112, 146, 47, 124, 248, 126, 239, + 25, 103, 169, 166, 173, 114, 141, 230, + 14, 164, 109, 240, 4, 29, 185, 120, + 128, 57, 151, 183, 104, 159, 52, 30, + 221, 153, 4, 209, 252, 130, 223, 3, + 91, 8, 37, 170, 165, 16, 133, 24, + 134, 25, 239, 51, 180, 113, 187, 130, + 106, 186, 229, 59, 150, 152, 163, 59, + 171, 61, 108, 233, 225, 96, 79, 105, + 208, 121, 32, 206, 64, 205, 180, 194, + 102, 212, 196, 200, 230, 159, 23, 152, + 209, 105, 33, 137, 41, 93, 124, 89, + 243, 247, 201, 198, 72, 40, 43, 134, + 143, 180, 94, 4, 20, 154, 178, 57, + 82, 66, 117, 42, 155, 87, 218, 69, + 255, 228, 32, 182, 78, 242, 45, 216, + 22, 130, 107, 77, 174, 253, 102, 55, + 176, 209, 159, 224, 173, 98, 37, 139, + 96, 37, 238, 212, 115, 139, 35, 245, + 94, 127, 9, 50, 143, 12, 101, 89, + 81, 26, 225, 41, 81, 125, 3, 146, + 71, 166, 170, 191, 90, 12, 70, 153, + 219, 81, 123, 22, 109, 71, 140, 140, + 113, 145, 71, 150, 136, 182, 143, 165, + 40, 148, 226, 144, 142, 245, 44, 221, + 175, 78, 47, 221, 63, 100, 240, 80, + 118, 100, 56, 172, 55, 90, 79, 174, + 46, 55, 106, 249, 5, 107, 197, 23, + 49, 19, 60, 142, 11, 15, 162, 234, + 144, 59, 251, 85, 97, 168, 65, 28, + 109, 232, 255, 109, 181, 66, 206, 64, + 209, 25, 176, 57, 239, 126, 36, 76, + 225, 195, 83, 225, 215, 3, 224, 143, + 222, 14, 235, 42, 143, 127, 208, 70, + 170, 227, 143, 198, 33, 113, 31, 78, + 134, 240, 234, 240, 92, 33, 57, 107, + 126, 187, 73, 85, 101, 7, 241, 130, + 189, 184, 14, 112, 24, 89, 118, 227, + 204, 203, 56, 237, 47, 254, 63, 17, + 43, 219, 20, 4, 131, 167, 244, 213, + 153, 237, 207, 166, 169, 138, 26, 249, + 7, 242, 29, 172, 44, 252, 67, 238, + 209, 97, 39, 73, 186, 218, 40, 175, + 159, 137, 122, 214, 248, 49, 156, 26, + 213, 31, 117, 218, 226, 211, 85, 19, + 204, 218, 74, 98, 188, 50, 21, 226, + 173, 230, 212, 4, 3, 66, 83, 126, + 90, 111, 115, 247, 159, 148, 106, 3, + 240, 191, 101, 15, 153, 180, 173, 180, + 167, 196, 113, 157, 154, 222, 204, 158, + 255, 39, 112, 43, 5, 46, 221, 125, + 7, 129, 87, 80, 129, 30, 56, 14, + 46, 164, 126, 97, 52, 138, 157, 106, + 68, 143, 242, 174, 224, 246, 217, 135, + 109, 66, 71, 74, 141, 225, 95, 186, + 41, 157, 149, 52, 200, 50, 54, 39, + 231, 77, 92, 246, 170, 88, 12, 179, + 120, 233, 134, 33, 255, 203, 105, 105, + 145, 2, 45, 51, 98, 63, 189, 196, + 69, 157, 237, 111, 141, 198, 212, 3, + 167, 38, 135, 188, 70, 228, 78, 147, + 35, 21, 196, 164, 155, 116, 251, 105, + 171, 242, 61, 202, 171, 11, 198, 239, + 141, 34, 87, 31, 82, 137, 176, 151, + 228, 65, 55, 226, 58, 70, 250, 114, + 91, 226, 3, 2, 205, 55, 161, 50, + 52, 98, 149, 247, 55, 244, 184, 254, + 155, 137, 248, 134, 76, 32, 36, 203, + 241, 121, 53, 123, 96, 175, 67, 102, + 124, 64, 229, 128, 244, 240, 89, 5, + 248, 53, 0, 172, 184, 126, 110, 252, + 30, 117, 149, 232, 113, 34, 185, 158, + 223, 23, 249, 52, 123, 117, 232, 67, + 37, 41, 43, 249, 48, 210, 4, 57, + 155, 49, 40, 96, 84, 13, 11, 167, + 49, 41, 175, 251, 28, 64, 12, 254, + 119, 172, 40, 136, 56, 123, 226, 94, + 158, 131, 4, 249, 233, 67, 72, 65, + 119, 119, 36, 221, 91, 202, 198, 229, + 91, 241, 217, 75, 110, 39, 198, 165, + 189, 182, 234, 101, 219, 195, 7, 45, + 86, 129, 122, 171, 125, 130, 188, 87, + 137, 178, 18, 103, 116, 128, 40, 89, + 131, 50, 46, 75, 140, 153, 151, 15, + 188, 228, 109, 165, 33, 3, 97, 0, + 131, 135, 128, 106, 173, 246, 55, 175, + 39, 75, 40, 132, 78, 21, 251, 86, + 72, 34, 110, 220, 3, 202, 112, 45, + 228, 207, 53, 16, 212, 219, 8, 94, + 224, 91, 6, 132, 7, 195, 27, 164, + 86, 105, 208, 69, 198, 238, 71, 203, + 254, 44, 120, 5, 158, 54, 69, 1, + 230, 84, 250, 27, 31, 128, 128, 4, + 140, 13, 119, 36, 27, 83, 2, 41, + 117, 157, 34, 113, 134, 129, 216, 33, + 67, 177, 141, 145, 91, 203, 249, 221, + 172, 225, 241, 197, 161, 169, 8, 233, + 68, 75, 207, 214, 154, 181, 90, 177, + 26, 235, 49, 247, 229, 45, 248, 246, + 35, 156, 162, 64, 119, 188, 190, 165, + 249, 244, 16, 47, 176, 48, 53, 193, + 206, 70, 107, 134, 217, 220, 5, 122, + 24, 58, 171, 50, 180, 141, 174, 241, + 163, 49, 194, 30, 233, 226, 192, 108, + 77, 63, 5, 166, 80, 89, 66, 134, + 209, 161, 120, 18, 200, 34, 212, 239, + 218, 12, 3, 233, 23, 16, 6, 42, + 199, 105, 170, 33, 222, 157, 66, 60, + 48, 64, 112, 32, 81, 134, 72, 23, + 93, 201, 79, 41, 6, 11, 134, 159, + 217, 133, 183, 108, 249, 167, 153, 61, + 110, 48, 78, 56, 27, 219, 72, 149, + 213, 218, 129, 210, 43, 109, 244, 197, + 103, 223, 242, 186, 221, 178, 161, 124, + 136, 140, 117, 140, 156, 163, 206, 149, + 255, 169, 202, 169, 70, 137, 198, 246, + 55, 168, 200, 25, 160, 232, 0, 94, + 39, 119, 161, 167, 179, 57, 216, 178, + 55, 239, 91, 84, 252, 149, 210, 65, + 113, 192, 249, 20, 240, 57, 206, 164, + 127, 0, 210, 254, 107, 95, 37, 140, + 108, 94, 25, 247, 169, 75, 199, 80, + 220, 82, 222, 123, 31, 238, 132, 131, + 44, 247, 160, 231, 112, 54, 45, 101, + 13, 213, 239, 143, 119, 120, 214, 253, + 116, 21, 188, 111, 169, 130, 52, 108, + 91, 182, 11, 7, 157, 112, 177, 35, + 227, 220, 241, 226, 27, 234, 143, 14, + 15, 226, 224, 75, 171, 208, 93, 201, + 40, 66, 57, 227, 46, 246, 70, 34, + 117, 84, 207, 239, 222, 98, 229, 18, + 9, 170, 145, 2, 57, 103, 204, 218, + 176, 159, 46, 166, 30, 245, 242, 103, + 124, 57, 169, 83, 213, 9, 117, 209, + 136, 147, 155, 57, 169, 91, 126, 98, + 63, 49, 20, 47, 26, 170, 184, 199, + 170, 138, 214, 129, 82, 175, 121, 162, + 228, 29, 1, 47, 37, 108, 143, 4, + 88, 40, 24, 246, 88, 61, 80, 89, + 4, 149, 152, 209, 56, 5, 223, 144, + 47, 94, 5, 36, 25, 11, 115, 240, + 41, 211, 38, 251, 5, 123, 77, 213, + 105, 5, 62, 232, 68, 194, 37, 100, + 149, 169, 217, 244, 158, 86, 30, 201, + 83, 41, 171, 254, 174, 39, 202, 174, + 204, 205, 252, 34, 143, 30, 35, 123, + 164, 188, 178, 10, 72, 152, 242, 246, + 140, 37, 246, 47, 53, 21, 165, 213, + 51, 57, 93, 118, 130, 246, 230, 16, + 227, 10, 6, 12, 135, 212, 170, 20, + 25, 88, 65, 133, 72, 109, 209, 103, + 16, 234, 223, 125, 212, 243, 188, 16, + 58, 229, 227, 145, 185, 131, 50, 254, + 203, 200, 235, 122, 153, 188, 55, 219, + 152, 74, 85, 157, 54, 40, 31, 171, + 208, 199, 247, 44, 65, 231, 188, 240, + 41, 134, 253, 128, 118, 93, 109, 80, + 91, 97, 109, 245, 202, 117, 137, 163, + 251, 60, 194, 10, 119, 72, 176, 193, + 171, 138, 8, 220, 208, 140, 157, 215, + 188, 160, 50, 236, 112, 162, 161, 108, + 53, 33, 155, 53, 241, 41, 5, 157, + 231, 61, 218, 17, 58, 89, 5, 214, + 157, 149, 193, 3, 234, 166, 150, 192, + 71, 69, 197, 60, 153, 7, 88, 179, + 21, 130, 120, 67, 184, 65, 228, 224, + 29, 223, 234, 97, 170, 90, 27, 199, + 82, 90, 55, 7, 148, 49, 8, 197, + 101, 152, 132, 244, 151, 56, 165, 219, + 252, 152, 205, 191, 232, 237, 139, 115, + 176, 139, 156, 214, 48, 53, 12, 169, + 63, 0, 4, 238, 149, 44, 236, 51, + 120, 62, 123, 21, 28, 116, 39, 61, + 192, 56, 123, 51, 117, 90, 59, 88, + 56, 34, 132, 47, 137, 165, 108, 191, + 25, 81, 89, 237, 31, 40, 237, 83, + 236, 112, 101, 253, 53, 219, 182, 179, + 75, 24, 216, 192, 174, 57, 172, 92, + 232, 132, 91, 139, 193, 205, 119, 182, + 183, 187, 170, 64, 108, 89, 141, 6, + 68, 192, 213, 241, 102, 142, 203, 139, + 195, 63, 115, 233, 67, 127, 216, 16, + 51, 184, 231, 112, 22, 131, 66, 92, + 173, 6, 244, 20, 60, 42, 126, 106, + 219, 65, 62, 116, 80, 6, 185, 5, + 29, 246, 182, 101, 159, 75, 168, 144, + 21, 113, 252, 190, 140, 3, 186, 114, + 46, 217, 25, 134, 223, 108, 114, 183, + 119, 77, 63, 165, 51, 254, 138, 77, + 141, 1, 234, 46, 173, 133, 150, 201, + 130, 105, 218, 240, 115, 181, 18, 191, + 198, 187, 207, 12, 54, 180, 31, 250, + 59, 122, 238, 62, 69, 255, 4, 34, + 24, 206, 52, 211, 31, 200, 89, 110, + 224, 221, 155, 40, 44, 230, 88, 135, + 96, 121, 0, 223, 76, 190, 118, 238, + 59, 122, 31, 83, 82, 220, 42, 183, + 184, 163, 209, 127, 4, 154, 100, 230, + 79, 42, 26, 142, 68, 86, 22, 220, + 151, 103, 115, 170, 95, 126, 120, 180, + 46, 29, 92, 161, 160, 164, 199, 223, + 174, 226, 182, 213, 157, 247, 102, 70, + 35, 191, 231, 19, 249, 82, 218, 58, + 180, 180, 147, 224, 159, 21, 3, 62, + 185, 216, 44, 126, 90, 132, 59, 244, + 152, 105, 232, 237, 136, 236, 211, 35, + 77, 104, 246, 58, 144, 167, 131, 27, + 130, 246, 160, 255, 125, 246, 171, 217, + 247, 83, 245, 149, 58, 1, 225, 143, + 113, 39, 253, 155, 146, 248, 62, 98, + 33, 8, 27, 21, 104, 66, 124, 48, + 228, 120, 88, 247, 13, 16, 79, 8, + 225, 13, 139, 230, 106, 166, 155, 51, + 157, 133, 115, 251, 232, 187, 223, 45, + 149, 140, 198, 87, 254, 130, 157, 32, + 23, 183, 183, 52, 43, 214, 176, 167, + 250, 239, 133, 192, 194, 163, 50, 164, + 204, 202, 101, 248, 240, 47, 146, 179, + 187, 215, 236, 84, 150, 19, 68, 40, + 161, 250, 241, 254, 15, 95, 103, 73, + 87, 227, 201, 51, 218, 117, 169, 70, + 204, 63, 58, 34, 222, 190, 235, 129, + 13, 211, 43, 41, 172, 73, 106, 129, + 57, 240, 37, 80, 39, 215, 127, 122, + 105, 239, 176, 114, 21, 72, 237, 185, + 131, 233, 225, 210, 2, 148, 71, 3, + 218, 199, 28, 179, 198, 10, 51, 213, + 207, 193, 192, 207, 46, 150, 223, 54, + 26, 227, 23, 241, 103, 16, 86, 34, + 97, 156, 191, 157, 92, 71, 200, 214, + 169, 213, 254, 170, 244, 95, 224, 26, + 10, 47, 128, 168, 127, 255, 121, 227, + 210, 130, 245, 11, 84, 65, 251, 127, + 104, 74, 28, 31, 179, 251, 254, 217, + 161, 189, 112, 55, 66, 118, 75, 27, + 220, 156, 108, 154, 49, 16, 71, 97, + 69, 92, 77, 181, 197, 27, 62, 160, + 60, 251, 153, 245, 61, 6, 220, 134, + 91, 90, 5, 250, 89, 58, 84, 95, + 142, 15, 183, 55, 54, 175, 146, 101, + 232, 222, 233, 61, 126, 122, 249, 98, + 172, 201, 232, 155, 150, 149, 111, 16, + 206, 63, 118, 184, 47, 122, 150, 114, + 15, 123, 22, 71, 87, 159, 1, 70, + 163, 241, 166, 107, 135, 198, 102, 162, + 158, 56, 45, 107, 113, 78, 213, 48, + 139, 144, 139, 229, 31, 116, 211, 98, + 113, 41, 96, 151, 71, 218, 63, 40, + 6, 240, 45, 172, 39, 32, 130, 46, + 247, 224, 123, 18, 168, 23, 40, 246, + 53, 172, 101, 148, 15, 165, 23, 39, + 162, 184, 255, 87, 247, 248, 63, 226, + 211, 121, 229, 108, 50, 153, 59, 218, + 18, 64, 171, 29, 108, 65, 114, 253, + 142, 25, 254, 30, 146, 102, 200, 58, + 100, 197, 92, 163, 126, 189, 230, 237, + 221, 11, 184, 223, 255, 130, 177, 169, + 137, 4, 23, 191, 215, 255, 246, 44, + 216, 62, 210, 226, 135, 159, 198, 104, + 33, 32, 120, 111, 103, 166, 137, 92, + 214, 187, 40, 91, 244, 48, 10, 28, + 92, 8, 38, 146, 211, 69, 66, 209, + 234, 233, 7, 154, 0, 201, 4, 104, + 45, 138, 46, 172, 106, 80, 61, 27, + 38, 222, 190, 189, 64, 241, 155, 36, + 41, 65, 0, 215, 215, 205, 249, 210, + 16, 227, 198, 77, 237, 180, 29, 62, + 95, 215, 70, 174, 85, 222, 59, 17, + 205, 245, 80, 68, 116, 127, 156, 249, + 1, 39, 185, 141, 210, 21, 230, 209, + 186, 194, 92, 92, 38, 42, 147, 192, + 75, 121, 38, 144, 225, 31, 58, 97, + 63, 253, 187, 252, 238, 137, 174, 215, + 25, 25, 241, 200, 150, 144, 98, 115, + 87, 29, 107, 89, 13, 43, 105, 201, + 160, 230, 149, 234, 201, 4, 21, 226, + 216, 40, 109, 226, 97, 253, 246, 248, + 31, 217, 102, 57, 79, 54, 7, 194, + 132, 224, 61, 100, 142, 33, 226, 45, + 167, 206, 95, 64, 96, 155, 252, 60, + 58, 245, 242, 224, 105, 24, 240, 9, + 34, 20, 220, 114, 2, 101, 217, 49, + 79, 187, 20, 34, 77, 183, 128, 32, + 7, 156, 135, 80, 84, 106, 77, 37, + 77, 186, 156, 254, 251, 242, 234, 9, + 227, 74, 132, 211, 9, 16, 210, 87, + 55, 117, 217, 104, 137, 108, 154, 65, + 16, 111, 176, 16, 171, 167, 228, 30, + 20, 6, 230, 80, 104, 88, 98, 133, + 153, 117, 232, 235, 81, 43, 92, 171, + 103, 123, 157, 235, 162, 34, 67, 74, + 231, 110, 190, 18, 125, 202, 239, 61, + 248, 149, 147, 143, 129, 107, 117, 88, + 162, 39, 250, 3, 20, 231, 62, 118, + 236, 198, 46, 184, 36, 191, 1, 17, + 128, 48, 64, 236, 148, 120, 150, 170, + 176, 151, 232, 80, 169, 11, 145, 42, + 160, 136, 116, 197, 241, 77, 249, 96, + 220, 122, 101, 8, 42, 109, 184, 159, + 14, 204, 223, 92, 39, 22, 84, 76, + 225, 117, 4, 133, 240, 101, 190, 97, + 136, 130, 134, 155, 131, 194, 56, 37, + 235, 26, 210, 247, 182, 183, 200, 73, + 121, 186, 166, 58, 179, 74, 244, 165, + 61, 37, 118, 31, 43, 188, 231, 135, + 15, 132, 73, 58, 136, 130, 226, 191, + 57, 158, 166, 209, 63, 247, 151, 165, + 114, 81, 174, 213, 236, 64, 141, 110, + 228, 232, 109, 94, 195, 130, 227, 108, + 238, 117, 17, 148, 86, 143, 180, 160, + 186, 141, 133, 59, 243, 188, 5, 126, + 57, 223, 26, 206, 24, 13, 178, 240, + 21, 139, 171, 215, 148, 123, 2, 18, + 150, 224, 27, 163, 37, 8, 200, 1, + 160, 71, 24, 88, 79, 231, 140, 254, + 80, 255, 213, 193, 2, 143, 254, 226, + 203, 56, 150, 90, 221, 192, 44, 27, + 145, 162, 55, 141, 28, 209, 114, 45, + 186, 63, 123, 111, 43, 49, 176, 233, + 200, 227, 177, 201, 214, 137, 121, 143, + 26, 198, 157, 49, 172, 175, 193, 87, + 55, 82, 246, 28, 37, 237, 238, 143, + 214, 239, 71, 151, 126, 11, 9, 90, + 89, 46, 240, 243, 131, 130, 100, 48, + 104, 255, 90, 55, 248, 36, 64, 210, + 116, 171, 57, 86, 40, 154, 199, 130, + 194, 62, 173, 217, 11, 187, 164, 109, + 80, 2, 203, 162, 44, 165, 53, 80, + 22, 180, 229, 146, 66, 3, 90, 146, + 229, 219, 247, 29, 10, 249, 136, 95, + 78, 150, 45, 172, 183, 193, 27, 117, + 163, 148, 135, 10, 140, 241, 33, 138, + 137, 228, 27, 19, 56, 121, 75, 191, + 107, 164, 251, 35, 189, 133, 8, 203, + 9, 183, 145, 156, 88, 252, 106, 186, + 189, 137, 43, 87, 253, 50, 130, 153, + 77, 51, 197, 8, 11, 102, 248, 221, + 185, 177, 206, 217, 210, 91, 186, 9, + 160, 205, 122, 49, 242, 14, 131, 39, + 187, 66, 77, 217, 202, 236, 118, 0, + 228, 0, 20, 76, 198, 17, 209, 60, + 225, 220, 0, 189, 67, 76, 23, 33, + 217, 107, 8, 96, 92, 199, 129, 63, + 200, 243, 75, 72, 123, 254, 151, 228, + 23, 221, 229, 240, 87, 79, 45, 230, + 151, 101, 62, 17, 109, 39, 49, 209, + 159, 25, 75, 62, 77, 208, 248, 179, + 246, 67, 29, 232, 212, 74, 75, 48, + 48, 68, 145, 87, 105, 58, 119, 88, + 53, 53, 243, 55, 131, 155, 189, 150, + 2, 10, 106, 199, 142, 16, 79, 24, + 11, 87, 160, 27, 25, 176, 149, 172, + 137, 111, 96, 183, 6, 52, 26, 177, + 23, 86, 104, 213, 253, 46, 0, 160, + 186, 6, 68, 146, 98, 91, 14, 5, + 73, 102, 78, 34, 109, 185, 233, 26, + 95, 240, 72, 177, 236, 99, 187, 241, + 38, 26, 81, 213, 112, 46, 196, 199, + 209, 60, 3, 146, 163, 242, 11, 22, + 110, 14, 42, 67, 244, 137, 54, 192, + 47, 144, 71, 78, 130, 156, 78, 101, + 188, 36, 249, 247, 38, 38, 199, 129, + 135, 204, 94, 193, 28, 43, 48, 121, + 223, 46, 80, 190, 119, 97, 123, 218, + 203, 20, 197, 177, 21, 208, 194, 233, + 3, 85, 42, 155, 201, 142, 85, 38, + 98, 102, 249, 156, 143, 154, 177, 31, + 45, 87, 155, 143, 25, 79, 15, 63, + 207, 23, 101, 231, 132, 210, 56, 245, + 25, 19, 10, 49, 87, 30, 160, 39, + 243, 81, 19, 47, 90, 138, 4, 228, + 18, 99, 33, 153, 251, 118, 81, 28, + 48, 246, 168, 189, 142, 80, 57, 61, + 146, 188, 87, 33, 175, 4, 43, 142, + 244, 238, 138, 25, 180, 101, 132, 178, + 10, 165, 53, 79, 158, 174, 238, 190, + 213, 58, 34, 167, 121, 178, 167, 193, + 213, 224, 17, 105, 136, 40, 79, 67, + 149, 168, 215, 50, 189, 193, 165, 184, + 27, 61, 215, 210, 73, 154, 183, 232, + 223, 135, 69, 212, 37, 95, 156, 46, + 235, 67, 100, 19, 24, 67, 210, 199, + 181, 63, 89, 13, 115, 247, 170, 180, + 90, 143, 223, 126, 45, 27, 218, 175, + 234, 13, 180, 46, 224, 136, 74, 31, + 0, 17, 122, 3, 43, 123, 190, 84, + 253, 213, 7, 196, 134, 44, 228, 255, + 61, 20, 231, 48, 203, 130, 106, 74, + 209, 23, 236, 17, 112, 12, 59, 38, + 105, 206, 226, 250, 62, 16, 215, 141, + 204, 38, 52, 167, 159, 74, 254, 89, + 232, 200, 70, 115, 142, 104, 24, 2, + 15, 196, 242, 210, 91, 165, 197, 197, + 215, 82, 85, 128, 251, 186, 14, 11, + 224, 232, 172, 50, 95, 67, 67, 128, + 149, 125, 173, 121, 251, 102, 177, 130, + 154, 134, 152, 8, 21, 81, 119, 225, + 176, 146, 141, 203, 220, 180, 65, 14, + 52, 105, 17, 176, 251, 249, 82, 59, + 4, 74, 189, 76, 181, 205, 208, 224, + 164, 150, 105, 196, 106, 47, 245, 204, + 30, 115, 243, 239, 169, 184, 195, 164, + 140, 57, 108, 203, 14, 82, 211, 104, + 230, 147, 13, 9, 111, 32, 163, 62, + 197, 93, 102, 124, 205, 68, 38, 214, + 105, 246, 194, 158, 83, 148, 162, 215, + 64, 81, 2, 253, 247, 74, 134, 138, + 212, 146, 222, 148, 97, 50, 19, 183, + 78, 184, 125, 231, 23, 12, 216, 247, + 106, 94, 78, 247, 175, 115, 24, 164, + 222, 74, 22, 37, 119, 74, 179, 153, + 45, 58, 67, 179, 212, 120, 183, 124, + 218, 64, 188, 137, 206, 245, 204, 53, + 44, 238, 141, 224, 116, 23, 239, 47, + 129, 132, 130, 122, 197, 75, 214, 171, + 61, 27, 176, 17, 68, 87, 15, 94, + 22, 147, 123, 147, 159, 120, 112, 219, + 57, 135, 127, 47, 163, 187, 96, 62, + 136, 158, 196, 59, 134, 57, 211, 1, + 59, 127, 51, 7, 128, 55, 179, 141, + 206, 139, 21, 228, 217, 166, 220, 8, + 247, 132, 101, 218, 242, 225, 17, 146, + 23, 154, 20, 217, 37, 251, 166, 228, + 0, 176, 194, 6, 94, 110, 204, 227, + 119, 243, 134, 37, 158, 14, 233, 35, + 171, 43, 90, 253, 184, 24, 86, 223, + 126, 66, 126, 4, 62, 18, 19, 79, + 207, 2, 9, 137, 193, 116, 2, 209, + 92, 114, 86, 48, 214, 178, 187, 178, + 55, 156, 119, 105, 74, 91, 238, 6, + 160, 181, 143, 180, 176, 87, 59, 60, + 236, 174, 181, 19, 130, 78, 50, 169, + 156, 35, 72, 231, 245, 223, 3, 174, + 217, 51, 49, 234, 2, 89, 57, 184, + 251, 121, 126, 189, 207, 227, 50, 1, + 3, 13, 151, 88, 205, 207, 160, 253, + 111, 198, 246, 205, 128, 59, 238, 38, + 195, 58, 163, 238, 73, 56, 62, 223, + 148, 35, 216, 137, 224, 28, 89, 69, + 244, 169, 189, 63, 142, 192, 106, 7, + 42, 115, 90, 80, 48, 51, 225, 187, + 239, 32, 10, 13, 102, 160, 89, 84, + 206, 77, 10, 218, 189, 240, 242, 246, + 3, 155, 244, 193, 145, 50, 48, 159, + 102, 92, 42, 170, 230, 213, 251, 190, + 249, 157, 139, 213, 14, 76, 44, 192, + 228, 189, 70, 39, 68, 157, 227, 215, + 128, 62, 125, 12, 204, 55, 63, 105, + 221, 56, 136, 184, 236, 205, 136, 120, + 152, 163, 176, 23, 183, 16, 101, 51, + 129, 139, 101, 35, 19, 5, 252, 0, + 155, 143, 81, 227, 21, 69, 229, 75, + 168, 210, 125, 100, 57, 52, 243, 236, + 137, 21, 235, 249, 69, 113, 50, 23, + 212, 27, 67, 135, 37, 8, 223, 96, + 158, 28, 40, 245, 44, 107, 213, 179, + 235, 115, 44, 24, 230, 111, 231, 128, + 35, 211, 235, 163, 180, 25, 77, 206, + 89, 191, 227, 247, 252, 249, 249, 148, + 36, 118, 89, 111, 181, 154, 230, 143, + 98, 224, 68, 125, 178, 165, 146, 28, + 49, 28, 21, 91, 205, 0, 23, 236, + 7, 74, 210, 247, 0, 224, 64, 223, + 251, 35, 24, 69, 177, 134, 57, 36, + 152, 197, 222, 197, 52, 28, 156, 192, + 148, 127, 34, 214, 240, 61, 11, 101, + 37, 8, 255, 252, 245, 238, 131, 168, + 30, 120, 231, 156, 55, 30, 173, 16, + 240, 52, 178, 100, 10, 156, 184, 234, + 6, 28, 120, 69, 70, 93, 73, 81, + 155, 110, 102, 102, 71, 135, 102, 98, + 133, 157, 227, 148, 27, 85, 121, 18, + 216, 182, 123, 176, 204, 105, 42, 190, + 61, 96, 54, 38, 100, 112, 214, 251, + 4, 4, 0, 246, 229, 105, 17, 48, + 168, 144, 44, 100, 130, 48, 65, 49, + 102, 24, 124, 134, 35, 219, 198, 204, + 233, 97, 167, 237, 75, 148, 229, 129, + 239, 86, 189, 4, 139, 242, 84, 218, + 120, 91, 239, 10, 95, 217, 236, 196, + 123, 247, 167, 116, 222, 8, 198, 4, + 100, 155, 194, 38, 150, 108, 104, 108, + 112, 113, 104, 77, 183, 200, 249, 162, + 50, 95, 195, 70, 118, 183, 233, 79, + 103, 228, 107, 142, 105, 47, 252, 230, + 72, 239, 221, 40, 189, 163, 37, 21, + 107, 40, 44, 184, 171, 255, 217, 82, + 173, 157, 168, 8, 226, 207, 147, 15, + 6, 174, 35, 1, 10, 208, 212, 57, + 212, 150, 189, 83, 192, 40, 149, 5, + 119, 223, 45, 228, 173, 167, 73, 123, + 218, 157, 227, 90, 18, 252, 75, 179, + 151, 2, 145, 251, 42, 39, 14, 86, + 70, 36, 77, 10, 174, 211, 232, 84, + 124, 169, 97, 12, 12, 230, 56, 230, + 131, 43, 52, 22, 229, 121, 137, 143, + 62, 97, 99, 109, 62, 19, 76, 33, + 183, 116, 200, 137, 178, 71, 77, 196, + 164, 210, 182, 100, 11, 85, 208, 171, + 73, 45, 135, 154, 150, 226, 149, 45, + 48, 193, 188, 231, 15, 29, 115, 186, + 222, 43, 54, 228, 184, 161, 245, 113, + 27, 124, 137, 149, 123, 180, 154, 30, + 74, 126, 149, 122, 244, 125, 13, 75, + 173, 16, 126, 188, 207, 27, 60, 244, + 105, 50, 187, 109, 181, 2, 199, 108, + 62, 245, 90, 101, 187, 139, 55, 128, + 173, 52, 207, 101, 71, 221, 10, 58, + 252, 184, 159, 174, 204, 64, 250, 217, + 4, 59, 32, 216, 121, 111, 225, 252, + 120, 1, 151, 19, 199, 98, 128, 203, + 73, 222, 89, 77, 202, 216, 35, 209, + 226, 96, 28, 236, 8, 69, 57, 163, + 213, 145, 254, 179, 182, 126, 234, 40, + 30, 120, 222, 153, 36, 91, 220, 137, + 189, 141, 242, 58, 23, 34, 93, 89, + 17, 177, 96, 45, 109, 104, 65, 70, + 129, 161, 122, 243, 98, 67, 64, 184, + 186, 82, 101, 45, 144, 17, 220, 37, + 4, 93, 170, 117, 77, 113, 66, 37, + 133, 162, 142, 150, 219, 21, 184, 142, + 31, 30, 210, 136, 6, 241, 25, 55, + 176, 142, 39, 76, 168, 132, 13, 203, + 88, 75, 133, 157, 191, 29, 118, 136, + 58, 155, 200, 53, 158, 223, 37, 167, + 72, 194, 182, 25, 93, 157, 86, 17, + 99, 201, 246, 134, 151, 116, 153, 157, + 251, 166, 27, 105, 219, 30, 67, 200, + 107, 249, 144, 108, 129, 58, 201, 232, + 6, 216, 97, 103, 88, 114, 170, 90, + 232, 16, 92, 4, 136, 149, 97, 185, + 4, 138, 40, 232, 5, 124, 4, 63, + 218, 162, 216, 118, 86, 124, 35, 108, + 47, 230, 255, 93, 250, 81, 98, 197, + 142, 133, 12, 164, 24, 178, 79, 75, + 241, 13, 118, 82, 112, 179, 124, 231, + 225, 113, 222, 96, 155, 100, 76, 83, + 43, 140, 244, 77, 192, 107, 197, 174, + 190, 27, 31, 168, 62, 159, 88, 93, + 232, 16, 248, 253, 121, 126, 189, 151, + 58, 19, 137, 223, 92, 127, 235, 27, + 1, 0, 93, 88, 169, 12, 210, 96, + 230, 242, 151, 175, 97, 177, 252, 237, + 250, 113, 196, 52, 232, 100, 76, 45, + 159, 125, 221, 121, 221, 41, 125, 168, + 53, 42, 120, 56, 163, 105, 23, 214, + 242, 17, 186, 248, 151, 240, 77, 54, + 70, 62, 60, 182, 52, 242, 138, 197, + 216, 98, 66, 158, 29, 9, 36, 37, + 38, 132, 221, 135, 147, 101, 198, 173, + 159, 54, 230, 71, 249, 245, 227, 222, + 79, 19, 72, 48, 149, 225, 14, 173, + 43, 9, 130, 95, 137, 6, 175, 229, + 15, 136, 192, 99, 205, 229, 187, 173, + 191, 121, 113, 9, 249, 71, 125, 196, + 2, 63, 245, 42, 28, 167, 108, 68, + 166, 232, 135, 164, 174, 210, 248, 31, + 164, 130, 9, 157, 3, 202, 119, 23, + 78, 52, 124, 117, 106, 77, 44, 124, + 144, 216, 9, 158, 127, 141, 59, 103, + 112, 243, 83, 220, 227, 146, 120, 136, + 16, 208, 52, 1, 231, 163, 80, 16, + 138, 252, 5, 255, 71, 197, 137, 140, + 203, 193, 235, 8, 176, 28, 97, 8, + 241, 120, 29, 203, 158, 151, 183, 92, + 222, 232, 133, 136, 82, 202, 225, 47, + 99, 223, 84, 191, 13, 57, 181, 70, + 30, 39, 197, 68, 210, 14, 117, 230, + 217, 44, 9, 236, 127, 248, 128, 144, + 97, 149, 151, 126, 33, 114, 131, 13, + 10, 15, 15, 86, 28, 165, 49, 253, + 190, 170, 178, 99, 128, 225, 234, 220, + 85, 114, 62, 220, 116, 44, 136, 102, + 78, 211, 92, 175, 121, 90, 137, 237, + 204, 33, 225, 239, 41, 223, 37, 67, + 107, 48, 117, 72, 86, 204, 178, 140, + 185, 195, 175, 47, 39, 167, 56, 153, + 47, 198, 69, 103, 217, 93, 106, 117, + 132, 148, 235, 7, 172, 222, 219, 154, + 68, 247, 90, 218, 188, 166, 130, 215, + 74, 136, 101, 218, 6, 142, 244, 67, + 23, 115, 35, 156, 247, 129, 110, 59, + 93, 62, 45, 87, 54, 91, 158, 10, + 58, 176, 248, 79, 27, 206, 91, 20, + 215, 135, 182, 222, 134, 190, 88, 135, + 78, 147, 250, 212, 49, 156, 17, 150, + 42, 22, 29, 202, 169, 132, 30, 99, + 90, 180, 143, 75, 241, 116, 76, 151, + 32, 133, 96, 102, 244, 233, 44, 68, + 183, 219, 120, 111, 241, 95, 155, 248, + 54, 100, 187, 242, 77, 236, 246, 49, + 225, 218, 41, 69, 19, 110, 130, 90, + 225, 152, 119, 253, 188, 20, 155, 234, + 125, 120, 76, 126, 26, 44, 194, 237, + 4, 33, 236, 149, 26, 57, 156, 246, + 171, 58, 134, 120, 236, 57, 209, 241, + 119, 215, 61, 50, 28, 73, 141, 69, + 32, 152, 8, 249, 89, 244, 236, 35, + 136, 68, 54, 132, 112, 102, 151, 121, + 83, 124, 193, 213, 67, 198, 33, 3, + 155, 19, 16, 205, 226, 126, 104, 229, + 93, 170, 40, 67, 111, 50, 31, 36, + 70, 50, 200, 227, 28, 185, 176, 91, + 150, 28, 148, 129, 187, 140, 126, 245, + 204, 10, 61, 89, 162, 48, 117, 150, + 47, 55, 49, 139, 128, 108, 144, 25, + 93, 148, 24, 137, 239, 135, 0, 83, + 208, 146, 104, 171, 114, 147, 150, 50, + 69, 86, 36, 6, 132, 236, 210, 47, + 218, 2, 70, 181, 231, 7, 43, 114, + 164, 109, 80, 109, 38, 214, 50, 201, + 229, 122, 252, 183, 68, 194, 184, 133, + 144, 205, 39, 202, 250, 111, 6, 53, + 109, 158, 42, 170, 23, 168, 193, 31, + 180, 204, 86, 69, 205, 205, 33, 242, + 133, 237, 153, 11, 159, 54, 104, 174, + 5, 41, 47, 180, 160, 114, 162, 125, + 128, 198, 124, 100, 108, 152, 10, 174, + 28, 108, 217, 0, 214, 9, 210, 184, + 50, 47, 231, 43, 238, 167, 44, 188, + 137, 177, 123, 117, 229, 235, 32, 141, + 44, 87, 1, 24, 192, 130, 161, 85, + 34, 120, 190, 139, 89, 123, 109, 242, + 223, 121, 132, 36, 90, 195, 113, 119, + 160, 208, 132, 37, 152, 58, 184, 56, + 254, 123, 223, 75, 227, 237, 156, 184, + 37, 255, 255, 214, 223, 178, 106, 157, + 204, 179, 223, 205, 116, 161, 93, 231, + 152, 19, 137, 110, 90, 123, 9, 53, + 140, 142, 167, 104, 234, 140, 226, 4, + 125, 60, 200, 33, 156, 10, 253, 221, + 86, 218, 255, 89, 28, 142, 5, 166, + 118, 250, 31, 183, 242, 170, 227, 226, + 93, 60, 136, 107, 89, 245, 174, 212, + 211, 211, 169, 137, 59, 165, 66, 15, + 194, 161, 111, 228, 134, 227, 203, 100, + 119, 1, 112, 202, 69, 79, 133, 18, + 160, 71, 176, 154, 38, 8, 13, 139, + 199, 144, 177, 78, 88, 85, 50, 136, + 99, 98, 188, 216, 103, 109, 19, 137, + 131, 163, 91, 77, 248, 219, 190, 27, + 88, 224, 76, 166, 155, 74, 30, 241, + 196, 110, 247, 51, 216, 27, 42, 237, + 143, 255, 227, 105, 77, 25, 125, 245, + 246, 102, 49, 119, 198, 75, 93, 253, + 69, 245, 144, 183, 192, 206, 89, 33, + 177, 99, 177, 10, 95, 146, 27, 127, + 225, 157, 118, 221, 74, 94, 231, 107, + 14, 105, 183, 175, 139, 73, 101, 190, + 159, 235, 145, 45, 120, 150, 136, 77, + 188, 179, 230, 191, 219, 5, 243, 130, + 129, 101, 207, 28, 54, 179, 168, 158, + 5, 54, 174, 116, 191, 29, 27, 96, + 86, 231, 158, 95, 45, 135, 168, 90, + 189, 111, 121, 217, 108, 135, 7, 232, + 134, 252, 218, 37, 131, 107, 214, 228, + 78, 5, 181, 64, 138, 240, 174, 77, + 57, 203, 249, 113, 8, 145, 222, 155, + 78, 53, 245, 208, 214, 201, 75, 205, + 50, 2, 30, 84, 8, 176, 79, 84, + 139, 57, 174, 109, 139, 166, 7, 93, + 69, 227, 67, 112, 247, 160, 250, 184, + 40, 162, 124, 233, 113, 120, 96, 231, + 228, 190, 228, 104, 212, 170, 143, 221, + 226, 152, 216, 99, 83, 1, 79, 136, + 84, 77, 191, 200, 89, 56, 211, 34, + 88, 77, 30, 244, 190, 10, 215, 10, + 12, 43, 128, 136, 56, 136, 221, 104, + 162, 80, 190, 73, 239, 246, 84, 153, + 125, 192, 49, 40, 200, 195, 124, 165, + 71, 196, 173, 30, 150, 247, 222, 194, + 129, 102, 207, 163, 77, 220, 186, 157, + 53, 13, 112, 195, 197, 20, 157, 241, + 63, 255, 199, 33, 89, 45, 79, 167, + 245, 20, 9, 199, 209, 169, 180, 192, + 236, 108, 244, 45, 182, 147, 252, 158, + 238, 172, 246, 229, 220, 48, 202, 71, + 8, 57, 97, 42, 238, 107, 16, 88, + 28, 201, 232, 126, 117, 84, 22, 151, + 253, 204, 112, 189, 154, 84, 241, 39, + 52, 165, 105, 47, 67, 225, 211, 19, + 18, 218, 251, 85, 130, 210, 122, 111, + 132, 141, 84, 38, 207, 131, 68, 48, + 156, 145, 191, 118, 9, 5, 164, 146, + 63, 53, 27, 247, 39, 242, 57, 66, + 123, 221, 8, 247, 98, 114, 202, 231, + 177, 153, 23, 141, 225, 247, 143, 141, + 90, 202, 135, 34, 118, 104, 143, 196, + 106, 212, 3, 71, 40, 252, 15, 34, + 252, 248, 77, 208, 162, 28, 140, 16, + 157, 242, 24, 232, 108, 176, 225, 126, + 16, 208, 70, 79, 85, 249, 140, 204, + 2, 29, 21, 61, 47, 105, 171, 39, + 5, 13, 4, 103, 218, 165, 140, 61, + 214, 238, 123, 93, 85, 228, 114, 204, + 150, 30, 64, 183, 32, 176, 116, 223, + 179, 183, 254, 39, 35, 50, 84, 81, + 73, 151, 104, 10, 39, 180, 196, 98, + 85, 109, 86, 194, 115, 84, 210, 226, + 179, 249, 73, 158, 152, 36, 241, 243, + 17, 38, 99, 146, 251, 166, 206, 211, + 224, 229, 76, 38, 203, 88, 149, 108, + 90, 214, 51, 136, 109, 223, 171, 66, + 97, 162, 90, 122, 42, 159, 126, 50, + 233, 231, 15, 50, 101, 186, 11, 85, + 237, 85, 96, 135, 60, 1, 100, 185, + 39, 125, 64, 179, 8, 219, 189, 113, + 106, 179, 82, 234, 15, 0, 244, 5, + 43, 142, 33, 28, 195, 145, 100, 69, + 43, 120, 158, 106, 195, 89, 197, 31, + 246, 42, 178, 32, 255, 171, 237, 79, + 241, 75, 197, 240, 144, 14, 65, 42, + 18, 33, 84, 185, 115, 127, 212, 194, + 23, 119, 255, 60, 61, 161, 91, 130, + 0, 64, 244, 252, 215, 149, 6, 112, + 36, 118, 97, 112, 113, 101, 107, 150, + 37, 71, 99, 39, 185, 29, 99, 142, + 6, 165, 16, 211, 44, 242, 18, 8, + 50, 229, 5, 5, 176, 158, 237, 222, + 41, 239, 224, 112, 127, 192, 235, 253, + 30, 114, 44, 160, 31, 244, 182, 206, + 70, 70, 130, 192, 98, 189, 63, 63, + 128, 116, 112, 71, 221, 227, 84, 120, + 238, 80, 192, 49, 151, 2, 153, 191, + 6, 106, 146, 75, 105, 204, 91, 97, + 7, 24, 235, 24, 10, 29, 37, 88, + 61, 66, 71, 248, 150, 131, 98, 140, + 123, 92, 204, 76, 12, 247, 245, 20, + 135, 179, 84, 115, 104, 31, 238, 52, + 123, 254, 190, 32, 221, 29, 92, 220, + 80, 193, 9, 230, 201, 30, 150, 133, + 213, 150, 200, 95, 98, 252, 187, 194, + 44, 190, 10, 115, 64, 155, 253, 5, + 29, 9, 34, 45, 74, 111, 199, 5, + 72, 144, 136, 30, 162, 4, 145, 12, + 105, 53, 130, 142, 134, 124, 144, 23, + 203, 31, 147, 252, 27, 9, 62, 185, + 183, 118, 150, 116, 145, 237, 202, 27, + 220, 229, 203, 149, 179, 74, 207, 165, + 59, 3, 99, 198, 194, 126, 64, 108, + 43, 53, 168, 232, 132, 130, 135, 164, + 173, 207, 253, 71, 183, 126, 132, 204, + 92, 228, 3, 166, 170, 60, 73, 178, + 232, 106, 249, 127, 252, 140, 164, 112, + 144, 35, 32, 59, 69, 131, 61, 245, + 107, 1, 117, 6, 244, 191, 218, 182, + 156, 103, 253, 177, 251, 203, 113, 172, + 176, 20, 218, 157, 27, 91, 200, 243, + 40, 208, 185, 62, 192, 71, 236, 154, + 106, 103, 174, 101, 228, 104, 52, 144, + 117, 120, 30, 201, 6, 79, 1, 233, + 83, 77, 205, 201, 86, 250, 107, 251, + 31, 63, 123, 192, 68, 130, 119, 226, + 227, 89, 96, 85, 20, 238, 164, 65, + 168, 166, 87, 83, 31, 144, 61, 237, + 2, 221, 122, 150, 241, 185, 173, 213, + 166, 96, 158, 94, 166, 146, 44, 150, + 253, 172, 17, 245, 94, 146, 35, 153, + 18, 49, 251, 1, 80, 81, 59, 143, + 220, 169, 114, 200, 195, 46, 42, 73, + 137, 4, 197, 10, 140, 3, 229, 201, + 35, 131, 216, 237, 219, 128, 193, 106, + 16, 104, 188, 219, 107, 169, 151, 153, + 119, 241, 136, 122, 51, 224, 182, 92, + 188, 91, 185, 96, 242, 31, 182, 180, + 96, 114, 104, 198, 89, 125, 22, 40, + 89, 84, 85, 166, 247, 50, 193, 157, + 71, 185, 130, 70, 116, 159, 232, 114, + 119, 60, 71, 211, 215, 188, 134, 169, + 44, 5, 242, 206, 78, 15, 122, 139, + 244, 176, 140, 247, 160, 55, 209, 72, + 58, 194, 60, 112, 81, 7, 100, 32, + 123, 53, 150, 136, 168, 94, 19, 116, + 230, 79, 22, 111, 237, 3, 44, 134, + 219, 49, 215, 206, 1, 194, 96, 167, + 97, 228, 42, 158, 61, 38, 152, 15, + 76, 147, 103, 62, 251, 129, 42, 87, + 92, 79, 29, 108, 124, 246, 130, 118, + 38, 178, 170, 75, 131, 85, 157, 216, + 154, 215, 71, 153, 160, 4, 37, 161, + 215, 109, 246, 158, 253, 17, 133, 108, + 187, 209, 65, 46, 50, 95, 229, 193, + 242, 202, 152, 154, 93, 189, 101, 198, + 170, 212, 115, 177, 216, 113, 129, 205, + 97, 201, 7, 2, 131, 174, 5, 98, + 177, 207, 59, 184, 174, 48, 166, 205, + 128, 43, 118, 250, 79, 237, 197, 96, + 55, 127, 24, 185, 190, 228, 133, 93, + 202, 193, 95, 93, 111, 244, 96, 28, + 237, 47, 93, 144, 239, 213, 151, 138, + 84, 237, 135, 228, 161, 7, 205, 120, + 77, 193, 114, 75, 188, 61, 11, 109, + 54, 62, 64, 196, 114, 119, 217, 139, + 91, 151, 79, 254, 47, 214, 164, 36, + 79, 198, 193, 16, 253, 195, 35, 90, + 218, 242, 172, 106, 78, 212, 49, 252, + 189, 29, 122, 233, 222, 63, 91, 72, + 119, 213, 102, 86, 43, 195, 77, 161, + 142, 21, 250, 155, 163, 112, 233, 54, + 248, 106, 181, 114, 176, 188, 41, 96, + 158, 222, 162, 20, 140, 102, 242, 78, + 229, 53, 52, 99, 57, 222, 2, 82, + 25, 218, 234, 232, 171, 206, 41, 3, + 246, 162, 13, 91, 47, 96, 93, 26, + 55, 178, 156, 122, 185, 20, 93, 213, + 171, 17, 103, 147, 86, 164, 69, 212, + 233, 227, 127, 34, 147, 125, 180, 172, + 23, 205, 63, 240, 172, 213, 53, 212, + 178, 85, 106, 247, 93, 80, 158, 132, + 185, 237, 81, 139, 105, 107, 190, 215, + 177, 156, 133, 49, 0, 41, 45, 36, + 198, 212, 47, 95, 192, 29, 55, 110, + 32, 188, 55, 240, 5, 99, 56, 227, + 245, 92, 240, 70, 235, 48, 4, 238, + 210, 81, 116, 8, 133, 58, 230, 253, + 203, 10, 251, 167, 124, 178, 135, 58, + 143, 250, 241, 79, 159, 61, 193, 123, + 105, 186, 69, 175, 27, 217, 177, 99, + 255, 133, 182, 182, 223, 13, 49, 248, + 204, 252, 91, 27, 56, 112, 222, 255, + 188, 244, 228, 234, 77, 134, 105, 95, + 187, 171, 242, 221, 14, 18, 1, 211, + 37, 153, 162, 40, 98, 73, 71, 18, + 29, 24, 191, 60, 239, 118, 176, 64, + 58, 44, 123, 27, 88, 26, 150, 255, + 186, 0, 175, 202, 164, 85, 184, 184, + 61, 243, 169, 137, 150, 200, 193, 142, + 138, 229, 1, 58, 170, 136, 136, 69, + 57, 30, 8, 86, 220, 70, 165, 97, + 13, 255, 221, 235, 254, 0, 211, 248, + 146, 53, 93, 192, 9, 80, 98, 128, + 152, 88, 149, 132, 251, 171, 236, 38, + 83, 206, 233, 66, 93, 244, 243, 174, + 174, 94, 41, 205, 34, 219, 147, 208, + 196, 110, 247, 142, 87, 24, 166, 49, + 23, 24, 82, 252, 133, 14, 83, 140, + 170, 179, 10, 231, 45, 211, 52, 65, + 65, 31, 11, 9, 10, 221, 214, 105, + 158, 252, 188, 197, 21, 120, 249, 146, + 234, 127, 4, 255, 171, 151, 190, 17, + 224, 201, 12, 106, 94, 82, 0, 175, + 14, 55, 4, 39, 3, 150, 103, 43, + 153, 145, 31, 119, 143, 54, 103, 126, + 151, 234, 230, 108, 122, 205, 90, 5, + 185, 195, 170, 216, 171, 224, 33, 99, + 130, 141, 151, 162, 127, 86, 191, 94, + 90, 22, 220, 242, 107, 100, 246, 225, + 96, 100, 100, 15, 167, 101, 119, 87, + 33, 45, 152, 246, 72, 73, 249, 8, + 63, 68, 108, 111, 5, 109, 153, 51, + 196, 228, 91, 235, 34, 138, 9, 160, + 138, 113, 221, 88, 38, 128, 134, 63, + 3, 173, 133, 49, 17, 51, 151, 26, + 167, 63, 225, 97, 184, 120, 214, 49, + 72, 36, 23, 130, 230, 221, 190, 30, + 131, 232, 248, 159, 5, 124, 211, 244, + 34, 187, 177, 250, 68, 62, 70, 133, + 202, 54, 166, 172, 25, 178, 230, 171, + 144, 235, 215, 250, 132, 141, 46, 185, + 43, 8, 97, 135, 7, 141, 205, 208, + 126, 3, 53, 71, 122, 18, 44, 212, + 20, 245, 87, 16, 136, 95, 144, 216, + 253, 20, 150, 125, 90, 24, 55, 187, + 163, 155, 58, 63, 187, 143, 132, 167, + 98, 20, 15, 83, 145, 215, 93, 40, + 94, 5, 177, 202, 125, 100, 15, 159, + 139, 99, 93, 226, 111, 158, 88, 131, + 140, 237, 116, 124, 10, 215, 167, 37, + 41, 95, 166, 33, 51, 95, 52, 72, + 62, 149, 165, 46, 141, 29, 246, 244, + 8, 159, 29, 119, 143, 198, 129, 37, + 192, 251, 58, 246, 134, 10, 178, 20, + 41, 56, 139, 29, 245, 82, 122, 217, + 223, 144, 91, 216, 61, 76, 235, 119, + 218, 55, 25, 137, 40, 128, 4, 144, + 125, 242, 111, 121, 81, 249, 31, 73, + 168, 79, 112, 164, 4, 56, 128, 191, + 85, 251, 41, 182, 212, 202, 191, 200, + 103, 132, 252, 139, 82, 212, 250, 186, + 181, 240, 231, 109, 120, 42, 63, 104, + 161, 44, 74, 63, 146, 13, 230, 198, + 86, 177, 138, 199, 20, 0, 119, 81, + 137, 163, 45, 86, 214, 219, 107, 233, + 220, 75, 196, 21, 14, 46, 119, 31, + 110, 223, 132, 137, 194, 67, 2, 87, + 82, 123, 50, 6, 209, 144, 88, 192, + 69, 65, 205, 32, 244, 239, 169, 95, + 80, 55, 165, 30, 73, 136, 241, 146, + 191, 10, 73, 219, 232, 207, 149, 235, + 157, 40, 239, 4, 4, 123, 205, 87, + 250, 40, 126, 85, 48, 156, 133, 97, + 173, 113, 135, 150, 196, 59, 91, 202, + 170, 46, 183, 121, 189, 191, 22, 104, + 228, 22, 28, 237, 126, 214, 151, 220, + 29, 234, 11, 0, 239, 152, 248, 73, + 129, 38, 69, 142, 23, 8, 155, 91, + 101, 175, 138, 115, 66, 216, 196, 97, + 137, 121, 125, 129, 253, 202, 34, 29, + 69, 196, 25, 74, 230, 108, 206, 123, + 237, 116, 11, 207, 11, 102, 49, 219, + 10, 194, 60, 249, 184, 206, 55, 27, + 49, 78, 59, 185, 144, 39, 3, 33, + 12, 23, 23, 7, 159, 152, 225, 98, + 137, 206, 92, 115, 124, 24, 116, 218, + 137, 19, 135, 201, 162, 102, 200, 82, + 204, 73, 203, 201, 148, 182, 211, 25, + 221, 247, 65, 40, 149, 100, 223, 204, + 65, 76, 28, 40, 143, 192, 156, 166, + 104, 164, 157, 85, 36, 91, 118, 168, + 246, 49, 235, 124, 163, 167, 201, 213, + 237, 5, 12, 172, 69, 38, 137, 18, + 225, 62, 178, 46, 71, 187, 149, 30, + 50, 185, 131, 37, 140, 85, 167, 115, + 189, 137, 83, 231, 157, 113, 138, 103, + 94, 160, 201, 94, 194, 162, 111, 176, + 253, 26, 66, 210, 146, 46, 213, 61, + 225, 126, 212, 248, 83, 202, 114, 104, + 154, 133, 2, 166, 78, 23, 237, 219, + 224, 237, 153, 222, 5, 142, 161, 131, + 193, 115, 162, 233, 165, 58, 89, 140, + 70, 201, 239, 124, 209, 121, 237, 171, + 52, 135, 111, 12, 125, 7, 111, 205, + 110, 55, 149, 88, 250, 106, 26, 24, + 50, 117, 71, 218, 9, 222, 28, 253, + 124, 81, 73, 157, 103, 218, 66, 220, + 98, 101, 11, 89, 113, 94, 58, 26, + 8, 161, 128, 134, 21, 183, 58, 251, + 110, 17, 250, 159, 218, 52, 192, 7, + 208, 192, 61, 15, 136, 117, 32, 85, + 221, 76, 89, 214, 222, 77, 27, 137, + 192, 86, 175, 169, 20, 46, 71, 122, + 240, 55, 18, 28, 251, 23, 21, 146, + 227, 45, 202, 50, 12, 79, 44, 142, + 244, 255, 89, 202, 41, 99, 125, 134, + 40, 168, 47, 68, 252, 54, 50, 161, + 178, 172, 76, 39, 91, 28, 35, 244, + 181, 242, 1, 138, 255, 32, 117, 83, + 159, 248, 207, 174, 251, 23, 160, 97, + 183, 102, 16, 36, 83, 154, 21, 5, + 61, 79, 108, 103, 127, 148, 38, 9, + 54, 1, 52, 64, 144, 188, 75, 63, + 62, 151, 98, 139, 238, 108, 242, 26, + 195, 242, 55, 51, 105, 156, 61, 239, + 156, 233, 16, 108, 136, 171, 160, 85, + 72, 73, 212, 211, 244, 105, 189, 92, + 85, 36, 211, 206, 230, 134, 231, 159, + 5, 22, 58, 142, 41, 62, 67, 129, + 209, 61, 165, 36, 184, 222, 232, 31, + 33, 85, 150, 38, 226, 45, 109, 171, + 67, 165, 49, 31, 139, 125, 152, 91, + 77, 132, 184, 34, 190, 251, 235, 135, + 112, 129, 237, 118, 34, 194, 23, 96, + 170, 126, 82, 70, 176, 109, 201, 30, + 67, 22, 229, 203, 82, 58, 217, 223, + 245, 48, 190, 232, 38, 106, 235, 188, + 250, 159, 195, 124, 90, 67, 99, 132, + 217, 112, 150, 121, 167, 20, 192, 4, + 170, 219, 250, 134, 4, 156, 247, 68, + 201, 130, 164, 99, 95, 74, 210, 67, + 196, 178, 40, 74, 12, 36, 132, 46, + 173, 255, 69, 245, 98, 43, 74, 142, + 165, 138, 86, 169, 227, 188, 156, 145, + 194, 129, 105, 143, 250, 230, 163, 157, + 61, 1, 125, 215, 27, 126, 2, 220, + 76, 227, 92, 3, 23, 216, 220, 134, + 98, 93, 227, 231, 131, 123, 192, 138, + 12, 177, 20, 115, 190, 144, 211, 152, + 74, 115, 189, 202, 239, 116, 162, 80, + 79, 148, 137, 235, 23, 98, 241, 150, + 33, 119, 33, 4, 193, 93, 239, 177, + 50, 155, 43, 38, 12, 176, 78, 139, + 140, 9, 225, 252, 123, 126, 90, 167, + 138, 230, 234, 2, 218, 183, 62, 160, + 253, 225, 200, 76, 199, 136, 18, 30, + 208, 228, 88, 23, 167, 123, 20, 95, + 210, 144, 91, 74, 190, 97, 177, 0, + 149, 30, 10, 34, 133, 118, 13, 46, + 166, 199, 203, 141, 234, 218, 139, 190, + 90, 134, 172, 185, 106, 184, 67, 207, + 217, 186, 183, 50, 176, 11, 178, 60, + 35, 13, 16, 234, 162, 224, 128, 126, + 95, 40, 117, 60, 197, 215, 246, 198, + 171, 4, 27, 194, 62, 82, 177, 132, + 20, 111, 186, 120, 218, 139, 140, 33, + 64, 75, 110, 243, 106, 119, 165, 75, + 19, 222, 107, 86, 48, 188, 123, 213, + 91, 8, 194, 44, 229, 40, 248, 209, + 140, 68, 119, 39, 51, 229, 34, 70, + 84, 100, 78, 240, 209, 81, 208, 47, + 88, 205, 10, 207, 166, 156, 99, 14, + 18, 46, 241, 47, 130, 51, 183, 204, + 60, 246, 111, 73, 213, 97, 131, 196, + 16, 126, 114, 221, 84, 250, 70, 89, + 56, 164, 251, 44, 232, 99, 57, 149, + 158, 96, 141, 114, 155, 147, 101, 242, + 55, 174, 214, 9, 239, 17, 87, 171, + 16, 94, 79, 32, 114, 66, 114, 202, + 151, 161, 112, 22, 179, 23, 37, 56, + 102, 88, 135, 9, 61, 245, 193, 253, + 243, 98, 172, 129, 227, 102, 43, 59, + 186, 45, 10, 95, 90, 160, 250, 51, + 216, 212, 0, 233, 77, 134, 28, 186, + 27, 169, 27, 183, 75, 177, 163, 218, + 136, 95, 104, 87, 105, 193, 109, 125, + 219, 43, 76, 190, 1, 115, 61, 212, + 118, 230, 253, 177, 200, 238, 39, 142, + 230, 109, 119, 180, 169, 106, 104, 92, + 191, 107, 237, 208, 55, 98, 158, 88, + 134, 144, 240, 74, 235, 230, 26, 242, + 198, 199, 176, 253, 132, 160, 90, 117, + 30, 58, 242, 61, 238, 146, 109, 246, + 85, 189, 20, 126, 63, 172, 41, 5, + 49, 125, 60, 61, 176, 238, 194, 57, + 31, 29, 206, 151, 133, 172, 58, 32, + 142, 5, 186, 99, 206, 55, 147, 83, + 191, 172, 124, 179, 22, 180, 13, 148, + 36, 21, 95, 75, 49, 75, 62, 4, + 204, 124, 121, 253, 158, 248, 110, 141, + 200, 186, 247, 229, 120, 229, 219, 48, + 237, 2, 128, 191, 108, 149, 155, 204, + 74, 134, 195, 115, 98, 36, 94, 125, + 154, 105, 0, 133, 50, 109, 141, 28, + 34, 220, 64, 15, 70, 218, 46, 237, + 153, 22, 201, 224, 149, 162, 54, 91, + 112, 208, 27, 77, 152, 214, 219, 167, + 36, 158, 156, 58, 50, 161, 46, 247, + 177, 168, 142, 6, 236, 199, 247, 229, + 231, 104, 39, 148, 42, 197, 146, 221, + 99, 38, 154, 252, 33, 127, 253, 152, + 1, 2, 136, 186, 39, 181, 210, 244, + 209, 17, 32, 103, 66, 112, 93, 247, + 13, 215, 183, 76, 239, 38, 130, 243, + 195, 223, 44, 197, 156, 120, 32, 68, + 226, 126, 184, 235, 141, 188, 179, 100, + 13, 156, 163, 143, 86, 78, 51, 27, + 131, 171, 63, 105, 47, 194, 159, 2, + 41, 196, 193, 227, 99, 96, 249, 251, + 253, 134, 65, 105, 31, 241, 229, 183, + 200, 233, 80, 146, 3, 96, 88, 101, + 60, 244, 64, 48, 86, 217, 204, 144, + 111, 156, 97, 253, 118, 150, 218, 189, + 60, 244, 224, 109, 42, 221, 66, 79, + 236, 143, 31, 118, 196, 248, 19, 150, + 65, 128, 234, 25, 219, 122, 125, 167, + 108, 45, 17, 116, 213, 206, 202, 199, + 78, 143, 248, 23, 9, 239, 166, 110, + 88, 168, 59, 63, 159, 248, 93, 154, + 142, 207, 0, 87, 48, 252, 140, 251, + 152, 249, 247, 109, 4, 223, 156, 216, + 205, 174, 28, 70, 36, 102, 182, 162, + 50, 81, 199, 140, 132, 151, 46, 111, + 239, 217, 243, 206, 73, 199, 110, 218, + 8, 25, 141, 99, 50, 252, 196, 18, + 161, 154, 178, 188, 171, 81, 192, 24, + 193, 253, 60, 220, 212, 50, 204, 91, + 43, 43, 130, 178, 174, 59, 55, 207, + 200, 192, 46, 50, 17, 174, 135, 85, + 4, 32, 103, 139, 241, 167, 73, 124, + 205, 149, 34, 167, 62, 109, 220, 204, + 166, 153, 104, 178, 121, 232, 194, 203, + 228, 114, 213, 7, 4, 200, 218, 124, + 23, 202, 134, 49, 131, 67, 92, 30, + 27, 88, 52, 9, 59, 7, 99, 142, + 186, 60, 239, 158, 217, 16, 224, 168, + 105, 151, 202, 220, 138, 18, 104, 108, + 140, 243, 126, 112, 23, 97, 221, 171, + 65, 99, 10, 73, 182, 147, 95, 5, + 159, 8, 186, 51, 28, 223, 170, 142, + 1, 215, 223, 227, 171, 134, 3, 26, + 229, 107, 157, 32, 100, 193, 223, 251, + 83, 136, 145, 204, 212, 55, 197, 128, + 188, 172, 75, 36, 53, 21, 190, 39, + 191, 137, 101, 240, 3, 107, 215, 100, + 87, 214, 71, 94, 192, 158, 73, 139, + 238, 249, 66, 249, 140, 235, 241, 144, + 153, 83, 135, 163, 130, 44, 187, 189, + 148, 115, 87, 3, 137, 141, 167, 141, + 248, 149, 182, 26, 219, 187, 182, 9, + 145, 35, 239, 195, 250, 192, 64, 253, + 170, 245, 26, 80, 102, 37, 77, 12, + 150, 251, 236, 239, 90, 50, 150, 238, + 197, 12, 107, 43, 202, 19, 158, 141, + 134, 201, 194, 79, 58, 44, 189, 86, + 169, 49, 212, 87, 131, 63, 252, 145, + 5, 92, 96, 233, 119, 31, 172, 164, + 58, 240, 11, 230, 161, 88, 97, 243, + 22, 6, 201, 196, 133, 198, 196, 110, + 100, 126, 207, 53, 90, 167, 179, 73, + 69, 49, 33, 123, 173, 68, 50, 247, + 4, 111, 155, 101, 121, 24, 165, 44, + 246, 185, 8, 67, 111, 44, 131, 44, + 93, 50, 137, 13, 76, 73, 218, 223, + 60, 156, 134, 253, 28, 201, 109, 168, + 152, 163, 138, 44, 132, 230, 217, 240, + 246, 192, 133, 10, 209, 149, 4, 104, + 231, 182, 235, 69, 237, 161, 235, 48, + 98, 131, 255, 173, 241, 36, 27, 32, + 143, 42, 144, 9, 33, 199, 244, 234, + 163, 171, 238, 94, 138, 13, 58, 152, + 202, 84, 97, 174, 247, 210, 177, 238, + 139, 18, 15, 44, 246, 99, 12, 164, + 72, 211, 255, 131, 105, 67, 51, 42, + 235, 112, 123, 76, 226, 230, 79, 54, + 236, 216, 30, 11, 172, 152, 200, 43, + 175, 174, 92, 77, 114, 141, 174, 61, + 104, 248, 2, 36, 235, 224, 202, 110, + 26, 9, 103, 242, 0, 58, 211, 158, + 242, 84, 2, 249, 203, 125, 108, 247, + 9, 25, 70, 60, 160, 172, 81, 154, + 109, 108, 240, 90, 157, 209, 252, 231, + 88, 211, 32, 3, 233, 57, 111, 92, + 52, 82, 94, 10, 162, 107, 151, 70, + 245, 81, 159, 17, 159, 77, 139, 244, + 236, 239, 19, 255, 223, 170, 25, 51, + 60, 163, 150, 150, 209, 164, 67, 53, + 138, 140, 133, 81, 207, 59, 51, 60, + 86, 157, 217, 122, 38, 120, 18, 128, + 237, 221, 55, 213, 167, 163, 139, 227, + 183, 215, 218, 196, 253, 109, 201, 253, + 80, 174, 185, 92, 200, 95, 166, 155, + 237, 141, 159, 63, 141, 24, 12, 249, + 232, 252, 251, 219, 134, 159, 211, 15, + 179, 73, 223, 177, 85, 152, 206, 88, + 229, 107, 188, 139, 199, 250, 55, 141, + 42, 4, 126, 165, 29, 48, 176, 157, + 123, 179, 136, 48, 212, 95, 67, 250, + 210, 173, 113, 111, 220, 166, 164, 244, + 163, 92, 185, 129, 224, 135, 34, 16, + 158, 61, 124, 10, 34, 47, 41, 18, + 14, 10, 229, 108, 11, 222, 238, 161, + 235, 203, 124, 210, 107, 57, 146, 120, + 227, 159, 43, 242, 236, 35, 177, 219, + 223, 93, 2, 32, 80, 1, 158, 26, + 205, 86, 134, 91, 186, 254, 248, 202, + 120, 234, 89, 54, 221, 129, 118, 25, + 118, 47, 177, 145, 25, 59, 76, 234, + 40, 165, 175, 210, 2, 43, 62, 76, + 87, 61, 169, 181, 147, 130, 36, 15, + 219, 87, 42, 149, 207, 98, 218, 189, + 92, 136, 122, 103, 138, 59, 23, 246, + 84, 87, 120, 200, 202, 105, 131, 80, + 167, 45, 136, 67, 65, 58, 5, 125, + 103, 193, 247, 212, 86, 204, 230, 92, + 140, 61, 207, 232, 36, 113, 92, 132, + 42, 217, 172, 174, 217, 24, 101, 188, + 249, 163, 88, 236, 111, 147, 163, 126, + 214, 0, 149, 101, 199, 161, 94, 187, + 67, 190, 37, 176, 235, 3, 250, 78, + 166, 30, 231, 177, 26, 158, 239, 150, + 196, 77, 144, 210, 13, 18, 143, 247, + 184, 176, 133, 219, 168, 142, 235, 119, + 181, 132, 109, 146, 3, 95, 228, 15, + 232, 148, 67, 29, 53, 154, 86, 80, + 244, 76, 57, 168, 60, 223, 94, 53, + 54, 204, 49, 248, 153, 248, 179, 247, + 182, 219, 139, 119, 122, 116, 195, 105, + 136, 111, 33, 60, 218, 201, 96, 36, + 113, 2, 213, 226, 244, 132, 123, 51, + 227, 105, 68, 236, 122, 102, 221, 146, + 23, 133, 23, 27, 123, 96, 111, 88, + 237, 48, 77, 131, 29, 116, 196, 185, + 6, 63, 232, 37, 4, 99, 152, 207, + 155, 204, 196, 94, 86, 10, 1, 183, + 147, 31, 150, 17, 134, 74, 180, 60, + 172, 205, 10, 228, 174, 14, 50, 164, + 166, 123, 94, 82, 214, 82, 134, 106, + 211, 23, 4, 127, 229, 194, 85, 109, + 243, 11, 38, 162, 2, 114, 202, 183, + 231, 53, 184, 213, 74, 14, 199, 206, + 13, 246, 27, 32, 131, 28, 235, 135, + 83, 23, 118, 204, 214, 216, 144, 35, + 66, 217, 235, 114, 188, 113, 174, 90, + 40, 50, 23, 197, 212, 7, 171, 82, + 206, 44, 126, 85, 167, 45, 152, 107, + 130, 135, 6, 235, 174, 4, 114, 101, + 112, 151, 57, 60, 174, 120, 48, 24, + 77, 6, 220, 38, 53, 253, 203, 217, + 207, 235, 11, 143, 172, 152, 31, 114, + 138, 0, 205, 163, 124, 12, 47, 114, + 75, 55, 169, 102, 216, 134, 225, 9, + 60, 83, 25, 238, 245, 161, 243, 193, + 237, 108, 193, 105, 151, 47, 154, 29, + 164, 171, 150, 69, 73, 187, 33, 145, + 40, 98, 159, 77, 198, 247, 15, 93, + 99, 64, 102, 156, 153, 101, 62, 14, + 249, 5, 149, 66, 218, 250, 109, 248, + 248, 198, 105, 229, 242, 33, 147, 223, + 23, 193, 39, 255, 134, 103, 112, 173, + 1, 27, 9, 255, 160, 147, 85, 66, + 174, 112, 217, 113, 160, 59, 89, 253, + 169, 64, 133, 207, 139, 172, 61, 102, + 201, 104, 181, 124, 115, 130, 223, 67, + 131, 234, 134, 32, 133, 196, 211, 204, + 210, 103, 169, 132, 127, 236, 228, 221, + 163, 12, 242, 228, 6, 154, 122, 145, + 82, 122, 121, 0, 103, 216, 133, 134, + 162, 171, 171, 75, 223, 52, 118, 37, + 149, 111, 224, 129, 188, 21, 19, 188, + 252, 130, 81, 220, 137, 198, 45, 246, + 94, 20, 144, 3, 134, 102, 170, 45, + 24, 159, 191, 69, 10, 221, 170, 124, + 228, 142, 19, 146, 126, 98, 63, 226, + 239, 226, 199, 205, 103, 226, 115, 197, + 63, 185, 185, 32, 248, 126, 5, 167, + 83, 254, 73, 40, 93, 212, 249, 143, + 254, 223, 96, 29, 51, 70, 3, 0, + 130, 212, 177, 58, 1, 46, 36, 131, + 151, 39, 43, 177, 24, 194, 240, 8, + 167, 103, 173, 184, 149, 64, 188, 161, + 48, 67, 214, 84, 183, 247, 218, 202, + 173, 116, 66, 170, 140, 255, 197, 4, + 190, 120, 153, 146, 16, 21, 189, 16, + 14, 88, 129, 222, 178, 172, 59, 58, + 26, 122, 152, 203, 18, 21, 22, 152, + 109, 30, 89, 90, 136, 173, 48, 199, + 238, 26, 204, 228, 166, 150, 159, 71, + 175, 92, 21, 171, 235, 168, 73, 122, + 190, 148, 232, 160, 152, 114, 61, 234, + 94, 160, 74, 214, 213, 155, 159, 94, + 214, 111, 2, 18, 40, 230, 246, 5, + 93, 222, 188, 111, 27, 87, 145, 171, + 38, 191, 138, 156, 178, 200, 97, 206, + 237, 70, 160, 40, 214, 6, 205, 188, + 214, 162, 134, 45, 195, 99, 170, 89, + 182, 203, 118, 98, 10, 84, 206, 140, + 32, 9, 170, 66, 181, 242, 220, 58, + 219, 37, 252, 210, 109, 13, 107, 66, + 178, 180, 199, 240, 214, 204, 209, 47, + 13, 202, 58, 85, 173, 63, 234, 17, + 208, 91, 248, 171, 115, 213, 164, 145, + 216, 120, 161, 119, 125, 75, 7, 221, + 128, 7, 52, 248, 91, 5, 95, 21, + 225, 88, 186, 196, 24, 231, 116, 148, + 158, 72, 139, 64, 50, 14, 73, 36, + 74, 70, 24, 134, 147, 255, 65, 244, + 168, 112, 96, 54, 3, 213, 4, 17, + 220, 22, 108, 25, 88, 67, 85, 38, + 129, 122, 37, 153, 110, 18, 164, 124, + 245, 150, 14, 140, 215, 222, 188, 60, + 67, 119, 112, 203, 209, 48, 70, 40, + 128, 58, 255, 24, 255, 115, 8, 167, + 240, 123, 188, 238, 253, 71, 108, 182, + 253, 22, 156, 47, 46, 112, 100, 13, + 125, 222, 20, 24, 237, 241, 3, 223, + 246, 98, 124, 212, 24, 109, 148, 22, + 144, 181, 79, 189, 208, 116, 241, 230, + 125, 140, 24, 240, 206, 139, 199, 11, + 131, 243, 191, 145, 194, 8, 48, 177, + 235, 234, 2, 2, 118, 126, 37, 21, + 145, 77, 60, 58, 129, 238, 164, 162, + 184, 84, 132, 179, 36, 137, 150, 20, + 242, 7, 31, 12, 253, 0, 224, 215, + 57, 182, 139, 163, 17, 165, 187, 76, + 2, 81, 14, 223, 84, 69, 44, 170, + 54, 79, 63, 14, 153, 97, 109, 240, + 228, 163, 52, 247, 255, 48, 225, 205, + 184, 186, 189, 51, 177, 215, 237, 127, + 204, 9, 67, 197, 179, 88, 250, 178, + 7, 140, 64, 100, 237, 132, 152, 139, + 147, 178, 190, 188, 189, 158, 117, 175, + 101, 240, 148, 166, 75, 7, 84, 86, + 167, 181, 149, 233, 46, 91, 5, 60, + 140, 203, 218, 116, 214, 67, 52, 24, + 188, 241, 232, 232, 24, 250, 199, 128, + 58, 248, 43, 221, 181, 163, 34, 238, + 248, 59, 1, 180, 12, 6, 185, 192, + 77, 141, 241, 223, 100, 253, 136, 27, + 206, 141, 73, 7, 165, 27, 202, 47, + 32, 180, 90, 166, 174, 2, 89, 0, + 182, 75, 52, 99, 190, 196, 0, 140, + 88, 50, 167, 125, 193, 245, 14, 202, + 188, 165, 141, 166, 161, 105, 233, 36, + 28, 72, 37, 219, 126, 160, 143, 135, + 195, 196, 121, 133, 140, 69, 6, 83, + 224, 210, 178, 22, 19, 155, 183, 133, + 19, 92, 100, 10, 37, 239, 31, 63, + 244, 79, 246, 165, 168, 1, 1, 183, + 2, 55, 154, 88, 28, 29, 169, 1, + 52, 219, 89, 26, 15, 30, 232, 165, + 74, 216, 126, 31, 137, 114, 150, 179, + 251, 33, 252, 122, 27, 171, 51, 246, + 187, 52, 186, 70, 140, 146, 229, 198, + 152, 74, 97, 116, 16, 200, 78, 97, + 189, 34, 44, 81, 64, 96, 160, 149, + 229, 219, 129, 41, 43, 44, 228, 231, + 30, 185, 17, 46, 75, 245, 247, 44, + 8, 97, 123, 139, 169, 146, 55, 130, + 90, 217, 249, 130, 244, 139, 62, 57, + 90, 87, 210, 237, 153, 204, 195, 126, + 179, 109, 180, 64, 210, 184, 126, 23, + 98, 195, 55, 72, 16, 94, 191, 125, + 160, 204, 29, 94, 191, 95, 244, 217, + 181, 55, 97, 140, 185, 157, 133, 163, + 93, 110, 157, 232, 222, 213, 1, 9, + 107, 230, 114, 28, 175, 231, 105, 196, + 157, 150, 25, 13, 153, 215, 16, 107, + 194, 148, 130, 27, 232, 171, 41, 221, + 74, 255, 63, 18, 202, 73, 96, 194, + 134, 190, 6, 23, 118, 54, 179, 83, + 32, 61, 156, 91, 187, 175, 137, 63, + 119, 216, 100, 29, 187, 64, 228, 65, + 176, 77, 54, 20, 234, 235, 245, 96, + 71, 186, 214, 134, 109, 214, 155, 56, + 207, 232, 246, 143, 102, 119, 226, 165, + 58, 189, 217, 193, 108, 150, 115, 190, + 189, 253, 15, 218, 35, 132, 71, 205, + 140, 147, 170, 32, 86, 10, 94, 127, + 188, 89, 181, 112, 32, 170, 234, 97, + 57, 158, 188, 119, 184, 156, 222, 143, + 220, 19, 39, 18, 253, 243, 83, 155, + 85, 44, 178, 31, 246, 145, 202, 153, + 130, 120, 7, 110, 230, 201, 110, 169, + 102, 64, 1, 110, 4, 120, 55, 244, + 242, 2, 220, 0, 132, 204, 153, 38, + 185, 99, 132, 219, 230, 69, 196, 129, + 219, 144, 0, 33, 203, 181, 22, 80, + 238, 170, 34, 218, 119, 86, 229, 193, + 212, 252, 14, 12, 0, 84, 239, 69, + 113, 36, 68, 59, 204, 150, 48, 178, + 42, 50, 161, 135, 80, 190, 104, 207, + 15, 16, 127, 132, 252, 51, 40, 26, + 29, 250, 250, 127, 75, 229, 11, 196, + 40, 173, 137, 111, 181, 121, 251, 214, + 102, 103, 136, 83, 9, 31, 112, 95, + 9, 44, 6, 125, 212, 185, 122, 79, + 76, 91, 104, 104, 188, 171, 241, 99, + 135, 204, 7, 211, 106, 155, 77, 120, + 171, 76, 211, 35, 226, 74, 26, 41, + 58, 185, 61, 58, 109, 149, 176, 206, + 200, 195, 67, 143, 116, 128, 68, 109, + 26, 163, 19, 201, 66, 62, 20, 123, + 226, 107, 191, 200, 232, 88, 183, 193, + 237, 244, 114, 70, 255, 122, 202, 22, + 113, 217, 66, 254, 169, 154, 253, 133, + 81, 88, 44, 151, 50, 128, 249, 164, + 240, 196, 232, 202, 21, 47, 88, 147, + 76, 138, 196, 49, 199, 120, 71, 15, + 211, 22, 165, 26, 154, 223, 76, 103, + 11, 31, 232, 43, 105, 125, 249, 220, + 71, 6, 206, 183, 15, 199, 137, 118, + 106, 220, 34, 34, 156, 102, 124, 238, + 200, 10, 9, 178, 77, 75, 209, 34, + 123, 168, 64, 115, 244, 237, 146, 130, + 71, 47, 249, 15, 62, 151, 43, 119, + 2, 198, 248, 192, 57, 128, 144, 99, + 122, 32, 59, 213, 180, 1, 105, 116, + 147, 123, 166, 16, 142, 135, 99, 171, + 177, 128, 55, 71, 15, 152, 14, 121, + 86, 121, 155, 55, 158, 26, 9, 210, + 221, 230, 153, 231, 50, 4, 39, 162, + 75, 139, 255, 243, 224, 114, 245, 61, + 108, 102, 117, 180, 76, 119, 239, 241, + 184, 177, 113, 171, 44, 188, 32, 155, + 187, 247, 204, 129, 131, 236, 96, 244, + 112, 22, 38, 181, 60, 159, 74, 252, + 125, 180, 252, 11, 163, 178, 44, 130, + 252, 151, 207, 109, 136, 146, 100, 65, + 40, 193, 168, 219, 223, 6, 169, 245, + 129, 128, 116, 84, 199, 189, 250, 103, + 205, 67, 248, 68, 188, 171, 157, 85, + 7, 121, 36, 80, 13, 45, 200, 132, + 124, 72, 202, 78, 58, 155, 143, 255, + 22, 61, 242, 47, 206, 25, 22, 147, + 72, 68, 79, 243, 166, 210, 85, 81, + 233, 185, 38, 174, 64, 165, 231, 15, + 208, 121, 85, 52, 59, 228, 218, 91, + 219, 79, 164, 108, 42, 37, 140, 90, + 158, 150, 219, 152, 67, 224, 54, 61, + 182, 219, 43, 56, 102, 47, 180, 48, + 121, 68, 146, 204, 104, 247, 247, 14, + 75, 62, 109, 60, 86, 109, 0, 72, + 141, 220, 208, 118, 73, 159, 240, 218, + 147, 186, 104, 169, 78, 54, 69, 22, + 143, 229, 25, 84, 57, 19, 111, 75, + 154, 63, 172, 214, 252, 137, 228, 130, + 25, 245, 141, 209, 178, 232, 38, 221, + 184, 228, 29, 131, 179, 103, 152, 18, + 86, 232, 181, 29, 21, 12, 26, 102, + 165, 19, 79, 166, 19, 20, 92, 233, + 198, 151, 13, 87, 246, 231, 193, 85, + 15, 120, 33, 112, 167, 236, 3, 147, + 120, 145, 230, 32, 52, 163, 238, 137, + 201, 117, 76, 73, 210, 183, 57, 83, + 73, 214, 168, 90, 67, 105, 70, 254, + 227, 0, 132, 55, 159, 56, 74, 160, + 137, 62, 91, 112, 125, 152, 255, 164, + 183, 7, 173, 193, 213, 50, 27, 226, + 121, 135, 223, 213, 189, 126, 212, 227, + 92, 126, 239, 150, 131, 134, 25, 145, + 35, 10, 42, 95, 2, 241, 123, 69, + 186, 7, 80, 35, 218, 20, 104, 177, + 136, 48, 139, 206, 55, 126, 125, 96, + 96, 228, 28, 187, 243, 62, 222, 103, + 166, 1, 114, 240, 136, 135, 43, 227, + 235, 153, 90, 47, 98, 126, 96, 218, + 98, 65, 23, 212, 83, 39, 11, 103, + 229, 213, 107, 238, 116, 142, 31, 66, + 76, 119, 214, 217, 203, 70, 139, 70, + 78, 159, 195, 157, 178, 27, 204, 85, + 134, 17, 223, 23, 149, 18, 114, 211, + 184, 212, 143, 131, 193, 160, 7, 174, + 176, 34, 18, 154, 34, 78, 49, 28, + 181, 16, 64, 162, 32, 128, 91, 189, + 255, 22, 234, 61, 100, 112, 216, 190, + 147, 254, 237, 98, 240, 15, 82, 159, + 22, 237, 198, 146, 216, 100, 171, 250, + 153, 92, 250, 173, 200, 149, 234, 112, + 130, 97, 120, 14, 32, 147, 102, 30, + 243, 130, 6, 200, 104, 112, 30, 206, + 241, 3, 158, 193, 15, 64, 93, 19, + 35, 99, 5, 37, 166, 1, 191, 190, + 212, 190, 252, 97, 209, 169, 103, 250, + 249, 230, 73, 57, 73, 155, 59, 81, + 62, 5, 151, 112, 213, 129, 123, 20, + 113, 108, 25, 226, 119, 97, 210, 85, + 182, 47, 62, 94, 242, 89, 120, 107, + 238, 244, 189, 37, 149, 179, 130, 115, + 119, 22, 215, 230, 38, 132, 151, 186, + 29, 35, 72, 238, 240, 175, 109, 66, + 1, 253, 94, 48, 217, 65, 60, 53, + 28, 102, 159, 233, 132, 191, 17, 80, + 85, 237, 93, 51, 180, 47, 68, 181, + 34, 60, 30, 149, 247, 202, 31, 214, + 6, 68, 162, 149, 238, 102, 210, 192, + 181, 114, 152, 45, 225, 99, 215, 78, + 100, 59, 33, 72, 204, 100, 30, 60, + 95, 167, 150, 134, 54, 164, 230, 232, + 229, 68, 116, 78, 144, 204, 2, 31, + 133, 37, 14, 147, 83, 100, 181, 10, + 248, 85, 136, 61, 108, 176, 102, 137, + 197, 227, 120, 111, 58, 89, 47, 53, + 121, 28, 177, 160, 7, 217, 154, 79, + 194, 90, 136, 105, 205, 164, 242, 87, + 146, 180, 252, 201, 45, 76, 136, 231, + 143, 37, 172, 227, 135, 110, 86, 60, + 128, 245, 68, 212, 161, 164, 195, 73, + 111, 125, 16, 100, 200, 125, 136, 128, + 214, 95, 156, 8, 185, 32, 169, 110, + 82, 203, 58, 117, 206, 253, 51, 172, + 201, 123, 27, 34, 252, 150, 230, 169, + 3, 140, 246, 196, 104, 91, 179, 69, + 249, 246, 191, 236, 56, 193, 168, 56, + 94, 11, 238, 118, 228, 59, 119, 248, + 238, 51, 8, 169, 78, 17, 91, 202, + 72, 89, 189, 133, 3, 140, 12, 227, + 66, 223, 232, 161, 194, 108, 218, 45, + 248, 51, 168, 118, 116, 167, 84, 29, + 152, 180, 214, 210, 104, 79, 248, 252, + 136, 127, 67, 172, 7, 186, 0, 250, + 240, 175, 156, 213, 150, 63, 119, 213, + 224, 207, 69, 42, 101, 221, 214, 197, + 248, 0, 170, 248, 10, 102, 48, 120, + 209, 143, 20, 24, 164, 177, 148, 215, + 182, 158, 64, 2, 110, 73, 118, 111, + 162, 74, 193, 53, 221, 49, 79, 232, + 156, 115, 69, 174, 254, 246, 242, 123, + 250, 61, 233, 241, 172, 172, 167, 151, + 70, 227, 184, 78, 141, 5, 219, 188, + 139, 208, 251, 97, 62, 21, 218, 210, + 211, 126, 118, 129, 231, 23, 144, 98, + 241, 6, 31, 195, 117, 10, 225, 151, + 54, 118, 120, 231, 48, 167, 22, 184, + 3, 196, 250, 216, 10, 90, 66, 223, + 82, 152, 71, 69, 59, 46, 169, 163, + 225, 202, 188, 104, 21, 189, 84, 155, + 126, 55, 134, 20, 25, 244, 176, 60, + 13, 8, 105, 168, 189, 151, 106, 62, + 188, 50, 179, 155, 179, 67, 166, 152, + 159, 191, 130, 248, 2, 228, 123, 177, + 40, 160, 135, 184, 96, 118, 47, 51, + 248, 243, 203, 213, 47, 114, 81, 164, + 60, 132, 201, 5, 52, 221, 129, 99, + 46, 234, 83, 105, 38, 122, 22, 148, + 204, 82, 102, 127, 116, 37, 97, 110, + 118, 224, 136, 69, 221, 71, 133, 65, + 116, 40, 195, 118, 186, 97, 250, 153, + 88, 219, 212, 214, 186, 54, 232, 16, + 177, 57, 242, 82, 201, 249, 44, 37, + 24, 228, 186, 234, 92, 174, 83, 143, + 20, 222, 227, 24, 245, 119, 218, 8, + 243, 70, 176, 214, 81, 103, 252, 200, + 26, 129, 1, 117, 154, 252, 106, 225, + 193, 73, 143, 108, 179, 57, 123, 240, + 24, 220, 82, 13, 110, 105, 2, 91, + 55, 11, 226, 157, 212, 188, 205, 126, + 184, 170, 252, 198, 191, 236, 17, 42, + 14, 200, 179, 16, 190, 17, 161, 182, + 148, 120, 144, 134, 253, 216, 225, 213, + 28, 204, 163, 245, 92, 89, 34, 61, + 190, 191, 53, 208, 204, 55, 24, 218, + 36, 179, 32, 211, 13, 137, 121, 146, + 110, 193, 207, 62, 167, 170, 5, 61, + 73, 44, 201, 158, 91, 40, 167, 95, + 10, 7, 205, 140, 120, 138, 180, 195, + 139, 63, 79, 14, 31, 193, 119, 11, + 132, 20, 154, 152, 113, 83, 40, 68, + 16, 180, 169, 6, 95, 130, 191, 126, + 61, 115, 67, 16, 71, 96, 59, 95, + 19, 51, 7, 21, 158, 24, 170, 25, + 219, 170, 232, 144, 58, 64, 125, 198, + 242, 188, 90, 181, 222, 133, 229, 240, + 247, 196, 81, 202, 84, 8, 203, 87, + 150, 230, 244, 20, 213, 77, 89, 221, + 242, 140, 37, 150, 234, 18, 86, 103, + 28, 197, 204, 44, 174, 109, 235, 41, + 156, 224, 240, 55, 152, 211, 51, 70, + 121, 129, 150, 52, 76, 247, 16, 235, + 150, 127, 15, 74, 138, 8, 207, 194, + 126, 217, 143, 109, 243, 217, 201, 193, + 133, 215, 161, 245, 254, 202, 33, 184, + 159, 147, 167, 125, 203, 36, 2, 244, + 129, 166, 61, 39, 57, 144, 248, 20, + 218, 166, 210, 128, 238, 218, 3, 160, + 128, 112, 168, 64, 20, 71, 141, 7, + 136, 30, 82, 159, 150, 167, 147, 41, + 169, 185, 3, 142, 150, 101, 39, 165, + 127, 14, 124, 112, 73, 19, 212, 90, + 49, 210, 199, 198, 144, 178, 107, 10, + 157, 69, 194, 142, 178, 181, 169, 43, + 209, 15, 54, 112, 1, 249, 13, 232, + 142, 96, 225, 207, 169, 173, 77, 206, + 62, 231, 39, 60, 131, 16, 24, 160, + 190, 17, 177, 71, 238, 129, 171, 85, + 14, 18, 160, 54, 155, 195, 105, 232, + 247, 115, 227, 45, 64, 21, 111, 160, + 114, 58, 1, 145, 67, 175, 185, 87, + 156, 95, 237, 160, 86, 255, 42, 252, + 11, 66, 179, 180, 173, 187, 163, 50, + 146, 115, 67, 236, 154, 231, 182, 245, + 220, 4, 64, 195, 212, 236, 141, 76, + 93, 15, 86, 69, 199, 115, 200, 215, + 233, 138, 192, 92, 31, 137, 113, 105, + 220, 192, 238, 47, 68, 180, 84, 199, + 2, 3, 149, 217, 136, 65, 153, 54, + 150, 131, 36, 122, 122, 165, 162, 174, + 240, 164, 88, 6, 194, 102, 152, 43, + 158, 225, 206, 104, 80, 7, 252, 216, + 221, 29, 225, 182, 162, 47, 124, 217, + 232, 63, 133, 76, 192, 136, 96, 74, + 212, 149, 242, 18, 155, 13, 118, 82, + 19, 2, 49, 117, 41, 126, 70, 72, + 76, 225, 186, 66, 132, 30, 84, 234, + 110, 146, 13, 136, 45, 207, 126, 111, + 19, 108, 114, 53, 155, 52, 95, 254, + 224, 174, 23, 104, 111, 108, 68, 33, + 63, 33, 215, 121, 169, 37, 255, 232, + 40, 173, 250, 186, 67, 164, 238, 195, + 88, 74, 93, 248, 5, 123, 206, 226, + 228, 21, 139, 181, 52, 122, 194, 14, + 240, 170, 237, 113, 143, 228, 206, 60, + 207, 221, 101, 147, 99, 225, 80, 99, + 207, 66, 119, 19, 72, 167, 165, 133, + 52, 76, 181, 36, 145, 213, 247, 55, + 88, 47, 169, 83, 121, 121, 98, 138, + 56, 50, 237, 49, 213, 196, 135, 223, + 42, 135, 128, 133, 1, 207, 178, 150, + 172, 55, 237, 33, 155, 94, 109, 93, + 7, 245, 102, 246, 218, 169, 230, 181, + 147, 249, 140, 239, 209, 33, 133, 85, + 151, 15, 35, 107, 19, 184, 62, 114, + 191, 116, 153, 42, 0, 248, 48, 136, + 184, 98, 182, 47, 169, 11, 149, 206, + 0, 238, 31, 245, 185, 64, 32, 75, + 210, 83, 216, 218, 170, 92, 242, 158, + 214, 195, 229, 128, 222, 75, 169, 177, + 166, 13, 3, 222, 135, 109, 35, 183, + 176, 61, 45, 254, 32, 165, 251, 147, + 162, 198, 50, 69, 253, 60, 175, 110, + 226, 124, 166, 167, 159, 207, 88, 17, + 115, 42, 89, 3, 14, 164, 114, 115, + 97, 129, 118, 47, 112, 145, 220, 175, + 2, 219, 181, 95, 187, 174, 77, 35, + 231, 204, 76, 43, 119, 32, 209, 120, + 133, 137, 103, 239, 93, 129, 56, 233, + 38, 83, 82, 114, 24, 19, 167, 73, + 16, 66, 135, 133, 193, 112, 222, 193, + 62, 229, 140, 44, 252, 84, 102, 218, + 4, 94, 97, 111, 19, 133, 249, 90, + 219, 81, 129, 242, 131, 96, 15, 17, + 236, 161, 1, 188, 106, 183, 219, 195, + 143, 220, 7, 127, 159, 113, 233, 110, + 248, 95, 79, 172, 45, 102, 79, 118, + 201, 28, 143, 167, 187, 98, 172, 188, + 255, 134, 11, 204, 61, 28, 222, 28, + 1, 142, 186, 182, 11, 114, 76, 80, + 174, 15, 127, 146, 24, 17, 108, 71, + 153, 27, 13, 145, 241, 1, 18, 255, + 161, 162, 94, 201, 129, 93, 32, 175, + 139, 147, 18, 178, 36, 13, 124, 116, + 212, 35, 208, 254, 100, 180, 42, 244, + 16, 159, 71, 3, 102, 18, 207, 206, + 85, 97, 45, 107, 135, 101, 130, 131, + 18, 204, 131, 142, 0, 77, 157, 76, + 91, 218, 109, 134, 151, 3, 75, 228, + 255, 13, 159, 144, 146, 164, 164, 69, + 231, 70, 16, 145, 238, 14, 190, 74, + 222, 241, 163, 200, 213, 82, 198, 154, + 190, 142, 140, 241, 165, 208, 196, 213, + 117, 188, 192, 38, 57, 8, 215, 45, + 142, 188, 39, 175, 20, 151, 27, 45, + 249, 124, 11, 12, 89, 247, 67, 159, + 121, 231, 109, 5, 9, 84, 57, 57, + 70, 229, 118, 8, 173, 81, 151, 126, + 197, 213, 103, 86, 101, 35, 110, 76, + 61, 225, 169, 127, 209, 152, 51, 241, + 128, 13, 254, 164, 116, 57, 14, 131, + 64, 0, 39, 96, 105, 64, 109, 251, + 183, 223, 142, 163, 58, 85, 130, 124, + 249, 5, 18, 107, 99, 167, 70, 192, + 167, 21, 26, 36, 120, 177, 234, 49, + 23, 142, 151, 68, 150, 45, 172, 113, + 71, 174, 4, 105, 141, 251, 71, 133, + 103, 17, 144, 97, 250, 45, 30, 159, + 172, 171, 80, 196, 253, 12, 143, 208, + 209, 248, 88, 193, 2, 112, 108, 36, + 3, 145, 53, 111, 196, 71, 196, 189, + 194, 212, 64, 164, 75, 146, 82, 250, + 16, 43, 79, 199, 121, 100, 150, 173, + 60, 211, 24, 175, 221, 137, 251, 67, + 241, 246, 96, 237, 233, 48, 182, 29, + 46, 191, 33, 27, 72, 103, 6, 179, + 95, 175, 115, 113, 125, 13, 221, 174, + 167, 255, 193, 196, 52, 161, 197, 200, + 90, 143, 255, 196, 11, 207, 141, 80, + 36, 101, 9, 85, 231, 58, 53, 69, + 112, 191, 135, 0, 101, 251, 169, 229, + 185, 209, 129, 94, 231, 227, 38, 24, + 15, 111, 93, 70, 119, 45, 75, 122, + 57, 90, 117, 190, 37, 44, 223, 62, + 238, 98, 211, 81, 94, 60, 235, 146, + 146, 84, 24, 77, 238, 179, 124, 215, + 102, 102, 42, 53, 5, 147, 227, 8, + 110, 120, 205, 181, 239, 37, 106, 219, + 155, 34, 35, 136, 132, 45, 19, 204, + 158, 31, 125, 101, 73, 111, 136, 151, + 7, 100, 170, 33, 79, 155, 21, 78, + 169, 31, 221, 2, 46, 14, 77, 59, + 157, 113, 194, 33, 94, 74, 221, 111, + 196, 221, 43, 25, 205, 74, 33, 136, + 238, 24, 78, 84, 231, 203, 211, 66, + 186, 135, 61, 45, 82, 189, 152, 51, + 86, 121, 2, 134, 179, 199, 147, 49, + 81, 206, 51, 125, 236, 117, 13, 20, + 120, 35, 69, 149, 48, 70, 148, 62, + 93, 58, 61, 108, 122, 200, 4, 162, + 19, 214, 248, 86, 160, 126, 237, 178, + 143, 186, 212, 162, 236, 14, 151, 134, + 158, 237, 66, 42, 245, 201, 11, 197, + 77, 139, 184, 11, 200, 97, 149, 236, + 101, 103, 238, 162, 105, 252, 46, 127, + 78, 130, 255, 236, 97, 111, 131, 252, + 32, 102, 251, 44, 114, 7, 69, 163, + 222, 27, 135, 2, 203, 207, 113, 132, + 91, 83, 170, 75, 201, 183, 105, 249, + 180, 137, 44, 24, 39, 190, 68, 227, + 209, 20, 62, 51, 253, 9, 207, 29, + 168, 97, 108, 53, 151, 45, 25, 127, + 230, 213, 119, 224, 221, 12, 140, 218, + 93, 92, 73, 171, 26, 158, 154, 187, + 33, 29, 73, 187, 194, 8, 171, 137, + 165, 45, 47, 250, 202, 59, 191, 27, + 110, 25, 101, 46, 230, 80, 74, 254, + 136, 180, 205, 244, 179, 248, 220, 174, + 194, 0, 52, 50, 59, 10, 39, 208, + 49, 158, 211, 106, 152, 177, 48, 23, + 236, 100, 68, 34, 46, 186, 149, 242, + 79, 153, 68, 95, 253, 152, 83, 116, + 145, 219, 150, 89, 97, 13, 150, 59, + 105, 153, 147, 94, 153, 89, 116, 227, + 252, 97, 144, 118, 198, 16, 15, 152, + 76, 26, 15, 195, 187, 152, 70, 9, + 10, 62, 113, 172, 183, 223, 175, 225, + 127, 82, 189, 85, 7, 55, 78, 59, + 159, 228, 6, 52, 239, 132, 118, 198, + 95, 163, 3, 0, 152, 236, 97, 243, + 206, 101, 190, 32, 45, 196, 255, 105, + 2, 150, 244, 141, 230, 90, 62, 58, + 156, 45, 163, 106, 123, 139, 35, 112, + 138, 153, 92, 24, 177, 248, 1, 11, + 74, 187, 104, 31, 255, 174, 144, 15, + 97, 31, 117, 124, 179, 2, 62, 221, + 194, 200, 253, 236, 112, 231, 174, 13, + 177, 180, 181, 77, 58, 155, 142, 92, + 193, 127, 160, 205, 145, 145, 250, 252, + 146, 134, 20, 250, 85, 147, 206, 107, + 152, 60, 166, 34, 173, 208, 65, 203, + 101, 194, 219, 140, 132, 134, 146, 220, + 152, 1, 32, 32, 207, 95, 110, 208, + 239, 101, 225, 149, 151, 213, 179, 118, + 62, 60, 40, 153, 129, 47, 61, 239, + 163, 88, 166, 224, 123, 10, 102, 40, + 168, 72, 21, 166, 56, 50, 47, 194, + 73, 93, 88, 174, 66, 16, 124, 21, + 81, 248, 26, 199, 152, 218, 166, 11, + 206, 169, 54, 186, 65, 211, 176, 73, + 74, 107, 139, 90, 185, 40, 248, 232, + 77, 47, 196, 91, 49, 229, 91, 154, + 214, 255, 153, 26, 74, 135, 118, 26, + 115, 26, 250, 118, 129, 231, 16, 184, + 0, 22, 189, 245, 40, 87, 25, 98, + 192, 24, 198, 8, 25, 150, 171, 252, + 244, 15, 214, 111, 73, 239, 251, 201, + 115, 169, 100, 165, 121, 42, 115, 189, + 40, 179, 14, 200, 240, 233, 209, 31, + 78, 18, 110, 160, 134, 226, 125, 83, + 83, 236, 7, 81, 216, 78, 105, 220, + 246, 241, 103, 233, 208, 225, 153, 154, + 176, 109, 99, 139, 227, 253, 96, 32, + 56, 255, 8, 34, 184, 99, 96, 84, + 99, 58, 170, 244, 227, 223, 169, 28, + 198, 43, 208, 74, 116, 232, 165, 206, + 130, 144, 88, 73, 50, 4, 36, 115, + 133, 244, 149, 27, 253, 122, 206, 34, + 14, 21, 102, 63, 142, 247, 211, 201, + 186, 34, 11, 220, 189, 87, 241, 161, + 15, 115, 255, 226, 224, 64, 96, 153, + 153, 161, 195, 124, 224, 64, 149, 249, + 52, 222, 210, 182, 150, 63, 92, 34, + 77, 30, 105, 221, 197, 107, 57, 187, + 76, 165, 238, 33, 38, 74, 189, 67, + 56, 205, 232, 230, 97, 48, 82, 97, + 119, 222, 29, 171, 162, 118, 64, 250, + 29, 41, 6, 196, 27, 12, 174, 190, + 49, 48, 19, 243, 51, 148, 46, 199, + 105, 45, 169, 137, 202, 95, 88, 141, + 107, 62, 245, 139, 202, 38, 73, 150, + 181, 30, 252, 194, 46, 103, 35, 111, + 21, 3, 37, 75, 149, 83, 150, 206, + 155, 132, 107, 204, 253, 79, 177, 40, + 6, 36, 207, 114, 233, 41, 36, 65, + 107, 113, 53, 80, 93, 12, 202, 251, + 44, 63, 50, 102, 250, 40, 240, 89, + 134, 47, 185, 131, 226, 59, 200, 52, + 115, 104, 243, 190, 229, 46, 197, 123, + 153, 150, 89, 135, 238, 18, 130, 151, + 154, 192, 11, 161, 244, 139, 89, 245, + 122, 229, 178, 176, 255, 176, 217, 223, + 3, 211, 70, 47, 89, 125, 191, 42, + 155, 209, 34, 128, 140, 86, 82, 126, + 190, 240, 86, 81, 122, 106, 195, 73, + 121, 50, 181, 152, 212, 156, 209, 68, + 173, 160, 95, 68, 115, 57, 180, 78, + 228, 62, 197, 180, 198, 72, 223, 122, + 58, 70, 231, 220, 103, 193, 182, 49, + 22, 201, 121, 121, 42, 3, 227, 231, + 187, 2, 50, 139, 8, 199, 242, 142, + 95, 130, 2, 143, 230, 57, 184, 118, + 103, 190, 15, 137, 243, 183, 0, 121, + 171, 97, 250, 206, 107, 60, 129, 46, + 207, 46, 115, 230, 31, 211, 33, 6, + 68, 10, 190, 133, 205, 173, 40, 99, + 170, 146, 110, 213, 150, 77, 126, 149, + 94, 216, 82, 124, 128, 100, 75, 7, + 9, 59, 199, 207, 151, 137, 24, 120, + 250, 253, 140, 115, 172, 100, 218, 65, + 255, 15, 153, 140, 67, 68, 189, 105, + 203, 197, 147, 254, 59, 188, 235, 186, + 232, 92, 66, 97, 53, 87, 94, 163, + 173, 108, 241, 191, 109, 150, 249, 164, + 54, 164, 122, 16, 94, 220, 114, 209, + 169, 252, 121, 249, 94, 170, 177, 187, + 246, 190, 141, 37, 175, 199, 63, 58, + 55, 196, 55, 227, 72, 34, 100, 100, + 115, 12, 153, 221, 34, 223, 73, 21, + 218, 110, 109, 169, 102, 81, 11, 244, + 80, 147, 245, 42, 130, 224, 132, 49, + 158, 144, 79, 189, 83, 77, 241, 39, + 204, 70, 87, 181, 146, 4, 213, 127, + 123, 244, 238, 77, 247, 169, 100, 91, + 25, 167, 204, 123, 67, 130, 188, 244, + 184, 239, 211, 27, 62, 163, 7, 123, + 136, 34, 0, 34, 2, 76, 97, 60, + 170, 24, 193, 39, 120, 132, 121, 202, + 93, 83, 125, 0, 225, 101, 151, 53, + 197, 21, 211, 38, 116, 101, 141, 89, + 159, 246, 172, 62, 67, 24, 152, 20, + 9, 248, 69, 60, 229, 73, 165, 190, + 101, 50, 173, 241, 115, 48, 36, 220, + 204, 160, 188, 251, 158, 166, 34, 171, + 205, 206, 240, 242, 62, 160, 220, 134, + 159, 96, 135, 255, 132, 253, 200, 37, + 121, 247, 247, 216, 61, 213, 10, 208, + 230, 185, 224, 84, 186, 71, 161, 64, + 55, 227, 34, 101, 126, 22, 43, 52, + 44, 113, 174, 147, 221, 130, 65, 167, + 217, 134, 119, 235, 27, 64, 29, 234, + 138, 70, 65, 224, 135, 169, 84, 34, + 240, 225, 212, 19, 179, 143, 22, 181, + 21, 157, 156, 33, 30, 231, 13, 134, + 125, 116, 77, 138, 95, 106, 59, 33, + 219, 187, 16, 203, 18, 179, 244, 43, + 15, 50, 151, 22, 45, 88, 140, 184, + 42, 216, 107, 73, 204, 13, 180, 141, + 20, 140, 120, 148, 212, 242, 220, 102, + 173, 239, 207, 87, 0, 85, 120, 105, + 74, 30, 49, 229, 116, 139, 65, 87, + 244, 145, 178, 209, 184, 197, 75, 201, + 61, 138, 21, 117, 224, 28, 61, 25, + 213, 230, 177, 195, 119, 108, 152, 167, + 218, 113, 135, 181, 13, 153, 82, 124, + 85, 192, 10, 214, 228, 153, 39, 60, + 201, 65, 213, 170, 156, 120, 223, 140, + 124, 76, 163, 164, 249, 114, 219, 37, + 68, 118, 91, 208, 91, 157, 244, 232, + 122, 44, 254, 182, 124, 200, 145, 207, + 90, 111, 229, 198, 226, 32, 57, 15, + 245, 166, 106, 226, 78, 230, 142, 104, + 218, 98, 23, 37, 190, 17, 142, 227, + 164, 174, 133, 106, 4, 43, 104, 49, + 114, 72, 243, 144, 9, 232, 117, 241, + 61, 224, 133, 126, 241, 204, 242, 55, + 173, 8, 217, 53, 210, 198, 175, 41, + 86, 84, 11, 136, 80, 226, 177, 11, + 123, 97, 39, 9, 41, 99, 114, 103, + 13, 120, 90, 168, 143, 30, 135, 97, + 196, 219, 0, 191, 209, 95, 66, 230, + 149, 27, 133, 137, 181, 29, 78, 193, + 10, 254, 142, 152, 128, 246, 231, 37, + 6, 139, 10, 251, 199, 186, 241, 159, + 168, 129, 182, 136, 79, 254, 40, 126, + 210, 222, 102, 182, 153, 74, 86, 210, + 51, 90, 100, 141, 240, 98, 202, 216, + 80, 170, 82, 226, 0, 135, 233, 173, + 137, 138, 74, 27, 122, 189, 163, 57, + 84, 217, 99, 24, 54, 132, 70, 81, + 79, 222, 118, 247, 237, 213, 251, 1, + 141, 151, 147, 91, 21, 7, 166, 78, + 207, 133, 14, 93, 92, 132, 2, 213, + 180, 26, 209, 106, 181, 11, 222, 17, + 108, 208, 93, 78, 177, 124, 84, 164, + 78, 161, 132, 132, 12, 245, 163, 44, + 182, 1, 28, 151, 84, 248, 49, 133, + 95, 195, 219, 18, 151, 221, 46, 126, + 92, 211, 202, 184, 141, 137, 138, 24, + 175, 66, 158, 179, 186, 97, 175, 127, + 5, 19, 113, 205, 81, 84, 41, 221, + 248, 201, 52, 233, 245, 211, 228, 81, + 33, 127, 205, 127, 251, 79, 244, 67, + 228, 104, 237, 249, 239, 146, 191, 118, + 119, 147, 42, 126, 119, 168, 46, 142, + 81, 45, 63, 214, 180, 226, 97, 189, + 144, 91, 19, 161, 42, 181, 205, 125, + 192, 94, 18, 205, 46, 222, 93, 99, + 118, 231, 180, 6, 90, 132, 98, 90, + 36, 88, 66, 55, 11, 240, 65, 98, + 225, 175, 47, 43, 122, 111, 178, 151, + 255, 237, 231, 214, 105, 40, 159, 22, + 169, 212, 83, 202, 115, 161, 47, 128, + 173, 237, 195, 120, 91, 188, 122, 11, + 102, 121, 27, 69, 251, 200, 69, 6, + 100, 118, 67, 114, 80, 174, 17, 136, + 112, 36, 43, 133, 9, 108, 198, 235, + 68, 134, 190, 201, 186, 251, 93, 63, + 239, 30, 73, 196, 52, 230, 125, 125, + 107, 82, 41, 146, 187, 90, 112, 26, + 239, 67, 13, 128, 34, 81, 210, 128, + 110, 50, 170, 5, 193, 59, 70, 173, + 39, 66, 136, 131, 75, 145, 151, 252, + 115, 182, 41, 121, 40, 57, 194, 50, + 87, 130, 8, 18, 126, 69, 48, 117, + 252, 186, 132, 62, 58, 151, 215, 198, + 229, 47, 244, 40, 14, 140, 9, 116, + 199, 240, 131, 62, 153, 10, 36, 20, + 87, 101, 230, 8, 90, 45, 173, 27, + 77, 248, 253, 190, 250, 65, 238, 21, + 87, 223, 98, 174, 64, 215, 212, 71, + 254, 39, 161, 202, 3, 198, 248, 79, + 210, 218, 236, 106, 175, 224, 85, 82, + 12, 145, 208, 10, 162, 121, 64, 37, + 84, 72, 112, 127, 11, 21, 138, 81, + 65, 196, 3, 156, 166, 203, 223, 55, + 156, 130, 139, 229, 18, 192, 220, 42, + 34, 31, 222, 216, 26, 8, 30, 118, + 85, 184, 103, 167, 127, 84, 155, 154, + 193, 99, 45, 49, 247, 239, 63, 17, + 235, 216, 66, 242, 211, 41, 123, 136, + 26, 234, 245, 152, 17, 81, 119, 203, + 20, 133, 5, 16, 38, 176, 1, 67, + 8, 11, 167, 78, 25, 249, 48, 205, + 79, 218, 192, 210, 147, 111, 154, 188, + 220, 186, 147, 174, 182, 212, 74, 160, + 89, 193, 105, 232, 60, 216, 114, 52, + 152, 198, 247, 239, 223, 30, 48, 28, + 244, 54, 41, 253, 38, 162, 42, 69, + 48, 37, 189, 207, 32, 151, 99, 120, + 253, 2, 19, 58, 234, 236, 48, 56, + 67, 235, 58, 83, 77, 125, 74, 154, + 116, 53, 7, 155, 10, 165, 97, 62, + 248, 140, 58, 241, 198, 17, 178, 11, + 205, 54, 31, 92, 52, 167, 220, 116, + 59, 50, 33, 1, 31, 80, 108, 96, + 151, 193, 190, 228, 135, 177, 247, 39, + 77, 10, 218, 251, 147, 246, 111, 108, + 111, 131, 189, 167, 148, 196, 252, 64, + 44, 102, 186, 7, 132, 207, 105, 222, + 19, 27, 182, 193, 102, 200, 6, 255, + 140, 199, 184, 127, 144, 66, 78, 27, + 82, 113, 205, 2, 169, 134, 251, 54, + 105, 139, 140, 172, 252, 104, 200, 96, + 33, 223, 196, 75, 253, 244, 27, 104, + 115, 77, 73, 220, 211, 66, 174, 30, + 161, 95, 7, 155, 96, 92, 157, 201, + 48, 234, 241, 118, 70, 175, 142, 162, + 190, 116, 54, 157, 101, 108, 107, 247, + 190, 119, 246, 135, 202, 24, 52, 134, + 248, 197, 199, 113, 247, 243, 41, 147, + 30, 170, 86, 82, 187, 131, 227, 5, + 228, 168, 243, 241, 229, 1, 106, 222, + 43, 117, 81, 36, 102, 21, 52, 213, + 52, 59, 215, 55, 148, 49, 251, 43, + 22, 7, 126, 196, 116, 3, 165, 99, + 216, 15, 172, 18, 126, 234, 226, 160, + 24, 15, 150, 96, 121, 174, 52, 44, + 242, 185, 43, 35, 22, 64, 211, 241, + 156, 243, 70, 1, 133, 105, 110, 82, + 251, 238, 224, 197, 199, 49, 15, 59, + 176, 2, 38, 141, 162, 214, 172, 225, + 29, 244, 44, 192, 242, 237, 25, 47, + 55, 182, 122, 238, 241, 151, 251, 211, + 227, 144, 162, 33, 11, 237, 142, 167, + 182, 77, 173, 39, 213, 10, 54, 41, + 227, 14, 50, 72, 137, 93, 79, 235, + 222, 37, 38, 171, 21, 131, 214, 209, + 192, 160, 102, 45, 95, 110, 170, 91, + 93, 131, 16, 179, 138, 55, 24, 53, + 42, 86, 22, 9, 246, 16, 64, 120, + 46, 168, 151, 137, 32, 27, 239, 210, + 98, 5, 38, 50, 31, 174, 85, 11, + 89, 6, 46, 3, 13, 68, 109, 80, + 95, 145, 218, 100, 193, 16, 252, 219, + 0, 38, 210, 231, 107, 66, 19, 212, + 116, 219, 9, 104, 215, 130, 221, 58, + 189, 206, 130, 13, 68, 93, 147, 189, + 20, 43, 52, 43, 59, 124, 244, 35, + 203, 99, 236, 12, 40, 23, 234, 76, + 81, 120, 170, 202, 120, 206, 218, 51, + 58, 104, 107, 121, 190, 43, 124, 220, + 110, 72, 173, 110, 127, 123, 86, 86, + 125, 79, 55, 163, 229, 249, 205, 66, + 29, 38, 143, 103, 233, 198, 0, 190, + 141, 16, 29, 98, 191, 82, 16, 36, + 80, 132, 175, 235, 104, 93, 128, 76, + 175, 155, 168, 208, 232, 210, 31, 113, + 233, 148, 94, 215, 166, 128, 180, 238, + 86, 194, 60, 250, 38, 162, 127, 237, + 54, 227, 82, 209, 77, 163, 250, 120, + 200, 0, 163, 136, 129, 79, 145, 174, + 213, 101, 204, 182, 125, 125, 60, 202, + 218, 248, 90, 26, 108, 125, 161, 242, + 118, 38, 18, 122, 215, 88, 164, 83, + 239, 151, 104, 80, 35, 66, 179, 157, + 49, 144, 104, 14, 143, 67, 49, 136, + 75, 136, 130, 168, 75, 203, 184, 239, + 210, 36, 246, 67, 231, 226, 90, 35, + 35, 198, 79, 209, 32, 178, 96, 54, + 156, 105, 31, 156, 26, 87, 33, 252, + 245, 79, 105, 214, 83, 245, 231, 94, + 132, 151, 17, 233, 66, 230, 58, 41, + 193, 41, 122, 158, 224, 148, 49, 99, + 244, 92, 107, 250, 61, 111, 248, 68, + 204, 78, 247, 67, 14, 199, 182, 136, + 173, 164, 232, 207, 178, 13, 48, 83, + 26, 106, 59, 92, 14, 111, 166, 66, + 172, 203, 104, 131, 218, 252, 248, 238, + 61, 167, 125, 209, 198, 174, 12, 145, + 40, 58, 36, 102, 76, 134, 176, 113, + 155, 22, 180, 149, 42, 92, 191, 179, + 16, 123, 117, 179, 34, 27, 95, 43, + 122, 114, 182, 196, 140, 66, 203, 121, + 29, 5, 213, 136, 149, 197, 24, 51, + 157, 216, 53, 68, 179, 90, 156, 72, + 20, 125, 0, 218, 215, 207, 190, 251, + 163, 33, 242, 185, 104, 116, 6, 46, + 104, 140, 243, 63, 198, 118, 232, 132, + 154, 79, 229, 15, 107, 42, 222, 239, + 106, 224, 147, 182, 209, 48, 92, 214, + 73, 255, 196, 80, 147, 94, 216, 246, + 252, 210, 90, 239, 180, 205, 0, 157, + 118, 172, 240, 164, 254, 155, 228, 249, + 118, 118, 81, 40, 248, 182, 178, 85, + 118, 105, 35, 139, 0, 6, 52, 157, + 42, 29, 92, 35, 154, 130, 7, 161, + 241, 214, 229, 80, 123, 89, 72, 179, + 147, 38, 221, 174, 222, 58, 17, 90, + 89, 30, 110, 1, 96, 57, 47, 43, + 254, 88, 71, 252, 201, 202, 104, 223, + 139, 124, 32, 31, 186, 158, 151, 13, + 132, 213, 254, 246, 172, 94, 180, 43, + 148, 184, 67, 67, 73, 126, 27, 69, + 98, 191, 226, 125, 0, 7, 168, 154, + 112, 86, 166, 33, 123, 196, 120, 11, + 50, 15, 190, 157, 215, 233, 68, 158, + 188, 42, 44, 141, 198, 245, 33, 32, + 120, 191, 188, 134, 80, 185, 152, 36, + 160, 193, 224, 154, 57, 209, 223, 99, + 57, 55, 45, 218, 57, 238, 25, 174, + 102, 169, 236, 54, 180, 208, 21, 120, + 56, 27, 152, 152, 159, 72, 226, 83, + 169, 79, 113, 237, 177, 42, 53, 104, + 120, 54, 211, 171, 148, 217, 119, 51, + 94, 139, 24, 223, 213, 247, 23, 143, + 79, 11, 145, 226, 156, 52, 89, 249, + 187, 155, 54, 111, 64, 32, 131, 189, + 244, 34, 253, 54, 36, 62, 236, 82, + 251, 232, 31, 211, 163, 185, 50, 106, + 133, 29, 181, 85, 157, 127, 211, 124, + 203, 61, 42, 220, 6, 60, 164, 28, + 82, 38, 209, 102, 63, 182, 234, 73, + 213, 238, 205, 162, 153, 176, 64, 143, + 155, 45, 16, 172, 224, 57, 51, 238, + 137, 192, 47, 112, 144, 20, 209, 197, + 232, 229, 28, 64, 126, 106, 189, 184, + 161, 192, 147, 55, 241, 35, 141, 19, + 48, 230, 59, 216, 88, 43, 167, 115, + 176, 219, 183, 190, 250, 158, 187, 14, + 52, 5, 107, 170, 97, 76, 150, 107, + 89, 39, 201, 99, 19, 84, 227, 126, + 172, 188, 104, 73, 130, 182, 164, 46, + 238, 30, 143, 32, 52, 6, 204, 180, + 154, 182, 247, 118, 224, 158, 86, 247, + 183, 75, 131, 117, 152, 38, 57, 106, + 80, 139, 100, 189, 232, 144, 4, 181, + 144, 72, 6, 1, 160, 91, 105, 157, + 163, 14, 185, 27, 103, 254, 105, 195, + 234, 180, 23, 43, 127, 99, 226, 142, + 75, 179, 252, 127, 53, 217, 8, 247, + 22, 165, 198, 251, 1, 205, 130, 28, + 211, 202, 64, 33, 191, 21, 13, 197, + 17, 149, 10, 163, 201, 3, 109, 190, + 74, 174, 107, 84, 229, 233, 158, 47, + 120, 127, 128, 32, 124, 229, 131, 39, + 54, 239, 11, 115, 113, 219, 158, 137, + 62, 85, 129, 1, 101, 71, 214, 33, + 212, 209, 80, 133, 95, 104, 95, 117, + 27, 226, 221, 222, 172, 47, 76, 31, + 233, 41, 74, 9, 31, 45, 242, 4, + 153, 163, 70, 16, 20, 130, 64, 139, + 57, 165, 250, 224, 201, 104, 152, 16, + 144, 16, 49, 173, 147, 23, 62, 117, + 100, 112, 227, 85, 48, 207, 88, 151, + 236, 110, 111, 212, 28, 242, 20, 232, + 186, 10, 143, 239, 87, 183, 45, 73, + 43, 8, 231, 148, 195, 15, 46, 24, + 65, 140, 150, 181, 227, 214, 218, 115, + 23, 94, 111, 131, 6, 70, 210, 12, + 178, 172, 140, 86, 191, 88, 104, 249, + 9, 58, 232, 123, 147, 210, 71, 172, + 28, 0, 85, 133, 85, 173, 68, 49, + 160, 16, 229, 1, 244, 8, 241, 171, + 181, 69, 53, 141, 68, 113, 187, 230, + 239, 214, 106, 46, 62, 109, 133, 198, + 83, 233, 159, 130, 88, 50, 166, 190, + 29, 140, 16, 22, 93, 47, 59, 237, + 154, 39, 126, 61, 149, 254, 247, 1, + 60, 36, 160, 51, 6, 77, 249, 22, + 22, 107, 241, 70, 244, 57, 106, 11, + 27, 0, 1, 246, 254, 240, 155, 81, + 151, 205, 90, 158, 16, 203, 178, 161, + 119, 226, 17, 79, 188, 66, 8, 91, + 69, 228, 102, 190, 241, 152, 87, 116, + 0, 16, 39, 132, 179, 239, 220, 119, + 158, 28, 90, 239, 238, 229, 230, 35, + 71, 232, 28, 34, 111, 105, 127, 149, + 0, 242, 56, 44, 101, 208, 219, 246, + 247, 249, 239, 238, 222, 122, 204, 99, + 49, 139, 42, 59, 7, 185, 90, 210, + 181, 198, 22, 211, 21, 30, 122, 191, + 163, 9, 200, 185, 82, 169, 29, 30, + 47, 86, 218, 142, 125, 90, 209, 112, + 140, 230, 214, 196, 170, 145, 180, 252, + 228, 0, 34, 146, 251, 122, 15, 16, + 2, 59, 103, 205, 157, 120, 111, 102, + 95, 79, 61, 28, 150, 98, 198, 247, + 131, 174, 233, 241, 170, 5, 215, 141, + 83, 106, 61, 83, 113, 235, 171, 78, + 87, 32, 217, 44, 213, 243, 17, 64, + 150, 113, 255, 124, 214, 168, 24, 165, + 140, 98, 39, 210, 99, 24, 21, 249, + 250, 29, 175, 171, 37, 53, 70, 73, + 132, 235, 184, 85, 206, 62, 165, 4, + 84, 145, 173, 68, 166, 109, 101, 232, + 150, 128, 113, 28, 33, 249, 134, 218, + 69, 130, 214, 71, 51, 222, 45, 132, + 165, 126, 171, 129, 116, 134, 199, 94, + 207, 206, 75, 34, 203, 227, 137, 21, + 120, 160, 114, 214, 239, 4, 254, 248, + 21, 197, 112, 150, 204, 18, 91, 223, + 203, 131, 217, 168, 230, 140, 144, 229, + 118, 36, 104, 14, 124, 225, 202, 97, + 225, 83, 111, 144, 138, 17, 235, 49, + 179, 138, 210, 5, 228, 17, 150, 59, + 186, 101, 230, 91, 225, 169, 7, 214, + 165, 240, 19, 222, 194, 75, 97, 217, + 121, 235, 194, 177, 181, 180, 172, 194, + 136, 249, 143, 91, 110, 201, 169, 116, + 248, 210, 122, 97, 237, 126, 99, 218, + 254, 102, 117, 242, 211, 157, 254, 224, + 51, 163, 52, 190, 207, 187, 236, 160, + 42, 252, 2, 231, 249, 143, 203, 133, + 235, 210, 46, 16, 185, 192, 150, 59, + 44, 64, 31, 225, 45, 142, 104, 225, + 205, 144, 65, 247, 171, 88, 26, 163, + 156, 43, 135, 246, 191, 105, 221, 214, + 168, 35, 133, 114, 241, 85, 47, 46, + 149, 11, 253, 208, 110, 109, 78, 130, + 37, 89, 24, 231, 163, 144, 48, 91, + 88, 91, 66, 59, 203, 150, 28, 8, + 218, 8, 24, 209, 146, 40, 100, 145, + 210, 241, 211, 0, 143, 247, 217, 166, + 55, 120, 112, 28, 116, 143, 50, 207, + 251, 131, 121, 57, 162, 128, 86, 255, + 34, 167, 26, 12, 97, 145, 191, 84, + 95, 93, 46, 157, 10, 89, 219, 1, + 90, 114, 90, 254, 142, 191, 26, 115, + 206, 17, 77, 24, 175, 204, 212, 175, + 184, 209, 163, 53, 94, 194, 84, 38, + 23, 235, 235, 123, 115, 76, 243, 42, + 163, 19, 48, 164, 52, 103, 54, 50, + 181, 46, 103, 9, 138, 224, 224, 2, + 170, 196, 208, 49, 195, 130, 215, 55, + 148, 195, 96, 107, 196, 160, 161, 252, + 111, 202, 200, 87, 22, 49, 164, 115, + 133, 210, 235, 155, 103, 59, 235, 163, + 116, 23, 77, 171, 109, 194, 232, 0, + 235, 215, 83, 198, 18, 5, 48, 211, + 231, 23, 188, 240, 88, 142, 193, 118, + 164, 12, 21, 160, 129, 97, 99, 13, + 210, 162, 212, 151, 26, 242, 42, 191, + 130, 226, 77, 18, 179, 84, 81, 192, + 138, 83, 170, 193, 242, 151, 11, 145, + 99, 79, 234, 82, 142, 121, 29, 145, + 169, 247, 162, 16, 210, 187, 187, 167, + 126, 210, 152, 170, 176, 225, 180, 155, + 178, 110, 95, 183, 70, 7, 125, 34, + 46, 68, 228, 101, 198, 42, 56, 10, + 173, 129, 25, 52, 38, 80, 15, 146, + 116, 194, 213, 136, 220, 45, 238, 121, + 204, 119, 57, 44, 196, 207, 96, 196, + 20, 255, 81, 223, 89, 118, 8, 178, + 169, 75, 92, 46, 233, 165, 76, 203, + 157, 53, 224, 145, 114, 38, 194, 117, + 228, 67, 251, 66, 73, 199, 234, 24, + 93, 65, 167, 109, 151, 207, 218, 135, + 8, 34, 86, 125, 206, 222, 112, 228, + 167, 124, 4, 225, 15, 253, 119, 68, + 187, 244, 33, 229, 180, 21, 218, 238, + 237, 62, 30, 120, 239, 247, 170, 84, + 160, 252, 42, 20, 185, 5, 209, 110, + 163, 132, 21, 135, 174, 113, 230, 202, + 14, 10, 76, 150, 94, 72, 97, 190, + 255, 166, 20, 172, 124, 86, 221, 230, + 8, 95, 221, 171, 137, 249, 222, 134, + 2, 7, 233, 248, 246, 109, 177, 109, + 98, 131, 104, 29, 50, 12, 251, 232, + 39, 69, 190, 173, 165, 80, 164, 68, + 64, 107, 128, 57, 63, 16, 127, 35, + 167, 189, 68, 243, 100, 75, 22, 36, + 47, 124, 18, 113, 185, 26, 216, 216, + 127, 147, 64, 188, 18, 240, 214, 223, + 62, 27, 199, 80, 74, 41, 175, 178, + 186, 163, 156, 146, 0, 178, 32, 130, + 6, 110, 139, 190, 203, 198, 174, 214, + 27, 218, 135, 45, 125, 33, 102, 166, + 18, 147, 204, 12, 29, 157, 192, 103, + 36, 105, 93, 193, 12, 34, 71, 119, + 243, 5, 118, 48, 75, 36, 252, 124, + 16, 80, 12, 31, 15, 229, 196, 3, + 31, 230, 55, 130, 172, 91, 14, 200, + 108, 8, 155, 155, 78, 110, 241, 247, + 101, 241, 176, 124, 66, 241, 199, 227, + 190, 69, 114, 240, 17, 119, 30, 49, + 196, 145, 158, 187, 88, 25, 129, 166, + 15, 108, 46, 58, 93, 165, 28, 15, + 21, 139, 188, 7, 43, 40, 164, 180, + 4, 17, 48, 64, 37, 234, 238, 14, + 244, 44, 175, 91, 183, 197, 142, 250, + 2, 158, 58, 136, 246, 232, 223, 69, + 54, 231, 99, 166, 151, 95, 67, 1, + 71, 186, 170, 188, 52, 82, 132, 72, + 218, 120, 52, 141, 166, 39, 205, 221, + 74, 120, 179, 16, 181, 210, 225, 246, + 130, 62, 70, 113, 154, 62, 243, 248, + 10, 59, 123, 161, 139, 122, 136, 125, + 170, 89, 180, 107, 49, 191, 186, 188, + 91, 149, 29, 20, 252, 219, 32, 87, + 63, 162, 73, 225, 64, 132, 133, 205, + 135, 49, 237, 33, 116, 249, 66, 28, + 148, 201, 86, 252, 36, 241, 207, 25, + 145, 68, 85, 11, 221, 191, 181, 55, + 118, 189, 47, 201, 8, 251, 244, 254, + 57, 180, 85, 225, 91, 228, 97, 11, + 101, 25, 133, 183, 118, 48, 237, 72, + 222, 251, 16, 13, 233, 10, 98, 161, + 68, 141, 110, 175, 52, 186, 135, 14, + 64, 46, 80, 197, 190, 0, 28, 177, + 122, 208, 205, 241, 227, 179, 204, 93, + 162, 248, 4, 225, 160, 86, 142, 5, + 194, 241, 186, 194, 190, 178, 176, 234, + 158, 244, 214, 50, 22, 119, 131, 232, + 2, 136, 63, 182, 231, 213, 30, 252, + 248, 8, 21, 254, 9, 107, 12, 80, + 222, 77, 253, 49, 235, 114, 129, 193, + 239, 63, 5, 195, 195, 223, 145, 11, + 220, 169, 155, 127, 50, 254, 92, 255, + 248, 252, 222, 127, 213, 100, 105, 43, + 28, 215, 154, 88, 11, 188, 166, 69, + 57, 15, 65, 87, 207, 83, 60, 63, + 199, 7, 190, 165, 122, 153, 149, 141, + 149, 171, 170, 179, 30, 43, 124, 90, + 168, 165, 214, 193, 52, 181, 118, 102, + 166, 171, 110, 49, 17, 162, 174, 138, + 52, 207, 78, 129, 128, 220, 220, 212, + 208, 175, 46, 4, 104, 210, 253, 26, + 242, 140, 229, 240, 172, 83, 152, 209, + 225, 34, 122, 74, 157, 218, 25, 225, + 233, 167, 77, 200, 97, 246, 132, 26, + 197, 112, 36, 66, 110, 234, 69, 238, + 147, 106, 44, 96, 22, 140, 243, 153, + 69, 180, 230, 247, 154, 72, 211, 7, + 214, 37, 167, 39, 4, 224, 181, 134, + 53, 100, 104, 209, 163, 160, 187, 173, + 58, 31, 16, 189, 16, 168, 122, 91, + 126, 248, 67, 225, 187, 213, 182, 160, + 71, 149, 94, 191, 182, 58, 84, 26, + 139, 175, 242, 96, 75, 144, 126, 18, + 124, 169, 9, 32, 173, 160, 58, 127, + 52, 26, 18, 172, 245, 201, 208, 167, + 205, 116, 156, 160, 128, 53, 187, 240, + 85, 189, 142, 49, 210, 142, 60, 118, + 150, 166, 99, 116, 28, 151, 242, 112, + 105, 173, 142, 74, 31, 214, 118, 190, + 84, 178, 113, 40, 99, 184, 211, 94, + 13, 255, 96, 171, 60, 187, 205, 74, + 243, 253, 29, 202, 107, 165, 37, 90, + 116, 134, 51, 41, 242, 195, 107, 56, + 173, 73, 233, 106, 159, 91, 76, 161, + 95, 237, 31, 242, 128, 188, 51, 201, + 111, 211, 71, 100, 251, 237, 94, 200, + 117, 4, 78, 110, 69, 187, 122, 206, + 128, 242, 27, 126, 54, 9, 104, 117, + 117, 214, 129, 190, 121, 71, 146, 133, + 131, 161, 108, 216, 126, 164, 254, 114, + 249, 44, 85, 72, 11, 119, 175, 93, + 166, 144, 250, 154, 245, 66, 228, 67, + 48, 80, 66, 195, 128, 179, 124, 236, + 191, 7, 107, 103, 85, 180, 124, 242, + 247, 70, 180, 249, 181, 47, 254, 126, + 113, 140, 10, 65, 75, 179, 41, 159, + 117, 247, 181, 47, 118, 9, 142, 18, + 180, 32, 248, 118, 27, 25, 139, 133, + 177, 7, 80, 92, 211, 130, 223, 134, + 22, 17, 171, 161, 228, 200, 11, 60, + 140, 207, 147, 19, 199, 68, 48, 240, + 248, 100, 203, 32, 212, 81, 68, 59, + 129, 54, 48, 230, 22, 20, 147, 4, + 145, 155, 221, 40, 220, 5, 164, 26, + 18, 200, 247, 110, 119, 6, 25, 205, + 238, 231, 94, 121, 146, 30, 163, 85, + 92, 172, 9, 220, 95, 63, 197, 220, + 238, 153, 59, 32, 232, 243, 48, 188, + 140, 31, 51, 251, 63, 111, 96, 88, + 188, 135, 168, 125, 207, 19, 79, 209, + 7, 56, 30, 52, 73, 220, 224, 113, + 13, 234, 19, 239, 245, 154, 180, 199, + 143, 134, 245, 109, 116, 141, 90, 73, + 48, 142, 7, 154, 184, 92, 177, 13, + 186, 196, 160, 255, 63, 4, 225, 207, + 105, 165, 197, 173, 161, 209, 142, 27, + 59, 111, 106, 169, 24, 121, 209, 141, + 21, 190, 59, 10, 30, 109, 62, 70, + 126, 157, 210, 27, 247, 216, 74, 87, + 66, 86, 69, 59, 213, 138, 81, 224, + 103, 92, 202, 62, 203, 38, 111, 159, + 46, 53, 208, 137, 229, 150, 164, 95, + 35, 196, 196, 3, 8, 234, 185, 35, + 200, 141, 59, 220, 174, 61, 88, 147, + 2, 108, 21, 46, 167, 121, 6, 28, + 218, 22, 33, 63, 172, 234, 48, 175, + 77, 31, 58, 50, 10, 85, 172, 239, + 69, 139, 198, 155, 37, 118, 86, 190, + 26, 228, 34, 238, 20, 131, 34, 80, + 134, 87, 224, 197, 92, 1, 97, 132, + 73, 13, 16, 25, 3, 188, 224, 168, + 54, 113, 78, 252, 57, 145, 37, 40, + 148, 170, 216, 128, 249, 0, 29, 248, + 14, 47, 110, 27, 5, 54, 230, 51, + 83, 142, 192, 203, 32, 205, 189, 2, + 142, 84, 240, 22, 140, 227, 161, 188, + 161, 195, 178, 198, 73, 108, 189, 68, + 155, 123, 65, 158, 159, 0, 133, 207, + 220, 237, 6, 9, 198, 166, 79, 133, + 247, 69, 66, 123, 13, 51, 91, 240, + 154, 115, 244, 237, 238, 11, 4, 18, + 66, 177, 204, 209, 8, 238, 34, 118, + 4, 197, 145, 178, 128, 61, 64, 206, + 34, 19, 41, 182, 153, 59, 247, 152, + 92, 14, 213, 30, 139, 72, 140, 40, + 164, 230, 132, 36, 37, 171, 122, 86, + 68, 75, 84, 27, 194, 18, 151, 143, + 212, 23, 147, 161, 212, 47, 32, 186, + 46, 34, 16, 254, 10, 14, 33, 99, + 21, 225, 179, 187, 170, 205, 67, 72, + 14, 160, 82, 211, 16, 80, 30, 65, + 85, 126, 52, 206, 9, 1, 154, 247, + 6, 219, 250, 133, 206, 91, 131, 39, + 13, 146, 182, 220, 135, 1, 88, 157, + 232, 60, 88, 26, 44, 196, 83, 40, + 64, 211, 116, 72, 120, 152, 83, 129, + 164, 180, 179, 189, 204, 238, 82, 103, + 72, 251, 183, 97, 47, 115, 187, 202, + 106, 189, 144, 161, 241, 16, 82, 167, + 38, 90, 40, 50, 51, 205, 197, 203, + 166, 160, 37, 243, 78, 210, 250, 8, + 154, 81, 45, 180, 182, 15, 172, 148, + 209, 41, 68, 113, 54, 138, 178, 243, + 198, 58, 131, 251, 148, 232, 105, 13, + 194, 117, 50, 255, 237, 63, 166, 239, + 234, 162, 3, 51, 166, 98, 44, 151, + 85, 229, 135, 120, 137, 219, 131, 169, + 3, 44, 94, 146, 96, 37, 240, 151, + 55, 93, 81, 160, 114, 109, 117, 15, + 97, 142, 67, 250, 9, 181, 73, 26, + 68, 136, 250, 48, 186, 109, 96, 38, + 96, 228, 223, 116, 92, 198, 212, 151, + 12, 63, 62, 43, 107, 18, 1, 236, + 142, 145, 197, 107, 205, 250, 146, 231, + 205, 84, 205, 86, 50, 181, 95, 99, + 143, 238, 129, 225, 7, 248, 143, 199, + 36, 118, 22, 137, 246, 107, 123, 220, + 107, 174, 169, 178, 104, 177, 204, 17, + 153, 147, 196, 126, 236, 76, 115, 212, + 184, 152, 12, 105, 48, 5, 156, 168, + 231, 38, 82, 189, 207, 209, 189, 75, + 221, 162, 13, 219, 214, 104, 80, 29, + 114, 63, 150, 200, 126, 221, 64, 208, + 190, 64, 33, 40, 33, 176, 119, 156, + 19, 41, 179, 169, 21, 144, 109, 216, + 135, 49, 227, 75, 253, 202, 219, 117, + 9, 205, 76, 56, 133, 248, 204, 132, + 29, 42, 147, 196, 201, 102, 14, 246, + 28, 111, 44, 252, 205, 138, 214, 179, + 85, 99, 63, 21, 126, 206, 236, 94, + 157, 51, 252, 122, 88, 153, 105, 40, + 104, 138, 179, 212, 133, 253, 153, 172, + 214, 137, 51, 72, 217, 71, 32, 168, + 217, 189, 8, 6, 208, 172, 33, 42, + 247, 68, 124, 1, 249, 198, 75, 104, + 146, 38, 235, 181, 27, 42, 33, 62, + 173, 218, 214, 164, 47, 5, 184, 14, + 113, 176, 198, 68, 19, 255, 93, 251, + 47, 43, 166, 254, 151, 1, 42, 147, + 29, 208, 165, 42, 39, 193, 110, 69, + 206, 2, 75, 37, 108, 141, 53, 15, + 204, 213, 220, 172, 89, 122, 164, 156, + 224, 93, 94, 88, 31, 106, 211, 102, + 141, 120, 46, 73, 116, 149, 211, 128, + 91, 50, 214, 6, 12, 197, 211, 68, + 245, 188, 0, 20, 19, 113, 108, 155, + 198, 109, 107, 3, 5, 47, 195, 224, + 177, 87, 129, 169, 107, 217, 30, 237, + 240, 59, 96, 205, 90, 144, 159, 108, + 66, 30, 203, 36, 158, 67, 223, 192, + 30, 124, 213, 244, 95, 51, 153, 39, + 160, 206, 24, 140, 34, 245, 118, 209, + 3, 218, 225, 237, 178, 133, 202, 191, + 124, 124, 145, 164, 22, 130, 30, 229, + 82, 190, 194, 199, 247, 186, 155, 76, + 164, 37, 207, 58, 20, 51, 32, 17, + 76, 173, 123, 213, 102, 6, 114, 180, + 211, 158, 194, 96, 163, 131, 68, 98, + 223, 181, 170, 10, 61, 215, 254, 159, + 109, 133, 18, 52, 41, 160, 114, 117, + 80, 49, 30, 208, 86, 32, 224, 92, + 217, 106, 15, 37, 167, 198, 171, 253, + 187, 126, 69, 61, 248, 147, 224, 132, + 170, 122, 180, 201, 252, 29, 46, 122, + 40, 163, 121, 223, 229, 88, 13, 224, + 126, 65, 161, 69, 201, 14, 112, 80, + 5, 175, 186, 247, 206, 205, 108, 218, + 95, 114, 166, 208, 113, 227, 88, 168, + 218, 248, 201, 31, 63, 32, 124, 86, + 192, 207, 245, 157, 99, 14, 11, 199, + 69, 139, 201, 193, 85, 54, 187, 102, + 224, 148, 93, 90, 119, 165, 32, 72, + 235, 100, 68, 42, 130, 144, 112, 239, + 48, 210, 24, 225, 240, 96, 177, 183, + 103, 33, 24, 231, 181, 33, 251, 91, + 206, 116, 69, 182, 153, 242, 155, 117, + 109, 54, 86, 150, 182, 51, 137, 74, + 26, 15, 172, 15, 29, 41, 241, 55, + 195, 141, 78, 164, 219, 150, 252, 220, + 113, 207, 41, 161, 71, 103, 176, 155, + 0, 68, 111, 241, 130, 243, 226, 19, + 230, 254, 224, 208, 49, 226, 153, 1, + 34, 58, 34, 215, 249, 244, 80, 30, + 147, 216, 143, 40, 27, 182, 43, 153, + 208, 39, 189, 115, 167, 48, 122, 149, + 164, 81, 96, 126, 168, 154, 209, 149, + 34, 113, 21, 241, 135, 132, 97, 211, + 162, 204, 110, 181, 28, 204, 104, 105, + 174, 29, 15, 145, 132, 103, 123, 97, + 95, 63, 16, 65, 36, 189, 191, 225, + 28, 62, 22, 15, 4, 84, 115, 7, + 223, 111, 152, 179, 106, 150, 47, 0, + 39, 228, 88, 255, 48, 171, 64, 229, + 54, 150, 21, 189, 87, 41, 191, 225, + 82, 104, 90, 225, 102, 199, 154, 61, + 10, 120, 45, 74, 23, 127, 233, 151, + 180, 195, 85, 217, 65, 188, 29, 125, + 189, 205, 15, 51, 241, 176, 145, 173, + 236, 2, 18, 22, 107, 222, 229, 197, + 52, 205, 128, 234, 129, 176, 177, 216, + 189, 22, 22, 70, 242, 50, 24, 78, + 229, 250, 184, 16, 57, 249, 218, 45, + 150, 240, 210, 56, 0, 155, 217, 227, + 92, 138, 213, 236, 108, 85, 237, 162, + 102, 187, 149, 214, 146, 176, 46, 235, + 185, 200, 251, 237, 157, 47, 220, 201, + 204, 222, 244, 95, 62, 36, 233, 30, + 236, 108, 87, 216, 137, 59, 20, 209, + 232, 254, 69, 55, 106, 130, 208, 182, + 176, 105, 121, 179, 172, 135, 180, 75, + 59, 13, 70, 70, 226, 187, 159, 252, + 134, 91, 72, 181, 10, 248, 154, 0, + 187, 81, 39, 186, 107, 153, 132, 62, + 7, 3, 240, 141, 188, 153, 99, 47, + 13, 2, 98, 160, 196, 174, 205, 185, + 38, 126, 87, 224, 27, 47, 1, 234, + 232, 46, 101, 208, 82, 35, 218, 138, + 244, 109, 32, 205, 84, 9, 84, 143, + 157, 227, 42, 13, 200, 104, 100, 235, + 71, 143, 68, 79, 72, 226, 227, 159, + 240, 23, 210, 61, 214, 91, 153, 160, + 164, 148, 34, 223, 120, 220, 11, 25, + 28, 126, 31, 228, 146, 96, 26, 64, + 191, 22, 246, 18, 66, 68, 46, 23, + 69, 171, 124, 207, 243, 205, 87, 75, + 185, 218, 167, 252, 5, 90, 234, 135, + 107, 150, 163, 108, 212, 57, 36, 108, + 252, 64, 144, 217, 188, 159, 62, 47, + 71, 25, 86, 45, 136, 34, 195, 103, + 251, 30, 253, 117, 82, 93, 119, 148, + 18, 49, 22, 169, 9, 36, 100, 35, + 58, 49, 67, 134, 203, 249, 17, 87, + 3, 127, 78, 65, 14, 102, 178, 107, + 70, 238, 234, 240, 75, 53, 188, 40, + 190, 98, 207, 164, 221, 2, 110, 106, + 171, 60, 22, 210, 113, 176, 223, 38, + 63, 150, 195, 76, 110, 50, 154, 150, + 180, 177, 39, 121, 215, 79, 227, 246, + 40, 62, 231, 241, 21, 122, 158, 216, + 9, 76, 211, 158, 152, 169, 1, 4, + 131, 210, 19, 34, 136, 59, 167, 237, + 219, 198, 183, 2, 55, 244, 29, 220, + 62, 13, 178, 143, 146, 1, 108, 23, + 84, 106, 60, 174, 94, 62, 100, 164, + 58, 254, 74, 185, 236, 134, 28, 208, + 130, 169, 35, 250, 74, 45, 35, 75, + 138, 113, 98, 120, 242, 144, 104, 113, + 190, 146, 48, 201, 114, 116, 120, 252, + 206, 226, 4, 141, 200, 111, 93, 57, + 255, 182, 185, 241, 229, 2, 223, 29, + 43, 222, 109, 0, 1, 109, 133, 218, + 69, 130, 48, 143, 205, 49, 213, 16, + 14, 89, 18, 254, 133, 161, 114, 244, + 158, 193, 188, 6, 52, 87, 163, 45, + 159, 2, 122, 109, 253, 102, 216, 151, + 41, 89, 34, 149, 9, 130, 126, 76, + 46, 51, 192, 136, 248, 85, 142, 142, + 69, 254, 239, 213, 216, 183, 213, 1, + 223, 77, 77, 79, 189, 66, 29, 98, + 228, 21, 164, 113, 163, 121, 137, 152, + 241, 4, 3, 136, 42, 156, 145, 47, + 241, 173, 180, 232, 64, 227, 17, 177, + 180, 47, 156, 154, 0, 217, 112, 153, + 243, 22, 171, 181, 55, 182, 2, 49, + 100, 37, 173, 166, 252, 138, 25, 94, + 93, 77, 34, 251, 178, 136, 137, 105, + 182, 4, 84, 17, 84, 113, 212, 185, + 206, 114, 228, 135, 1, 138, 35, 20, + 25, 28, 165, 207, 108, 253, 45, 30, + 204, 128, 104, 168, 140, 158, 79, 4, + 51, 207, 105, 106, 67, 179, 77, 64, + 86, 2, 184, 240, 166, 169, 219, 63, + 101, 19, 185, 181, 64, 89, 184, 21, + 98, 133, 128, 51, 187, 69, 175, 101, + 106, 190, 208, 36, 150, 106, 35, 241, + 100, 72, 208, 209, 92, 127, 148, 173, + 202, 111, 62, 170, 168, 213, 244, 192, + 65, 170, 83, 223, 126, 206, 210, 5, + 213, 62, 169, 237, 161, 238, 46, 133, + 135, 64, 48, 215, 128, 91, 155, 0, + 19, 205, 131, 195, 29, 213, 235, 78, + 211, 84, 135, 67, 137, 56, 158, 9, + 200, 152, 188, 83, 190, 225, 211, 56, + 129, 81, 35, 128, 255, 148, 65, 11, + 122, 185, 99, 11, 225, 213, 150, 215, + 129, 213, 180, 51, 1, 212, 217, 174, + 237, 151, 132, 37, 20, 66, 199, 79, + 144, 192, 151, 24, 116, 15, 16, 36, + 242, 117, 56, 86, 43, 22, 100, 56, + 140, 20, 88, 226, 27, 185, 195, 139, + 35, 224, 51, 241, 211, 167, 223, 96, + 178, 214, 86, 86, 234, 44, 55, 178, + 108, 207, 219, 189, 146, 41, 0, 130, + 87, 12, 63, 65, 21, 239, 158, 140, + 35, 168, 205, 225, 36, 236, 60, 204, + 141, 36, 61, 177, 193, 209, 246, 232, + 93, 150, 236, 24, 46, 147, 204, 89, + 109, 198, 168, 196, 125, 64, 204, 239, + 207, 3, 244, 199, 110, 78, 174, 97, + 55, 142, 228, 206, 250, 50, 229, 81, + 33, 252, 186, 76, 118, 118, 249, 81, + 93, 157, 223, 244, 228, 130, 14, 50, + 218, 168, 138, 174, 155, 215, 164, 49, + 86, 147, 69, 6, 216, 207, 183, 21, + 172, 152, 176, 223, 115, 63, 152, 6, + 205, 118, 58, 184, 249, 197, 180, 132, + 135, 123, 67, 178, 0, 175, 17, 72, + 215, 187, 137, 132, 183, 156, 237, 15, + 12, 198, 19, 137, 255, 249, 74, 168, + 70, 37, 26, 254, 129, 143, 193, 156, + 68, 206, 125, 24, 240, 149, 198, 29, + 177, 246, 253, 214, 165, 93, 114, 30, + 183, 104, 71, 186, 250, 147, 154, 103, + 221, 23, 208, 201, 142, 67, 199, 78, + 202, 13, 192, 192, 112, 129, 202, 161, + 92, 230, 106, 34, 190, 172, 187, 199, + 141, 160, 41, 41, 34, 109, 21, 92, + 129, 155, 154, 27, 171, 109, 9, 77, + 28, 153, 177, 162, 55, 254, 27, 204, + 195, 193, 151, 60, 153, 12, 43, 226, + 74, 146, 77, 71, 218, 117, 220, 185, + 209, 161, 107, 249, 60, 3, 82, 28, + 42, 234, 171, 27, 156, 103, 8, 101, + 76, 182, 217, 151, 67, 254, 198, 83, + 243, 29, 70, 105, 215, 237, 73, 202, + 102, 0, 28, 199, 53, 62, 140, 168, + 65, 243, 149, 205, 203, 231, 180, 119, + 56, 208, 12, 166, 178, 221, 192, 10, + 156, 234, 49, 12, 129, 94, 23, 233, + 139, 246, 240, 44, 48, 130, 159, 201, + 179, 94, 122, 23, 126, 135, 236, 56, + 239, 200, 95, 163, 162, 104, 187, 175, + 205, 20, 125, 85, 66, 140, 86, 189, + 190, 218, 162, 216, 22, 163, 75, 140, + 128, 21, 227, 174, 149, 73, 193, 250, + 202, 215, 125, 48, 14, 206, 217, 118, + 96, 146, 158, 32, 126, 150, 128, 12, + 2, 243, 32, 80, 211, 114, 60, 240, + 79, 201, 224, 94, 229, 210, 10, 250, + 194, 34, 198, 104, 209, 141, 60, 10, + 30, 156, 241, 52, 192, 23, 212, 147, + 110, 16, 233, 255, 162, 238, 122, 250, + 16, 244, 162, 56, 130, 68, 63, 10, + 226, 95, 144, 158, 109, 70, 188, 29, + 175, 78, 110, 237, 132, 4, 16, 19, + 6, 38, 119, 75, 189, 250, 234, 57, + 3, 227, 66, 40, 250, 5, 255, 194, + 228, 171, 19, 228, 113, 174, 184, 215, + 115, 100, 152, 88, 112, 68, 215, 70, + 86, 63, 63, 226, 208, 75, 70, 87, + 75, 238, 38, 169, 238, 45, 55, 25, + 121, 10, 168, 22, 92, 25, 54, 230, + 52, 163, 145, 21, 25, 42, 62, 69, + 108, 227, 46, 236, 230, 209, 11, 14, + 242, 52, 92, 86, 91, 91, 29, 2, + 173, 193, 166, 24, 199, 127, 87, 202, + 46, 199, 32, 144, 213, 173, 243, 74, + 138, 201, 172, 124, 200, 14, 101, 177, + 159, 198, 111, 94, 139, 195, 221, 87, + 97, 10, 32, 125, 151, 205, 180, 232, + 140, 29, 50, 76, 118, 181, 250, 102, + 74, 120, 101, 76, 30, 41, 55, 42, + 94, 187, 17, 109, 200, 230, 232, 150, + 87, 253, 21, 220, 92, 179, 125, 172, + 115, 148, 36, 249, 166, 153, 227, 110, + 55, 228, 97, 41, 55, 157, 78, 238, + 180, 36, 130, 14, 209, 175, 6, 104, + 115, 148, 17, 168, 118, 42, 19, 159, + 189, 239, 60, 179, 104, 98, 201, 19, + 140, 241, 62, 92, 133, 189, 231, 70, + 1, 18, 128, 73, 47, 24, 174, 5, + 3, 24, 245, 82, 5, 131, 48, 164, + 56, 93, 86, 253, 151, 123, 233, 33, + 5, 102, 143, 199, 101, 180, 162, 86, + 123, 253, 11, 221, 140, 147, 252, 111, + 3, 21, 190, 52, 95, 114, 18, 208, + 192, 252, 175, 24, 123, 68, 87, 228, + 213, 19, 112, 245, 179, 154, 225, 226, + 245, 117, 191, 239, 7, 182, 188, 191, + 216, 206, 32, 38, 170, 218, 126, 183, + 20, 107, 104, 0, 123, 100, 134, 139, + 242, 130, 74, 175, 100, 6, 93, 217, + 214, 226, 192, 77, 224, 221, 76, 80, + 102, 36, 88, 184, 43, 62, 14, 206, + 203, 123, 147, 14, 83, 170, 142, 100, + 120, 232, 222, 145, 44, 13, 240, 229, + 90, 26, 9, 17, 199, 131, 67, 27, + 233, 10, 48, 218, 180, 51, 234, 255, + 106, 211, 211, 78, 179, 58, 197, 184, + 58, 133, 52, 153, 159, 253, 214, 173, + 144, 80, 157, 126, 91, 168, 248, 94, + 131, 219, 148, 191, 253, 12, 218, 166, + 33, 180, 195, 22, 193, 80, 180, 45, + 22, 244, 134, 179, 193, 177, 150, 241, + 11, 21, 38, 237, 113, 180, 208, 186, + 196, 244, 206, 131, 182, 161, 160, 11, + 222, 177, 0, 180, 238, 180, 108, 167, + 44, 97, 250, 154, 152, 111, 28, 173, + 253, 154, 25, 116, 28, 21, 116, 247, + 211, 103, 38, 36, 48, 11, 177, 210, + 135, 75, 97, 34, 115, 39, 85, 107, + 95, 230, 153, 90, 11, 162, 147, 159, + 180, 219, 200, 58, 239, 191, 121, 61, + 50, 1, 132, 59, 221, 126, 137, 104, + 25, 26, 206, 189, 113, 222, 134, 178, + 20, 14, 169, 65, 176, 205, 122, 119, + 18, 43, 160, 188, 210, 70, 61, 16, + 120, 159, 195, 244, 0, 177, 132, 12, + 87, 184, 219, 78, 118, 203, 54, 150, + 124, 21, 112, 124, 30, 178, 82, 7, + 226, 171, 229, 213, 148, 14, 76, 126, + 127, 4, 63, 29, 155, 37, 141, 167, + 193, 144, 78, 192, 158, 36, 215, 235, + 250, 163, 229, 149, 99, 221, 85, 104, + 148, 52, 241, 195, 10, 71, 88, 209, + 112, 52, 41, 41, 219, 95, 107, 195, + 124, 88, 167, 29, 233, 32, 182, 50, + 72, 185, 53, 84, 7, 89, 96, 66, + 238, 211, 168, 61, 76, 153, 24, 152, + 156, 220, 249, 149, 186, 71, 239, 177, + 65, 144, 80, 239, 19, 235, 215, 210, + 117, 91, 241, 84, 50, 135, 240, 132, + 184, 170, 110, 120, 192, 24, 234, 90, + 143, 184, 226, 189, 28, 136, 75, 200, + 32, 199, 229, 206, 238, 165, 216, 33, + 218, 16, 100, 107, 197, 38, 105, 87, + 43, 211, 17, 94, 247, 15, 167, 67, + 32, 26, 175, 105, 177, 161, 82, 148, + 36, 116, 99, 119, 99, 58, 12, 130, + 222, 207, 35, 85, 221, 205, 81, 10, + 181, 35, 155, 91, 116, 95, 185, 73, + 1, 227, 160, 189, 70, 146, 90, 123, + 66, 39, 246, 229, 138, 99, 132, 94, + 110, 211, 63, 4, 43, 148, 235, 22, + 234, 252, 90, 81, 97, 8, 76, 108, + 135, 54, 160, 82, 243, 69, 218, 254, + 115, 215, 78, 178, 236, 249, 124, 90, + 41, 77, 163, 128, 77, 159, 170, 95, + 131, 30, 122, 239, 78, 8, 81, 83, + 55, 216, 150, 220, 110, 201, 68, 135, + 175, 165, 139, 22, 121, 253, 92, 203, + 159, 222, 227, 14, 162, 142, 165, 144, + 140, 230, 56, 154, 162, 239, 92, 227, + 25, 186, 12, 0, 70, 32, 31, 146, + 105, 184, 107, 87, 81, 206, 40, 82, + 160, 67, 195, 17, 177, 91, 187, 62, + 92, 215, 198, 21, 29, 111, 194, 250, + 210, 104, 69, 180, 125, 194, 73, 248, + 158, 41, 63, 184, 182, 19, 223, 126, + 92, 64, 78, 241, 128, 37, 181, 66, + 41, 97, 252, 158, 142, 234, 205, 231, + 162, 175, 175, 246, 22, 53, 200, 50, + 234, 85, 173, 255, 205, 246, 73, 233, + 44, 240, 1, 178, 14, 201, 7, 100, + 59, 2, 24, 53, 164, 103, 97, 52, + 156, 226, 150, 19, 214, 31, 24, 182, + 223, 31, 216, 143, 162, 130, 0, 93, + 157, 236, 222, 94, 132, 57, 124, 165, + 7, 3, 162, 48, 26, 232, 208, 114, + 33, 209, 199, 221, 19, 219, 14, 249, + 78, 252, 252, 202, 193, 10, 244, 32, + 16, 18, 196, 211, 156, 163, 7, 67, + 70, 94, 148, 57, 160, 2, 54, 211, + 181, 76, 95, 54, 85, 110, 36, 4, + 36, 252, 139, 46, 176, 177, 15, 173, + 153, 120, 214, 91, 149, 17, 182, 189, + 192, 98, 146, 173, 150, 102, 216, 250, + 203, 147, 113, 132, 96, 110, 103, 182, + 179, 176, 122, 59, 70, 58, 91, 108, + 126, 67, 22, 179, 86, 94, 162, 232, + 71, 219, 20, 181, 183, 238, 194, 120, + 196, 36, 90, 176, 30, 66, 71, 107, + 103, 243, 34, 210, 132, 148, 65, 219, + 83, 42, 133, 27, 44, 226, 160, 96, + 195, 86, 3, 153, 255, 216, 211, 159, + 50, 163, 40, 137, 247, 95, 22, 201, + 121, 244, 48, 119, 178, 13, 122, 249, + 61, 84, 7, 94, 189, 95, 72, 143, + 107, 127, 52, 236, 218, 157, 21, 218, + 254, 88, 8, 39, 105, 176, 28, 131, + 119, 153, 108, 241, 133, 198, 161, 245, + 31, 165, 192, 237, 208, 112, 209, 148, + 234, 238, 136, 136, 97, 52, 211, 6, + 170, 210, 92, 84, 179, 201, 147, 13, + 1, 50, 169, 91, 105, 228, 221, 27, + 111, 119, 214, 147, 243, 59, 203, 54, + 181, 234, 214, 177, 78, 100, 62, 60, + 149, 158, 197, 47, 224, 252, 128, 248, + 145, 253, 239, 116, 58, 220, 209, 241, + 150, 87, 68, 20, 133, 86, 234, 213, + 196, 76, 212, 53, 105, 61, 68, 238, + 193, 29, 113, 37, 239, 130, 144, 145, + 196, 109, 201, 51, 23, 245, 17, 129, + 248, 206, 97, 84, 144, 91, 146, 71, + 50, 8, 185, 8, 108, 170, 231, 125, + 28, 225, 17, 241, 238, 110, 102, 248, + 246, 229, 89, 148, 112, 65, 51, 201, + 33, 102, 123, 0, 86, 65, 23, 219, + 39, 252, 49, 155, 217, 29, 12, 205, + 235, 93, 130, 114, 244, 133, 23, 219, + 73, 18, 70, 94, 83, 101, 230, 222, + 173, 15, 100, 244, 80, 227, 42, 93, + 101, 31, 39, 148, 63, 39, 164, 192, + 162, 179, 164, 146, 1, 104, 96, 86, + 59, 149, 41, 153, 219, 14, 216, 249, + 96, 219, 219, 50, 116, 139, 102, 142, + 138, 188, 87, 48, 78, 90, 40, 19, + 113, 244, 102, 91, 224, 247, 210, 27, + 46, 117, 211, 39, 140, 114, 81, 254, + 14, 114, 103, 184, 155, 198, 35, 136, + 168, 208, 100, 163, 203, 111, 48, 210, + 133, 42, 189, 190, 38, 135, 221, 25, + 174, 215, 112, 76, 90, 50, 44, 141, + 104, 68, 119, 235, 118, 221, 107, 246, + 178, 10, 59, 137, 228, 12, 32, 145, + 134, 236, 71, 40, 31, 242, 14, 60, + 178, 133, 172, 56, 171, 252, 251, 9, + 124, 227, 155, 54, 252, 31, 168, 80, + 32, 133, 41, 244, 99, 148, 102, 236, + 22, 212, 147, 186, 65, 31, 56, 230, + 190, 47, 123, 213, 8, 53, 194, 43, + 111, 230, 210, 72, 38, 145, 136, 59, + 69, 129, 10, 239, 251, 28, 174, 52, + 32, 104, 144, 175, 161, 175, 236, 158, + 36, 208, 9, 181, 178, 173, 183, 51, + 22, 178, 232, 228, 4, 172, 253, 29, + 162, 204, 192, 36, 184, 31, 11, 34, + 246, 137, 67, 132, 164, 220, 195, 129, + 176, 43, 1, 9, 63, 1, 44, 156, + 131, 85, 157, 195, 85, 222, 25, 95, + 224, 235, 218, 214, 243, 161, 213, 246, + 94, 239, 159, 65, 241, 222, 125, 161, + 114, 124, 49, 227, 145, 73, 125, 147, + 70, 46, 19, 23, 196, 193, 223, 130, + 78, 14, 51, 235, 10, 22, 56, 47, + 184, 252, 129, 37, 2, 197, 71, 247, + 35, 37, 47, 110, 111, 156, 57, 188, + 17, 175, 115, 201, 167, 193, 32, 1, + 236, 199, 158, 145, 51, 8, 255, 94, + 77, 237, 46, 31, 253, 122, 27, 142, + 10, 60, 32, 177, 251, 120, 12, 82, + 129, 148, 172, 113, 50, 17, 148, 226, + 241, 36, 15, 26, 48, 105, 152, 81, + 78, 208, 245, 248, 189, 4, 252, 31, + 68, 115, 226, 82, 238, 40, 228, 245, + 165, 24, 225, 137, 74, 107, 108, 89, + 33, 191, 80, 131, 140, 140, 234, 56, + 37, 84, 115, 112, 235, 6, 148, 159, + 219, 251, 173, 168, 33, 45, 128, 1, + 150, 66, 180, 230, 248, 141, 111, 96, + 132, 148, 175, 224, 73, 226, 52, 130, + 82, 72, 64, 254, 2, 255, 30, 99, + 215, 186, 12, 251, 35, 7, 253, 163, + 187, 157, 39, 114, 222, 75, 164, 197, + 133, 213, 89, 230, 115, 94, 150, 188, + 17, 132, 245, 224, 231, 124, 27, 246, + 242, 159, 71, 104, 150, 22, 24, 174, + 241, 165, 140, 133, 18, 129, 226, 103, + 251, 171, 139, 213, 183, 235, 110, 193, + 10, 74, 73, 76, 75, 106, 206, 165, + 96, 108, 103, 139, 147, 144, 52, 239, + 141, 181, 39, 6, 81, 245, 187, 64, + 22, 112, 86, 201, 39, 190, 123, 140, + 17, 6, 231, 206, 74, 102, 93, 79, + 238, 54, 159, 53, 76, 100, 18, 3, + 169, 53, 187, 205, 79, 49, 152, 148, + 63, 203, 160, 87, 67, 178, 115, 125, + 200, 18, 94, 169, 19, 225, 135, 231, + 84, 188, 71, 218, 107, 159, 143, 29, + 210, 250, 0, 81, 71, 3, 67, 90, + 202, 33, 235, 19, 210, 77, 218, 236, + 243, 218, 169, 244, 90, 183, 7, 245, + 43, 202, 0, 76, 176, 195, 199, 112, + 166, 97, 46, 126, 175, 72, 221, 28, + 232, 136, 224, 35, 213, 73, 199, 144, + 162, 0, 169, 189, 158, 38, 13, 98, + 30, 101, 64, 171, 75, 218, 247, 202, + 196, 196, 22, 94, 97, 164, 254, 201, + 234, 213, 232, 186, 8, 227, 207, 195, + 157, 71, 59, 150, 78, 85, 74, 118, + 65, 65, 141, 62, 1, 200, 57, 223, + 64, 111, 237, 157, 230, 195, 224, 200, + 80, 48, 84, 41, 115, 58, 202, 108, + 109, 22, 211, 114, 152, 166, 8, 38, + 140, 204, 120, 195, 157, 149, 95, 36, + 233, 255, 93, 190, 99, 98, 43, 22, + 236, 213, 144, 152, 124, 76, 15, 173, + 244, 47, 197, 20, 105, 180, 42, 107, + 173, 59, 121, 123, 68, 125, 92, 157, + 13, 251, 152, 127, 66, 34, 235, 59, + 108, 192, 234, 94, 152, 99, 208, 61, + 84, 39, 154, 51, 217, 226, 8, 149, + 97, 217, 157, 58, 208, 47, 84, 61, + 61, 155, 90, 189, 32, 76, 99, 79, + 36, 180, 77, 202, 22, 38, 211, 200, + 247, 189, 209, 59, 239, 25, 133, 51, + 110, 232, 100, 168, 37, 130, 32, 45, + 40, 193, 64, 131, 165, 144, 204, 57, + 250, 228, 67, 219, 62, 14, 76, 160, + 200, 98, 149, 111, 81, 90, 240, 81, + 43, 200, 3, 211, 3, 87, 149, 210, + 110, 200, 134, 166, 243, 86, 166, 202, + 127, 205, 152, 175, 213, 169, 113, 105, + 39, 249, 52, 35, 61, 195, 246, 101, + 78, 178, 90, 128, 2, 34, 80, 120, + 58, 123, 254, 164, 53, 1, 58, 52, + 25, 92, 56, 119, 134, 210, 115, 59, + 158, 52, 163, 245, 80, 64, 146, 189, + 134, 137, 92, 96, 184, 77, 32, 142, + 86, 220, 131, 119, 205, 116, 63, 190, + 140, 36, 211, 169, 82, 196, 46, 85, + 78, 131, 166, 228, 168, 158, 4, 82, + 4, 95, 223, 226, 4, 84, 205, 7, + 131, 129, 37, 90, 92, 151, 204, 229, + 66, 123, 242, 121, 76, 191, 250, 152, + 204, 112, 101, 181, 246, 136, 69, 203, + 85, 178, 18, 203, 24, 57, 199, 29, + 250, 126, 245, 195, 55, 118, 53, 194, + 230, 185, 99, 181, 122, 168, 253, 76, + 207, 118, 91, 3, 162, 166, 248, 253, + 92, 60, 30, 34, 119, 68, 76, 207, + 81, 119, 209, 46, 197, 145, 119, 186, + 53, 40, 161, 237, 172, 167, 63, 11, + 123, 225, 151, 141, 21, 91, 39, 124, + 47, 65, 13, 37, 94, 38, 68, 62, + 189, 179, 119, 175, 38, 91, 29, 4, + 190, 33, 215, 81, 249, 247, 67, 19, + 137, 228, 231, 138, 48, 41, 38, 131, + 191, 222, 0, 120, 189, 9, 217, 43, + 162, 116, 162, 103, 249, 113, 43, 97, + 138, 44, 26, 199, 110, 173, 185, 53, + 23, 174, 60, 82, 174, 213, 82, 129, + 195, 209, 246, 85, 123, 191, 254, 187, + 111, 230, 149, 187, 23, 53, 57, 248, + 25, 240, 65, 59, 50, 117, 137, 18, + 247, 223, 105, 154, 195, 234, 109, 45, + 11, 12, 133, 66, 76, 37, 80, 243, + 103, 9, 113, 107, 220, 8, 105, 244, + 32, 58, 1, 111, 29, 215, 13, 36, + 211, 16, 98, 17, 230, 57, 187, 127, + 80, 71, 156, 24, 215, 214, 146, 1, + 232, 125, 57, 81, 134, 192, 184, 209, + 194, 4, 63, 113, 231, 112, 131, 123, + 90, 196, 94, 34, 12, 122, 168, 180, + 193, 70, 137, 213, 251, 76, 63, 166, + 176, 34, 141, 105, 114, 220, 208, 240, + 42, 44, 155, 185, 145, 158, 195, 150, + 167, 10, 27, 1, 59, 247, 119, 199, + 15, 172, 196, 156, 114, 5, 6, 238, + 108, 166, 247, 125, 62, 246, 200, 138, + 142, 206, 63, 39, 151, 27, 150, 241, + 182, 21, 55, 68, 191, 103, 28, 221, + 36, 173, 131, 127, 203, 11, 177, 98, + 132, 18, 123, 238, 202, 154, 139, 181, + 226, 126, 55, 200, 103, 42, 193, 104, + 114, 141, 143, 203, 194, 57, 1, 16, + 188, 129, 29, 144, 149, 156, 138, 247, + 157, 149, 19, 81, 72, 16, 155, 42, + 248, 56, 95, 246, 18, 168, 153, 79, + 101, 156, 224, 159, 7, 35, 1, 38, + 212, 87, 214, 162, 173, 95, 193, 70, + 88, 212, 194, 141, 39, 178, 104, 75, + 201, 1, 202, 49, 92, 29, 134, 249, + 135, 23, 226, 165, 223, 224, 241, 174, + 47, 77, 221, 114, 15, 154, 145, 47, + 196, 215, 41, 113, 129, 29, 71, 64, + 120, 215, 206, 224, 137, 34, 114, 215, + 116, 85, 245, 252, 32, 34, 72, 28, + 116, 75, 237, 155, 250, 188, 2, 91, + 47, 242, 127, 167, 90, 195, 14, 216, + 217, 163, 212, 48, 78, 212, 206, 85, + 108, 79, 244, 211, 180, 166, 84, 132, + 209, 175, 34, 49, 203, 93, 140, 81, + 40, 82, 195, 68, 98, 170, 234, 99, + 58, 9, 234, 115, 150, 9, 225, 85, + 170, 159, 156, 189, 223, 40, 69, 185, + 5, 242, 142, 136, 69, 71, 163, 211, + 197, 69, 237, 71, 11, 26, 242, 203, + 110, 66, 115, 193, 150, 100, 185, 38, + 117, 105, 61, 242, 152, 237, 114, 68, + 243, 21, 70, 18, 111, 252, 77, 118, + 200, 139, 208, 50, 220, 199, 42, 101, + 110, 89, 204, 99, 108, 77, 163, 78, + 238, 138, 72, 39, 80, 149, 79, 84, + 71, 213, 94, 163, 235, 142, 97, 39, + 109, 90, 162, 173, 199, 185, 133, 243, + 54, 170, 107, 2, 103, 33, 71, 188, + 38, 100, 86, 239, 221, 79, 147, 135, + 156, 227, 245, 101, 97, 174, 36, 237, + 120, 72, 123, 88, 31, 74, 175, 30, + 120, 68, 168, 20, 98, 5, 83, 65, + 204, 20, 60, 140, 34, 113, 198, 13, + 227, 65, 229, 208, 95, 193, 233, 86, + 177, 83, 1, 200, 130, 7, 251, 49, + 219, 71, 73, 177, 210, 25, 214, 252, + 97, 184, 167, 133, 212, 104, 239, 140, + 111, 101, 203, 44, 219, 0, 237, 101, + 174, 42, 130, 162, 237, 156, 187, 51, + 120, 32, 53, 152, 158, 242, 52, 0, + 21, 82, 223, 1, 115, 57, 71, 43, + 109, 82, 35, 130, 67, 44, 131, 52, + 135, 136, 81, 212, 220, 215, 9, 228, + 44, 118, 39, 249, 18, 232, 229, 71, + 255, 167, 44, 1, 106, 89, 230, 86, + 188, 135, 179, 143, 143, 124, 226, 144, + 186, 61, 224, 205, 106, 37, 89, 210, + 242, 40, 192, 95, 81, 133, 134, 155, + 238, 205, 207, 66, 124, 195, 238, 92, + 174, 209, 84, 152, 197, 72, 124, 4, + 141, 223, 179, 144, 103, 112, 85, 129, + 247, 30, 23, 42, 19, 249, 64, 63, + 231, 19, 21, 127, 217, 191, 21, 209, + 89, 12, 156, 43, 167, 137, 26, 213, + 19, 243, 193, 43, 81, 170, 124, 111, + 152, 89, 184, 9, 142, 20, 176, 158, + 108, 59, 126, 250, 190, 173, 9, 183, + 137, 221, 117, 58, 131, 0, 5, 146, + 114, 38, 182, 29, 142, 227, 101, 92, + 123, 147, 189, 208, 202, 10, 74, 49, + 68, 89, 217, 178, 114, 136, 90, 179, + 192, 92, 135, 47, 185, 212, 170, 189, + 177, 114, 157, 238, 153, 21, 132, 29, + 118, 46, 55, 198, 219, 139, 42, 150, + 210, 80, 74, 8, 181, 190, 118, 255, + 221, 82, 141, 16, 17, 22, 169, 27, + 65, 247, 21, 164, 136, 237, 74, 197, + 89, 22, 231, 177, 188, 6, 55, 124, + 214, 175, 98, 213, 93, 184, 107, 44, + 136, 16, 63, 249, 205, 119, 53, 230, + 88, 246, 229, 126, 148, 25, 54, 172, + 218, 18, 216, 179, 63, 105, 0, 210, + 34, 109, 117, 43, 234, 96, 96, 61, + 144, 29, 46, 64, 86, 255, 27, 92, + 84, 105, 14, 150, 131, 205, 147, 236, + 3, 235, 157, 89, 96, 151, 20, 234, + 154, 253, 210, 48, 232, 84, 128, 8, + 25, 89, 82, 32, 152, 205, 179, 12, + 3, 232, 103, 251, 20, 74, 247, 209, + 227, 188, 111, 175, 24, 24, 235, 13, + 123, 240, 28, 6, 103, 199, 4, 149, + 179, 226, 34, 121, 120, 147, 240, 68, + 174, 188, 82, 214, 164, 55, 36, 40, + 20, 177, 11, 107, 3, 24, 2, 157, + 155, 109, 158, 134, 218, 90, 99, 124, + 213, 40, 72, 224, 173, 97, 110, 113, + 89, 193, 188, 209, 27, 19, 228, 200, + 133, 245, 164, 188, 213, 192, 206, 73, + 58, 87, 93, 197, 140, 145, 38, 218, + 188, 222, 87, 208, 100, 84, 153, 71, + 4, 87, 45, 209, 9, 46, 86, 107, + 28, 40, 148, 152, 176, 179, 80, 235, + 89, 247, 126, 88, 179, 23, 148, 106, + 146, 218, 187, 105, 202, 56, 170, 4, + 197, 129, 82, 110, 129, 102, 47, 180, + 169, 77, 10, 223, 160, 111, 185, 244, + 75, 169, 110, 251, 141, 180, 142, 75, + 41, 129, 82, 183, 12, 165, 237, 242, + 73, 118, 72, 81, 127, 214, 66, 95, + 135, 27, 179, 100, 23, 103, 83, 173, + 164, 34, 123, 47, 71, 219, 69, 216, + 178, 110, 215, 162, 219, 134, 138, 79, + 208, 35, 146, 19, 122, 169, 93, 7, + 84, 95, 62, 223, 79, 8, 253, 73, + 243, 98, 93, 235, 159, 46, 121, 163, + 37, 119, 47, 59, 225, 206, 192, 9, + 128, 200, 26, 154, 112, 179, 18, 153, + 181, 105, 205, 229, 76, 160, 77, 242, + 21, 144, 192, 8, 227, 41, 1, 180, + 34, 250, 157, 121, 255, 137, 216, 169, + 205, 95, 115, 237, 151, 245, 252, 81, + 176, 239, 207, 30, 39, 36, 110, 97, + 195, 33, 12, 171, 217, 83, 246, 27, + 147, 194, 253, 223, 173, 110, 120, 248, + 193, 219, 117, 230, 153, 171, 69, 251, + 101, 51, 24, 101, 5, 83, 69, 90, + 235, 172, 180, 151, 193, 194, 118, 153, + 148, 50, 171, 170, 52, 13, 183, 132, + 228, 87, 69, 220, 210, 206, 32, 208, + 192, 143, 173, 212, 249, 103, 201, 140, + 173, 185, 101, 63, 146, 137, 164, 55, + 250, 248, 215, 132, 243, 107, 100, 37, + 0, 118, 92, 246, 162, 231, 227, 72, + 123, 148, 249, 255, 82, 152, 242, 221, + 137, 61, 213, 150, 89, 207, 105, 254, + 48, 219, 134, 186, 200, 127, 4, 233, + 64, 134, 99, 53, 3, 36, 244, 180, + 67, 241, 197, 191, 39, 240, 124, 42, + 228, 74, 137, 28, 166, 74, 130, 124, + 117, 76, 209, 196, 48, 148, 186, 186, + 49, 141, 132, 38, 13, 241, 57, 181, + 74, 67, 67, 150, 46, 32, 254, 136, + 198, 156, 51, 140, 92, 197, 195, 243, + 207, 85, 16, 216, 88, 92, 69, 134, + 13, 112, 165, 169, 205, 194, 118, 186, + 171, 113, 49, 88, 72, 197, 239, 212, + 30, 168, 197, 107, 181, 56, 181, 42, + 118, 72, 12, 61, 209, 139, 70, 119, + 5, 137, 176, 190, 175, 233, 159, 233, + 44, 112, 6, 52, 85, 84, 221, 163, + 64, 115, 255, 91, 33, 229, 217, 168, + 254, 14, 231, 63, 156, 226, 105, 118, + 231, 140, 54, 4, 198, 61, 247, 163, + 21, 70, 158, 231, 172, 156, 112, 143, + 55, 252, 103, 29, 86, 11, 54, 173, + 245, 2, 63, 17, 156, 227, 91, 97, + 235, 155, 89, 8, 242, 145, 122, 167, + 23, 29, 82, 167, 252, 217, 124, 189, + 48, 47, 139, 173, 146, 107, 19, 18, + 32, 7, 71, 228, 198, 48, 166, 142, + 27, 81, 85, 27, 88, 80, 244, 9, + 79, 238, 214, 131, 31, 144, 31, 86, + 83, 187, 216, 46, 58, 112, 30, 19, + 21, 85, 102, 3, 231, 66, 164, 143, + 42, 131, 140, 127, 16, 138, 49, 73, + 103, 185, 97, 93, 55, 180, 113, 161, + 209, 93, 10, 156, 7, 27, 45, 78, + 86, 158, 130, 73, 121, 32, 174, 201, + 27, 112, 140, 229, 53, 42, 51, 131, + 113, 71, 202, 234, 123, 154, 241, 69, + 0, 216, 7, 66, 179, 209, 228, 250, + 80, 183, 187, 162, 229, 137, 24, 67, + 199, 84, 211, 227, 110, 160, 233, 81, + 10, 108, 202, 1, 182, 39, 200, 154, + 247, 1, 157, 165, 193, 239, 62, 148, + 50, 181, 254, 119, 152, 70, 16, 43, + 156, 40, 13, 67, 109, 161, 36, 149, + 221, 168, 146, 14, 169, 154, 224, 224, + 185, 192, 3, 182, 135, 108, 102, 183, + 110, 41, 203, 177, 58, 83, 150, 93, + 177, 132, 104, 214, 118, 96, 177, 188, + 41, 244, 246, 172, 211, 156, 54, 45, + 47, 205, 114, 52, 36, 98, 247, 42, + 223, 221, 85, 237, 52, 68, 112, 12, + 53, 66, 134, 244, 149, 185, 79, 44, + 212, 103, 117, 31, 185, 154, 122, 51, + 244, 247, 174, 53, 161, 8, 191, 45, + 87, 35, 212, 15, 99, 249, 87, 9, + 142, 246, 205, 68, 165, 87, 19, 61, + 49, 39, 211, 166, 66, 121, 166, 213, + 162, 21, 74, 110, 208, 200, 242, 209, + 175, 4, 242, 39, 108, 220, 233, 30, + 97, 231, 219, 113, 42, 121, 166, 123, + 227, 89, 120, 50, 204, 70, 121, 110, + 101, 20, 73, 235, 244, 179, 225, 57, + 92, 48, 64, 163, 157, 245, 254, 141, + 132, 81, 150, 59, 146, 166, 227, 21, + 60, 15, 182, 249, 114, 25, 239, 145, + 167, 241, 96, 49, 249, 235, 189, 108, + 113, 100, 139, 247, 211, 188, 219, 60, + 35, 255, 112, 155, 21, 187, 55, 26, + 115, 235, 29, 233, 48, 170, 24, 126, + 146, 220, 199, 187, 111, 81, 138, 230, + 23, 88, 252, 153, 143, 142, 27, 159, + 241, 136, 196, 87, 253, 225, 246, 51, + 67, 250, 243, 102, 127, 110, 0, 168, + 154, 250, 43, 37, 17, 207, 60, 173, + 17, 156, 148, 104, 36, 0, 60, 95, + 95, 208, 107, 128, 60, 115, 142, 1, + 237, 10, 244, 36, 206, 231, 101, 247, + 211, 155, 87, 198, 24, 162, 137, 161, + 249, 245, 143, 31, 173, 200, 104, 90, + 226, 166, 254, 252, 221, 212, 8, 75, + 69, 57, 159, 30, 141, 141, 53, 207, + 202, 246, 28, 45, 252, 56, 230, 248, + 149, 41, 145, 182, 182, 242, 82, 178, + 130, 237, 110, 170, 30, 172, 174, 155, + 165, 154, 191, 142, 117, 218, 210, 165, + 65, 152, 95, 120, 27, 164, 70, 64, + 54, 197, 229, 146, 91, 195, 30, 0, + 167, 165, 161, 127, 84, 92, 168, 238, + 40, 199, 230, 116, 1, 55, 7, 210, + 200, 228, 18, 15, 72, 46, 39, 188, + 229, 119, 45, 228, 215, 41, 219, 94, + 75, 185, 100, 131, 47, 221, 121, 31, + 185, 120, 7, 124, 86, 40, 206, 15, + 168, 8, 128, 155, 64, 134, 198, 252, + 194, 167, 58, 149, 89, 119, 119, 31, + 196, 102, 230, 59, 152, 64, 47, 87, + 31, 6, 122, 124, 180, 187, 142, 86, + 59, 78, 93, 165, 212, 251, 184, 157, + 21, 67, 39, 254, 40, 4, 98, 174, + 104, 205, 80, 128, 94, 215, 246, 176, + 41, 48, 172, 2, 43, 250, 9, 178, + 187, 59, 215, 23, 158, 101, 97, 36, + 204, 6, 155, 244, 107, 227, 2, 199, + 46, 21, 80, 232, 41, 88, 176, 208, + 214, 80, 205, 129, 61, 203, 34, 94, + 172, 10, 176, 132, 128, 56, 214, 235, + 46, 86, 85, 125, 130, 228, 147, 251, + 200, 25, 153, 247, 207, 197, 118, 159, + 208, 124, 127, 170, 164, 174, 97, 28, + 88, 47, 71, 229, 74, 172, 208, 157, + 163, 62, 51, 159, 130, 133, 77, 123, + 144, 224, 201, 242, 75, 251, 204, 162, + 243, 192, 66, 127, 75, 109, 204, 120, + 130, 50, 183, 56, 112, 71, 51, 98, + 184, 13, 139, 14, 242, 134, 129, 74, + 99, 252, 244, 195, 137, 0, 159, 111, + 236, 107, 22, 187, 106, 203, 232, 64, + 112, 183, 157, 232, 148, 101, 2, 166, + 229, 24, 183, 58, 192, 13, 136, 25, + 250, 195, 182, 1, 253, 201, 108, 95, + 32, 99, 226, 46, 156, 104, 224, 99, + 150, 78, 134, 247, 62, 113, 212, 141, + 155, 38, 52, 39, 174, 47, 122, 221, + 218, 207, 147, 29, 29, 188, 44, 24, + 132, 155, 86, 192, 140, 117, 182, 38, + 222, 123, 100, 248, 94, 97, 7, 236, + 5, 188, 247, 183, 197, 77, 103, 97, + 37, 219, 220, 218, 163, 15, 111, 144, + 243, 214, 4, 160, 9, 234, 77, 228, + 50, 184, 175, 238, 96, 52, 193, 92, + 131, 184, 223, 141, 189, 56, 21, 240, + 192, 83, 112, 141, 74, 119, 143, 20, + 175, 5, 198, 83, 200, 126, 165, 131, + 255, 99, 92, 186, 27, 35, 15, 20, + 209, 201, 129, 70, 148, 251, 93, 131, + 94, 59, 22, 185, 201, 57, 201, 188, + 147, 152, 57, 66, 44, 122, 94, 145, + 73, 249, 231, 71, 123, 61, 153, 29, + 213, 181, 67, 0, 56, 78, 63, 255, + 82, 195, 80, 155, 18, 162, 182, 102, + 108, 50, 134, 78, 205, 114, 246, 245, + 89, 181, 112, 140, 175, 191, 212, 165, + 110, 240, 54, 202, 198, 35, 166, 5, + 65, 87, 17, 218, 19, 221, 154, 45, + 197, 254, 65, 109, 232, 70, 215, 33, + 26, 2, 73, 197, 2, 156, 185, 142, + 67, 134, 135, 192, 14, 78, 77, 160, + 99, 180, 79, 98, 4, 187, 33, 141, + 192, 70, 149, 98, 213, 203, 193, 27, + 208, 65, 205, 125, 60, 16, 182, 37, + 21, 75, 22, 220, 0, 166, 172, 238, + 70, 87, 50, 70, 35, 190, 235, 177, + 176, 241, 95, 71, 142, 102, 135, 162, + 164, 238, 179, 181, 81, 10, 152, 220, + 98, 234, 170, 185, 7, 84, 244, 88, + 12, 91, 190, 194, 126, 159, 45, 238, + 52, 202, 45, 2, 206, 144, 171, 124, + 189, 139, 8, 69, 86, 13, 50, 72, + 148, 170, 135, 135, 46, 218, 201, 15, + 102, 153, 223, 3, 193, 173, 94, 15, + 0, 95, 167, 53, 155, 34, 197, 106, + 88, 11, 192, 18, 28, 181, 145, 244, + 222, 137, 66, 73, 158, 147, 235, 247, + 83, 17, 212, 82, 241, 31, 13, 66, + 12, 57, 60, 10, 155, 70, 195, 128, + 12, 21, 90, 177, 190, 241, 57, 206, + 121, 0, 135, 181, 144, 89, 104, 207, + 104, 72, 75, 13, 187, 26, 41, 42, + 138, 49, 102, 1, 36, 234, 84, 172, + 183, 120, 138, 167, 92, 238, 226, 193, + 74, 141, 214, 117, 8, 243, 234, 62, + 79, 35, 117, 103, 135, 148, 215, 227, + 28, 89, 99, 254, 69, 8, 137, 149, + 170, 5, 182, 117, 102, 160, 111, 232, + 232, 112, 37, 182, 15, 120, 72, 177, + 249, 69, 83, 14, 40, 81, 123, 6, + 55, 157, 159, 196, 174, 2, 174, 102, + 222, 105, 16, 108, 91, 62, 255, 74, + 215, 174, 35, 43, 30, 9, 72, 151, + 187, 49, 153, 32, 181, 140, 112, 141, + 230, 73, 72, 142, 150, 31, 180, 95, + 100, 26, 144, 246, 151, 6, 239, 215, + 71, 109, 35, 51, 172, 244, 165, 159, + 229, 56, 70, 111, 193, 60, 67, 122, + 23, 183, 123, 41, 43, 218, 65, 32, + 137, 153, 6, 97, 159, 159, 233, 193, + 111, 147, 190, 221, 230, 47, 198, 130, + 180, 77, 110, 35, 176, 32, 173, 148, + 221, 38, 180, 75, 107, 32, 127, 227, + 254, 142, 133, 29, 35, 19, 234, 50, + 160, 196, 248, 164, 153, 63, 222, 196, + 252, 67, 178, 115, 176, 243, 110, 134, + 61, 184, 226, 14, 233, 42, 74, 212, + 110, 116, 214, 118, 22, 0, 193, 49, + 196, 130, 96, 71, 118, 61, 191, 115, + 192, 47, 83, 3, 36, 209, 101, 67, + 106, 31, 106, 214, 246, 117, 89, 87, + 230, 108, 137, 173, 192, 171, 222, 126, + 66, 58, 223, 120, 184, 151, 91, 88, + 155, 78, 194, 114, 102, 212, 90, 152, + 81, 51, 65, 42, 85, 159, 116, 226, + 86, 45, 164, 186, 186, 124, 173, 114, + 245, 85, 156, 18, 79, 15, 130, 67, + 114, 197, 201, 237, 191, 37, 105, 211, + 243, 94, 52, 42, 159, 249, 81, 56, + 164, 46, 220, 157, 72, 39, 165, 232, + 35, 3, 123, 52, 203, 38, 126, 26, + 104, 42, 157, 4, 217, 51, 204, 29, + 80, 146, 188, 17, 177, 37, 8, 95, + 140, 49, 235, 166, 34, 208, 67, 56, + 141, 42, 61, 141, 156, 31, 99, 213, + 155, 100, 82, 17, 55, 160, 116, 104, + 198, 250, 37, 197, 190, 15, 71, 236, + 27, 247, 149, 222, 5, 171, 147, 183, + 186, 54, 106, 53, 92, 219, 245, 94, + 137, 39, 43, 5, 56, 5, 34, 114, + 4, 193, 211, 133, 171, 179, 18, 158, + 207, 187, 97, 132, 85, 152, 209, 94, + 137, 199, 84, 241, 16, 115, 73, 229, + 74, 156, 174, 229, 134, 250, 98, 41, + 36, 73, 14, 205, 221, 36, 17, 44, + 36, 185, 151, 156, 71, 219, 146, 76, + 130, 236, 34, 126, 90, 79, 174, 56, + 96, 140, 145, 202, 207, 241, 99, 104, + 41, 252, 129, 44, 224, 242, 145, 97, + 28, 126, 3, 88, 241, 194, 33, 170, + 113, 198, 183, 199, 59, 132, 105, 179, + 80, 254, 228, 106, 101, 200, 241, 21, + 95, 109, 59, 24, 61, 78, 123, 159, + 89, 240, 140, 212, 175, 65, 142, 16, + 253, 31, 158, 248, 72, 247, 48, 144, + 28, 173, 119, 70, 55, 155, 3, 44, + 41, 171, 216, 184, 170, 59, 157, 185, + 56, 59, 148, 133, 71, 104, 19, 133, + 76, 3, 203, 6, 139, 245, 169, 249, + 248, 220, 71, 173, 117, 103, 125, 220, + 74, 133, 158, 219, 42, 165, 69, 158, + 142, 27, 239, 159, 225, 111, 128, 126, + 158, 61, 53, 126, 118, 166, 54, 83, + 0, 119, 190, 245, 144, 148, 193, 234, + 150, 110, 38, 209, 13, 170, 100, 156, + 215, 107, 241, 56, 161, 181, 59, 135, + 138, 86, 92, 232, 221, 134, 128, 120, + 85, 156, 74, 191, 39, 164, 129, 204, + 82, 240, 203, 246, 155, 225, 127, 13, + 41, 25, 184, 154, 10, 138, 9, 167, + 229, 27, 153, 16, 182, 237, 64, 64, + 184, 118, 108, 253, 145, 82, 61, 211, + 66, 104, 58, 71, 242, 86, 242, 202, + 54, 40, 97, 2, 184, 243, 123, 5, + 91, 184, 160, 126, 5, 133, 253, 83, + 240, 58, 249, 33, 198, 71, 20, 102, + 86, 34, 24, 180, 149, 20, 34, 76, + 101, 30, 184, 194, 77, 87, 255, 228, + 255, 152, 169, 95, 77, 141, 206, 135, + 253, 106, 104, 249, 76, 138, 94, 160, + 9, 67, 139, 125, 211, 198, 145, 199, + 239, 80, 83, 12, 0, 123, 128, 220, + 149, 54, 181, 186, 63, 61, 144, 128, + 187, 181, 214, 156, 228, 248, 94, 181, + 215, 240, 165, 58, 79, 114, 190, 36, + 66, 251, 190, 11, 98, 97, 69, 69, + 221, 134, 230, 51, 193, 143, 22, 20, + 127, 231, 225, 46, 184, 22, 182, 191, + 3, 142, 11, 223, 165, 54, 254, 238, + 63, 147, 159, 159, 26, 155, 120, 14, + 68, 249, 180, 243, 49, 194, 67, 254, + 179, 137, 38, 10, 2, 97, 22, 238, + 223, 132, 191, 14, 129, 64, 100, 167, + 162, 96, 108, 207, 49, 119, 188, 154, + 32, 7, 59, 252, 140, 163, 183, 55, + 30, 0, 46, 230, 253, 180, 116, 119, + 6, 17, 240, 150, 204, 203, 185, 249, + 140, 44, 204, 231, 131, 251, 10, 79, + 72, 252, 240, 34, 228, 39, 37, 216, + 97, 135, 146, 148, 246, 12, 251, 218, + 94, 29, 44, 174, 238, 83, 250, 157, + 253, 105, 57, 106, 225, 157, 55, 88, + 95, 155, 151, 35, 198, 126, 182, 213, + 213, 3, 234, 232, 156, 17, 137, 143, + 161, 146, 40, 245, 192, 122, 115, 0, + 44, 249, 224, 99, 95, 105, 184, 1, + 254, 238, 16, 245, 28, 65, 25, 123, + 3, 149, 42, 32, 44, 39, 2, 96, + 126, 171, 89, 72, 155, 150, 51, 49, + 154, 212, 62, 31, 189, 244, 77, 173, + 72, 223, 3, 202, 73, 255, 212, 170, + 173, 152, 128, 29, 46, 183, 71, 232, + 122, 163, 152, 88, 211, 70, 71, 116, + 109, 77, 177, 16, 121, 49, 50, 49, + 31, 48, 38, 66, 131, 157, 25, 28, + 177, 220, 252, 41, 81, 83, 180, 50, + 222, 56, 128, 28, 179, 230, 24, 179, + 135, 197, 228, 162, 150, 227, 145, 217, + 184, 188, 135, 208, 208, 165, 79, 252, + 148, 21, 50, 97, 24, 96, 73, 195, + 102, 254, 87, 42, 113, 185, 45, 155, + 233, 154, 170, 35, 85, 136, 185, 217, + 10, 48, 114, 246, 147, 172, 201, 123, + 87, 84, 125, 206, 34, 214, 8, 231, + 31, 160, 189, 112, 87, 111, 34, 169, + 110, 83, 245, 140, 112, 1, 218, 147, + 80, 215, 168, 120, 29, 109, 105, 254, + 20, 70, 167, 192, 33, 106, 45, 148, + 147, 235, 22, 135, 65, 110, 10, 243, + 141, 56, 92, 177, 57, 243, 204, 214, + 6, 121, 111, 3, 176, 121, 245, 76, + 160, 30, 236, 15, 229, 238, 213, 244, + 148, 81, 194, 25, 137, 171, 85, 195, + 23, 13, 154, 10, 12, 230, 122, 202, + 162, 74, 195, 225, 78, 183, 182, 203, + 17, 185, 122, 155, 5, 51, 200, 92, + 71, 93, 229, 38, 149, 160, 147, 33, + 89, 181, 103, 161, 148, 97, 55, 62, + 184, 39, 43, 219, 85, 74, 151, 56, + 86, 67, 82, 56, 38, 251, 240, 133, + 215, 153, 179, 60, 231, 60, 0, 24, + 37, 191, 202, 214, 189, 55, 2, 165, + 240, 179, 148, 226, 154, 81, 28, 45, + 231, 97, 253, 2, 54, 254, 90, 162, + 255, 229, 11, 161, 65, 213, 246, 80, + 5, 109, 14, 163, 4, 60, 123, 51, + 91, 134, 98, 183, 2, 154, 211, 42, + 109, 192, 248, 31, 26, 11, 144, 103, + 0, 179, 239, 215, 20, 20, 44, 82, + 18, 220, 179, 112, 168, 171, 80, 64, + 244, 136, 106, 5, 86, 114, 160, 135, + 233, 230, 233, 31, 30, 120, 26, 26, + 255, 11, 173, 238, 195, 186, 10, 16, + 126, 140, 47, 52, 112, 235, 30, 121, + 0, 98, 26, 29, 183, 138, 181, 35, + 227, 220, 251, 22, 33, 177, 25, 26, + 205, 189, 149, 169, 189, 234, 61, 79, + 44, 223, 79, 248, 163, 244, 53, 41, + 177, 28, 33, 119, 234, 138, 18, 252, + 227, 204, 236, 10, 130, 157, 183, 183, + 194, 111, 94, 34, 221, 231, 248, 118, + 3, 51, 103, 215, 195, 226, 92, 92, + 191, 217, 246, 174, 57, 238, 17, 245, + 209, 205, 228, 5, 183, 209, 235, 185, + 118, 12, 181, 115, 94, 155, 235, 23, + 246, 70, 62, 226, 214, 12, 53, 231, + 3, 37, 157, 135, 18, 36, 33, 4, + 208, 189, 199, 74, 231, 159, 86, 25, + 137, 232, 10, 231, 207, 199, 62, 65, + 116, 219, 179, 119, 89, 181, 18, 209, + 170, 161, 79, 137, 119, 136, 126, 80, + 29, 2, 8, 192, 145, 124, 53, 172, + 184, 110, 225, 63, 219, 198, 221, 212, + 26, 89, 59, 18, 30, 84, 59, 63, + 100, 1, 137, 155, 192, 225, 229, 182, + 115, 58, 133, 108, 12, 99, 125, 6, + 238, 249, 225, 176, 120, 182, 248, 108, + 72, 252, 115, 204, 130, 148, 102, 17, + 178, 2, 139, 3, 140, 10, 90, 120, + 122, 130, 66, 211, 80, 134, 50, 235, + 89, 59, 122, 86, 28, 250, 206, 233, + 67, 127, 145, 176, 4, 64, 127, 228, + 229, 111, 10, 202, 172, 146, 72, 188, + 247, 124, 233, 246, 89, 214, 221, 204, + 198, 167, 88, 208, 135, 128, 237, 53, + 50, 165, 114, 244, 137, 240, 1, 180, + 182, 66, 69, 210, 220, 55, 175, 41, + 172, 239, 195, 19, 153, 204, 183, 17, + 76, 199, 29, 58, 52, 3, 237, 48, + 175, 65, 242, 247, 55, 183, 155, 128, + 240, 250, 197, 114, 4, 77, 9, 1, + 126, 104, 94, 184, 142, 108, 57, 255, + 166, 254, 207, 87, 215, 196, 250, 44, + 209, 67, 56, 194, 178, 179, 104, 30, + 97, 167, 121, 86, 141, 60, 102, 19, + 2, 197, 217, 115, 63, 247, 8, 84, + 28, 58, 116, 169, 173, 154, 203, 122, + 188, 174, 166, 221, 148, 47, 176, 160, + 155, 97, 211, 215, 36, 46, 48, 174, + 22, 117, 45, 188, 40, 97, 96, 7, + 6, 213, 44, 3, 200, 194, 238, 191, + 3, 60, 254, 176, 100, 204, 235, 76, + 244, 110, 196, 82, 143, 245, 9, 12, + 210, 171, 30, 93, 84, 93, 178, 206, + 8, 125, 39, 212, 111, 58, 181, 114, + 33, 199, 165, 58, 105, 26, 187, 87, + 184, 139, 99, 136, 182, 230, 149, 172, + 33, 78, 10, 51, 149, 246, 253, 3, + 217, 5, 9, 210, 148, 130, 66, 70, + 130, 128, 49, 149, 97, 77, 153, 142, + 252, 193, 19, 162, 152, 161, 173, 127, + 43, 73, 167, 252, 89, 11, 218, 227, + 97, 136, 93, 205, 8, 190, 48, 82, + 26, 191, 249, 99, 126, 58, 145, 73, + 213, 56, 192, 119, 94, 244, 160, 193, + 15, 26, 78, 227, 217, 215, 218, 180, + 186, 195, 150, 42, 173, 240, 54, 185, + 57, 107, 0, 98, 175, 73, 216, 212, + 149, 168, 75, 227, 132, 50, 178, 221, + 39, 207, 203, 37, 49, 11, 239, 80, + 217, 55, 4, 13, 203, 252, 79, 105, + 41, 35, 134, 5, 63, 209, 26, 240, + 41, 234, 97, 192, 180, 84, 21, 37, + 64, 142, 113, 75, 34, 253, 177, 107, + 47, 197, 240, 157, 141, 196, 125, 183, + 34, 35, 133, 53, 127, 87, 44, 193, + 106, 181, 153, 29, 80, 2, 224, 8, + 216, 164, 201, 251, 6, 246, 70, 32, + 87, 92, 105, 53, 50, 129, 234, 20, + 55, 190, 195, 3, 212, 239, 223, 9, + 243, 84, 21, 201, 29, 51, 89, 154, + 40, 154, 229, 8, 5, 182, 33, 80, + 22, 6, 163, 49, 246, 115, 43, 78, + 113, 247, 45, 172, 4, 48, 242, 93, + 19, 172, 202, 26, 29, 254, 7, 223, + 131, 76, 71, 78, 69, 139, 172, 3, + 96, 202, 0, 50, 179, 158, 178, 234, + 168, 108, 111, 68, 51, 19, 28, 15, + 100, 121, 67, 97, 148, 238, 136, 177, + 76, 50, 58, 63, 245, 23, 104, 126, + 132, 40, 90, 80, 196, 239, 62, 175, + 167, 212, 129, 133, 181, 168, 5, 24, + 197, 143, 170, 199, 198, 205, 172, 47, + 124, 196, 18, 88, 228, 144, 148, 244, + 191, 191, 241, 165, 68, 247, 225, 138, + 246, 102, 170, 222, 241, 14, 30, 130, + 252, 64, 161, 54, 36, 173, 95, 172, + 222, 25, 88, 78, 102, 206, 76, 209, + 249, 83, 164, 104, 88, 150, 70, 238, + 194, 67, 201, 127, 39, 45, 70, 11, + 155, 69, 13, 211, 161, 77, 125, 249, + 189, 208, 40, 12, 156, 49, 38, 229, + 164, 150, 59, 127, 118, 88, 226, 216, + 62, 233, 199, 185, 200, 230, 105, 102, + 166, 71, 125, 162, 80, 176, 92, 58, + 83, 172, 251, 97, 47, 123, 77, 70, + 154, 63, 167, 0, 151, 222, 204, 142, + 210, 156, 27, 67, 112, 182, 194, 93, + 162, 176, 132, 37, 115, 240, 233, 167, + 119, 160, 172, 73, 122, 160, 133, 42, + 192, 251, 123, 241, 73, 44, 4, 67, + 44, 244, 174, 118, 92, 198, 44, 210, + 26, 152, 58, 139, 59, 151, 210, 38, + 210, 205, 46, 94, 218, 39, 110, 9, + 72, 240, 240, 136, 102, 51, 194, 148, + 49, 76, 143, 0, 182, 121, 214, 121, + 41, 174, 211, 70, 54, 32, 199, 63, + 223, 139, 212, 79, 239, 117, 159, 96, + 91, 215, 200, 18, 62, 67, 134, 179, + 167, 85, 203, 40, 239, 27, 238, 9, + 161, 220, 103, 162, 57, 11, 50, 4, + 210, 1, 95, 57, 96, 206, 215, 32, + 16, 1, 137, 240, 35, 229, 122, 171, + 247, 135, 135, 62, 183, 142, 7, 49, + 223, 179, 250, 48, 81, 24, 87, 54, + 194, 151, 230, 214, 76, 236, 76, 168, + 127, 72, 90, 153, 220, 99, 22, 190, + 19, 223, 8, 247, 19, 2, 11, 173, + 137, 240, 146, 204, 216, 10, 15, 225, + 227, 66, 124, 220, 171, 131, 163, 180, + 181, 62, 46, 81, 54, 177, 92, 83, + 219, 98, 161, 88, 230, 238, 32, 0, + 179, 173, 222, 47, 72, 160, 215, 153, + 49, 24, 239, 59, 39, 116, 28, 155, + 227, 62, 215, 180, 24, 46, 237, 0, + 224, 233, 224, 244, 246, 2, 175, 56, + 41, 188, 136, 97, 107, 123, 93, 64, + 130, 254, 219, 135, 11, 175, 99, 24, + 86, 133, 215, 14, 191, 27, 111, 74, + 173, 78, 166, 141, 123, 156, 156, 80, + 253, 220, 12, 84, 244, 204, 102, 151, + 176, 159, 218, 2, 118, 146, 45, 17, + 79, 39, 219, 244, 35, 16, 17, 241, + 218, 187, 175, 166, 168, 88, 145, 186, + 118, 255, 96, 204, 71, 164, 229, 103, + 102, 66, 201, 213, 132, 231, 255, 86, + 220, 179, 193, 128, 156, 11, 85, 2, + 80, 247, 133, 1, 157, 57, 137, 135, + 99, 111, 196, 185, 133, 235, 131, 51, + 210, 173, 175, 38, 184, 230, 247, 70, + 110, 74, 62, 97, 113, 130, 116, 78, + 10, 186, 96, 9, 98, 243, 174, 37, + 36, 133, 82, 154, 63, 36, 140, 243, + 53, 255, 212, 88, 64, 64, 151, 115, + 38, 232, 104, 4, 16, 101, 104, 185, + 177, 54, 55, 212, 14, 152, 31, 131, + 242, 183, 112, 245, 225, 100, 151, 106, + 23, 199, 237, 165, 140, 131, 202, 56, + 130, 192, 34, 147, 22, 138, 217, 227, + 158, 255, 8, 107, 94, 12, 50, 86, + 220, 47, 201, 9, 45, 186, 173, 226, + 226, 182, 15, 80, 144, 39, 155, 193, + 169, 18, 23, 40, 141, 246, 176, 97, + 151, 207, 163, 177, 73, 105, 236, 223, + 150, 6, 252, 221, 65, 217, 67, 91, + 34, 15, 181, 65, 196, 143, 199, 74, + 11, 45, 192, 214, 96, 58, 29, 188, + 187, 195, 47, 141, 154, 204, 35, 0, + 47, 249, 3, 48, 234, 152, 122, 92, + 19, 35, 115, 4, 44, 199, 136, 50, + 69, 93, 133, 19, 10, 186, 27, 179, + 130, 38, 216, 34, 139, 120, 87, 238, + 245, 241, 207, 17, 234, 46, 138, 172, + 188, 113, 178, 118, 6, 205, 24, 35, + 80, 17, 231, 72, 130, 160, 93, 24, + 220, 11, 152, 51, 255, 35, 35, 83, + 76, 79, 128, 107, 3, 126, 219, 238, + 18, 134, 138, 183, 126, 7, 58, 127, + 221, 99, 119, 129, 60, 88, 11, 142, + 180, 140, 174, 58, 178, 10, 248, 238, + 223, 174, 192, 170, 217, 99, 16, 204, + 61, 239, 102, 108, 58, 82, 118, 198, + 215, 191, 8, 139, 44, 137, 161, 125, + 136, 33, 84, 84, 119, 154, 237, 58, + 138, 11, 118, 122, 248, 211, 194, 213, + 91, 230, 157, 27, 34, 92, 220, 186, + 30, 149, 23, 83, 172, 184, 70, 251, + 135, 54, 113, 36, 46, 39, 21, 245, + 164, 100, 14, 232, 76, 92, 41, 102, + 86, 188, 41, 100, 183, 45, 243, 203, + 138, 146, 29, 74, 211, 116, 242, 122, + 156, 240, 69, 188, 87, 68, 127, 10, + 21, 140, 6, 255, 210, 149, 107, 198, + 173, 75, 102, 137, 230, 195, 126, 156, + 49, 73, 157, 73, 1, 72, 67, 203, + 2, 115, 152, 198, 238, 4, 249, 157, + 1, 16, 249, 69, 162, 203, 49, 135, + 68, 110, 210, 137, 182, 170, 117, 255, + 146, 176, 250, 206, 66, 52, 175, 76, + 61, 130, 62, 150, 218, 90, 100, 121, + 5, 12, 11, 222, 115, 222, 165, 82, + 157, 4, 142, 117, 57, 183, 83, 133, + 207, 108, 182, 183, 255, 67, 14, 16, + 132, 28, 227, 209, 213, 207, 108, 110, + 126, 119, 189, 95, 42, 91, 227, 40, + 150, 104, 241, 168, 82, 199, 199, 90, + 10, 5, 211, 22, 75, 251, 71, 132, + 7, 70, 220, 183, 17, 118, 239, 245, + 1, 13, 235, 94, 61, 227, 54, 211, + 216, 103, 221, 22, 205, 33, 167, 118, + 226, 152, 80, 80, 147, 162, 178, 55, + 83, 55, 8, 222, 174, 26, 136, 7, + 127, 60, 155, 197, 33, 5, 45, 195, + 44, 29, 198, 24, 224, 167, 1, 12, + 18, 230, 253, 72, 68, 139, 16, 24, + 94, 58, 242, 4, 122, 106, 96, 97, + 111, 90, 185, 246, 217, 15, 227, 188, + 36, 1, 23, 229, 6, 173, 36, 6, + 159, 240, 64, 212, 118, 41, 96, 180, + 235, 244, 211, 129, 156, 37, 45, 172, + 232, 132, 74, 107, 113, 158, 97, 142, + 171, 113, 138, 106, 18, 20, 33, 51, + 26, 23, 95, 163, 47, 64, 88, 183, + 241, 228, 232, 98, 204, 44, 142, 253, + 88, 17, 8, 226, 242, 214, 146, 183, + 184, 208, 181, 188, 106, 142, 149, 53, + 37, 101, 58, 176, 218, 59, 240, 220, + 208, 164, 38, 195, 232, 22, 194, 171, + 48, 122, 230, 87, 245, 87, 229, 145, + 3, 142, 248, 10, 30, 64, 115, 142, + 165, 5, 169, 217, 25, 113, 41, 27, + 255, 231, 74, 22, 67, 210, 208, 40, + 57, 65, 35, 21, 235, 126, 53, 238, + 190, 115, 47, 153, 40, 189, 242, 23, + 125, 184, 104, 67, 126, 110, 74, 27, + 192, 231, 170, 147, 169, 108, 23, 71, + 194, 168, 255, 245, 77, 50, 196, 200, + 86, 78, 89, 120, 184, 44, 186, 96, + 101, 14, 231, 1, 115, 156, 183, 182, + 158, 232, 255, 66, 20, 229, 13, 70, + 136, 171, 193, 173, 43, 97, 79, 14, + 129, 177, 75, 115, 48, 34, 58, 184, + 112, 217, 28, 155, 10, 85, 113, 50, + 25, 195, 86, 0, 108, 131, 203, 141, + 54, 53, 43, 120, 171, 112, 56, 142, + 221, 55, 175, 104, 149, 80, 176, 21, + 36, 12, 13, 128, 29, 212, 139, 41, + 17, 17, 83, 104, 77, 91, 161, 41, + 213, 151, 68, 111, 209, 33, 47, 176, + 98, 173, 32, 81, 116, 175, 103, 215, + 177, 205, 105, 116, 201, 59, 109, 134, + 74, 161, 161, 13, 145, 93, 235, 33, + 86, 130, 250, 166, 22, 78, 220, 186, + 241, 161, 10, 159, 239, 159, 181, 217, + 229, 243, 116, 145, 101, 240, 26, 44, + 61, 145, 249, 71, 162, 68, 110, 67, + 219, 31, 143, 96, 129, 177, 97, 196, + 113, 146, 227, 88, 7, 110, 70, 247, + 197, 46, 162, 108, 168, 21, 156, 230, + 135, 40, 54, 199, 36, 15, 49, 135, + 10, 4, 171, 193, 15, 236, 166, 152, + 57, 68, 227, 211, 114, 40, 1, 231, + 219, 79, 224, 69, 54, 80, 125, 186, + 75, 69, 141, 48, 116, 227, 39, 2, + 33, 176, 17, 147, 68, 166, 106, 219, + 110, 82, 170, 177, 31, 101, 93, 34, + 81, 243, 96, 8, 30, 186, 160, 40, + 81, 135, 78, 115, 131, 180, 60, 70, + 75, 246, 184, 199, 180, 91, 243, 45, + 113, 85, 40, 155, 195, 197, 173, 136, + 215, 183, 253, 52, 133, 2, 188, 8, + 78, 219, 11, 128, 99, 138, 140, 173, + 94, 112, 3, 71, 237, 88, 52, 162, + 244, 158, 80, 111, 213, 51, 85, 166, + 154, 250, 3, 33, 220, 125, 165, 246, + 126, 205, 64, 196, 120, 181, 251, 71, + 62, 246, 190, 114, 205, 193, 238, 96, + 181, 221, 121, 60, 2, 175, 56, 15, + 199, 197, 249, 127, 129, 62, 70, 148, + 112, 123, 252, 95, 233, 118, 36, 131, + 243, 246, 61, 43, 131, 183, 90, 78, + 237, 61, 173, 131, 182, 11, 178, 76, + 71, 75, 109, 73, 198, 108, 99, 225, + 174, 239, 179, 44, 225, 221, 37, 99, + 90, 24, 138, 88, 25, 8, 104, 30, + 251, 116, 177, 180, 100, 156, 172, 115, + 57, 51, 178, 51, 113, 184, 77, 189, + 57, 53, 149, 126, 245, 25, 156, 144, + 134, 196, 239, 115, 43, 133, 212, 194, + 255, 173, 48, 230, 242, 164, 241, 56, + 131, 241, 58, 1, 110, 209, 179, 98, + 81, 5, 50, 19, 241, 22, 122, 212, + 236, 119, 207, 233, 241, 90, 120, 116, + 233, 155, 79, 179, 79, 252, 111, 169, + 220, 142, 193, 51, 236, 58, 248, 49, + 103, 252, 123, 113, 139, 39, 184, 62, + 2, 242, 102, 145, 23, 236, 174, 173, + 90, 139, 113, 100, 8, 249, 50, 182, + 167, 225, 227, 81, 34, 214, 56, 138, + 143, 194, 214, 199, 222, 88, 45, 26, + 145, 97, 74, 60, 151, 16, 132, 110, + 9, 89, 12, 92, 88, 200, 113, 78, + 220, 158, 210, 190, 249, 241, 35, 138, + 135, 3, 116, 255, 39, 223, 29, 32, + 19, 121, 11, 35, 15, 189, 107, 198, + 81, 195, 39, 47, 41, 91, 18, 185, + 155, 126, 207, 242, 200, 1, 139, 27, + 221, 179, 123, 90, 178, 224, 250, 139, + 236, 55, 116, 11, 27, 160, 14, 24, + 113, 126, 218, 51, 252, 110, 188, 153, + 55, 9, 200, 193, 178, 214, 96, 232, + 235, 96, 95, 135, 102, 132, 165, 184, + 50, 62, 97, 113, 47, 154, 96, 178, + 117, 156, 204, 245, 81, 99, 28, 183, + 54, 5, 247, 192, 193, 77, 104, 69, + 249, 116, 207, 129, 98, 92, 232, 213, + 12, 128, 140, 167, 72, 86, 111, 224, + 94, 57, 109, 105, 215, 147, 45, 100, + 110, 55, 248, 171, 129, 226, 202, 182, + 22, 118, 253, 99, 232, 141, 70, 120, + 182, 24, 138, 185, 84, 180, 103, 220, + 121, 69, 58, 140, 239, 12, 195, 249, + 255, 247, 184, 121, 198, 47, 116, 110, + 227, 178, 52, 150, 243, 219, 176, 189, + 62, 202, 114, 187, 17, 129, 97, 192, + 249, 102, 207, 167, 59, 104, 204, 59, + 114, 107, 23, 152, 123, 70, 253, 19, + 137, 134, 234, 210, 96, 166, 30, 213, + 238, 120, 50, 134, 59, 162, 126, 247, + 61, 119, 3, 243, 255, 195, 189, 188, + 180, 108, 230, 172, 219, 80, 191, 162, + 85, 137, 32, 19, 239, 160, 93, 156, + 103, 218, 149, 167, 40, 137, 73, 67, + 170, 122, 33, 92, 196, 145, 205, 64, + 171, 194, 91, 215, 29, 26, 46, 184, + 63, 41, 252, 92, 3, 33, 247, 230, + 94, 144, 23, 82, 244, 115, 107, 168, + 32, 35, 23, 22, 218, 151, 83, 8, + 116, 90, 7, 227, 52, 243, 150, 235, + 117, 149, 169, 152, 57, 150, 51, 154, + 116, 9, 176, 216, 98, 172, 239, 154, + 20, 53, 146, 87, 233, 182, 246, 162, + 101, 192, 152, 182, 208, 255, 183, 246, + 32, 29, 122, 125, 159, 150, 124, 219, + 108, 131, 213, 202, 61, 168, 81, 113, + 149, 172, 195, 157, 52, 136, 144, 5, + 95, 103, 74, 126, 113, 8, 243, 104, + 254, 167, 64, 121, 16, 67, 221, 82, + 91, 12, 229, 71, 244, 227, 125, 146, + 199, 89, 177, 154, 80, 71, 233, 78, + 15, 168, 94, 47, 46, 230, 221, 254, + 27, 149, 18, 178, 72, 197, 161, 13, + 145, 103, 49, 111, 24, 105, 218, 111, + 28, 223, 124, 177, 57, 202, 207, 47, + 150, 224, 95, 208, 216, 204, 53, 51, + 218, 27, 148, 164, 232, 197, 23, 115, + 127, 100, 172, 160, 132, 2, 148, 92, + 182, 103, 1, 82, 153, 131, 210, 226, + 138, 232, 23, 70, 44, 10, 8, 35, + 185, 204, 126, 199, 140, 45, 59, 205, + 52, 102, 214, 238, 87, 50, 162, 190, + 158, 27, 204, 6, 209, 161, 208, 103, + 71, 166, 119, 80, 29, 82, 133, 96, + 123, 16, 181, 157, 99, 122, 238, 109, + 210, 127, 32, 164, 167, 60, 152, 79, + 182, 184, 10, 164, 39, 250, 220, 102, + 79, 103, 173, 218, 228, 237, 16, 202, + 150, 21, 220, 105, 151, 211, 160, 213, + 59, 17, 0, 88, 138, 45, 236, 138, + 166, 115, 122, 75, 236, 189, 36, 108, + 19, 138, 219, 249, 75, 209, 50, 174, + 190, 116, 17, 116, 239, 221, 75, 30, + 157, 189, 98, 9, 70, 223, 46, 228, + 156, 167, 75, 115, 109, 74, 177, 0, + 104, 22, 240, 213, 194, 211, 157, 52, + 73, 38, 143, 39, 250, 154, 111, 171, + 189, 189, 22, 161, 206, 186, 69, 235, + 95, 217, 36, 17, 206, 243, 95, 114, + 253, 217, 210, 30, 239, 33, 208, 142, + 3, 20, 137, 120, 86, 161, 191, 93, + 26, 125, 135, 205, 172, 218, 191, 92, + 3, 79, 194, 48, 122, 43, 44, 148, + 170, 155, 113, 51, 7, 164, 217, 35, + 73, 217, 0, 250, 148, 4, 175, 109, + 43, 65, 226, 177, 107, 177, 157, 252, + 213, 250, 11, 218, 205, 44, 159, 156, + 117, 71, 101, 85, 119, 71, 214, 217, + 238, 119, 240, 71, 232, 168, 6, 33, + 158, 37, 243, 160, 123, 58, 150, 154, + 233, 171, 219, 86, 130, 174, 67, 238, + 137, 250, 46, 53, 218, 179, 214, 32, + 249, 249, 244, 136, 141, 61, 170, 213, + 23, 249, 170, 22, 200, 101, 97, 55, + 50, 61, 24, 230, 19, 178, 78, 196, + 12, 113, 199, 62, 134, 92, 54, 36, + 156, 140, 211, 188, 101, 108, 141, 43, + 81, 69, 229, 96, 155, 50, 204, 182, + 98, 61, 148, 22, 197, 8, 247, 128, + 123, 170, 223, 186, 109, 68, 100, 93, + 87, 75, 212, 97, 158, 73, 31, 54, + 48, 219, 242, 186, 32, 130, 185, 236, + 41, 66, 40, 59, 238, 60, 1, 13, + 127, 70, 133, 11, 103, 157, 193, 94, + 234, 190, 123, 225, 77, 218, 6, 88, + 157, 131, 228, 127, 177, 126, 52, 150, + 212, 104, 126, 68, 76, 67, 196, 64, + 234, 202, 132, 242, 54, 154, 248, 79, + 154, 110, 208, 111, 184, 216, 14, 63, + 27, 14, 200, 233, 107, 37, 17, 59, + 125, 166, 226, 208, 13, 15, 28, 155, + 225, 102, 113, 217, 118, 56, 150, 129, + 64, 188, 157, 235, 197, 204, 37, 195, + 70, 42, 170, 91, 217, 13, 163, 119, + 224, 95, 163, 240, 51, 248, 56, 35, + 237, 114, 100, 154, 53, 45, 124, 23, + 133, 86, 197, 125, 85, 100, 164, 191, + 206, 150, 127, 235, 16, 33, 93, 219, + 129, 100, 53, 67, 82, 110, 10, 235, + 82, 196, 157, 20, 77, 228, 101, 166, + 98, 0, 235, 177, 126, 163, 102, 173, + 216, 130, 221, 183, 196, 104, 224, 192, + 32, 195, 179, 231, 223, 24, 59, 41, + 155, 255, 154, 207, 252, 120, 143, 21, + 107, 49, 175, 4, 105, 14, 206, 156, + 51, 178, 158, 174, 208, 46, 9, 139, + 239, 37, 104, 186, 41, 51, 31, 113, + 54, 211, 231, 53, 25, 127, 37, 136, + 136, 116, 37, 163, 71, 173, 91, 51, + 181, 147, 74, 15, 119, 88, 25, 57, + 253, 176, 152, 119, 143, 203, 244, 144, + 144, 42, 249, 246, 111, 255, 20, 128, + 178, 97, 102, 207, 221, 172, 72, 123, + 46, 204, 123, 76, 122, 131, 14, 254, + 35, 140, 71, 112, 164, 195, 53, 107, + 63, 39, 92, 118, 245, 27, 164, 45, + 161, 199, 106, 177, 95, 186, 238, 163, + 55, 129, 144, 8, 96, 122, 179, 177, + 97, 249, 113, 1, 205, 193, 82, 226, + 12, 6, 253, 108, 107, 128, 1, 179, + 20, 122, 74, 40, 212, 29, 152, 198, + 147, 14, 90, 213, 88, 103, 101, 137, + 21, 93, 206, 114, 54, 108, 216, 23, + 63, 155, 18, 7, 35, 199, 244, 150, + 93, 200, 121, 217, 147, 129, 37, 92, + 222, 110, 119, 216, 82, 6, 183, 25, + 19, 132, 134, 83, 21, 103, 73, 86, + 93, 90, 199, 51, 179, 181, 105, 126, + 248, 67, 108, 64, 93, 246, 188, 80, + 94, 185, 142, 231, 78, 180, 62, 84, + 177, 127, 242, 41, 149, 110, 134, 197, + 97, 115, 123, 158, 102, 91, 241, 78, + 22, 144, 105, 253, 127, 164, 1, 223, + 77, 197, 157, 240, 247, 174, 200, 219, + 96, 231, 58, 79, 183, 1, 87, 180, + 15, 214, 9, 189, 115, 220, 91, 83, + 151, 3, 68, 162, 152, 85, 165, 4, + 189, 76, 51, 130, 55, 117, 202, 123, + 251, 238, 23, 173, 27, 161, 102, 200, + 59, 182, 85, 187, 22, 8, 86, 109, + 253, 103, 100, 227, 136, 137, 104, 182, + 123, 25, 9, 0, 175, 119, 83, 179, + 155, 213, 37, 221, 222, 53, 234, 250, + 208, 218, 152, 12, 233, 68, 152, 47, + 51, 119, 25, 177, 6, 172, 176, 110, + 186, 238, 113, 168, 30, 232, 100, 95, + 77, 101, 18, 45, 207, 54, 254, 58, + 241, 70, 2, 25, 33, 120, 229, 227, + 74, 175, 146, 27, 164, 12, 194, 62, + 87, 96, 97, 16, 136, 219, 143, 42, + 255, 37, 2, 224, 22, 1, 251, 204, + 167, 63, 76, 53, 122, 18, 66, 117, + 236, 6, 183, 190, 106, 27, 137, 68, + 51, 164, 77, 107, 84, 184, 24, 101, + 202, 221, 11, 218, 16, 15, 73, 59, + 130, 132, 158, 191, 55, 29, 0, 75, + 250, 141, 168, 76, 89, 28, 90, 177, + 18, 115, 131, 11, 231, 118, 160, 160, + 198, 200, 169, 192, 193, 188, 136, 48, + 112, 188, 242, 108, 126, 192, 54, 35, + 41, 225, 160, 11, 38, 176, 244, 39, + 204, 25, 132, 216, 145, 169, 15, 218, + 183, 194, 157, 174, 189, 7, 67, 197, + 73, 231, 167, 223, 252, 253, 72, 66, + 208, 120, 197, 30, 59, 149, 71, 89, + 204, 80, 92, 67, 185, 90, 251, 193, + 138, 51, 244, 181, 114, 251, 43, 155, + 87, 73, 181, 52, 245, 43, 79, 120, + 90, 250, 5, 43, 220, 208, 248, 196, + 221, 98, 59, 204, 118, 133, 95, 22, + 217, 118, 36, 226, 233, 44, 242, 59, + 35, 203, 170, 166, 163, 236, 46, 254, + 119, 60, 91, 150, 44, 115, 204, 153, + 233, 69, 137, 67, 157, 153, 90, 228, + 24, 12, 194, 52, 47, 90, 245, 77, + 150, 76, 128, 118, 162, 241, 105, 196, + 190, 195, 239, 203, 156, 149, 89, 55, + 154, 214, 163, 25, 158, 253, 20, 237, + 99, 136, 106, 84, 129, 115, 175, 210, + 158, 72, 239, 147, 127, 174, 172, 36, + 96, 188, 83, 127, 242, 191, 88, 66, + 135, 17, 84, 242, 139, 230, 202, 227, + 240, 178, 230, 21, 111, 101, 178, 73, + 149, 22, 140, 46, 31, 137, 77, 12, + 207, 191, 139, 39, 189, 22, 78, 233, + 191, 98, 123, 25, 23, 43, 24, 124, + 4, 110, 194, 67, 182, 101, 56, 215, + 31, 15, 162, 34, 208, 125, 161, 2, + 191, 18, 145, 132, 68, 156, 222, 102, + 120, 204, 191, 75, 49, 252, 223, 207, + 129, 104, 125, 237, 82, 5, 78, 227, + 249, 134, 181, 212, 94, 172, 184, 136, + 71, 211, 251, 184, 206, 29, 6, 198, + 40, 164, 190, 213, 1, 26, 150, 154, + 9, 203, 15, 198, 44, 101, 60, 92, + 107, 14, 48, 0, 126, 32, 34, 225, + 244, 134, 10, 79, 235, 202, 49, 169, + 118, 53, 128, 178, 174, 142, 94, 224, + 72, 197, 179, 5, 10, 88, 60, 54, + 188, 113, 70, 165, 81, 10, 146, 218, + 173, 168, 96, 47, 76, 83, 25, 66, + 231, 165, 123, 125, 151, 45, 200, 209, + 157, 173, 115, 159, 4, 65, 157, 8, + 22, 71, 72, 198, 230, 9, 235, 223, + 101, 112, 191, 171, 118, 167, 81, 199, + 253, 126, 48, 223, 109, 204, 172, 244, + 186, 109, 115, 126, 215, 19, 73, 6, + 120, 190, 99, 181, 191, 81, 44, 217, + 129, 226, 17, 94, 178, 204, 15, 246, + 155, 23, 148, 44, 89, 34, 243, 145, + 62, 177, 81, 86, 151, 52, 60, 83, + 154, 226, 169, 144, 153, 133, 100, 202, + 58, 250, 165, 27, 194, 20, 219, 216, + 87, 135, 103, 213, 161, 78, 66, 253, + 107, 222, 93, 52, 72, 146, 152, 17, + 207, 51, 233, 168, 250, 38, 0, 129, + 100, 117, 212, 134, 82, 98, 88, 244, + 11, 160, 204, 38, 72, 60, 206, 12, + 190, 15, 102, 253, 49, 110, 194, 93, + 64, 233, 122, 19, 153, 253, 200, 2, + 252, 162, 189, 128, 148, 112, 73, 160, + 40, 143, 100, 6, 84, 151, 149, 0, + 223, 60, 113, 185, 75, 228, 245, 197, + 248, 226, 138, 133, 172, 172, 46, 146, + 7, 220, 98, 181, 23, 112, 100, 112, + 16, 221, 3, 76, 137, 87, 100, 34, + 50, 152, 149, 199, 54, 248, 86, 150, + 128, 250, 14, 167, 164, 109, 111, 108, + 14, 204, 76, 224, 80, 154, 58, 98, + 242, 87, 93, 178, 73, 222, 223, 190, + 251, 108, 37, 113, 85, 74, 16, 9, + 235, 118, 251, 167, 84, 130, 20, 28, + 248, 91, 17, 41, 153, 253, 109, 126, + 91, 95, 172, 53, 140, 241, 19, 69, + 222, 116, 60, 114, 107, 193, 87, 215, + 210, 224, 135, 44, 153, 9, 117, 132, + 80, 156, 125, 206, 104, 162, 5, 247, + 79, 172, 95, 169, 136, 103, 38, 33, + 141, 178, 36, 121, 196, 212, 221, 200, + 62, 58, 226, 54, 185, 205, 233, 226, + 61, 78, 119, 17, 14, 124, 250, 85, + 181, 97, 150, 35, 20, 40, 110, 76, + 193, 253, 111, 219, 156, 244, 204, 158, + 127, 6, 51, 204, 213, 75, 207, 31, + 188, 57, 8, 112, 19, 24, 16, 95, + 12, 107, 21, 157, 4, 42, 75, 217, + 140, 176, 41, 238, 194, 159, 104, 167, + 226, 197, 252, 181, 130, 108, 79, 141, + 219, 83, 101, 115, 239, 234, 63, 245, + 86, 237, 17, 38, 78, 188, 9, 202, + 200, 56, 19, 176, 165, 114, 17, 144, + 150, 201, 150, 108, 183, 134, 166, 98, + 156, 164, 20, 39, 64, 80, 176, 189, + 40, 62, 219, 223, 10, 86, 47, 188, + 108, 150, 132, 70, 230, 79, 247, 218, + 159, 155, 80, 211, 64, 143, 28, 248, + 76, 177, 37, 20, 254, 62, 52, 138, + 120, 137, 176, 254, 187, 197, 144, 88, + 144, 164, 84, 250, 108, 125, 13, 164, + 110, 5, 113, 40, 175, 85, 183, 84, + 248, 12, 52, 116, 197, 118, 51, 92, + 154, 117, 85, 95, 181, 229, 161, 14, + 164, 41, 112, 87, 167, 158, 120, 23, + 179, 3, 214, 22, 166, 194, 187, 7, + 184, 221, 242, 241, 48, 100, 239, 103, + 241, 161, 160, 91, 33, 177, 10, 154, + 63, 148, 142, 250, 120, 133, 42, 153, + 158, 15, 56, 231, 60, 244, 72, 64, + 77, 129, 246, 188, 51, 102, 195, 93, + 211, 40, 136, 62, 35, 197, 212, 120, + 162, 18, 105, 17, 175, 40, 64, 243, + 246, 205, 228, 138, 77, 8, 16, 200, + 166, 153, 138, 187, 31, 14, 117, 103, + 8, 168, 4, 37, 215, 225, 124, 187, + 79, 222, 216, 80, 214, 1, 154, 57, + 72, 128, 103, 164, 152, 224, 32, 110, + 239, 230, 163, 214, 60, 255, 93, 48, + 89, 225, 31, 67, 9, 221, 86, 248, + 10, 116, 133, 53, 93, 158, 145, 136, + 86, 58, 197, 19, 28, 44, 245, 156, + 53, 192, 123, 154, 168, 30, 133, 142, + 54, 59, 97, 56, 26, 151, 83, 162, + 128, 89, 170, 128, 130, 28, 86, 158, + 31, 135, 43, 195, 164, 197, 51, 35, + 9, 173, 131, 192, 192, 29, 78, 167, + 137, 169, 236, 246, 211, 41, 33, 44, + 161, 39, 93, 187, 89, 234, 115, 201, + 3, 201, 221, 249, 37, 26, 182, 236, + 172, 39, 194, 107, 137, 15, 157, 211, + 15, 112, 169, 196, 91, 174, 81, 210, + 44, 214, 87, 217, 246, 76, 235, 11, + 146, 190, 130, 38, 235, 31, 66, 76, + 249, 125, 61, 254, 27, 106, 18, 155, + 68, 49, 39, 251, 36, 70, 115, 20, + 60, 153, 85, 174, 153, 12, 213, 217, + 162, 127, 121, 158, 185, 112, 92, 9, + 49, 243, 94, 232, 247, 148, 104, 120, + 233, 146, 87, 178, 97, 179, 134, 178, + 136, 224, 185, 176, 253, 232, 243, 134, + 68, 198, 237, 217, 248, 59, 135, 129, + 255, 61, 59, 87, 193, 211, 111, 180, + 230, 14, 9, 45, 116, 231, 252, 56, + 210, 39, 214, 111, 123, 80, 41, 204, + 76, 197, 100, 30, 142, 235, 244, 37, + 25, 120, 96, 88, 237, 85, 206, 183, + 74, 161, 84, 182, 105, 239, 161, 42, + 10, 196, 117, 114, 91, 79, 214, 26, + 225, 206, 167, 160, 219, 99, 228, 227, + 32, 92, 179, 116, 72, 184, 109, 83, + 97, 106, 152, 12, 243, 240, 41, 251, + 35, 249, 105, 228, 53, 94, 43, 119, + 61, 162, 192, 78, 58, 46, 84, 110, +}; int main() { - printf ("%lu\n", random_data [rand() % - (sizeof (random_data) / - sizeof (random_data [0]))]); + long size = sizeof (random_data) / sizeof (random_data[0]); + printf ("%d\n", random_data [size - 1]); } diff --git a/gdb/testsuite/gdb.base/remote.exp b/gdb/testsuite/gdb.base/remote.exp index 70e97cfc8b3..1d9dea25039 100644 --- a/gdb/testsuite/gdb.base/remote.exp +++ b/gdb/testsuite/gdb.base/remote.exp @@ -125,19 +125,44 @@ proc gdb_load_timed {executable downloadsize class writesize} { pass $test } - - gdb_load_timed $binfile {} "" {} -# Typically about 400 bytes can be downloaded -gdb_load_timed $binfile 0 "limit" 399 -gdb_load_timed $binfile 0 "limit" 401 - -# fall back to the default -gdb_load_timed $binfile 0 "limit" 0 +# Typically about 400-1 bytes can be downloaded +gdb_load_timed $binfile 0 "limit" 398 +gdb_load_timed $binfile 0 "limit" 400 # Absolute max is 16384 gdb_load_timed $binfile 0 "fixed" 0 gdb_load_timed $binfile 0 "fixed" 16385 +# fall back to the default +gdb_load_timed $binfile 0 "limit" 0 + + +# +# Part THREE: Check the upload behavour +# + +# Carefully check memory around each of the most common packet edge +# conditions + +gdb_test "x/8ub random_data" \ + "<random_data>:\[ \t\]+60\[ \t\]+74\[ \t\]+216\[ \t\]+38\[ \t\]+149\[ \t\]+49\[ \t\]+207\[ \t\]+44" + +gdb_test "x/8ub random_data + 400 - 4" \ + "<random_data\\+396>:\[ \t\]+185\[ \t\]+255\[ \t\]+50\[ \t\]+140\[ \t\]+237\[ \t\]+172\[ \t\]+143\[ \t\]+93" + +gdb_test "x/8ub random_data + 16384 - 4" \ + "<random_data\\+16380>:\[ \t\]+178\[ \t\]+180\[ \t\]+135\[ \t\]+93\[ \t\]+70\[ \t\]+62\[ \t\]+205\[ \t\]+76" + + +# Read a chunk just larger than the packet size (reduce the packet +# size to make life easier) +gdb_test "set remote memory-read-packet-size 16" \ + "" +gdb_test "show remote memory-read-packet-size" \ + "The memory-read-packet-size is 16. Packets are limited to 16 bytes." +gdb_test "x/17ub random_data" \ + "<random_data>:\[ \t\]+60\[ \t\]+74\[ \t\]+216\[ \t\]+38\[ \t\]+149\[ \t\]+49\[ \t\]+207\[ \t\]+44.*<random_data\\+8>:\[ \t\]+124\[ \t\]+38\[ \t\]+93\[ \t\]+125\[ \t\]+232\[ \t\]+67\[ \t\]+228\[ \t\]+56.*<random_data\\+16>:\[ \t\]+161" + gdb_exit diff --git a/gdb/testsuite/gdb.base/step-test.exp b/gdb/testsuite/gdb.base/step-test.exp index c8232cbe120..903700e540c 100644 --- a/gdb/testsuite/gdb.base/step-test.exp +++ b/gdb/testsuite/gdb.base/step-test.exp @@ -194,7 +194,10 @@ test_i "nexti over function" "nexti" \ # right behavior for GDB or not, but we'll catch it here, so folks # won't forget about it. -send_gdb "break [gdb_get_line_number "step-test.exp: large struct by value"]\n" +gdb_test \ + "break [gdb_get_line_number "step-test.exp: large struct by value"]" \ + ".*Breakpoint.* at .*" \ + "set breakpoint at call to large_struct_by_value" gdb_test "continue" \ ".*Breakpoint ${decimal},.*large_struct_by_value.*" \ "run to pass large struct" diff --git a/gdb/testsuite/gdb.base/watchpoint.exp b/gdb/testsuite/gdb.base/watchpoint.exp index 608bebeea0c..6be4e34b367 100644 --- a/gdb/testsuite/gdb.base/watchpoint.exp +++ b/gdb/testsuite/gdb.base/watchpoint.exp @@ -233,22 +233,37 @@ Continuing.*\[Ww\]atchpoint.*ival3.*Old value = -1.*New value = 0.*ival3 = count eof { fail "watchpoint hit, first time (eof)" ; return } } + # Check that the hit count is reported correctly + gdb_test "info break" ".*watchpoint\[ \t\]+keep\[ \t\]+y\[ \t\]+ival3\r\n\[ \t]+breakpoint already hit 1 time.*" "Watchpoint hit count is 1" + gdb_test "delete \$func1_breakpoint_number" "" # Continue until the next change, from 0 to 1. gdb_test "cont" "Continuing.*\[Ww\]atchpoint.*ival3.*Old value = 0.*New value = 1.*ival3 = count; ival4 = count;.*" "watchpoint hit, second time" + # Check that the hit count is reported correctly + gdb_test "info break" ".*watchpoint\[ \t\]+keep\[ \t\]+y\[ \t\]+ival3\r\n\[ \t]+breakpoint already hit 2 times.*" "Watchpoint hit count is 2" + # Continue until the next change, from 1 to 2. gdb_test "cont" "Continuing.*\[Ww\]atchpoint.*ival3.*Old value = 1.*New value = 2.*ival3 = count; ival4 = count;.*" "watchpoint hit, third time" + + # Check that the hit count is reported correctly + gdb_test "info break" ".*watchpoint\[ \t\]+keep\[ \t\]+y\[ \t\]+ival3\r\n\[ \t]+breakpoint already hit 3 times.*" "Watchpoint hit count is 3" # Continue until the next change, from 2 to 3. gdb_test "cont" "Continuing.*\[Ww\]atchpoint.*ival3.*Old value = 2.*New value = 3.*ival3 = count; ival4 = count;.*" "watchpoint hit, fourth time" + # Check that the hit count is reported correctly + gdb_test "info break" ".*watchpoint\[ \t\]+keep\[ \t\]+y\[ \t\]+ival3\r\n\[ \t]+breakpoint already hit 4 times.*" "Watchpoint hit count is 4" + # Continue until the next change, from 3 to 4. # Note that this one is outside the loop. gdb_test "cont" "Continuing.*\[Ww\]atchpoint.*ival3.*Old value = 3.*New value = 4.*ival3 = count; ival4 = count;.*" "watchpoint hit, fifth time" + # Check that the hit count is reported correctly + gdb_test "info break" ".*watchpoint\[ \t\]+keep\[ \t\]+y\[ \t\]+ival3\r\n\[ \t]+breakpoint already hit 5 times.*" "Watchpoint hit count is 5" + # Continue until we hit the finishing marker function. # Make sure we hit no more watchpoints. diff --git a/gdb/testsuite/gdb.c++/classes.exp b/gdb/testsuite/gdb.c++/classes.exp index 91a0400d47e..3189e5ca36e 100644 --- a/gdb/testsuite/gdb.c++/classes.exp +++ b/gdb/testsuite/gdb.c++/classes.exp @@ -1,4 +1,4 @@ -# Copyright (C) 1992, 1994, 1995, 1997 Free Software Foundation, Inc. +# Copyright (C) 1992, 1994, 1995, 1997, 1999 Free Software Foundation, Inc. # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -328,10 +328,13 @@ proc test_ptype_class_objects {} { # for now, but with a FIXME. At some future point, gdb should use a # portable representation for the virtual table constructs. + # The format of a g++ virtual base pointer. + set vbptr "(_vb\[$.\]|__vb_)\[0-9\]?" + setup_xfail_format "DWARF 1" send_gdb "ptype class vB\n" gdb_expect { - -re "type = class vB : public virtual vA \{${ws}private:${ws}vA \\*_vb.vA;${ws}public:${ws}int vb;${ws}int vx;${ws}vB & operator=\\(vB const &\\);${ws}vB\\(int, vB const &\\);${ws}vB\\(int\\);${ws}\}$nl$gdb_prompt $" { + -re "type = class vB : public virtual vA \{${ws}private:${ws}vA \\*${vbptr}vA;${ws}public:${ws}int vb;${ws}int vx;${ws}vB & operator=\\(vB const &\\);${ws}vB\\(int, vB const &\\);${ws}vB\\(int\\);${ws}\}$nl$gdb_prompt $" { setup_xfail "*-*-*" fail "ptype class vB (FIXME: non-portable virtual table constructs)" } @@ -358,7 +361,7 @@ proc test_ptype_class_objects {} { setup_xfail_format "DWARF 1" send_gdb "ptype class vC\n" gdb_expect { - -re "type = class vC : public virtual vA \{${ws}private:${ws}vA \\*_vb.vA;${ws}public:${ws}int vc;${ws}int vx;${ws}vC & operator=\\(vC const &\\);${ws}vC\\(int, vC const &\\);${ws}vC\\(int\\);${ws}\}$nl$gdb_prompt $" { + -re "type = class vC : public virtual vA \{${ws}private:${ws}vA \\*${vbptr}vA;${ws}public:${ws}int vc;${ws}int vx;${ws}vC & operator=\\(vC const &\\);${ws}vC\\(int, vC const &\\);${ws}vC\\(int\\);${ws}\}$nl$gdb_prompt $" { setup_xfail "*-*-*" fail "ptype class vC (FIXME: non-portable virtual table constructs)" } @@ -385,7 +388,7 @@ proc test_ptype_class_objects {} { setup_xfail_format "DWARF 1" send_gdb "ptype class vD\n" gdb_expect { - -re "type = class vD : public virtual vB, public virtual vC \{${ws}private:${ws}vC \\*_vb.vC;${ws}vB \\*_vb.vB;${ws}public:${ws}int vd;${ws}int vx;${ws}vD & operator=\\(vD const &\\);${ws}vD\\(int, vD const &\\);${ws}vD\\(int\\);${ws}\}$nl$gdb_prompt $" { + -re "type = class vD : public virtual vB, public virtual vC \{${ws}private:${ws}vC \\*${vbptr}vC;${ws}vB \\*${vbptr}vB;${ws}public:${ws}int vd;${ws}int vx;${ws}vD & operator=\\(vD const &\\);${ws}vD\\(int, vD const &\\);${ws}vD\\(int\\);${ws}\}$nl$gdb_prompt $" { setup_xfail "*-*-*" fail "ptype class vD (FIXME: non-portable virtual table constructs)" } @@ -412,7 +415,7 @@ proc test_ptype_class_objects {} { setup_xfail_format "DWARF 1" send_gdb "ptype class vE\n" gdb_expect { - -re "type = class vE : public virtual vD \{${ws}private:${ws}vD \\*_vb.vD;${ws}public:${ws}int ve;${ws}int vx;${ws}vE & operator=\\(vE const &\\);${ws}vE\\(int, vE const &\\);${ws}vE\\(int\\);${ws}\}$nl$gdb_prompt $" { + -re "type = class vE : public virtual vD \{${ws}private:${ws}vD \\*${vbptr}vD;${ws}public:${ws}int ve;${ws}int vx;${ws}vE & operator=\\(vE const &\\);${ws}vE\\(int, vE const &\\);${ws}vE\\(int\\);${ws}\}$nl$gdb_prompt $" { setup_xfail "*-*-*" fail "ptype class vE (FIXME: non-portable virtual table constructs)" } @@ -456,7 +459,7 @@ proc test_ptype_class_objects {} { -re "type = class Foo \{${ws}public:${ws}int x;${ws}int y;${ws}static int st;\r\n${ws}Foo\\(int, int\\);${ws}int operator!.void.;${ws}operator int.void.;${ws}int times.int.;$nl\}$nl$gdb_prompt $" { pass "ptype class Foo(aCC)" } - -re "type = class Foo \{${ws}public:${ws}int x;${ws}int y;${ws}static int st;${ws}Foo & operator=\\(Foo const &\\);${ws}Foo\\(Foo const &\\);${ws}Foo\\(int, int\\);${ws}int operator!\\(void\\);${ws}int operator int\\(void\\);${ws}int times\\(int\\);${ws}\}$nl$gdb_prompt $" { + -re "type = class Foo \{${ws}public:${ws}int x;${ws}int y;${ws}static int st;${ws}Foo & operator=\\(Foo const &\\);${ws}Foo\\(Foo const &\\);${ws}Foo\\(int, int\\);${ws}int operator!\\(void\\);${ws}operator int\\(void\\);${ws}int times\\(int\\);${ws}\}$nl$gdb_prompt $" { pass "ptype class Foo" } -re "type = class Foo \{${ws}public:${ws}int x;${ws}int y;${ws}static int st;((${ws}Foo & operator=\\(Foo const &\\);)|(${ws}Foo\\(Foo const &\\);)|(${ws}Foo\\(int, int\\);)|(${ws}int operator!\\(void\\);)|(${ws}int operator int\\(void\\);)|(${ws}int times\\(int\\);))*${ws}\}$nl$gdb_prompt $" { @@ -828,11 +831,12 @@ gdb_expect { } # ptype on the enum member -# The second success case is a little dubious, but it's not clear what +# The third success case is a little dubious, but it's not clear what # ought to be required of a ptype on a private enum... -sts 19990324 send_gdb "ptype obj_with_enum.priv_enum\n" gdb_expect { -re "type = enum ClassWithEnum::PrivEnum \\{red, green, blue, yellow = 42\\}.*$gdb_prompt $" { pass "ptype obj_with_enum.priv_enum" } + -re "type = enum PrivEnum \\{red, green, blue, yellow = 42\\}.*$gdb_prompt $" { pass "ptype obj_with_enum.priv_enum" } -re "type = enum \\{red, green, blue, yellow = 42\\}.*$gdb_prompt $" { pass "ptype obj_with_enum.priv_enum" } -re "$gdb_prompt $" { fail "ptype obj_with_enum.priv_enum" } timeout { fail "(timeout) ptype obj_with_enum.priv_enum" } diff --git a/gdb/testsuite/gdb.c++/derivation.exp b/gdb/testsuite/gdb.c++/derivation.exp index 3a4a3076707..0185ce6774b 100644 --- a/gdb/testsuite/gdb.c++/derivation.exp +++ b/gdb/testsuite/gdb.c++/derivation.exp @@ -120,7 +120,7 @@ gdb_expect { if {$gcc_compiled} then { send_gdb "ptype d_instance\n" gdb_expect { - -re "type = class D : private A, public B, private C \{\r\n\[\t \]*public:\r\n\[\t \]*int d;\r\n\[\t \]*int dd;\[\r\n\t ]+D & operator=\\(D const &\\);\[\r\n\t ]+D\\(D const &\\);\[\r\n\t \]+D\\(void\\);\r\n\[\t \]*int dfoo\\(void\\);\r\n\[\t \]*int foo\\(void\\);\r\n\}.*$gdb_prompt $" { pass "ptype d_instance" } + -re "type = class D : private A, public B, (protected|private) C \{\r\n\[\t \]*public:\r\n\[\t \]*int d;\r\n\[\t \]*int dd;\[\r\n\t ]+D & operator=\\(D const &\\);\[\r\n\t ]+D\\(D const &\\);\[\r\n\t \]+D\\(void\\);\r\n\[\t \]*int dfoo\\(void\\);\r\n\[\t \]*int foo\\(void\\);\r\n\}.*$gdb_prompt $" { pass "ptype d_instance" } -re "type = class D : private A, public B, private C \{\r\n\[\t \]*public:\r\n\[\t \]*int d;\r\n\[\t \]*int dd;\[\r\n\t \]+D\\(void\\);\r\n\[\t \]*int dfoo\\(void\\);\r\n\[\t \]*int foo\\(void\\);\r\n\}.*$gdb_prompt $" { pass "ptype d_instance" } -re ".*$gdb_prompt $" { fail "ptype d_instance" } timeout { fail "(timeout) ptype d_instance" } @@ -150,7 +150,7 @@ gdb_expect { if {$gcc_compiled} { send_gdb "ptype e_instance\n" gdb_expect { - -re "type = class E : public A, private B, private C \{\r\n\[\t \]*public:\r\n\[\t \]*int e;\r\n\[\t \]*int ee;\[\r\n\t ]+E & operator=\\(E const &\\);\[\r\n\t ]+E\\(E const &\\);\[\r\n\t \]+E\\(void\\);\r\n\[\t \]*int efoo\\(void\\);\r\n\[\t \]*int foo\\(void\\);\r\n\}.*$gdb_prompt $" { pass "ptype e_instance" } + -re "type = class E : public A, private B, (protected|private) C \{\r\n\[\t \]*public:\r\n\[\t \]*int e;\r\n\[\t \]*int ee;\[\r\n\t ]+E & operator=\\(E const &\\);\[\r\n\t ]+E\\(E const &\\);\[\r\n\t \]+E\\(void\\);\r\n\[\t \]*int efoo\\(void\\);\r\n\[\t \]*int foo\\(void\\);\r\n\}.*$gdb_prompt $" { pass "ptype e_instance" } -re "type = class E : public A, private B, private C \{\r\n\[\t \]*public:\r\n\[\t \]*int e;\r\n\[\t \]*int ee;\[\r\n\t \]+E\\(void\\);\r\n\[\t \]*int efoo\\(void\\);\r\n\[\t \]*int foo\\(void\\);\r\n\}.*$gdb_prompt $" { pass "ptype e_instance" } -re ".*$gdb_prompt $" { fail "ptype e_instance" } timeout { fail "(timeout) ptype e_instance" } diff --git a/gdb/testsuite/gdb.c++/inherit.exp b/gdb/testsuite/gdb.c++/inherit.exp index e39b12a3eb7..8ab930237bf 100644 --- a/gdb/testsuite/gdb.c++/inherit.exp +++ b/gdb/testsuite/gdb.c++/inherit.exp @@ -1,4 +1,4 @@ -# Copyright (C) 1992, 1993, 1994, 1997 Free Software Foundation, Inc. +# Copyright (C) 1992, 1993, 1994, 1997, 1999 Free Software Foundation, Inc. # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -22,6 +22,9 @@ set ws "\[\r\n\t \]+" set nl "\[\r\n\]+" +# The format of a g++ virtual base pointer. +set vbptr "(_vb\[$.\]|__vb_)\[0-9\]?" + if $tracelevel then { strace $tracelevel } @@ -575,6 +578,7 @@ proc test_ptype_vi {} { global gdb_prompt global ws global nl + global vbptr # This class does not use any C++-specific features, so it's fine for # it to print as "struct". @@ -621,7 +625,7 @@ proc test_ptype_vi {} { setup_xfail_format "DWARF 1" send_gdb "ptype vB\n" gdb_expect { - -re "ptype vB${nl}type = class vB : public virtual vA \{$nl private:${ws}vA \[*\]+_vb\[\\\$\.\]+vA;$nl public:${ws}int vb;${ws}int vx;$nl.*\}$nl$gdb_prompt $" { + -re "ptype vB${nl}type = class vB : public virtual vA \{$nl private:${ws}vA \\*${vbptr}vA;$nl public:${ws}int vb;${ws}int vx;$nl.*\}$nl$gdb_prompt $" { pass "ptype vB" } -re "ptype vB${nl}type = class vB : public virtual vA \{$nl public:${ws}int vb;${ws}int vx;$nl.*\}$nl$gdb_prompt $" { @@ -634,7 +638,7 @@ proc test_ptype_vi {} { setup_xfail_format "DWARF 1" send_gdb "ptype class vB\n" gdb_expect { - -re "type = class vB : public virtual vA \{$nl\[ \]*private:$nl\[ \]*vA \[*\]+_vb\[\\\$\.\]vA;$nl\[ \]*public:$nl\[ \]*int vb;$nl\[ \]*int vx;$nl.*\}$nl$gdb_prompt $" { + -re "type = class vB : public virtual vA \{$nl\[ \]*private:$nl\[ \]*vA \\*${vbptr}vA;$nl\[ \]*public:$nl\[ \]*int vb;$nl\[ \]*int vx;$nl.*\}$nl$gdb_prompt $" { pass "ptype class vB" } -re "type = class vB : public virtual vA \{$nl\[ \]*public:$nl\[ \]*int vb;$nl\[ \]*int vx;$nl.*\}$nl$gdb_prompt $" { @@ -647,7 +651,7 @@ proc test_ptype_vi {} { setup_xfail_format "DWARF 1" send_gdb "ptype g_vB\n" gdb_expect { - -re "type = class vB : public virtual vA \{$nl\[ \]*private:$nl\[ \]*vA \[*\]+_vb\[\\\$\.\]vA;$nl\[ \]*public:$nl\[ \]*int vb;$nl\[ \]*int vx;$nl.*\}$nl$gdb_prompt $" { + -re "type = class vB : public virtual vA \{$nl\[ \]*private:$nl\[ \]*vA \\*${vbptr}vA;$nl\[ \]*public:$nl\[ \]*int vb;$nl\[ \]*int vx;$nl.*\}$nl$gdb_prompt $" { pass "ptype g_vB" } -re "type = class vB : public virtual vA \{$nl\[ \]*public:$nl\[ \]*int vb;$nl\[ \]*int vx;$nl.*\}$nl$gdb_prompt $" { @@ -660,7 +664,7 @@ proc test_ptype_vi {} { setup_xfail_format "DWARF 1" send_gdb "ptype vC\n" gdb_expect { - -re "type = class vC : public virtual vA \{$nl\[ \]*private:$nl\[ \]*vA \[*\]+_vb\[\\\$\.\]vA;$nl\[ \]*public:$nl\[ \]*int vc;$nl\[ \]*int vx;$nl.*\}$nl$gdb_prompt $" { + -re "type = class vC : public virtual vA \{$nl\[ \]*private:$nl\[ \]*vA \\*${vbptr}vA;$nl\[ \]*public:$nl\[ \]*int vc;$nl\[ \]*int vx;$nl.*\}$nl$gdb_prompt $" { pass "ptype vC" } -re "type = class vC : public virtual vA \{$nl\[ \]*public:$nl\[ \]*int vc;$nl\[ \]*int vx;$nl.*\}$nl$gdb_prompt $" { @@ -673,7 +677,7 @@ proc test_ptype_vi {} { setup_xfail_format "DWARF 1" send_gdb "ptype class vC\n" gdb_expect { - -re "type = class vC : public virtual vA \{$nl\[ \]*private:$nl\[ \]*vA \[*\]+_vb\[\\\$\.\]vA;$nl\[ \]*public:$nl\[ \]*int vc;$nl\[ \]*int vx;$nl.*\}$nl$gdb_prompt $" { + -re "type = class vC : public virtual vA \{$nl\[ \]*private:$nl\[ \]*vA \\*${vbptr}vA;$nl\[ \]*public:$nl\[ \]*int vc;$nl\[ \]*int vx;$nl.*\}$nl$gdb_prompt $" { pass "ptype class vC" } -re "type = class vC : public virtual vA \{$nl\[ \]*public:$nl\[ \]*int vc;$nl\[ \]*int vx;$nl.*\}$nl$gdb_prompt $" { @@ -686,7 +690,7 @@ proc test_ptype_vi {} { setup_xfail_format "DWARF 1" send_gdb "ptype g_vC\n" gdb_expect { - -re "type = class vC : public virtual vA \{$nl\[ \]*private:$nl\[ \]*vA \[*\]+_vb\[\\\$\.\]vA;$nl\[ \]*public:$nl\[ \]*int vc;$nl\[ \]*int vx;$nl.*\}$nl$gdb_prompt $" { + -re "type = class vC : public virtual vA \{$nl\[ \]*private:$nl\[ \]*vA \\*${vbptr}vA;$nl\[ \]*public:$nl\[ \]*int vc;$nl\[ \]*int vx;$nl.*\}$nl$gdb_prompt $" { pass "ptype g_vC" } -re "type = class vC : public virtual vA \{$nl\[ \]*public:$nl\[ \]*int vc;$nl\[ \]*int vx;$nl.*\}$nl$gdb_prompt $" { @@ -706,6 +710,7 @@ proc test_print_svi_classes {} { global hex global decimal global nl + global vbptr # Print all members of g_vA. @@ -722,7 +727,7 @@ proc test_print_svi_classes {} { -re ".* = \{\<class vA\> = \{va = 3, vx = 4\}, vb = 5, vx = 6, __vfp = $hex\}$nl$gdb_prompt $" { pass "print g_vB (aCC)" } - -re ".* = \{\<vA\> = \{va = 3, vx = 4\}, _vb\[\\\$\.\]vA = $hex, vb = 5, vx = 6\}$nl$gdb_prompt $" { + -re ".* = \{\<vA\> = \{va = 3, vx = 4\}, ${vbptr}vA = $hex, vb = 5, vx = 6\}$nl$gdb_prompt $" { pass "print g_vB" } -re ".*invalid address 0x0.*$gdb_prompt $" { @@ -746,7 +751,7 @@ proc test_print_svi_classes {} { -re ".* = \{\<class vA\> = \{va = 7, vx = 8\}, vc = 9, vx = 10, __vfp = $hex\}$nl$gdb_prompt $" { pass "print g_vC (aCC)" } - -re ".* = \{\<vA\> = \{va = 7, vx = 8\}, _vb\[\\\$\.\]vA = $hex, vc = 9, vx = 10\}$nl$gdb_prompt $" { + -re ".* = \{\<vA\> = \{va = 7, vx = 8\}, ${vbptr}vA = $hex, vc = 9, vx = 10\}$nl$gdb_prompt $" { pass "print g_vC" } -re ".*$gdb_prompt $" { fail "print g_vC" } @@ -836,11 +841,12 @@ proc test_ptype_mvi {} { global gdb_prompt global ws global nl + global vbptr setup_xfail_format "DWARF 1" send_gdb "ptype vD\n" gdb_expect { - -re "type = class vD : public virtual vB, public virtual vC \{${ws}private:${ws}vC \[*\]+_vb\[\\\$\.\]vC;${ws}vB \[*\]+_vb\[\\\$\.\]vB;${ws}public:${ws}int vd;${ws}int vx;$nl.*\}.*$gdb_prompt $" { + -re "type = class vD : public virtual vB, public virtual vC \{${ws}private:${ws}vC \\*${vbptr}vC;${ws}vB \\*${vbptr}vB;${ws}public:${ws}int vd;${ws}int vx;$nl.*\}.*$gdb_prompt $" { pass "ptype vD" } -re ".*class vD : public virtual vB, public virtual vC \{${ws}public:${ws}int vd;${ws}int vx;.*\}.*$gdb_prompt $" { @@ -853,7 +859,7 @@ proc test_ptype_mvi {} { setup_xfail_format "DWARF 1" send_gdb "ptype class vD\n" gdb_expect { - -re "type = class vD : public virtual vB, public virtual vC \{${ws}private:${ws}vC \[*\]+_vb\[\\\$\.\]vC;${ws}vB \[*\]+_vb\[\\\$\.\]vB;${ws}public:${ws}int vd;${ws}int vx;$nl.*\}.*$gdb_prompt $" { + -re "type = class vD : public virtual vB, public virtual vC \{${ws}private:${ws}vC \\*${vbptr}vC;${ws}vB \\*${vbptr}vB;${ws}public:${ws}int vd;${ws}int vx;$nl.*\}.*$gdb_prompt $" { pass "ptype class vD" } -re ".*class vD : public virtual vB, public virtual vC \{${ws}public:${ws}int vd;${ws}int vx;.*\}.*$gdb_prompt $" { @@ -866,7 +872,7 @@ proc test_ptype_mvi {} { setup_xfail_format "DWARF 1" send_gdb "ptype g_vD\n" gdb_expect { - -re "type = class vD : public virtual vB, public virtual vC \{${ws}private:${ws}vC \[*\]+_vb\[\\\$\.\]vC;${ws}vB \[*\]+_vb\[\\\$\.\]vB;${ws}public:${ws}int vd;${ws}int vx;$nl.*\}.*$gdb_prompt $" { + -re "type = class vD : public virtual vB, public virtual vC \{${ws}private:${ws}vC \\*${vbptr}vC;${ws}vB \\*${vbptr}vB;${ws}public:${ws}int vd;${ws}int vx;$nl.*\}.*$gdb_prompt $" { pass "ptype g_vD" } -re ".*class vD : public virtual vB, public virtual vC \{${ws}public:${ws}int vd;${ws}int vx;\r\n.*\}.*$gdb_prompt $" { @@ -879,7 +885,7 @@ proc test_ptype_mvi {} { setup_xfail_format "DWARF 1" send_gdb "ptype vE\n" gdb_expect { - -re "type = class vE : public virtual vD \{${ws}private:${ws}vD \[*\]+_vb\[\\\$\.\]vD;${ws}public:${ws}int ve;${ws}int vx;$nl.*\}.*$gdb_prompt $" { + -re "type = class vE : public virtual vD \{${ws}private:${ws}vD \\*${vbptr}vD;${ws}public:${ws}int ve;${ws}int vx;$nl.*\}.*$gdb_prompt $" { pass "ptype vE" } -re ".*class vE : public virtual vD \{${ws}public:${ws}int ve;${ws}int vx;\r\n.*\}.*$gdb_prompt $" { @@ -892,7 +898,7 @@ proc test_ptype_mvi {} { setup_xfail_format "DWARF 1" send_gdb "ptype class vE\n" gdb_expect { - -re "type = class vE : public virtual vD \{${ws}private:${ws}vD \[*\]+_vb\[\\\$\.\]vD;${ws}public:${ws}int ve;${ws}int vx;$nl.*\}.*$gdb_prompt $" { + -re "type = class vE : public virtual vD \{${ws}private:${ws}vD \\*${vbptr}vD;${ws}public:${ws}int ve;${ws}int vx;$nl.*\}.*$gdb_prompt $" { pass "ptype class vE" } -re "type = class vE : public virtual vD \{${ws}public:${ws}int ve;${ws}int vx;\r\n.*\}.*$gdb_prompt $" { @@ -905,7 +911,7 @@ proc test_ptype_mvi {} { setup_xfail_format "DWARF 1" send_gdb "ptype g_vE\n" gdb_expect { - -re "type = class vE : public virtual vD \{${ws}private:${ws}vD \[*\]+_vb\[\\\$\.\]vD;${ws}public:${ws}int ve;${ws}int vx;$nl.*\}.*$gdb_prompt $" { + -re "type = class vE : public virtual vD \{${ws}private:${ws}vD \\*${vbptr}vD;${ws}public:${ws}int ve;${ws}int vx;$nl.*\}.*$gdb_prompt $" { pass "ptype g_vE" } -re "type = class vE : public virtual vD \{${ws}public:${ws}int ve;${ws}int vx;\r\n.*\}.*$gdb_prompt $" { @@ -925,6 +931,7 @@ proc test_print_mvi_classes {} { global hex global decimal global nl + global vbptr # Print all members of g_vD. @@ -937,7 +944,7 @@ proc test_print_mvi_classes {} { -re ".* = \{\<class vB\> = \{\<class vA\> = \{va = 19, vx = 20\}, vb = 21, vx = 22, __vfp = $hex\}, \<class vC\> = \{vc = 23, vx = 24, __vfp = $hex\}, vd = 25, vx = 26, __vfp = $hex\}$nl$gdb_prompt $" { pass "print g_vD (aCC)" } - -re ".* = \{\<vB\> = \{\<vA\> = \{va = 19, vx = 20\}, _vb\[\\\$\.\]vA = $hex, vb = 21, vx = 22\}, \<vC\> = \{_vb\[\\\$\.\]vA = $hex, vc = 23, vx = 24\}, _vb\[\\\$\.\]vC = $hex, _vb\[\\\$\.\]vB = $hex, vd = 25, vx = 26\}$nl$gdb_prompt $" { + -re ".* = \{\<vB\> = \{\<vA\> = \{va = 19, vx = 20\}, ${vbptr}vA = $hex, vb = 21, vx = 22\}, \<vC\> = \{${vbptr}vA = $hex, vc = 23, vx = 24\}, ${vbptr}vC = $hex, ${vbptr}vB = $hex, vd = 25, vx = 26\}$nl$gdb_prompt $" { pass "print g_vD" } -re ".*invalid address 0x0.*$gdb_prompt $" { @@ -961,7 +968,7 @@ proc test_print_mvi_classes {} { -re ".* = \{\<class vD\> = \{\<class vB\> = \{\<class vA\> = \{va = 0, vx = 0\}, vb = 0, vx = 0, __vfp = $hex\}, \<class vC\> = \{vc = 0, vx = 0, __vfp = $hex\}, vd = 0, vx = 0, __vfp = $hex\}, ve = 27, vx = 28, __vfp = $hex\}$nl$gdb_prompt $" { pass "print g_vE (aCC)" } - -re ".* = \{\<vD\> = \{\<vB\> = \{\<vA\> = \{va = 0, vx = 0\}, _vb\[\\\$\.\]vA = $hex, vb = 0, vx = 0\}, \<vC\> = \{_vb\[\\\$\.\]vA = $hex, vc = 0, vx = 0\}, _vb\[\\\$\.\]vC = $hex, _vb\[\\\$\.\]vB = $hex, vd = 0, vx = 0\}, _vb\[\\\$\.\]vD = $hex, ve = 27, vx = 28\}$nl$gdb_prompt $" { + -re ".* = \{\<vD\> = \{\<vB\> = \{\<vA\> = \{va = 0, vx = 0\}, ${vbptr}vA = $hex, vb = 0, vx = 0\}, \<vC\> = \{${vbptr}vA = $hex, vc = 0, vx = 0\}, ${vbptr}vC = $hex, ${vbptr}vB = $hex, vd = 0, vx = 0\}, ${vbptr}vD = $hex, ve = 27, vx = 28\}$nl$gdb_prompt $" { pass "print g_vE" } -re ".*$gdb_prompt $" { fail "print g_vE" } diff --git a/gdb/testsuite/gdb.c++/local.exp b/gdb/testsuite/gdb.c++/local.exp index 6ec777b2713..3730ae99762 100644 --- a/gdb/testsuite/gdb.c++/local.exp +++ b/gdb/testsuite/gdb.c++/local.exp @@ -85,12 +85,15 @@ if {$gcc_compiled} then { setup_xfail "*-*-*" } +# Local classes in g++ get names like "main.1::InnerLocal", just like local +# static variables. Some targets use "___" instead of ".". +set sep "(\[.\]|___)\[0-9\]" + send_gdb "ptype Local\n" gdb_expect { -re "type = class Local \{\r\n\[\t \]*public:\r\n\[\t \]*int loc1;\r\n\r\n\[\t \]*.char loc_foo\\(char\\);\r\n\[\t \]*\}\[\t \]*\\(Local at.*local\\.cc:10\\).*$gdb_prompt $" { pass "ptype Local" } -re "type = class Local \{\r\n\[\t \]*public:\r\n\[\t \]*int loc1;\r\n\r\n\[\t \]*.char loc_foo\\(char\\);\r\n\[\t \]*\}\[\t \]*\\(Local at.*local\\.cc:\[0-9\]*\\).*$gdb_prompt $" { pass "ptype Local (incorrect line number?)" } - -re "type = class Local \{\r\n\[\t \]*public:\r\n\[\t \]*int loc1;\r\n\r\n\[\t \]*Local & Local::operator=\\(foobar__Fi___0::Local const &\\);\r\n\[\t \]*Local::Local\\(foobar__Fi___0::Local const &\\);\r\n\[\t \]*Local::Local\\(void\\);\r\n\[\t \]*char Local::loc_foo\\(char\\);\r\n\[\t \]*\}*.*$gdb_prompt $" { pass "ptype Local" } - -re "type = class Local \{\r\n\[\t \]*public:\r\n\[\t \]*int loc1;\r\n\r\n\[\t \]*Local & Local const &\\);\r\n\[\t \]*Local const &\\);\r\n\[\t \]*Local\\(void\\);\r\n\[\t \]*char loc_foo\\(char\\);\r\n\[\t \]*\}\[\t \]*.*$gdb_prompt $" { pass "ptype Local" } + -re "type = class Local \{\r\n\[\t \]*public:\r\n\[\t \]*int loc1;\r\n\r\n\[\t \]*Local & operator=\\((foobar__Fi${sep}::|)Local const &\\);\r\n\[\t \]*Local\\((foobar__Fi${sep}::|)Local const &\\);\r\n\[\t \]*Local\\(void\\);\r\n\[\t \]*char loc_foo\\(char\\);\r\n\[\t \]*\}*.*$gdb_prompt $" { pass "ptype Local" } -re "type = class Local \{\r\n\[\t \]*public:\r\n\[\t \]*int loc1;\r\n\r\n\[\t \]*char loc_foo\\(char\\);\r\n\[\t \]*\\(Local at.*local\\.cc:\[0-9\]*\\)\r\n\}.*$gdb_prompt $" { pass "ptype Local (aCC)" } -re ".*$gdb_prompt $" { fail "ptype Local" } timeout { fail "(timeout) ptype Local" } @@ -111,8 +114,7 @@ gdb_expect { -re "type = class InnerLocal \{\r\n\[\t \]*public:\r\n\[\t \]*char ilc;\r\n\[\t \]*int \\*ip;\r\n\[\t \]*InnerLocal::NestedInnerLocal nest1;\r\n\r\n\[\t \]*.int il_foo\\(const unsigned char &\\);\r\n\[\t \]*\}\[\t \]*\\(Local at.*local\\.cc:\[0-9\]*\\).*$gdb_prompt $" { pass "ptype InnerLocal (incorrect line number?" } -re "type = class InnerLocal \{\r\n\[\t \]*public:\r\n\[\t \]*char ilc;\r\n\[\t \]*int \\*ip;\r\n\[\t \]*class InnerLocal::NestedInnerLocal nest1;\r\n\r\n\[\t \]*.int il_foo\\(const unsigned char &\\);\r\n\[\t \]*\}\[\t \]*\\(Local at.*local\\.cc:\[0-9\]*\\).*$gdb_prompt $" { pass "ptype InnerLocal (incorrect line number?" } -re "type = class InnerLocal \{\r\n\[\t \]*public:\r\n\[\t \]*char ilc;\r\n\[\t \]*int \\*ip;\r\n\[\t \]*InnerLocal::NestedInnerLocal nest1;\r\n\r\n\[\t \]*.int il_foo\\(unsigned char const &\\);\r\n\[\t \]*\}\[\t \]*\\(Local at.*local\\.cc:36\\).*$gdb_prompt $" { pass "ptype InnerLocal HP aCC" } - -re "type = class InnerLocal \{\r\n\[\t \]*public:\r\n\[\t \]*char ilc;\r\n\[\t \]*int \\*ip;\r\n\[\t \]*NestedInnerLocal nest1;\r\n\r\n\[\t \]*InnerLocal & InnerLocal::operator=\\(main___0::InnerLocal const &\\);\r\n\[\t \]*InnerLocal::InnerLocal\\(main___0::InnerLocal const &\\);\r\n\[\t \]*InnerLocal::InnerLocal\\(void\\);\r\n\[\t \]*int InnerLocal::il_foo\\(unsigned char const &\\);\r\n\*\}\r\n*.*$gdb_prompt $" { pass "ptype InnerLocal" } - -re "type = class InnerLocal \{\r\n\[\t \]*public:\r\n\[\t \]*char ilc;\r\n\[\t \]*int \\*ip;\r\n\[\t \]*NestedInnerLocal nest1;\r\n\r\n\[\t \]*InnerLocal & InnerLocal const &\\);\r\n\[\t \]*InnerLocal const &\\);\r\n\[\t \]*InnerLocal\\(void\\);\r\n\[\t \]*.int il_foo\\(unsigned char const &\\);\r\n\[\t \]*\}\[\t \]*.*$gdb_prompt $" { pass "ptype InnerLocal" } + -re "type = class InnerLocal \{\r\n\[\t \]*public:\r\n\[\t \]*char ilc;\r\n\[\t \]*int \\*ip;\r\n\[\t \]*NestedInnerLocal nest1;\r\n\r\n\[\t \]*InnerLocal & operator=\\((main${sep}::|)InnerLocal const &\\);\r\n\[\t \]*InnerLocal\\((main${sep}::|)InnerLocal const &\\);\r\n\[\t \]*InnerLocal\\(void\\);\r\n\[\t \]*int il_foo\\(unsigned char const &\\);\r\n\*\}\r\n*.*$gdb_prompt $" { pass "ptype InnerLocal" } -re "type = class InnerLocal \{\r\n\[\t \]*public:\r\n\[\t \]*char ilc;\r\n\[\t \]*int \\*ip;\r\n\[\t \]*class InnerLocal4::NestedInnerLocal nest1;\r\n\r\n\[\t \]*int il_foo\\(unsigned char const &\\);\r\n\[\t \]*\\(Local at.*local\.cc:\[0-9\]+\\)\r\n\}.*$gdb_prompt $" { pass "ptype InnerLocal (aCC)" } -re ".*$gdb_prompt $" { fail "ptype InnerLocal" } timeout { fail "(timeout) ptype InnerLocal" } @@ -122,8 +124,7 @@ send_gdb "ptype NestedInnerLocal\n" gdb_expect { -re "type = class InnerLocal::NestedInnerLocal \{\r\n\[\t \]*public:\r\n\[\t \]*int nil;\r\n\r\n\[\t \]*.int nil_foo\\(int\\);\r\n\[\t \]*\}\[\t \]*\\(Local at.*local\\.cc:44\\).*$gdb_prompt $" { pass "ptype NestedInnerLocal" } -re "type = class InnerLocal::NestedInnerLocal \{\r\n\[\t \]*public:\r\n\[\t \]*int nil;\r\n\r\n\[\t \]*.int nil_foo\\(int\\);\r\n\[\t \]*\}\[\t \]*\\(Local at.*local\\.cc:\[0-9\]*\\).*$gdb_prompt $" { pass "ptype NestedInnerLocal (incorrect line number?)" } - -re "type = class NestedInnerLocal \{\r\n\[\t \]*public:\r\n\[\t \]*int nil;\r\n\r\n\[\t \]*NestedInnerLocal & InnerLocal::NestedInnerLocal::operator=\\(main___1::InnerLocal::NestedInnerLocal const &\\);\r\n\[\t \]*InnerLocal::NestedInnerLocal::NestedInnerLocal\\(main___1::InnerLocal::NestedInnerLocal const &\\);\r\n\[\t \]*InnerLocal::NestedInnerLocal::NestedInnerLocal\\(void\\);\r\n\[\t \]*int InnerLocal::NestedInnerLocal::nil_foo\\(int\\);\r\n\}\r\n*.*$gdb_prompt $" { pass "ptype NestedInnerLocal" } - -re "type = class NestedInnerLocal \{\r\n\[\t \]*public:\r\n\[\t \]*int nil;\r\n\r\n\[\t \]*NestedInnerLocal & NestedInnerLocal const &\\);\r\n\[\t \]*NestedInnerLocal const &\\);\r\n\[\t \]*NestedInnerLocal\\(void\\);\r\n\[\t \]*int nil_foo\\(int\\);\r\n\[\t \]*\}\r\n*.*$gdb_prompt $" { pass "ptype NestedInnerLocal" } + -re "type = class NestedInnerLocal \{\r\n\[\t \]*public:\r\n\[\t \]*int nil;\r\n\r\n\[\t \]*NestedInnerLocal & operator=\\((main${sep}::InnerLocal::|)NestedInnerLocal const &\\);\r\n\[\t \]*NestedInnerLocal\\((main${sep}::InnerLocal::|)NestedInnerLocal const &\\);\r\n\[\t \]*NestedInnerLocal\\(void\\);\r\n\[\t \]*int nil_foo\\(int\\);\r\n\}\r\n*.*$gdb_prompt $" { pass "ptype NestedInnerLocal" } -re "No symbol.*in current context.*$gdb_prompt $" { pass "ptype NestedInnerLocal (known aCC limitation)" } -re ".*$gdb_prompt $" { fail "ptype NestedInnerLocal" } timeout { fail "(timeout) ptype NestedInnerLocal" } diff --git a/gdb/testsuite/gdb.c++/virtfunc.exp b/gdb/testsuite/gdb.c++/virtfunc.exp index b023944f951..3e2bbdefd60 100644 --- a/gdb/testsuite/gdb.c++/virtfunc.exp +++ b/gdb/testsuite/gdb.c++/virtfunc.exp @@ -129,18 +129,21 @@ proc test_ptype_of_classes {} { } } + # The format of a g++ virtual base pointer. + set vbptr "(_vb\[$.\]|__vb_)\[0-9\]?" + send_gdb "ptype A\n" gdb_expect { - -re "type = class A : public virtual V \{${ws}private:${ws}V \[*\]+_vb\[\\\$\.\]+V;${ws}int a;${ws}public:${ws}A & operator=\\(A const &\\);${ws}A\\(int, A const &\\);${ws}A\\(int\\);${ws}virtual int f\\(void\\);${ws}\}$nl$gdb_prompt $" { + -re "type = class A : public virtual V \{${ws}private:${ws}V \\*${vbptr}V;${ws}int a;${ws}public:${ws}A & operator=\\(A const &\\);${ws}A\\(int, A const &\\);${ws}A\\(int\\);${ws}virtual int f\\(void\\);${ws}\}$nl$gdb_prompt $" { pass "ptype A" } -re "type = class A : public virtual V \{${ws}private:${ws}int a;${ws}public:${ws}virtual int f\\(void\\);${ws}\}$nl$gdb_prompt $" { pass "ptype A (aCC)" } - -re "type = class A : public virtual V \{${ws}private:${ws}V \[*\]+_vb\[\\\$\.\]+V;${ws}int a;${ws}public:((${ws}A & operator=\\(A const &\\);)|(${ws}A\\(int, A const &\\);)|(${ws}A\\(int\\);)|(${ws}virtual int f\\(void\\);))*${ws}\}$nl$gdb_prompt $" { + -re "type = class A : public virtual V \{${ws}private:${ws}V \\*${vbptr}V;${ws}int a;${ws}public:((${ws}A & operator=\\(A const &\\);)|(${ws}A\\(int, A const &\\);)|(${ws}A\\(int\\);)|(${ws}virtual int f\\(void\\);))*${ws}\}$nl$gdb_prompt $" { pass "ptype A (obsolescent gcc or gdb)" } - -re "type = class A : public virtual V \{${ws}private:${ws}V \[*\]+_vb.FOO;${ws}int a;${ws}public:${ws}virtual int f.void.;${ws}\}$nl$gdb_prompt $" { + -re "type = class A : public virtual V \{${ws}private:${ws}V \\*${vbptr}FOO;${ws}int a;${ws}public:${ws}virtual int f.void.;${ws}\}$nl$gdb_prompt $" { # This happens because the type is defined only after it is # too late. fail "ptype A (known failure with gcc cygnus-2.4.5-930417)" @@ -176,13 +179,13 @@ proc test_ptype_of_classes {} { send_gdb "ptype C\n" gdb_expect { - -re "type = class C : public virtual V \{${ws}private:${ws}V \[*\]+_vb.V;${ws}public:${ws}int c;${ws}C & operator=\\(C const &\\);${ws}C\\(int, C const &\\);${ws}C\\(int\\);${ws}\}$nl$gdb_prompt $" { + -re "type = class C : public virtual V \{${ws}private:${ws}V \\*${vbptr}V;${ws}public:${ws}int c;${ws}C & operator=\\(C const &\\);${ws}C\\(int, C const &\\);${ws}C\\(int\\);${ws}\}$nl$gdb_prompt $" { pass "ptype C" } -re "type = class C : public virtual V \{${ws}public:${ws}int c;${ws}\}$nl$gdb_prompt $" { pass "ptype C (aCC)" } - -re "type = class C : public virtual V \{${ws}private:${ws}V \[*\]+_vb.V;${ws}public:${ws}int c;((${ws}C & operator=\\(C const &\\);)|(${ws}C\\(int, C const &\\);)|(${ws}C\\(int\\);))*${ws}\}$nl$gdb_prompt $" { + -re "type = class C : public virtual V \{${ws}private:${ws}V \\*${vbptr}V;${ws}public:${ws}int c;((${ws}C & operator=\\(C const &\\);)|(${ws}C\\(int, C const &\\);)|(${ws}C\\(int\\);))*${ws}\}$nl$gdb_prompt $" { pass "ptype C (obsolescent gcc or gdb)" } -re ".*$gdb_prompt $" { @@ -214,13 +217,13 @@ proc test_ptype_of_classes {} { send_gdb "ptype D\n" gdb_expect { - -re "type = class D : public AD, public virtual V \{${ws}private:${ws}V \[*\]+_vb.V;${ws}public:${ws}int d;${ws}D & operator=\\(D const &\\);${ws}D\\(int, D const &\\);${ws}D\\(int\\);${ws}static void s\\(void\\);${ws}virtual int vg\\(void\\);${ws}virtual int vd\\(void\\);${ws}int fd\\(void\\);${ws}\}$nl$gdb_prompt $" { + -re "type = class D : public AD, public virtual V \{${ws}private:${ws}V \\*${vbptr}V;${ws}public:${ws}int d;${ws}D & operator=\\(D const &\\);${ws}D\\(int, D const &\\);${ws}D\\(int\\);${ws}static void s\\(void\\);${ws}virtual int vg\\(void\\);${ws}virtual int vd\\(void\\);${ws}int fd\\(void\\);${ws}\}$nl$gdb_prompt $" { pass "ptype D" } -re "type = class D : public AD, public virtual V \{${ws}public:${ws}int d;${ws}static void s\\(void\\);${ws}virtual int vg\\(void\\);${ws}virtual int vd\\(void\\);${ws}int fd\\(void\\);${ws}\}$nl$gdb_prompt $" { pass "ptype D (aCC)" } - -re "type = class D : public AD, public virtual V \{${ws}private:${ws}V \[*\]+_vb.V;${ws}public:${ws}int d;((${ws}D & operator=\\(D const &\\);)|(${ws}D\\(int, D const &\\);)|(${ws}D\\(int\\);)|(${ws}static void s\\(void\\);)|(${ws}virtual int vg\\(void\\);)|(${ws}virtual int vd\\(void\\);)|(${ws}int fd\\(void\\);))*${ws}\}$nl$gdb_prompt $" { + -re "type = class D : public AD, public virtual V \{${ws}private:${ws}V \\*${vbptr}V;${ws}public:${ws}int d;((${ws}D & operator=\\(D const &\\);)|(${ws}D\\(int, D const &\\);)|(${ws}D\\(int\\);)|(${ws}static void s\\(void\\);)|(${ws}virtual int vg\\(void\\);)|(${ws}virtual int vd\\(void\\);)|(${ws}int fd\\(void\\);))*${ws}\}$nl$gdb_prompt $" { pass "ptype D (obsolescent gcc or gdb)" } -re ".*$gdb_prompt $" { @@ -252,13 +255,13 @@ proc test_ptype_of_classes {} { send_gdb "ptype dd\n" gdb_expect { - -re "type = class D : public AD, public virtual V \{${ws}private:${ws}V \[*\]+_vb.V;${ws}public:${ws}int d;${ws}D & operator=\\(D const &\\);${ws}D\\(int, D const &\\);${ws}D\\(int\\);${ws}static void s\\(void\\);${ws}virtual int vg\\(void\\);${ws}virtual int vd\\(void\\);${ws}int fd\\(void\\);${ws}\}$nl$gdb_prompt $" { + -re "type = class D : public AD, public virtual V \{${ws}private:${ws}V \\*${vbptr}V;${ws}public:${ws}int d;${ws}D & operator=\\(D const &\\);${ws}D\\(int, D const &\\);${ws}D\\(int\\);${ws}static void s\\(void\\);${ws}virtual int vg\\(void\\);${ws}virtual int vd\\(void\\);${ws}int fd\\(void\\);${ws}\}$nl$gdb_prompt $" { pass "ptype dd" } -re "type = class D : public AD, public virtual V \{${ws}public:${ws}int d;${ws}static void s\\(void\\);${ws}virtual int vg\\(void\\);${ws}virtual int vd\\(void\\);${ws}int fd\\(void\\);${ws}\}$nl$gdb_prompt $" { pass "ptype dd (aCC)" } - -re "type = class D : public AD, public virtual V \{${ws}private:${ws}V \[*\]+_vb.V;${ws}public:${ws}int d;((${ws}D & operator=\\(D const &\\);)|(${ws}D\\(int, D const &\\);)|(${ws}D\\(int\\);)|(${ws}static void s\\(void\\);)|(${ws}virtual int vg\\(void\\);)|(${ws}virtual int vd\\(void\\);)|(${ws}int fd\\(void\\);))*${ws}\}$nl$gdb_prompt $" { + -re "type = class D : public AD, public virtual V \{${ws}private:${ws}V \\*${vbptr}V;${ws}public:${ws}int d;((${ws}D & operator=\\(D const &\\);)|(${ws}D\\(int, D const &\\);)|(${ws}D\\(int\\);)|(${ws}static void s\\(void\\);)|(${ws}virtual int vg\\(void\\);)|(${ws}virtual int vd\\(void\\);)|(${ws}int fd\\(void\\);))*${ws}\}$nl$gdb_prompt $" { pass "ptype dd (obsolescent gcc or gdb)" } -re ".*$gdb_prompt $" { @@ -271,13 +274,13 @@ proc test_ptype_of_classes {} { send_gdb "ptype ppd\n" gdb_expect { - -re "type = class D : public AD, public virtual V \{${ws}private:${ws}V \[*\]+_vb.V;${ws}public:${ws}int d;${ws}D & operator=\\(D const &\\);${ws}D\\(int, D const &\\);${ws}D\\(int\\);${ws}static void s\\(void\\);${ws}virtual int vg\\(void\\);${ws}virtual int vd\\(void\\);${ws}int fd\\(void\\);${ws}\} \[*\]+$nl$gdb_prompt $" { + -re "type = class D : public AD, public virtual V \{${ws}private:${ws}V \\*${vbptr}V;${ws}public:${ws}int d;${ws}D & operator=\\(D const &\\);${ws}D\\(int, D const &\\);${ws}D\\(int\\);${ws}static void s\\(void\\);${ws}virtual int vg\\(void\\);${ws}virtual int vd\\(void\\);${ws}int fd\\(void\\);${ws}\} \[*\]+$nl$gdb_prompt $" { pass "ptype ppd" } -re "type = class D : public AD, public virtual V \{${ws}public:${ws}int d;${ws}static void s\\(void\\);${ws}virtual int vg\\(void\\);${ws}virtual int vd\\(void\\);${ws}int fd\\(void\\);${ws}\} \[*\]+$nl$gdb_prompt $" { pass "ptype ppd (aCC)" } - -re "type = class D : public AD, public virtual V \{${ws}private:${ws}V \[*\]+_vb.V;${ws}public:${ws}int d;((${ws}D & operator=\\(D const &\\);)|(${ws}D\\(int, D const &\\);)|(${ws}D\\(int\\);)|(${ws}static void s\\(void\\);)|(${ws}virtual int vg\\(void\\);)|(${ws}virtual int vd\\(void\\);)|(${ws}int fd\\(void\\);))*${ws}\} \[*\]+$nl$gdb_prompt $" { + -re "type = class D : public AD, public virtual V \{${ws}private:${ws}V \\*${vbptr}V;${ws}public:${ws}int d;((${ws}D & operator=\\(D const &\\);)|(${ws}D\\(int, D const &\\);)|(${ws}D\\(int\\);)|(${ws}static void s\\(void\\);)|(${ws}virtual int vg\\(void\\);)|(${ws}virtual int vd\\(void\\);)|(${ws}int fd\\(void\\);))*${ws}\} \[*\]+$nl$gdb_prompt $" { pass "ptype ppd (obsolescent gcc or gdb)" } -re ".*$gdb_prompt $" { @@ -309,13 +312,13 @@ proc test_ptype_of_classes {} { send_gdb "ptype a\n" gdb_expect { - -re "type = class A : public virtual V \{${ws}private:${ws}V \[*\]+_vb.V;${ws}int a;${ws}public:${ws}A & operator=\\(A const &\\);${ws}A\\(int, A const &\\);${ws}A\\(int\\);${ws}virtual int f\\(void\\);${ws}\}$nl$gdb_prompt $" { + -re "type = class A : public virtual V \{${ws}private:${ws}V \\*${vbptr}V;${ws}int a;${ws}public:${ws}A & operator=\\(A const &\\);${ws}A\\(int, A const &\\);${ws}A\\(int\\);${ws}virtual int f\\(void\\);${ws}\}$nl$gdb_prompt $" { pass "ptype a" } -re "type = class A : public virtual V \{${ws}private:${ws}int a;${ws}public:${ws}virtual int f\\(void\\);${ws}\}$nl$gdb_prompt $" { pass "ptype a (aCC)" } - -re "type = class A : public virtual V \{${ws}private:${ws}V \[*\]+_vb.V;${ws}int a;${ws}public:((${ws}A & operator=\\(A const &\\);)|(${ws}A\\(int, A const &\\);)|(${ws}A\\(int\\);)|(${ws}virtual int f\\(void\\);))*${ws}\}$nl$gdb_prompt $" { + -re "type = class A : public virtual V \{${ws}private:${ws}V \\*${vbptr}V;${ws}int a;${ws}public:((${ws}A & operator=\\(A const &\\);)|(${ws}A\\(int, A const &\\);)|(${ws}A\\(int\\);)|(${ws}virtual int f\\(void\\);))*${ws}\}$nl$gdb_prompt $" { pass "ptype a (obsolescent gcc or gdb)" } -re ".*$gdb_prompt $" { @@ -347,13 +350,13 @@ proc test_ptype_of_classes {} { send_gdb "ptype c\n" gdb_expect { - -re "type = class C : public virtual V \{${ws}private:${ws}V \[*\]+_vb.V;${ws}public:${ws}int c;${ws}C & operator=\\(C const &\\);${ws}C\\(int, C const &\\);${ws}C\\(int\\);${ws}\}$nl$gdb_prompt $" { + -re "type = class C : public virtual V \{${ws}private:${ws}V \\*${vbptr}V;${ws}public:${ws}int c;${ws}C & operator=\\(C const &\\);${ws}C\\(int, C const &\\);${ws}C\\(int\\);${ws}\}$nl$gdb_prompt $" { pass "ptype c" } -re "type = class C : public virtual V \{${ws}public:${ws}int c;${ws}\}$nl$gdb_prompt $" { pass "ptype c (aCC)" } - -re "type = class C : public virtual V \{${ws}private:${ws}V \[*\]+_vb.V;${ws}public:${ws}int c;((${ws}C & operator=\\(C const &\\);)|(${ws}C\\(int, C const &\\);)|(${ws}C\\(int\\);))*${ws}\}$nl$gdb_prompt $" { + -re "type = class C : public virtual V \{${ws}private:${ws}V \\*${vbptr}V;${ws}public:${ws}int c;((${ws}C & operator=\\(C const &\\);)|(${ws}C\\(int, C const &\\);)|(${ws}C\\(int\\);))*${ws}\}$nl$gdb_prompt $" { pass "ptype c (obsolescent gcc or gdb)" } -re ".*$gdb_prompt $" { @@ -366,13 +369,13 @@ proc test_ptype_of_classes {} { send_gdb "ptype d\n" gdb_expect { - -re "type = class D : public AD, public virtual V \{${ws}private:${ws}V \[*\]+_vb.V;${ws}public:${ws}int d;${ws}D & operator=\\(D const &\\);${ws}D\\(int, D const &\\);${ws}D\\(int\\);${ws}static void s\\(void\\);${ws}virtual int vg\\(void\\);${ws}virtual int vd\\(void\\);${ws}int fd\\(void\\);${ws}\}$nl$gdb_prompt $" { + -re "type = class D : public AD, public virtual V \{${ws}private:${ws}V \\*${vbptr}V;${ws}public:${ws}int d;${ws}D & operator=\\(D const &\\);${ws}D\\(int, D const &\\);${ws}D\\(int\\);${ws}static void s\\(void\\);${ws}virtual int vg\\(void\\);${ws}virtual int vd\\(void\\);${ws}int fd\\(void\\);${ws}\}$nl$gdb_prompt $" { pass "ptype d" } -re "type = class D : public AD, public virtual V \{${ws}public:${ws}int d;${ws}static void s\\(void\\);${ws}virtual int vg\\(void\\);${ws}virtual int vd\\(void\\);${ws}int fd\\(void\\);${ws}\}$nl$gdb_prompt $" { pass "ptype d (aCC)" } - -re "type = class D : public AD, public virtual V \{${ws}private:${ws}V \[*\]+_vb.V;${ws}public:${ws}int d;((${ws}D & operator=\\(D const &\\);)|(${ws}D\\(int, D const &\\);)|(${ws}D\\(int\\);)|(${ws}static void s\\(void\\);)|(${ws}virtual int vg\\(void\\);)|(${ws}virtual int vd\\(void\\);)|(${ws}int fd\\(void\\);))*${ws}\}$nl$gdb_prompt $" { + -re "type = class D : public AD, public virtual V \{${ws}private:${ws}V \\*${vbptr}V;${ws}public:${ws}int d;((${ws}D & operator=\\(D const &\\);)|(${ws}D\\(int, D const &\\);)|(${ws}D\\(int\\);)|(${ws}static void s\\(void\\);)|(${ws}virtual int vg\\(void\\);)|(${ws}virtual int vd\\(void\\);)|(${ws}int fd\\(void\\);))*${ws}\}$nl$gdb_prompt $" { pass "ptype d (obsolescent gcc or gdb)" } -re ".*$gdb_prompt $" { @@ -442,13 +445,13 @@ proc test_ptype_of_classes {} { send_gdb "ptype pAa\n" gdb_expect { - -re "type = class A : public virtual V \{${ws}private:${ws}V \[*\]+_vb.V;${ws}int a;${ws}public:${ws}A & operator=\\(A const &\\);${ws}A\\(int, A const &\\);${ws}A\\(int\\);${ws}virtual int f\\(void\\);${ws}\} \[*\]+$nl$gdb_prompt $" { + -re "type = class A : public virtual V \{${ws}private:${ws}V \\*${vbptr}V;${ws}int a;${ws}public:${ws}A & operator=\\(A const &\\);${ws}A\\(int, A const &\\);${ws}A\\(int\\);${ws}virtual int f\\(void\\);${ws}\} \[*\]+$nl$gdb_prompt $" { pass "ptype pAa" } -re "type = class A : public virtual V \{${ws}private:${ws}int a;${ws}public:${ws}virtual int f\\(void\\);${ws}\} \[*\]+$nl$gdb_prompt $" { pass "ptype pAa (aCC)" } - -re "type = class A : public virtual V \{${ws}private:${ws}V \[*\]+_vb.V;${ws}int a;${ws}public:((${ws}A & operator=\\(A const &\\);)|(${ws}A\\(int, A const &\\);)|(${ws}A\\(int\\);)|(${ws}virtual int f\\(void\\);))*${ws}\} \[*\]+$nl$gdb_prompt $" { + -re "type = class A : public virtual V \{${ws}private:${ws}V \\*${vbptr}V;${ws}int a;${ws}public:((${ws}A & operator=\\(A const &\\);)|(${ws}A\\(int, A const &\\);)|(${ws}A\\(int\\);)|(${ws}virtual int f\\(void\\);))*${ws}\} \[*\]+$nl$gdb_prompt $" { pass "ptype pAa (obsolescent gcc or gdb)" } -re ".*$gdb_prompt $" { @@ -461,13 +464,13 @@ proc test_ptype_of_classes {} { send_gdb "ptype pAe\n" gdb_expect { - -re "type = class A : public virtual V \{${ws}private:${ws}V \[*\]+_vb.V;${ws}int a;${ws}public:${ws}A & operator=\\(A const &\\);${ws}A\\(int, A const &\\);${ws}A\\(int\\);${ws}virtual int f\\(void\\);${ws}\} \[*\]+$nl$gdb_prompt $" { + -re "type = class A : public virtual V \{${ws}private:${ws}V \\*${vbptr}V;${ws}int a;${ws}public:${ws}A & operator=\\(A const &\\);${ws}A\\(int, A const &\\);${ws}A\\(int\\);${ws}virtual int f\\(void\\);${ws}\} \[*\]+$nl$gdb_prompt $" { pass "ptype pAe" } -re "type = class A : public virtual V \{${ws}private:${ws}int a;${ws}public:${ws}virtual int f\\(void\\);${ws}\} \[*\]+$nl$gdb_prompt $" { pass "ptype pAe (aCC)" } - -re "type = class A : public virtual V \{${ws}private:${ws}V \[*\]+_vb.V;${ws}int a;${ws}public:((${ws}A & operator=\\(A const &\\);)|(${ws}A\\(int, A const &\\);)|(${ws}A\\(int\\);)|(${ws}virtual int f\\(void\\);))*${ws}\} \[*\]+$nl$gdb_prompt $" { + -re "type = class A : public virtual V \{${ws}private:${ws}V \\*${vbptr}V;${ws}int a;${ws}public:((${ws}A & operator=\\(A const &\\);)|(${ws}A\\(int, A const &\\);)|(${ws}A\\(int\\);)|(${ws}virtual int f\\(void\\);))*${ws}\} \[*\]+$nl$gdb_prompt $" { pass "ptype pAe (obsolescent gcc or gdb)" } -re ".*$gdb_prompt $" { @@ -499,13 +502,13 @@ proc test_ptype_of_classes {} { send_gdb "ptype pDd\n" gdb_expect { - -re "type = class D : public AD, public virtual V \{${ws}private:${ws}V \[*\]+_vb.V;${ws}public:${ws}int d;${ws}D & operator=\\(D const &\\);${ws}D\\(int, D const &\\);${ws}D\\(int\\);${ws}static void s\\(void\\);${ws}virtual int vg\\(void\\);${ws}virtual int vd\\(void\\);${ws}int fd\\(void\\);${ws}\} \[*\]+$nl$gdb_prompt $" { + -re "type = class D : public AD, public virtual V \{${ws}private:${ws}V \\*${vbptr}V;${ws}public:${ws}int d;${ws}D & operator=\\(D const &\\);${ws}D\\(int, D const &\\);${ws}D\\(int\\);${ws}static void s\\(void\\);${ws}virtual int vg\\(void\\);${ws}virtual int vd\\(void\\);${ws}int fd\\(void\\);${ws}\} \[*\]+$nl$gdb_prompt $" { pass "ptype pDd" } -re "type = class D : public AD, public virtual V \{${ws}public:${ws}int d;${ws}static void s\\(void\\);${ws}virtual int vg\\(void\\);${ws}virtual int vd\\(void\\);${ws}int fd\\(void\\);${ws}\} \[*\]+$nl$gdb_prompt $" { pass "ptype pDd (aCC)" } - -re "type = class D : public AD, public virtual V \{${ws}private:${ws}V \[*\]+_vb.V;${ws}public:${ws}int d;((${ws}D & operator=\\(D const &\\);)|(${ws}D\\(int, D const &\\);)|(${ws}D\\(int\\);)|(${ws}static void s\\(void\\);)|(${ws}virtual int vg\\(void\\);)|(${ws}virtual int vd\\(void\\);)|(${ws}int fd\\(void\\);))*${ws}\} \[*\]+$nl$gdb_prompt $" { + -re "type = class D : public AD, public virtual V \{${ws}private:${ws}V \\*${vbptr}V;${ws}public:${ws}int d;((${ws}D & operator=\\(D const &\\);)|(${ws}D\\(int, D const &\\);)|(${ws}D\\(int\\);)|(${ws}static void s\\(void\\);)|(${ws}virtual int vg\\(void\\);)|(${ws}virtual int vd\\(void\\);)|(${ws}int fd\\(void\\);))*${ws}\} \[*\]+$nl$gdb_prompt $" { pass "ptype pDd (obsolescent gcc or gdb)" } -re ".*$gdb_prompt $" { @@ -518,13 +521,13 @@ proc test_ptype_of_classes {} { send_gdb "ptype pDe\n" gdb_expect { - -re "type = class D : public AD, public virtual V \{${ws}private:${ws}V \[*\]+_vb.V;${ws}public:${ws}int d;${ws}D & operator=\\(D const &\\);${ws}D\\(int, D const &\\);${ws}D\\(int\\);${ws}static void s\\(void\\);${ws}virtual int vg\\(void\\);${ws}virtual int vd\\(void\\);${ws}int fd\\(void\\);${ws}\} \[*\]+$nl$gdb_prompt $" { + -re "type = class D : public AD, public virtual V \{${ws}private:${ws}V \\*${vbptr}V;${ws}public:${ws}int d;${ws}D & operator=\\(D const &\\);${ws}D\\(int, D const &\\);${ws}D\\(int\\);${ws}static void s\\(void\\);${ws}virtual int vg\\(void\\);${ws}virtual int vd\\(void\\);${ws}int fd\\(void\\);${ws}\} \[*\]+$nl$gdb_prompt $" { pass "ptype pDe" } -re "type = class D : public AD, public virtual V \{${ws}public:${ws}int d;${ws}static void s\\(void\\);${ws}virtual int vg\\(void\\);${ws}virtual int vd\\(void\\);${ws}int fd\\(void\\);${ws}\} \[*\]+$nl$gdb_prompt $" { pass "ptype pDe (aCC)" } - -re "type = class D : public AD, public virtual V \{${ws}private:${ws}V \[*\]+_vb.V;${ws}public:${ws}int d;((${ws}D & operator=\\(D const &\\);)|(${ws}D\\(int, D const &\\);)|(${ws}D\\(int\\);)|(${ws}static void s\\(void\\);)|(${ws}virtual int vg\\(void\\);)|(${ws}virtual int vd\\(void\\);)|(${ws}int fd\\(void\\);))*${ws}\} \[*\]+$nl$gdb_prompt $" { + -re "type = class D : public AD, public virtual V \{${ws}private:${ws}V \\*${vbptr}V;${ws}public:${ws}int d;((${ws}D & operator=\\(D const &\\);)|(${ws}D\\(int, D const &\\);)|(${ws}D\\(int\\);)|(${ws}static void s\\(void\\);)|(${ws}virtual int vg\\(void\\);)|(${ws}virtual int vd\\(void\\);)|(${ws}int fd\\(void\\);))*${ws}\} \[*\]+$nl$gdb_prompt $" { pass "ptype pDe (obsolescent gcc or gdb)" } -re ".*$gdb_prompt $" { diff --git a/gdb/testsuite/gdb.disasm/am33.exp b/gdb/testsuite/gdb.disasm/am33.exp new file mode 100644 index 00000000000..0337be8a54b --- /dev/null +++ b/gdb/testsuite/gdb.disasm/am33.exp @@ -0,0 +1,838 @@ + +# Copyright (C) 1997 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +# Please email any bugs, comments, and/or additions to this file to: +# bug-gdb@prep.ai.mit.edu + +# This file was written by Jeff Law. (law@cygnus.com) + +if $tracelevel then { + strace $tracelevel +} + +if ![istarget "mn10300*-*-*"] { + verbose "Tests ignored for all but mn10300 based targets." + return +} + +global exec_output +set prms_id 0 +set bug_id 0 + +set testfile "am33" +set srcfile ${srcdir}/${subdir}/${testfile}.s +set binfile ${objdir}/${subdir}/${testfile} +if { [gdb_compile "${srcfile}" "${binfile}" object ""] != "" } { + gdb_suppress_entire_file "Testcase compile failed, so all tests in this file will automatically fail." +} + +proc call_tests { } { + global gdb_prompt + global hex + global decimal + + send_gdb "x/8i call_tests\n" + gdb_expect { + -re " +.*call .*,.a2,a3,exreg0.,9.* +.*call .*,.a2,a3,exreg1.,9.* +.*call .*,.a2,a3,exother.,9.* +.*call .*,.d2,d3,a2,a3,other,exreg0,exreg1,exother.,9.* +.*call .*,.a2,a3,exreg0.,9.* +.*call .*,.a2,a3,exreg1.,9.* +.*call .*,.a2,a3,exother.,9.* +.*call .*,.d2,d3,a2,a3,other,exreg0,exreg1,exother.,9.* +.*$gdb_prompt $" { pass "call tests" } + -re "$gdb_prompt $" { fail "call tests" } + timeout { fail "(timeout) call tests" } + } +} + +proc movm_tests { } { + global gdb_prompt + global hex + global decimal + + send_gdb "x/16i movm_tests\n" + gdb_expect { + -re " +.*movm \\(sp\\),.a2,a3,exreg0.* +.*movm \\(sp\\),.a2,a3,exreg1.* +.*movm \\(sp\\),.a2,a3,exother.* +.*movm \\(sp\\),.d2,d3,a2,a3,other,exreg0,exreg1,exother.* +.*movm .a2,a3,exreg0.,\\(sp\\).* +.*movm .a2,a3,exreg1.,\\(sp\\).* +.*movm .a2,a3,exother.,\\(sp\\).* +.*movm .d2,d3,a2,a3,other,exreg0,exreg1,exother.,\\(sp\\).* +.*movm \\(usp\\),.a2,a3,exreg0.* +.*movm \\(usp\\),.a2,a3,exreg1.* +.*movm \\(usp\\),.a2,a3,exother.* +.*movm \\(usp\\),.d2,d3,a2,a3,other,exreg0,exreg1,exother.* +.*movm .a2,a3,exreg0.,\\(usp\\).* +.*movm .a2,a3,exreg1.,\\(usp\\).* +.*movm .a2,a3,exother.,\\(usp\\).* +.*movm .d2,d3,a2,a3,other,exreg0,exreg1,exother.,\\(usp\\).* +.*$gdb_prompt $" { pass "movm tests" } + -re "$gdb_prompt $" { fail "movm tests" } + timeout { fail "(timeout) movm tests" } + } +} + +proc misc_tests { } { + global gdb_prompt + global hex + global decimal + + send_gdb "x/11i misc_tests\n" + gdb_expect { + -re " +.*syscall 4.* +.*mcst9 d0.* +.*mcst48 d1.* +.*getchx d0.* +.*getclx d1.* +.*clr a1.* +.*sat16 a1,a0.* +.*mcste r7,r6.* +.*swap r5,r4.* +.*swaph r3,r2.* +.*swhw r1,r0.* +.*$gdb_prompt $" { pass "misc tests" } + -re "$gdb_prompt $" { fail "misc tests" } + timeout { fail "(timeout) misc tests" } + } +} + +proc mov_tests { } { + global gdb_prompt + global hex + global decimal + + send_gdb "x/45i mov_tests\n" + gdb_expect { + -re " +.*mov r0,r1.* +.*mov sp,r1.* +.*mov r1,xr2.* +.*mov \\(r1\\),r2.* +.*mov r3,\\(r4\\).* +.*mov \\(sp\\),r5.* +.*mov r6,\\(sp\\).* +.*mov 16,r1.* +.*mov 16,xr1.* +.*mov \\(16,r1\\),r2.* +.*mov r2,\\(16,r1\\).* +.*mov \\(16,sp\\),r2.* +.*mov r2,\\(16,sp\\).* +.*mov 2096895,r2.* +.*mov 2096895,xr2.* +.*mov \\(2096895,r1\\),r2.* +.*mov r2,\\(2096895,r1\\).* +.*mov \\(2096895,sp\\),r2.* +.*mov r2,\\(2096895,sp\\).* +.*mov \\(0x1ffeff\\),r2.* +.*mov r2,\\(0x1ffeff\\).* +.*mov 2147417596,r2.* +.*mov 2147417596,xr2.* +.*mov \\(2147417596,r1\\),r2.* +.*mov r2,\\(2147417596,r1\\).* +.*mov \\(2147417596,sp\\),r2.* +.*mov r2,\\(2147417596,sp\\).* +.*mov \\(0x7ffefdfc\\),r2.* +.*mov r2,\\(0x7ffefdfc\\).* +.*movu 16,r1.* +.*movu 2096895,r2.* +.*movu 2147417596,r2.* +.*mov usp,a0.* +.*mov ssp,a1.* +.*mov msp,a2.* +.*mov pc,a3.* +.*mov a0,usp.* +.*mov a1,ssp.* +.*mov a2,msp.* +.*mov epsw,d0.* +.*mov d1,epsw.* +.*mov a0,r1.* +.*mov d2,r3.* +.*mov r5,a1.* +.*mov r7,d3.* +.*$gdb_prompt $" { pass "mov tests" } + -re "$gdb_prompt $" { fail "mov tests" } + timeout { fail "(timeout) mov tests" } + } +} + +proc ext_tests { } { + global gdb_prompt + global hex + global decimal + + send_gdb "x/5i ext_tests\n" + gdb_expect { + -re " +.*ext r2.* +.*extb r3,r4.* +.*extbu r4,r5.* +.*exth r6,r7.* +.*exthu r7,a0.* +.*$gdb_prompt $" { pass "ext tests" } + -re "$gdb_prompt $" { fail "ext tests" } + timeout { fail "(timeout) ext tests" } + } +} + +proc add_tests { } { + global gdb_prompt + global hex + global decimal + + send_gdb "x/11i add_tests\n" + gdb_expect { + -re " +.*add a2,a3.* +.*add 16,r1.* +.*add 2096895,r2.* +.*add 2147417596,r2.* +.*add r1,r2,r3.* +.*addc d0,d1.* +.*addc 16,r1.* +.*addc 2096895,r2.* +.*addc 2147417596,r2.* +.*inc d1.* +.*inc4 d0.* +.*$gdb_prompt $" { pass "add tests" } + -re "$gdb_prompt $" { fail "add tests" } + timeout { fail "(timeout) add tests" } + } +} + +proc sub_tests { } { + global gdb_prompt + global hex + global decimal + + send_gdb "x/8i sub_tests\n" + gdb_expect { + -re " +.*sub d2,d3.* +.*sub 16,r1.* +.*sub 2096895,r2.* +.*sub 2147417596,r2.* +.*subc d3,d2.* +.*subc 16,r1.* +.*subc 2096895,r2.* +.*subc 2147417596,r2.* +.*$gdb_prompt $" { pass "sub tests" } + -re "$gdb_prompt $" { fail "sub tests" } + timeout { fail "(timeout) sub tests" } + } +} + +proc cmp_tests { } { + global gdb_prompt + global hex + global decimal + + send_gdb "x/4i cmp_tests\n" + gdb_expect { + -re " +.*cmp a3,a2.* +.*cmp 16,r1.* +.*cmp 2096895,r2.* +.*cmp 2147417596,r2.* +.*$gdb_prompt $" { pass "cmp tests" } + -re "$gdb_prompt $" { fail "cmp tests" } + timeout { fail "(timeout) cmp tests" } + } +} + +proc logical_tests { } { + global gdb_prompt + global hex + global decimal + + send_gdb "x/15i logical_tests\n" + gdb_expect { + -re " +.*and r0,r1.* +.*or r2,r3.* +.*xor r4,r5.* +.*not r6.* +.*and 16,r1.* +.*or 16,r1.* +.*xor 16,r1.* +.*and 2096895,r2.* +.*or 2096895,r2.* +.*xor 2096895,r2.* +.*and 2147417596,r2.* +.*or 2147417596,r2.* +.*xor 2147417596,r2.* +.*and 131072,epsw.* +.*or 65535,epsw.* +.*$gdb_prompt $" { pass "logical tests" } + -re "$gdb_prompt $" { fail "logical tests" } + timeout { fail "(timeout) logical tests" } + } +} + +proc shift_tests { } { + global gdb_prompt + global hex + global decimal + + send_gdb "x/15i shift_tests\n" + gdb_expect { + -re " +.*asr r7,a0.* +.*lsr a1,a2.* +.*asl a3,d0.* +.*asl2 d1.* +.*ror d2.* +.*rol d3.* +.*asr 16,r1.* +.*lsr 16,r1.* +.*asl 16,r1.* +.*asr 2096895,r2.* +.*lsr 2096895,r2.* +.*asl 2096895,r2.* +.*asr 2147417596,r2.* +.*lsr 2147417596,r2.* +.*asl 2147417596,r2.* +.*$gdb_prompt $" { pass "shift tests" } + -re "$gdb_prompt $" { fail "shift tests" } + timeout { fail "(timeout) shift tests" } + } +} + +proc muldiv_tests { } { + global gdb_prompt + global hex + global decimal + + send_gdb "x/16i muldiv_tests\n" + gdb_expect { + -re " +.*mul r1,r2.* +.*mulu r3,r4.* +.*mul 16,r1.* +.*mulu 16,r1.* +.*mul 2096895,r2.* +.*mulu 2096895,r2.* +.*mul 2147417596,r2.* +.*mulu 2147417596,r2.* +.*div r5,r6.* +.*divu r7,a0.* +.*dmulh d1,d0.* +.*dmulhu a3,a2.* +.*dmulh 2147417596,r2.* +.*dmulhu 2147417596,r2.* +.*mul r1,r2,r3,r4.* +.*mulu r1,r2,r3,r4.* +.*$gdb_prompt $" { pass "muldiv tests" } + -re "$gdb_prompt $" { fail "muldiv tests" } + timeout { fail "(timeout) muldiv tests" } + } +} + +proc movbu_tests { } { + global gdb_prompt + global hex + global decimal + + send_gdb "x/20i movbu_tests\n" + gdb_expect { + -re " +.*movbu \\(r5\\),r6.* +.*movbu r7,\\(a0\\).* +.*movbu \\(sp\\),r7.* +.*movbu a0,\\(sp\\).* +.*movbu \\(16,r1\\),r2.* +.*movbu r2,\\(16,r1\\).* +.*movbu \\(16,sp\\),r2.* +.*movbu r2,\\(16,sp\\).* +.*movbu \\(2096895,r1\\),r2.* +.*movbu r2,\\(2096895,r1\\).* +.*movbu \\(2096895,sp\\),r2.* +.*movbu r2,\\(2096895,sp\\).* +.*movbu \\(0x1ffeff\\),r2.* +.*movbu r2,\\(0x1ffeff\\).* +.*movbu \\(2147417596,r1\\),r2.* +.*movbu r2,\\(2147417596,r1\\).* +.*movbu \\(2147417596,sp\\),r2.* +.*movbu r2,\\(2147417596,sp\\).* +.*movbu \\(0x7ffefdfc\\),r2.* +.*movbu r2,\\(0x7ffefdfc\\).* +.*$gdb_prompt $" { pass "movbu tests" } + -re "$gdb_prompt $" { fail "movbu tests" } + timeout { fail "(timeout) movbu tests" } + } +} + +proc movhu_tests { } { + global gdb_prompt + global hex + global decimal + + send_gdb "x/20i movhu_tests\n" + gdb_expect { + -re " +.*movhu \\(a1\\),a2.* +.*movhu a3,\\(d0\\).* +.*movhu \\(sp\\),a1.* +.*movhu a2,\\(sp\\).* +.*movhu \\(16,r1\\),r2.* +.*movhu r2,\\(16,r1\\).* +.*movhu \\(16,sp\\),r2.* +.*movhu r2,\\(16,sp\\).* +.*movhu \\(2096895,r1\\),r2.* +.*movhu r2,\\(2096895,r1\\).* +.*movhu \\(2096895,sp\\),r2.* +.*movhu r2,\\(2096895,sp\\).* +.*movhu \\(0x1ffeff\\),r2.* +.*movhu r2,\\(0x1ffeff\\).* +.*movhu \\(2147417596,r1\\),r2.* +.*movhu r2,\\(2147417596,r1\\).* +.*movhu \\(2147417596,sp\\),r2.* +.*movhu r2,\\(2147417596,sp\\).* +.*movhu \\(0x7ffefdfc\\),r2.* +.*movhu r2,\\(0x7ffefdfc\\).* +.*$gdb_prompt $" { pass "movhu tests" } + -re "$gdb_prompt $" { fail "movhu tests" } + timeout { fail "(timeout) movhu tests" } + } +} + +proc mac_tests { } { + global gdb_prompt + global hex + global decimal + + send_gdb "x/28i mac_tests\n" + gdb_expect { + -re " +.*mac r1,r2.* +.*macu r3,r4.* +.*macb r5,r6.* +.*macbu r7,a0.* +.*mach a1,a2.* +.*machu a3,d0.* +.*dmach d1,d2.* +.*dmachu d3,d2.* +.*mac 16,r1.* +.*macu 16,r1.* +.*macb 16,r1.* +.*macbu 16,r1.* +.*mach 16,r1.* +.*machu 16,r1.* +.*mac 2096895,r2.* +.*macu 2096895,r2.* +.*macb 2096895,r2.* +.*macbu 2096895,r2.* +.*mach 2096895,r2.* +.*machu 2096895,r2.* +.*mac 2147417596,r2.* +.*macu 2147417596,r2.* +.*macb 2147417596,r2.* +.*macbu 2147417596,r2.* +.*mach 2147417596,r2.* +.*machu 2147417596,r2.* +.*dmach 2147417596,r2.* +.*dmachu 2147417596,r2.* +.*$gdb_prompt $" { pass "mac tests" } + -re "$gdb_prompt $" { fail "mac tests" } + timeout { fail "(timeout) mac tests" } + } +} + +proc bit_tests { } { + global gdb_prompt + global hex + global decimal + + send_gdb "x/4i bit_tests\n" + gdb_expect { + -re " +.*bsch r1,r2.* +.*btst 16,r1.* +.*btst 2096895,r2.* +.*btst 2147417596,r2.* +.*$gdb_prompt $" { pass "bit tests" } + -re "$gdb_prompt $" { fail "bit tests" } + timeout { fail "(timeout) bit tests" } + } +} + +proc dsp_add_tests { } { + global gdb_prompt + global hex + global decimal + + send_gdb "x/28i dsp_add_tests\n" + gdb_expect { + -re " +.*add_add r4,r1,r2,r3.* +.*add_add r4,r1,2,r3.* +.*add_sub r4,r1,r2,r3.* +.*add_sub r4,r1,2,r3.* +.*add_cmp r4,r1,r2,r3.* +.*add_cmp r4,r1,2,r3.* +.*add_mov r4,r1,r2,r3.* +.*add_mov r4,r1,2,r3.* +.*add_asr r4,r1,r2,r3.* +.*add_asr r4,r1,2,r3.* +.*add_lsr r4,r1,r2,r3.* +.*add_lsr r4,r1,2,r3.* +.*add_asl r4,r1,r2,r3.* +.*add_asl r4,r1,2,r3.* +.*add_add 4,r1,r2,r3.* +.*add_add 4,r1,2,r3.* +.*add_sub 4,r1,r2,r3.* +.*add_sub 4,r1,2,r3.* +.*add_cmp 4,r1,r2,r3.* +.*add_cmp 4,r1,2,r3.* +.*add_mov 4,r1,r2,r3.* +.*add_mov 4,r1,2,r3.* +.*add_asr 4,r1,r2,r3.* +.*add_asr 4,r1,2,r3.* +.*add_lsr 4,r1,r2,r3.* +.*add_lsr 4,r1,2,r3.* +.*add_asl 4,r1,r2,r3.* +.*add_asl 4,r1,2,r3.* +.*$gdb_prompt $" { pass "dsp_add tests" } + -re "$gdb_prompt $" { fail "dsp_add tests" } + timeout { fail "(timeout) dsp_add tests" } + } +} + +proc dsp_cmp_tests { } { + global gdb_prompt + global hex + global decimal + + send_gdb "x/24i dsp_cmp_tests\n" + gdb_expect { + -re " +.*cmp_add r4,r1,r2,r3.* +.*cmp_add r4,r1,2,r3.* +.*cmp_sub r4,r1,r2,r3.* +.*cmp_sub r4,r1,2,r3.* +.*cmp_mov r4,r1,r2,r3.* +.*cmp_mov r4,r1,2,r3.* +.*cmp_asr r4,r1,r2,r3.* +.*cmp_asr r4,r1,2,r3.* +.*cmp_lsr r4,r1,r2,r3.* +.*cmp_lsr r4,r1,2,r3.* +.*cmp_asl r4,r1,r2,r3.* +.*cmp_asl r4,r1,2,r3.* +.*cmp_add 4,r1,r2,r3.* +.*cmp_add 4,r1,2,r3.* +.*cmp_sub 4,r1,r2,r3.* +.*cmp_sub 4,r1,2,r3.* +.*cmp_mov 4,r1,r2,r3.* +.*cmp_mov 4,r1,2,r3.* +.*cmp_asr 4,r1,r2,r3.* +.*cmp_asr 4,r1,2,r3.* +.*cmp_lsr 4,r1,r2,r3.* +.*cmp_lsr 4,r1,2,r3.* +.*cmp_asl 4,r1,r2,r3.* +.*cmp_asl 4,r1,2,r3.* +.*$gdb_prompt $" { pass "dsp_cmp tests" } + -re "$gdb_prompt $" { fail "dsp_cmp tests" } + timeout { fail "(timeout) dsp_cmp tests" } + } +} + +proc dsp_sub_tests { } { + global gdb_prompt + global hex + global decimal + + send_gdb "x/28i dsp_sub_tests\n" + gdb_expect { + -re " +.*sub_add r4,r1,r2,r3.* +.*sub_add r4,r1,2,r3.* +.*sub_sub r4,r1,r2,r3.* +.*sub_sub r4,r1,2,r3.* +.*sub_cmp r4,r1,r2,r3.* +.*sub_cmp r4,r1,2,r3.* +.*sub_mov r4,r1,r2,r3.* +.*sub_mov r4,r1,2,r3.* +.*sub_asr r4,r1,r2,r3.* +.*sub_asr r4,r1,2,r3.* +.*sub_lsr r4,r1,r2,r3.* +.*sub_lsr r4,r1,2,r3.* +.*sub_asl r4,r1,r2,r3.* +.*sub_asl r4,r1,2,r3.* +.*sub_add 4,r1,r2,r3.* +.*sub_add 4,r1,2,r3.* +.*sub_sub 4,r1,r2,r3.* +.*sub_sub 4,r1,2,r3.* +.*sub_cmp 4,r1,r2,r3.* +.*sub_cmp 4,r1,2,r3.* +.*sub_mov 4,r1,r2,r3.* +.*sub_mov 4,r1,2,r3.* +.*sub_asr 4,r1,r2,r3.* +.*sub_asr 4,r1,2,r3.* +.*sub_lsr 4,r1,r2,r3.* +.*sub_lsr 4,r1,2,r3.* +.*sub_asl 4,r1,r2,r3.* +.*sub_asl 4,r1,2,r3.* +.*$gdb_prompt $" { pass "dsp_sub tests" } + -re "$gdb_prompt $" { fail "dsp_sub tests" } + timeout { fail "(timeout) dsp_sub tests" } + } +} + +proc dsp_mov_tests { } { + global gdb_prompt + global hex + global decimal + + send_gdb "x/28i dsp_mov_tests\n" + gdb_expect { + -re " +.*mov_add r4,r1,r2,r3.* +.*mov_add r4,r1,2,r3.* +.*mov_sub r4,r1,r2,r3.* +.*mov_sub r4,r1,2,r3.* +.*mov_cmp r4,r1,r2,r3.* +.*mov_cmp r4,r1,2,r3.* +.*mov_mov r4,r1,r2,r3.* +.*mov_mov r4,r1,2,r3.* +.*mov_asr r4,r1,r2,r3.* +.*mov_asr r4,r1,2,r3.* +.*mov_lsr r4,r1,r2,r3.* +.*mov_lsr r4,r1,2,r3.* +.*mov_asl r4,r1,r2,r3.* +.*mov_asl r4,r1,2,r3.* +.*mov_add 4,r1,r2,r3.* +.*mov_add 4,r1,2,r3.* +.*mov_sub 4,r1,r2,r3.* +.*mov_sub 4,r1,2,r3.* +.*mov_cmp 4,r1,r2,r3.* +.*mov_cmp 4,r1,2,r3.* +.*mov_mov 4,r1,r2,r3.* +.*mov_mov 4,r1,2,r3.* +.*mov_asr 4,r1,r2,r3.* +.*mov_asr 4,r1,2,r3.* +.*mov_lsr 4,r1,r2,r3.* +.*mov_lsr 4,r1,2,r3.* +.*mov_asl 4,r1,r2,r3.* +.*mov_asl 4,r1,2,r3.* +.*$gdb_prompt $" { pass "dsp_mov tests" } + -re "$gdb_prompt $" { fail "dsp_mov tests" } + timeout { fail "(timeout) dsp_mov tests" } + } +} + +proc dsp_logical_tests { } { + global gdb_prompt + global hex + global decimal + + send_gdb "x/42i dsp_logical_tests\n" + gdb_expect { + -re " +.*and_add r4,r1,r2,r3.* +.*and_add r4,r1,2,r3.* +.*and_sub r4,r1,r2,r3.* +.*and_sub r4,r1,2,r3.* +.*and_cmp r4,r1,r2,r3.* +.*and_cmp r4,r1,2,r3.* +.*and_mov r4,r1,r2,r3.* +.*and_mov r4,r1,2,r3.* +.*and_asr r4,r1,r2,r3.* +.*and_asr r4,r1,2,r3.* +.*and_lsr r4,r1,r2,r3.* +.*and_lsr r4,r1,2,r3.* +.*and_asl r4,r1,r2,r3.* +.*and_asl r4,r1,2,r3.* +.*xor_add r4,r1,r2,r3.* +.*xor_add r4,r1,2,r3.* +.*xor_sub r4,r1,r2,r3.* +.*xor_sub r4,r1,2,r3.* +.*xor_cmp r4,r1,r2,r3.* +.*xor_cmp r4,r1,2,r3.* +.*xor_mov r4,r1,r2,r3.* +.*xor_mov r4,r1,2,r3.* +.*xor_asr r4,r1,r2,r3.* +.*xor_asr r4,r1,2,r3.* +.*xor_lsr r4,r1,r2,r3.* +.*xor_lsr r4,r1,2,r3.* +.*xor_asl r4,r1,r2,r3.* +.*xor_asl r4,r1,2,r3.* +.*or_add r4,r1,r2,r3.* +.*or_add r4,r1,2,r3.* +.*or_sub r4,r1,r2,r3.* +.*or_sub r4,r1,2,r3.* +.*or_cmp r4,r1,r2,r3.* +.*or_cmp r4,r1,2,r3.* +.*or_mov r4,r1,r2,r3.* +.*or_mov r4,r1,2,r3.* +.*or_asr r4,r1,r2,r3.* +.*or_asr r4,r1,2,r3.* +.*or_lsr r4,r1,r2,r3.* +.*or_lsr r4,r1,2,r3.* +.*or_asl r4,r1,r2,r3.* +.*or_asl r4,r1,2,r3.* +.*$gdb_prompt $" { pass "dsp_logical tests" } + -re "$gdb_prompt $" { fail "dsp_logical tests" } + timeout { fail "(timeout) dsp_logical tests" } + } +} + +proc dsp_misc_tests { } { + global gdb_prompt + global hex + global decimal + + send_gdb "x/42i dsp_misc_tests\n" + gdb_expect { + -re " +.*dmach_add r4,r1,r2,r3.* +.*dmach_add r4,r1,2,r3.* +.*dmach_sub r4,r1,r2,r3.* +.*dmach_sub r4,r1,2,r3.* +.*dmach_cmp r4,r1,r2,r3.* +.*dmach_cmp r4,r1,2,r3.* +.*dmach_mov r4,r1,r2,r3.* +.*dmach_mov r4,r1,2,r3.* +.*dmach_asr r4,r1,r2,r3.* +.*dmach_asr r4,r1,2,r3.* +.*dmach_lsr r4,r1,r2,r3.* +.*dmach_lsr r4,r1,2,r3.* +.*dmach_asl r4,r1,r2,r3.* +.*dmach_asl r4,r1,2,r3.* +.*swhw_add r4,r1,r2,r3.* +.*swhw_add r4,r1,2,r3.* +.*swhw_sub r4,r1,r2,r3.* +.*swhw_sub r4,r1,2,r3.* +.*swhw_cmp r4,r1,r2,r3.* +.*swhw_cmp r4,r1,2,r3.* +.*swhw_mov r4,r1,r2,r3.* +.*swhw_mov r4,r1,2,r3.* +.*swhw_asr r4,r1,r2,r3.* +.*swhw_asr r4,r1,2,r3.* +.*swhw_lsr r4,r1,r2,r3.* +.*swhw_lsr r4,r1,2,r3.* +.*swhw_asl r4,r1,r2,r3.* +.*swhw_asl r4,r1,2,r3.* +.*sat16_add r4,r1,r2,r3.* +.*sat16_add r4,r1,2,r3.* +.*sat16_sub r4,r1,r2,r3.* +.*sat16_sub r4,r1,2,r3.* +.*sat16_cmp r4,r1,r2,r3.* +.*sat16_cmp r4,r1,2,r3.* +.*sat16_mov r4,r1,r2,r3.* +.*sat16_mov r4,r1,2,r3.* +.*sat16_asr r4,r1,r2,r3.* +.*sat16_asr r4,r1,2,r3.* +.*sat16_lsr r4,r1,r2,r3.* +.*sat16_lsr r4,r1,2,r3.* +.*sat16_asl r4,r1,r2,r3.* +.*sat16_asl r4,r1,2,r3.* +.*$gdb_prompt $" { pass "dsp_misc tests" } + -re "$gdb_prompt $" { fail "dsp_misc tests" } + timeout { fail "(timeout) dsp_misc tests" } + } +} + +proc autoincrement_tests { } { + global gdb_prompt + global hex + global decimal + + send_gdb "x/16i autoincrement_tests\n" + gdb_expect { + -re " +.*mov \\(r1\\+\\),r2.* +.*mov r3,\\(r4\\+\\).* +.*movhu \\(r6\\+\\),r7.* +.*movhu a0,\\(a1\\+\\).* +.*mov \\(r1\\+,64\\),r2.* +.*mov r1,\\(r2\\+,64\\).* +.*movhu \\(r1\\+,64\\),r2.* +.*movhu r1,\\(r2\\+,64\\).* +.*mov \\(r1\\+,131055\\),r2.* +.*mov r1,\\(r2\\+,131055\\).* +.*movhu \\(r1\\+,131055\\),r2.* +.*movhu r1,\\(r2\\+,131055\\).* +.*mov \\(r1\\+,2147417596\\),r2.* +.*mov r1,\\(r2\\+,2147417596\\).* +.*movhu \\(r1\\+,2147417596\\),r2.* +.*movhu r1,\\(r2\\+,2147417596\\).* +.*$gdb_prompt $" { pass "autoincrement tests" } + -re "$gdb_prompt $" { fail "autoincrement tests" } + timeout { fail "(timeout) autoincrement tests" } + } +} + +proc dsp_autoincrement_tests { } { + global gdb_prompt + global hex + global decimal + + send_gdb "x/11i dsp_autoincrement_tests\n" + gdb_expect { + -re " +.*mov_llt \\(r1\\+,4\\),r2.* +.*mov_lgt \\(r1\\+,4\\),r2.* +.*mov_lge \\(r1\\+,4\\),r2.* +.*mov_lle \\(r1\\+,4\\),r2.* +.*mov_lcs \\(r1\\+,4\\),r2.* +.*mov_lhi \\(r1\\+,4\\),r2.* +.*mov_lcc \\(r1\\+,4\\),r2.* +.*mov_lls \\(r1\\+,4\\),r2.* +.*mov_leq \\(r1\\+,4\\),r2.* +.*mov_lne \\(r1\\+,4\\),r2.* +.*mov_lra \\(r1\\+,4\\),r2.* +.*$gdb_prompt $" { pass "autoincrement tests" } + -re "$gdb_prompt $" { fail "autoincrement tests" } + timeout { fail "(timeout) autoincrement tests" } + } +} + +# Start with a fresh gdb. + +gdb_exit +gdb_start +gdb_reinitialize_dir $srcdir/$subdir +gdb_load $binfile + +call_tests +movm_tests +misc_tests +mov_tests +ext_tests +add_tests +sub_tests +cmp_tests +logical_tests +shift_tests +muldiv_tests +movbu_tests +movhu_tests +mac_tests +bit_tests +dsp_add_tests +dsp_cmp_tests +dsp_sub_tests +dsp_mov_tests +dsp_logical_tests +autoincrement_tests +dsp_autoincrement_tests diff --git a/gdb/testsuite/gdb.disasm/am33.s b/gdb/testsuite/gdb.disasm/am33.s new file mode 100644 index 00000000000..a686cef2f74 --- /dev/null +++ b/gdb/testsuite/gdb.disasm/am33.s @@ -0,0 +1,524 @@ + + .globl _main + .globl call_tests + .globl movm_tests + .globl misc_tests + .globl mov_tests + .globl ext_tests + .globl add_tests + .globl sub_tests + .globl cmp_tests + .globl logical_tests + .globl shift_tests + .globl muldiv_tests + .globl movbu_tests + .globl movhu_tests + .globl mac_tests + .globl bit_tests + .globl dsp_add_tests + .globl dsp_cmp_tests + .globl dsp_sub_tests + .globl dsp_mov_tests + .globl dsp_logical_tests + .globl dsp_misc_tests + .globl autoincrement_tests + .globl dsp_autoincrement_tests + + .text + .am33 +_main: +call_tests: + call 256,[a2,a3,exreg0],9 + call 256,[a2,a3,exreg1],9 + call 256,[a2,a3,exother],9 + call 256,[a2,a3,all],9 + call 131071,[a2,a3,exreg0],9 + call 131071,[a2,a3,exreg1],9 + call 131071,[a2,a3,exother],9 + call 131071,[a2,a3,all],9 + +movm_tests: + movm (sp),[a2,a3,exreg0] + movm (sp),[a2,a3,exreg1] + movm (sp),[a2,a3,exother] + movm (sp),[a2,a3,all] + movm [a2,a3,exreg0],(sp) + movm [a2,a3,exreg1],(sp) + movm [a2,a3,exother],(sp) + movm [a2,a3,all],(sp) + movm (usp),[a2,a3,exreg0] + movm (usp),[a2,a3,exreg1] + movm (usp),[a2,a3,exother] + movm (usp),[a2,a3,all] + movm [a2,a3,exreg0],(usp) + movm [a2,a3,exreg1],(usp) + movm [a2,a3,exother],(usp) + movm [a2,a3,all],(usp) + +misc_tests: + syscall 0x4 + mcst9 d0 + mcst48 d1 + getchx d0 + getclx d1 + clr r9 + sat16 r9,r8 + mcste r7,r6 + swap r5,r4 + swaph r3,r2 + swhw r1,r0 + + +mov_tests: + mov r0,r1 + mov xr0, r1 + mov r1, xr2 + mov (r1),r2 + mov r3,(r4) + mov (sp),r5 + mov r6,(sp) + mov 16,r1 + mov 16,xr1 + mov (16,r1),r2 + mov r2,(16,r1) + mov (16,sp),r2 + mov r2,(16,sp) + mov 0x1ffeff,r2 + mov 0x1ffeff,xr2 + mov (0x1ffeff,r1),r2 + mov r2,(0x1ffeff,r1) + mov (0x1ffeff,sp),r2 + mov r2,(0x1ffeff,sp) + mov (0x1ffeff),r2 + mov r2,(0x1ffeff) + mov 0x7ffefdfc,r2 + mov 0x7ffefdfc,xr2 + mov (0x7ffefdfc,r1),r2 + mov r2,(0x7ffefdfc,r1) + mov (0x7ffefdfc,sp),r2 + mov r2,(0x7ffefdfc,sp) + mov (0x7ffefdfc),r2 + mov r2,(0x7ffefdfc) + movu 16,r1 + movu 0x1ffeff,r2 + movu 0x7ffefdfc,r2 + mov usp,a0 + mov ssp,a1 + mov msp,a2 + mov pc,a3 + mov a0,usp + mov a1,ssp + mov a2,msp + mov epsw,d0 + mov d1,epsw + mov a0,r1 + mov d2,r3 + mov r5,a1 + mov r7,d3 + +ext_tests: + ext r2 + extb r3,r4 + extbu r4,r5 + exth r6,r7 + exthu r7,r8 + +add_tests: + add r10,r11 + add 16,r1 + add 0x1ffeff,r2 + add 0x7ffefdfc,r2 + add r1,r2,r3 + addc r12,r13 + addc 16,r1 + addc 0x1ffeff,r2 + addc 0x7ffefdfc,r2 + inc r13 + inc4 r12 + + +sub_tests: + sub r14,r15 + sub 16,r1 + sub 0x1ffeff,r2 + sub 0x7ffefdfc,r2 + subc r15,r14 + subc 16,r1 + subc 0x1ffeff,r2 + subc 0x7ffefdfc,r2 + +cmp_tests: + cmp r11,r10 + cmp 16,r1 + cmp 0x1ffeff,r2 + cmp 0x7ffefdfc,r2 + +logical_tests: + and r0,r1 + or r2,r3 + xor r4,r5 + not r6 + and 16,r1 + or 16,r1 + xor 16,r1 + and 0x1ffeff,r2 + or 0x1ffeff,r2 + xor 0x1ffeff,r2 + and 0x7ffefdfc,r2 + or 0x7ffefdfc,r2 + xor 0x7ffefdfc,r2 + and 131072,epsw + or 65535,epsw + +shift_tests: + asr r7,r8 + lsr r9,r10 + asl r11,r12 + asl2 r13 + ror r14 + rol r15 + asr 16,r1 + lsr 16,r1 + asl 16,r1 + asr 0x1ffeff,r2 + lsr 0x1ffeff,r2 + asl 0x1ffeff,r2 + asr 0x7ffefdfc,r2 + lsr 0x7ffefdfc,r2 + asl 0x7ffefdfc,r2 + +muldiv_tests: + mul r1,r2 + mulu r3,r4 + mul 16,r1 + mulu 16,r1 + mul 0x1ffeff,r2 + mulu 0x1ffeff,r2 + mul 0x7ffefdfc,r2 + mulu 0x7ffefdfc,r2 + div r5,r6 + divu r7,r8 + dmulh r13,r12 + dmulhu r11,r10 + dmulh 0x7ffefdfc,r2 + dmulhu 0x7ffefdfc,r2 + mul r1,r2,r3,r4 + mulu r1,r2,r3,r4 + +movbu_tests: + movbu (r5),r6 + movbu r7,(r8) + movbu (sp),r7 + movbu r8,(sp) + movbu (16,r1),r2 + movbu r2,(16,r1) + movbu (16,sp),r2 + movbu r2,(16,sp) + movbu (0x1ffeff,r1),r2 + movbu r2,(0x1ffeff,r1) + movbu (0x1ffeff,sp),r2 + movbu r2,(0x1ffeff,sp) + movbu (0x1ffeff),r2 + movbu r2,(0x1ffeff) + movbu (0x7ffefdfc,r1),r2 + movbu r2,(0x7ffefdfc,r1) + movbu (0x7ffefdfc,sp),r2 + movbu r2,(0x7ffefdfc,sp) + movbu (0x7ffefdfc),r2 + movbu r2,(0x7ffefdfc) + +movhu_tests: + movhu (r9),r10 + movhu r11,(r12) + movhu (sp),r9 + movhu r10,(sp) + movhu (16,r1),r2 + movhu r2,(16,r1) + movhu (16,sp),r2 + movhu r2,(16,sp) + movhu (0x1ffeff,r1),r2 + movhu r2,(0x1ffeff,r1) + movhu (0x1ffeff,sp),r2 + movhu r2,(0x1ffeff,sp) + movhu (0x1ffeff),r2 + movhu r2,(0x1ffeff) + movhu (0x7ffefdfc,r1),r2 + movhu r2,(0x7ffefdfc,r1) + movhu (0x7ffefdfc,sp),r2 + movhu r2,(0x7ffefdfc,sp) + movhu (0x7ffefdfc),r2 + movhu r2,(0x7ffefdfc) + + +mac_tests: + mac r1,r2 + macu r3,r4 + macb r5,r6 + macbu r7,r8 + mach r9,r10 + machu r11,r12 + dmach r13,r14 + dmachu r15,r14 + mac 16,r1 + macu 16,r1 + macb 16,r1 + macbu 16,r1 + mach 16,r1 + machu 16,r1 + mac 0x1ffeff,r2 + macu 0x1ffeff,r2 + macb 0x1ffeff,r2 + macbu 0x1ffeff,r2 + mach 0x1ffeff,r2 + machu 0x1ffeff,r2 + mac 0x7ffefdfc,r2 + macu 0x7ffefdfc,r2 + macb 0x7ffefdfc,r2 + macbu 0x7ffefdfc,r2 + mach 0x7ffefdfc,r2 + machu 0x7ffefdfc,r2 + dmach 0x7ffefdfc,r2 + dmachu 0x7ffefdfc,r2 + +bit_tests: + bsch r1,r2 + btst 16,r1 + btst 0x1ffeff,r2 + btst 0x7ffefdfc,r2 + + + +dsp_add_tests: + add_add r4,r1,r2,r3 + add_add r4,r1,2,r3 + add_sub r4,r1,r2,r3 + add_sub r4,r1,2,r3 + add_cmp r4,r1,r2,r3 + add_cmp r4,r1,2,r3 + add_mov r4,r1,r2,r3 + add_mov r4,r1,2,r3 + add_asr r4,r1,r2,r3 + add_asr r4,r1,2,r3 + add_lsr r4,r1,r2,r3 + add_lsr r4,r1,2,r3 + add_asl r4,r1,r2,r3 + add_asl r4,r1,2,r3 + add_add 4,r1,r2,r3 + add_add 4,r1,2,r3 + add_sub 4,r1,r2,r3 + add_sub 4,r1,2,r3 + add_cmp 4,r1,r2,r3 + add_cmp 4,r1,2,r3 + add_mov 4,r1,r2,r3 + add_mov 4,r1,2,r3 + add_asr 4,r1,r2,r3 + add_asr 4,r1,2,r3 + add_lsr 4,r1,r2,r3 + add_lsr 4,r1,2,r3 + add_asl 4,r1,r2,r3 + add_asl 4,r1,2,r3 + +dsp_cmp_tests: + cmp_add r4,r1,r2,r3 + cmp_add r4,r1,2,r3 + cmp_sub r4,r1,r2,r3 + cmp_sub r4,r1,2,r3 + cmp_mov r4,r1,r2,r3 + cmp_mov r4,r1,2,r3 + cmp_asr r4,r1,r2,r3 + cmp_asr r4,r1,2,r3 + cmp_lsr r4,r1,r2,r3 + cmp_lsr r4,r1,2,r3 + cmp_asl r4,r1,r2,r3 + cmp_asl r4,r1,2,r3 + cmp_add 4,r1,r2,r3 + cmp_add 4,r1,2,r3 + cmp_sub 4,r1,r2,r3 + cmp_sub 4,r1,2,r3 + cmp_mov 4,r1,r2,r3 + cmp_mov 4,r1,2,r3 + cmp_asr 4,r1,r2,r3 + cmp_asr 4,r1,2,r3 + cmp_lsr 4,r1,r2,r3 + cmp_lsr 4,r1,2,r3 + cmp_asl 4,r1,r2,r3 + cmp_asl 4,r1,2,r3 + +dsp_sub_tests: + sub_add r4,r1,r2,r3 + sub_add r4,r1,2,r3 + sub_sub r4,r1,r2,r3 + sub_sub r4,r1,2,r3 + sub_cmp r4,r1,r2,r3 + sub_cmp r4,r1,2,r3 + sub_mov r4,r1,r2,r3 + sub_mov r4,r1,2,r3 + sub_asr r4,r1,r2,r3 + sub_asr r4,r1,2,r3 + sub_lsr r4,r1,r2,r3 + sub_lsr r4,r1,2,r3 + sub_asl r4,r1,r2,r3 + sub_asl r4,r1,2,r3 + sub_add 4,r1,r2,r3 + sub_add 4,r1,2,r3 + sub_sub 4,r1,r2,r3 + sub_sub 4,r1,2,r3 + sub_cmp 4,r1,r2,r3 + sub_cmp 4,r1,2,r3 + sub_mov 4,r1,r2,r3 + sub_mov 4,r1,2,r3 + sub_asr 4,r1,r2,r3 + sub_asr 4,r1,2,r3 + sub_lsr 4,r1,r2,r3 + sub_lsr 4,r1,2,r3 + sub_asl 4,r1,r2,r3 + sub_asl 4,r1,2,r3 + +dsp_mov_tests: + mov_add r4,r1,r2,r3 + mov_add r4,r1,2,r3 + mov_sub r4,r1,r2,r3 + mov_sub r4,r1,2,r3 + mov_cmp r4,r1,r2,r3 + mov_cmp r4,r1,2,r3 + mov_mov r4,r1,r2,r3 + mov_mov r4,r1,2,r3 + mov_asr r4,r1,r2,r3 + mov_asr r4,r1,2,r3 + mov_lsr r4,r1,r2,r3 + mov_lsr r4,r1,2,r3 + mov_asl r4,r1,r2,r3 + mov_asl r4,r1,2,r3 + mov_add 4,r1,r2,r3 + mov_add 4,r1,2,r3 + mov_sub 4,r1,r2,r3 + mov_sub 4,r1,2,r3 + mov_cmp 4,r1,r2,r3 + mov_cmp 4,r1,2,r3 + mov_mov 4,r1,r2,r3 + mov_mov 4,r1,2,r3 + mov_asr 4,r1,r2,r3 + mov_asr 4,r1,2,r3 + mov_lsr 4,r1,r2,r3 + mov_lsr 4,r1,2,r3 + mov_asl 4,r1,r2,r3 + mov_asl 4,r1,2,r3 + +dsp_logical_tests: + and_add r4,r1,r2,r3 + and_add r4,r1,2,r3 + and_sub r4,r1,r2,r3 + and_sub r4,r1,2,r3 + and_cmp r4,r1,r2,r3 + and_cmp r4,r1,2,r3 + and_mov r4,r1,r2,r3 + and_mov r4,r1,2,r3 + and_asr r4,r1,r2,r3 + and_asr r4,r1,2,r3 + and_lsr r4,r1,r2,r3 + and_lsr r4,r1,2,r3 + and_asl r4,r1,r2,r3 + and_asl r4,r1,2,r3 + xor_add r4,r1,r2,r3 + xor_add r4,r1,2,r3 + xor_sub r4,r1,r2,r3 + xor_sub r4,r1,2,r3 + xor_cmp r4,r1,r2,r3 + xor_cmp r4,r1,2,r3 + xor_mov r4,r1,r2,r3 + xor_mov r4,r1,2,r3 + xor_asr r4,r1,r2,r3 + xor_asr r4,r1,2,r3 + xor_lsr r4,r1,r2,r3 + xor_lsr r4,r1,2,r3 + xor_asl r4,r1,r2,r3 + xor_asl r4,r1,2,r3 + or_add r4,r1,r2,r3 + or_add r4,r1,2,r3 + or_sub r4,r1,r2,r3 + or_sub r4,r1,2,r3 + or_cmp r4,r1,r2,r3 + or_cmp r4,r1,2,r3 + or_mov r4,r1,r2,r3 + or_mov r4,r1,2,r3 + or_asr r4,r1,r2,r3 + or_asr r4,r1,2,r3 + or_lsr r4,r1,r2,r3 + or_lsr r4,r1,2,r3 + or_asl r4,r1,r2,r3 + or_asl r4,r1,2,r3 + +dsp_misc_tests: + dmach_add r4,r1,r2,r3 + dmach_add r4,r1,2,r3 + dmach_sub r4,r1,r2,r3 + dmach_sub r4,r1,2,r3 + dmach_cmp r4,r1,r2,r3 + dmach_cmp r4,r1,2,r3 + dmach_mov r4,r1,r2,r3 + dmach_mov r4,r1,2,r3 + dmach_asr r4,r1,r2,r3 + dmach_asr r4,r1,2,r3 + dmach_lsr r4,r1,r2,r3 + dmach_lsr r4,r1,2,r3 + dmach_asl r4,r1,r2,r3 + dmach_asl r4,r1,2,r3 + swhw_add r4,r1,r2,r3 + swhw_add r4,r1,2,r3 + swhw_sub r4,r1,r2,r3 + swhw_sub r4,r1,2,r3 + swhw_cmp r4,r1,r2,r3 + swhw_cmp r4,r1,2,r3 + swhw_mov r4,r1,r2,r3 + swhw_mov r4,r1,2,r3 + swhw_asr r4,r1,r2,r3 + swhw_asr r4,r1,2,r3 + swhw_lsr r4,r1,r2,r3 + swhw_lsr r4,r1,2,r3 + swhw_asl r4,r1,r2,r3 + swhw_asl r4,r1,2,r3 + sat16_add r4,r1,r2,r3 + sat16_add r4,r1,2,r3 + sat16_sub r4,r1,r2,r3 + sat16_sub r4,r1,2,r3 + sat16_cmp r4,r1,r2,r3 + sat16_cmp r4,r1,2,r3 + sat16_mov r4,r1,r2,r3 + sat16_mov r4,r1,2,r3 + sat16_asr r4,r1,r2,r3 + sat16_asr r4,r1,2,r3 + sat16_lsr r4,r1,r2,r3 + sat16_lsr r4,r1,2,r3 + sat16_asl r4,r1,r2,r3 + sat16_asl r4,r1,2,r3 + +autoincrement_tests: + mov (r1+),r2 + mov r3,(r4+) + movhu (r6+),r7 + movhu r8,(r9+) + mov (r1+,64),r2 + mov r1,(r2+,64) + movhu (r1+,64),r2 + movhu r1,(r2+,64) + mov (r1+,0x1ffef),r2 + mov r1,(r2+,0x1ffef) + movhu (r1+,0x1ffef),r2 + movhu r1,(r2+,0x1ffef) + mov (r1+,0x7ffefdfc),r2 + mov r1,(r2+,0x7ffefdfc) + movhu (r1+,0x7ffefdfc),r2 + movhu r1,(r2+,0x7ffefdfc) + +dsp_autoincrement_tests: + mov_llt (r1+,4),r2 + mov_lgt (r1+,4),r2 + mov_lge (r1+,4),r2 + mov_lle (r1+,4),r2 + mov_lcs (r1+,4),r2 + mov_lhi (r1+,4),r2 + mov_lcc (r1+,4),r2 + mov_lls (r1+,4),r2 + mov_leq (r1+,4),r2 + mov_lne (r1+,4),r2 + mov_lra (r1+,4),r2 diff --git a/gdb/testsuite/gdb.threads/linux-dp.exp b/gdb/testsuite/gdb.threads/linux-dp.exp index 87dc868f9d4..18febdc2411 100644 --- a/gdb/testsuite/gdb.threads/linux-dp.exp +++ b/gdb/testsuite/gdb.threads/linux-dp.exp @@ -66,7 +66,25 @@ gdb_test "info threads" "" "info threads 1" gdb_breakpoint [gdb_get_line_number "linuxthreads.exp: create philosopher"] for {set i 0} {$i < 5} {incr i} { gdb_continue_to_breakpoint "about to create philosopher: $i" - gdb_test "next" "\\\[New Thread .*\\\].*" "create philosopher: $i" + send_gdb "next\n" + gdb_expect { + -re "\\\[New Thread .*\\\].*$gdb_prompt $" { + pass "create philosopher: $i" + } + -re "Program received signal.*(Unknown signal|SIGUSR).*$gdb_prompt $" { + # It would be nice if we could catch the message that GDB prints + # when it first notices that the thread library doesn't support + # debugging, or if we could explicitly ask GDB somehow. + unsupported "This GDB does not support threads on this system." + return -1 + } + -re "$gdb_prompt $" { + fail "create philosopher: $i" + } + timeout { + fail "(timeout) create philosopher: $i" + } + } } # Run until there are some threads. diff --git a/gdb/testsuite/gdb.trace/deltrace.exp b/gdb/testsuite/gdb.trace/deltrace.exp index d3198ade0fc..9b96efe876f 100644 --- a/gdb/testsuite/gdb.trace/deltrace.exp +++ b/gdb/testsuite/gdb.trace/deltrace.exp @@ -1,4 +1,4 @@ -# Copyright (C) 1998 Free Software Foundation, Inc. +# Copyright (C) 1998, 1999 Free Software Foundation, Inc. # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -260,7 +260,7 @@ gdb_test "delete tracepoint [expr $trcpt2 + $trcpt3]" \ "3.4: delete invalid tracepoint number" # 3.5 delete tracepoint number zero -gdb_test "delete tracepoint 0" "No tracepoint number 0." \ +gdb_test "delete tracepoint 0" "bad tracepoint number at or near '0'" \ "3.5: delete tracepoint number zero" # 3.6 help delete tracepoints diff --git a/gdb/testsuite/lib/gdb.exp b/gdb/testsuite/lib/gdb.exp index a1a839a0baa..2ef42bf3db9 100644 --- a/gdb/testsuite/lib/gdb.exp +++ b/gdb/testsuite/lib/gdb.exp @@ -1189,7 +1189,7 @@ proc gdb_expect { args } { } } -# gdb_expect_list MESSAGE SENTINAL LIST -- expect a sequence of outputs +# gdb_expect_list MESSAGE SENTINEL LIST -- expect a sequence of outputs # # Check for long sequence of output by parts. # MESSAGE: is the test message to be printed with the test success/fail. @@ -1202,7 +1202,7 @@ proc gdb_expect { args } { # 0 if the test passes, # -1 if there was an internal error. # -proc gdb_expect_list {test sentinal list} { +proc gdb_expect_list {test sentinel list} { global gdb_prompt global suppress_flag set index 0 @@ -1216,16 +1216,20 @@ proc gdb_expect_list {test sentinal list} { if { ${index} == [llength ${list}] } { if { ${ok} } { gdb_expect { - -re "${pattern}${sentinal}" { - pass "${test}, pattern ${index} + sentinal" + -re "${pattern}${sentinel}" { + pass "${test}, pattern ${index} + sentinel" + } + -re "${sentinel}" { + fail "${test}, pattern ${index} + sentinel" + set ok 0 } timeout { - fail "${test}, pattern ${index} + sentinal (timeout)" + fail "${test}, pattern ${index} + sentinel (timeout)" set ok 0 } } } else { - fail "${test}, pattern ${index} + sentinal" + unresolved "${test}, pattern ${index} + sentinel" } } else { if { ${ok} } { @@ -1233,7 +1237,7 @@ proc gdb_expect_list {test sentinal list} { -re "${pattern}" { pass "${test}, pattern ${index}" } - -re "${sentinal}" { + -re "${sentinel}" { fail "${test}, pattern ${index}" set ok 0 } @@ -1243,7 +1247,7 @@ proc gdb_expect_list {test sentinal list} { } } } else { - fail "${test}, pattern ${index}" + unresolved "${test}, pattern ${index}" } } } diff --git a/gdb/top.c b/gdb/top.c index 3d1b040b745..95c07db303c 100644 --- a/gdb/top.c +++ b/gdb/top.c @@ -288,7 +288,7 @@ char *line; int linesize = 100; /* Nonzero if the current command is modified by "server ". This - affects things like recording into the command history, comamnds + affects things like recording into the command history, commands repeating on RETURN, etc. This is so a user interface (emacs, GUI, whatever) can issue its own commands and also send along commands from the user, and have the user not notice that the user interface @@ -472,7 +472,7 @@ PARAMS ((void)) ATTR_NORETURN; /* Return for reason REASON. This generally gets back to the command loop, but can be caught via catch_errors. */ - NORETURN void +NORETURN void return_to_top_level (reason) enum return_reason reason; { diff --git a/gdb/tracepoint.c b/gdb/tracepoint.c index 5b03a6c24a1..2c82e193ff9 100644 --- a/gdb/tracepoint.c +++ b/gdb/tracepoint.c @@ -196,13 +196,13 @@ trace_error (buf) /* Utility: wait for reply from stub, while accepting "O" packets */ static char * -remote_get_noisy_reply (buf) - char *buf; +remote_get_noisy_reply (char *buf, + long sizeof_buf) { do /* loop on reply from remote stub */ { QUIT; /* allow user to bail out with ^C */ - getpkt (buf, 0); + getpkt (buf, sizeof_buf, 0); if (buf[0] == 0) error ("Target does not support this command."); else if (buf[0] == 'E') @@ -599,23 +599,34 @@ tracepoint_operation (t, from_tty, opcode) } /* Utility: parse a tracepoint number and look it up in the list. - If MULTI_P is true, there might be a range of tracepoints in ARG. */ + If MULTI_P is true, there might be a range of tracepoints in ARG. + if OPTIONAL_P is true, then if the argument is missing, the most + recent tracepoint (tracepoint_count) is returned. */ struct tracepoint * -get_tracepoint_by_number (arg, multi_p) +get_tracepoint_by_number (arg, multi_p, optional_p) char **arg; - int multi_p; + int multi_p, optional_p; { struct tracepoint *t; - char *instring = *arg; int tpnum; + char *instring = arg == NULL ? NULL : *arg; - if (arg == NULL) - error_no_arg ("tracepoint number"); + if (arg == NULL || *arg == NULL || ! **arg) + { + if (optional_p) + tpnum = tracepoint_count; + else + error_no_arg ("tracepoint number"); + } + else + tpnum = multi_p ? get_number_or_range (arg) : get_number (arg); - tpnum = multi_p ? get_number_or_range (arg) : get_number (arg); if (tpnum <= 0) { - printf_filtered ("bad tracepoint number at or near '%s'\n", instring); + if (instring && *instring) + printf_filtered ("bad tracepoint number at or near '%s'\n", instring); + else + printf_filtered ("Tracepoint argument missing and no previous tracepoint\n"); return NULL; } @@ -648,7 +659,7 @@ map_args_over_tracepoints (args, from_tty, opcode) while (*args) { QUIT; /* give user option to bail out with ^C */ - t = get_tracepoint_by_number (&args, 1); + t = get_tracepoint_by_number (&args, 1, 0); tracepoint_operation (t, from_tty, opcode); while (*args == ' ' || *args == '\t') args++; @@ -707,7 +718,7 @@ trace_pass_command (args, from_tty) int all = 0; if (args == 0 || *args == 0) - error ("PASS command requires an argument (count + optional TP num)"); + error ("passcount command requires an argument (count + optional TP num)"); count = strtoul (args, &args, 10); /* count comes first, then TP num */ @@ -722,7 +733,7 @@ trace_pass_command (args, from_tty) error ("Junk at end of arguments."); } else - t1 = get_tracepoint_by_number (&args, 1); + t1 = get_tracepoint_by_number (&args, 1, 1); do { @@ -738,9 +749,9 @@ trace_pass_command (args, from_tty) printf_filtered ("Setting tracepoint %d's passcount to %d\n", t2->number, count); } + if (! all && *args) + t1 = get_tracepoint_by_number (&args, 1, 0); } - if (! all) - t1 = get_tracepoint_by_number (&args, 1); } while (*args); } @@ -793,7 +804,7 @@ trace_actions_command (args, from_tty) char tmpbuf[128]; char *end_msg = "End with a line saying just \"end\"."; - t = get_tracepoint_by_number (&args, 0); + t = get_tracepoint_by_number (&args, 0, 1); if (t) { sprintf (tmpbuf, "Enter actions for tracepoint %d, one per line.", @@ -1725,7 +1736,7 @@ remote_set_transparent_ranges (void) if (anysecs) { putpkt (target_buf); - getpkt (target_buf, 0); + getpkt (target_buf, sizeof (target_buf), 0); } } @@ -1753,7 +1764,7 @@ trace_start_command (args, from_tty) if (target_is_remote ()) { putpkt ("QTinit"); - remote_get_noisy_reply (target_buf); + remote_get_noisy_reply (target_buf, sizeof (target_buf)); if (strcmp (target_buf, "OK")) error ("Target does not support this command."); @@ -1769,7 +1780,7 @@ trace_start_command (args, from_tty) if (t->actions) strcat (buf, "-"); putpkt (buf); - remote_get_noisy_reply (target_buf); + remote_get_noisy_reply (target_buf, sizeof (target_buf)); if (strcmp (target_buf, "OK")) error ("Target does not support tracepoints."); @@ -1793,7 +1804,7 @@ trace_start_command (args, from_tty) ((tdp_actions[ndx + 1] || stepping_actions) ? '-' : 0)); putpkt (buf); - remote_get_noisy_reply (target_buf); + remote_get_noisy_reply (target_buf, sizeof (target_buf)); if (strcmp (target_buf, "OK")) error ("Error on target while setting tracepoints."); } @@ -1809,7 +1820,7 @@ trace_start_command (args, from_tty) stepping_actions[ndx], (stepping_actions[ndx + 1] ? "-" : "")); putpkt (buf); - remote_get_noisy_reply (target_buf); + remote_get_noisy_reply (target_buf, sizeof (target_buf)); if (strcmp (target_buf, "OK")) error ("Error on target while setting tracepoints."); } @@ -1822,7 +1833,7 @@ trace_start_command (args, from_tty) remote_set_transparent_ranges (); /* Now insert traps and begin collecting data */ putpkt ("QTStart"); - remote_get_noisy_reply (target_buf); + remote_get_noisy_reply (target_buf, sizeof (target_buf)); if (strcmp (target_buf, "OK")) error ("Bogus reply from target: %s", target_buf); set_traceframe_num (-1); /* all old traceframes invalidated */ @@ -1846,7 +1857,7 @@ trace_stop_command (args, from_tty) if (target_is_remote ()) { putpkt ("QTStop"); - remote_get_noisy_reply (target_buf); + remote_get_noisy_reply (target_buf, sizeof (target_buf)); if (strcmp (target_buf, "OK")) error ("Bogus reply from target: %s", target_buf); trace_running_p = 0; @@ -1868,7 +1879,7 @@ trace_status_command (args, from_tty) if (target_is_remote ()) { putpkt ("qTStatus"); - remote_get_noisy_reply (target_buf); + remote_get_noisy_reply (target_buf, sizeof (target_buf)); if (target_buf[0] != 'T' || (target_buf[1] != '0' && target_buf[1] != '1')) @@ -1883,9 +1894,9 @@ trace_status_command (args, from_tty) /* Worker function for the various flavors of the tfind command */ static void -finish_tfind_command (msg, from_tty) - char *msg; - int from_tty; +finish_tfind_command (char *msg, + long sizeof_msg, + int from_tty) { int target_frameno = -1, target_tracept = -1; CORE_ADDR old_frame_addr; @@ -1896,7 +1907,7 @@ finish_tfind_command (msg, from_tty) old_func = find_pc_function (read_pc ()); putpkt (msg); - reply = remote_get_noisy_reply (msg); + reply = remote_get_noisy_reply (msg, sizeof_msg); while (reply && *reply) switch (*reply) @@ -2040,7 +2051,7 @@ trace_find_command (args, from_tty) error ("invalid input (%d is less than zero)", frameno); sprintf (target_buf, "QTFrame:%x", frameno); - finish_tfind_command (target_buf, from_tty); + finish_tfind_command (target_buf, sizeof (target_buf), from_tty); } else error ("Trace can only be run on remote targets."); @@ -2091,7 +2102,7 @@ trace_find_pc_command (args, from_tty) sprintf_vma (tmp, pc); sprintf (target_buf, "QTFrame:pc:%s", tmp); - finish_tfind_command (target_buf, from_tty); + finish_tfind_command (target_buf, sizeof (target_buf), from_tty); } else error ("Trace can only be run on remote targets."); @@ -2116,7 +2127,7 @@ trace_find_tracepoint_command (args, from_tty) tdp = parse_and_eval_address (args); sprintf (target_buf, "QTFrame:tdp:%x", tdp); - finish_tfind_command (target_buf, from_tty); + finish_tfind_command (target_buf, sizeof (target_buf), from_tty); } else error ("Trace can only be run on remote targets."); @@ -2212,7 +2223,7 @@ trace_find_line_command (args, from_tty) sprintf (target_buf, "QTFrame:range:%s:%s", startpc_str, endpc_str); else /* find OUTSIDE OF range of CURRENT line */ sprintf (target_buf, "QTFrame:outside:%s:%s", startpc_str, endpc_str); - finish_tfind_command (target_buf, from_tty); + finish_tfind_command (target_buf, sizeof (target_buf), from_tty); do_cleanups (old_chain); } else @@ -2254,7 +2265,7 @@ trace_find_range_command (args, from_tty) sprintf_vma (start_str, start); sprintf_vma (stop_str, stop); sprintf (target_buf, "QTFrame:range:%s:%s", start_str, stop_str); - finish_tfind_command (target_buf, from_tty); + finish_tfind_command (target_buf, sizeof (target_buf), from_tty); } else error ("Trace can only be run on remote targets."); @@ -2295,7 +2306,7 @@ trace_find_outside_command (args, from_tty) sprintf_vma (start_str, start); sprintf_vma (stop_str, stop); sprintf (target_buf, "QTFrame:outside:%s:%s", start_str, stop_str); - finish_tfind_command (target_buf, from_tty); + finish_tfind_command (target_buf, sizeof (target_buf), from_tty); } else error ("Trace can only be run on remote targets."); diff --git a/gdb/tracepoint.h b/gdb/tracepoint.h index d61ab40abb4..c97b367d839 100644 --- a/gdb/tracepoint.h +++ b/gdb/tracepoint.h @@ -121,7 +121,7 @@ void (*modify_tracepoint_hook) PARAMS ((struct tracepoint *)); void (*trace_find_hook) PARAMS ((char *arg, int from_tty)); void (*trace_start_stop_hook) PARAMS ((int start, int from_tty)); -struct tracepoint *get_tracepoint_by_number PARAMS ((char **, int)); +struct tracepoint *get_tracepoint_by_number PARAMS ((char **, int, int)); int get_traceframe_number PARAMS ((void)); void free_actions PARAMS ((struct tracepoint *)); enum actionline_type validate_actionline PARAMS ((char **, diff --git a/gdb/utils.c b/gdb/utils.c index 9760cab4756..cbaf0cc9dfd 100644 --- a/gdb/utils.c +++ b/gdb/utils.c @@ -98,6 +98,7 @@ static struct cleanup *exec_error_cleanup_chain; support async execution. The finish and until commands use it. So does the target extended-remote command. */ struct continuation *cmd_continuation; +struct continuation *intermediate_continuation; /* Nonzero if we have job control. */ @@ -406,7 +407,7 @@ null_cleanup (arg) } /* Add a continuation to the continuation list, the gloabl list - cmd_continuation. */ + cmd_continuation. The new continuation will be added at the front.*/ void add_continuation (continuation_hook, arg_list) void (*continuation_hook) PARAMS ((struct continuation_arg *)); @@ -422,32 +423,109 @@ add_continuation (continuation_hook, arg_list) } /* Walk down the cmd_continuation list, and execute all the - continuations. */ + continuations. There is a problem though. In some cases new + continuations may be added while we are in the middle of this + loop. If this happens they will be added in the front, and done + before we have a chance of exhausting those that were already + there. We need to then save the beginning of the list in a pointer + and do the continuations from there on, instead of using the + global beginning of list as our iteration pointer.*/ void do_all_continuations () { struct continuation *continuation_ptr; + struct continuation *saved_continuation; + + /* Copy the list header into another pointer, and set the global + list header to null, so that the global list can change as a side + effect of invoking the continuations and the processing of + the preexisting continuations will not be affected. */ + continuation_ptr = cmd_continuation; + cmd_continuation = NULL; + + /* Work now on the list we have set aside. */ + while (continuation_ptr) + { + (continuation_ptr->continuation_hook) (continuation_ptr->arg_list); + saved_continuation = continuation_ptr; + continuation_ptr = continuation_ptr->next; + free (saved_continuation); + } +} + +/* Walk down the cmd_continuation list, and get rid of all the + continuations. */ +void +discard_all_continuations () +{ + struct continuation *continuation_ptr; while (cmd_continuation) { - (cmd_continuation->continuation_hook) (cmd_continuation->arg_list); continuation_ptr = cmd_continuation; cmd_continuation = continuation_ptr->next; free (continuation_ptr); } } +/* Add a continuation to the continuation list, the gloabl list + intermediate_continuation. The new continuation will be added at the front.*/ +void +add_intermediate_continuation (continuation_hook, arg_list) + void (*continuation_hook) PARAMS ((struct continuation_arg *)); + struct continuation_arg *arg_list; +{ + struct continuation *continuation_ptr; + + continuation_ptr = (struct continuation *) xmalloc (sizeof (struct continuation)); + continuation_ptr->continuation_hook = continuation_hook; + continuation_ptr->arg_list = arg_list; + continuation_ptr->next = intermediate_continuation; + intermediate_continuation = continuation_ptr; +} + +/* Walk down the cmd_continuation list, and execute all the + continuations. There is a problem though. In some cases new + continuations may be added while we are in the middle of this + loop. If this happens they will be added in the front, and done + before we have a chance of exhausting those that were already + there. We need to then save the beginning of the list in a pointer + and do the continuations from there on, instead of using the + global beginning of list as our iteration pointer.*/ +void +do_all_intermediate_continuations () +{ + struct continuation *continuation_ptr; + struct continuation *saved_continuation; + + /* Copy the list header into another pointer, and set the global + list header to null, so that the global list can change as a side + effect of invoking the continuations and the processing of + the preexisting continuations will not be affected. */ + continuation_ptr = intermediate_continuation; + intermediate_continuation = NULL; + + /* Work now on the list we have set aside. */ + while (continuation_ptr) + { + (continuation_ptr->continuation_hook) (continuation_ptr->arg_list); + saved_continuation = continuation_ptr; + continuation_ptr = continuation_ptr->next; + free (saved_continuation); + } +} + /* Walk down the cmd_continuation list, and get rid of all the continuations. */ void -discard_all_continuations () +discard_all_intermediate_continuations () { struct continuation *continuation_ptr; - while (cmd_continuation) + while (intermediate_continuation) { - continuation_ptr = cmd_continuation; - cmd_continuation = continuation_ptr->next; + continuation_ptr = intermediate_continuation; + intermediate_continuation = continuation_ptr->next; free (continuation_ptr); } } @@ -525,17 +603,28 @@ error_begin () NORETURN void verror (const char *string, va_list args) { + char *err_string; + struct cleanup *err_string_cleanup; /* FIXME: cagney/1999-11-10: All error calls should come here. Unfortunatly some code uses the sequence: error_begin(); print error message; return_to_top_level. That code should be flushed. */ error_begin (); - vfprintf_filtered (gdb_stderr, string, args); - fprintf_filtered (gdb_stderr, "\n"); - /* Save it as the last error as well (no newline) */ + /* NOTE: It's tempting to just do the following... + vfprintf_filtered (gdb_stderr, string, args); + and then follow with a similar looking statement to cause the message + to also go to gdb_lasterr. But if we do this, we'll be traversing the + va_list twice which works on some platforms and fails miserably on + others. */ + /* Save it as the last error */ gdb_file_rewind (gdb_lasterr); vfprintf_filtered (gdb_lasterr, string, args); - va_end (args); + /* Retrieve the last error and print it to gdb_stderr */ + err_string = error_last_message (); + err_string_cleanup = make_cleanup (free, err_string); + fputs_filtered (err_string, gdb_stderr); + fprintf_filtered (gdb_stderr, "\n"); + do_cleanups (err_string_cleanup); return_to_top_level (RETURN_ERROR); } diff --git a/gdb/valops.c b/gdb/valops.c index 515531f17ab..66e35e74300 100644 --- a/gdb/valops.c +++ b/gdb/valops.c @@ -662,8 +662,8 @@ value_assign (toval, fromval) > len * HOST_CHAR_BIT) /* Getting this right would involve being very careful about byte order. */ - error ("\ -Can't handle bitfield which doesn't fit in a single register."); + error ("Can't assign to bitfields that cross register " + "boundaries."); read_register_bytes (VALUE_ADDRESS (toval) + VALUE_OFFSET (toval), buffer, len); diff --git a/gdb/value.h b/gdb/value.h index 5a92882bc08..d1b68911379 100644 --- a/gdb/value.h +++ b/gdb/value.h @@ -38,7 +38,9 @@ struct value /* Location of value (if lval). */ union { - /* Address in inferior or byte of registers structure. */ + /* If lval == lval_memory, this is the address in the inferior. + If lval == lval_register, this is the byte offset into the + registers structure. */ CORE_ADDR address; /* Pointer to internal variable. */ struct internalvar *internalvar; @@ -48,8 +50,10 @@ struct value } location; /* Describes offset of a value within lval of a structure in bytes. - This is used in retrieving contents from target memory. [Note also - the member embedded_offset below.] */ + If lval == lval_memory, this is an offset to the address. + If lval == lval_register, this is a further offset from + location.address within the registers structure. + Note also the member embedded_offset below. */ int offset; /* Only used for bitfields; number of bits contained in them. */ int bitsize; diff --git a/gdb/win32-nat.c b/gdb/win32-nat.c index 24d8057cc8f..b95ec6d2a75 100644 --- a/gdb/win32-nat.c +++ b/gdb/win32-nat.c @@ -40,6 +40,7 @@ #include "windefs.h" #else /* other WIN32 compiler */ #include <windows.h> +#include <imagehlp.h> #endif #include "buildsym.h" @@ -49,6 +50,7 @@ #include "gdbthread.h" #include "gdbcmd.h" #include <sys/param.h> +#include <unistd.h> /* The ui's event loop. */ extern int (*ui_loop_hook) PARAMS ((int signo)); @@ -78,9 +80,6 @@ static void child_stop PARAMS ((void)); static int win32_child_thread_alive PARAMS ((int)); void child_kill_inferior PARAMS ((void)); -static int last_sig = 0; /* Set if a signal was received from the - debugged process */ - /* Thread information structure used to track information that is not available in gdb's thread structure. */ typedef struct thread_info_struct @@ -91,11 +90,13 @@ typedef struct thread_info_struct char *name; int suspend_count; CONTEXT context; - } -thread_info; + STACKFRAME sf; + } thread_info; + +static thread_info thread_head = {NULL}; -static thread_info thread_head = -{NULL}; +/* The saved state for a continue after breaking back to gdb. */ +static DWORD continue_status; /* The process and thread handles for the above context. */ @@ -111,7 +112,7 @@ static int event_count = 0; /* User options. */ static int new_console = 0; -static int new_group = 0; +static int new_group = 1; static int debug_exec = 0; /* show execution */ static int debug_events = 0; /* show events from kernel */ static int debug_memory = 0; /* show target memory accesses */ @@ -157,6 +158,13 @@ static const int mappings[] = context_offset (FloatSave.RegisterArea[5 * 10]), context_offset (FloatSave.RegisterArea[6 * 10]), context_offset (FloatSave.RegisterArea[7 * 10]), + context_offset (FloatSave.ControlWord), + context_offset (FloatSave.StatusWord), + context_offset (FloatSave.TagWord), + context_offset (FloatSave.ErrorSelector), + context_offset (FloatSave.ErrorOffset), + context_offset (FloatSave.DataSelector), + context_offset (FloatSave.DataOffset), }; /* This vector maps the target's idea of an exception (extracted @@ -276,7 +284,19 @@ check (BOOL ok, const char *file, int line) static void do_child_fetch_inferior_registers (int r) { - if (r >= 0) + char *context_offset = ((char *) ¤t_thread->context) + mappings[r]; + long l; + if (r == FCS_REGNUM) + { + l = *((long *)context_offset) & 0xffff; + supply_register (r, (char *) &l); + } + else if (r == FOP_REGNUM) + { + l = (*((long *)context_offset) >> 16) & ((1 << 11) - 1); + supply_register (r, (char *) &l); + } + else if (r >= 0) supply_register (r, ((char *) ¤t_thread->context) + mappings[r]); else { @@ -312,6 +332,90 @@ child_store_inferior_registers (int r) do_child_store_inferior_registers (r); } +#include <psapi.h> +static int psapi_loaded = 0; +static HMODULE psapi_module_handle = NULL; +static BOOL WINAPI (*psapi_EnumProcessModules)(HANDLE, HMODULE*, DWORD, LPDWORD)= NULL; +static BOOL WINAPI (*psapi_GetModuleInformation) (HANDLE, HMODULE, LPMODULEINFO, DWORD)= NULL; +static DWORD WINAPI (*psapi_GetModuleFileNameExA) (HANDLE, HMODULE, LPSTR, DWORD)= NULL; + +int psapi_get_dll_name (DWORD BaseAddress, char *dll_name_ret) +{ + DWORD len; + MODULEINFO mi; + int i; + HMODULE dh_buf [ 1 ]; + HMODULE* DllHandle = dh_buf; + DWORD cbNeeded; + BOOL ok; + + if (!psapi_loaded || + psapi_EnumProcessModules == NULL || + psapi_GetModuleInformation == NULL || + psapi_GetModuleFileNameExA == NULL) + { + if (psapi_loaded)goto failed; + psapi_loaded = 1; + psapi_module_handle = LoadLibrary ("psapi.dll"); + if (!psapi_module_handle) + { + /* printf_unfiltered ("error loading psapi.dll: %u", GetLastError ());*/ + goto failed; + } + psapi_EnumProcessModules = GetProcAddress (psapi_module_handle, "EnumProcessModules" ); + psapi_GetModuleInformation = GetProcAddress (psapi_module_handle, "GetModuleInformation"); + psapi_GetModuleFileNameExA = (void *) GetProcAddress (psapi_module_handle, + "GetModuleFileNameExA"); + if (psapi_EnumProcessModules == NULL || + psapi_GetModuleInformation == NULL || + psapi_GetModuleFileNameExA == NULL) + goto failed; + } + + cbNeeded = 0; + ok = (*psapi_EnumProcessModules) (current_process_handle, + DllHandle, + sizeof (HMODULE), + &cbNeeded); + + if (!ok || !cbNeeded) + goto failed; + + DllHandle = (HMODULE*) alloca (cbNeeded); + if (!DllHandle) + goto failed; + + ok = (*psapi_EnumProcessModules) (current_process_handle, + DllHandle, + cbNeeded, + &cbNeeded); + if (!ok) + goto failed; + + for (i = 0; i < cbNeeded / sizeof (HMODULE); i++) + { + if (!(*psapi_GetModuleInformation) (current_process_handle, + DllHandle [i], + &mi, + sizeof (mi))) + error ("Can't get module info"); + + len = (*psapi_GetModuleFileNameExA) (current_process_handle, + DllHandle [i], + dll_name_ret, + MAX_PATH); + if (len == 0) + error ("Error getting dll name: %u\n", GetLastError ()); + + if ((DWORD) (mi.lpBaseOfDll) == BaseAddress) + return 1; + } + +failed: + dll_name_ret[0] = '\0'; + return 0; +} + /* Wait for child to do something. Return pid of child, or -1 in case of error; store status through argument pointer OURSTATUS. */ @@ -330,25 +434,10 @@ handle_load_dll (PTR dummy) memset (§ion_addrs, 0, sizeof (section_addrs)); dll_buf[0] = dll_buf[sizeof (dll_buf) - 1] = '\0'; - /* The following code attempts to find the name of the dll by reading the - name from the processes memory. Unfortunately it doesn't work right. - Doing this the "right way" for Windows is very difficult. FIXME */ -#ifdef DOESNT_WORK - memset (&minfo, 0, sizeof minfo); - if (VirtualQueryEx (current_process_handle, (LPCVOID) event->lpBaseOfDll, - &minfo, sizeof (minfo)) && minfo.BaseAddress) - { - DWORD len; - IMAGE_DOS_HEADER *hmm0 = (IMAGE_DOS_HEADER *) minfo.BaseAddress; - HMODULE hmm = (HMODULE) (((DWORD) hmm0) + hmm0->e_lfanew); + if (!psapi_get_dll_name ((DWORD) (event->lpBaseOfDll), dll_buf)) + dll_buf[0] = dll_buf[sizeof(dll_buf) - 1] = '\0'; - if ((len = GetModuleFileName (hmm, dll_buf, MAX_PATH))) - { - dll_name = dll_buf; - dll_name[len] = '\0'; - } - } -#endif + dll_name = dll_buf; /* Attempt to read the name of the dll that was detected. This is documented to work only when actively debugging @@ -442,13 +531,13 @@ handle_output_debug_string (struct target_waitstatus *ourstatus) if (strncmp (s, CYGWIN_SIGNAL_STRING, sizeof (CYGWIN_SIGNAL_STRING) - 1)) { - warning (s); + if (strncmp (s, "cYg", 3)) + warning (s); } - else { char *p; - /*last_sig = */ strtol (s + sizeof (CYGWIN_SIGNAL_STRING) - 1, &p, 0); - gotasig = target_signal_from_host (last_sig); + int sig = strtol (s + sizeof (CYGWIN_SIGNAL_STRING) - 1, &p, 0); + gotasig = target_signal_from_host (sig); ourstatus->value.sig = gotasig; if (gotasig) ourstatus->kind = TARGET_WAITKIND_STOPPED; @@ -476,11 +565,13 @@ handle_exception (struct target_waitstatus *ourstatus) DEBUG_EXCEPT (("gdb: Target exception ACCESS_VIOLATION at 0x%08x\n", current_event.u.Exception.ExceptionRecord.ExceptionAddress)); ourstatus->value.sig = TARGET_SIGNAL_SEGV; + continue_status = DBG_EXCEPTION_NOT_HANDLED; break; case STATUS_STACK_OVERFLOW: DEBUG_EXCEPT (("gdb: Target exception STACK_OVERFLOW at 0x%08x\n", current_event.u.Exception.ExceptionRecord.ExceptionAddress)); ourstatus->value.sig = TARGET_SIGNAL_SEGV; + continue_status = DBG_EXCEPTION_NOT_HANDLED; break; case EXCEPTION_BREAKPOINT: DEBUG_EXCEPT (("gdb: Target exception BREAKPOINT at 0x%08x\n", @@ -491,8 +582,7 @@ handle_exception (struct target_waitstatus *ourstatus) DEBUG_EXCEPT (("gdb: Target exception CONTROL_C at 0x%08x\n", current_event.u.Exception.ExceptionRecord.ExceptionAddress)); ourstatus->value.sig = TARGET_SIGNAL_INT; - /* User typed CTRL-C. Continue with this status */ - last_sig = SIGINT; /* FIXME - should check pass state */ + continue_status = DBG_EXCEPTION_NOT_HANDLED; break; case EXCEPTION_SINGLE_STEP: DEBUG_EXCEPT (("gdb: Target exception SINGLE_STEP at 0x%08x\n", @@ -510,6 +600,7 @@ handle_exception (struct target_waitstatus *ourstatus) current_event.u.Exception.ExceptionRecord.ExceptionCode, current_event.u.Exception.ExceptionRecord.ExceptionAddress); ourstatus->value.sig = TARGET_SIGNAL_UNKNOWN; + continue_status = DBG_EXCEPTION_NOT_HANDLED; break; } exception_count++; @@ -519,7 +610,7 @@ handle_exception (struct target_waitstatus *ourstatus) /* Resume all artificially suspended threads if we are continuing execution */ static BOOL -child_continue (DWORD continue_status, int id) +child_continue (int id) { int i; thread_info *th; @@ -530,6 +621,7 @@ child_continue (DWORD continue_status, int id) res = ContinueDebugEvent (current_event.dwProcessId, current_event.dwThreadId, continue_status); + continue_status = 0; if (res) for (th = &thread_head; (th = th->next) != NULL;) if (((id == -1) || (id == th->id)) && th->suspend_count) @@ -543,8 +635,133 @@ child_continue (DWORD continue_status, int id) } static int +get_child_debug_event (int pid, struct target_waitstatus *ourstatus, + DWORD *event_code, int *retval) +{ + BOOL debug_event; + int breakout = 1; + + if (!(debug_event = WaitForDebugEvent (¤t_event, 20))) + { + breakout = *retval = *event_code = 0; + goto out; + } + + event_count++; + continue_status = DBG_CONTINUE; + *retval = 0; + + switch (*event_code = current_event.dwDebugEventCode) + { + case CREATE_THREAD_DEBUG_EVENT: + DEBUG_EVENTS (("gdb: kernel event for pid=%d tid=%x code=%s)\n", + (unsigned) current_event.dwProcessId, + (unsigned) current_event.dwThreadId, + "CREATE_THREAD_DEBUG_EVENT")); + /* Record the existence of this thread */ + child_add_thread (current_event.dwThreadId, + current_event.u.CreateThread.hThread); + if (info_verbose) + printf_unfiltered ("[New %s]\n", + target_pid_to_str (current_event.dwThreadId)); + break; + + case EXIT_THREAD_DEBUG_EVENT: + DEBUG_EVENTS (("gdb: kernel event for pid=%d tid=%d code=%s)\n", + (unsigned) current_event.dwProcessId, + (unsigned) current_event.dwThreadId, + "EXIT_THREAD_DEBUG_EVENT")); + child_delete_thread (current_event.dwThreadId); + break; + + case CREATE_PROCESS_DEBUG_EVENT: + DEBUG_EVENTS (("gdb: kernel event for pid=%d tid=%d code=%s)\n", + (unsigned) current_event.dwProcessId, + (unsigned) current_event.dwThreadId, + "CREATE_PROCESS_DEBUG_EVENT")); + current_process_handle = current_event.u.CreateProcessInfo.hProcess; + + main_thread_id = inferior_pid = current_event.dwThreadId; + /* Add the main thread */ + current_thread = child_add_thread (inferior_pid, + current_event.u.CreateProcessInfo.hThread); + break; + + case EXIT_PROCESS_DEBUG_EVENT: + DEBUG_EVENTS (("gdb: kernel event for pid=%d tid=%d code=%s)\n", + (unsigned) current_event.dwProcessId, + (unsigned) current_event.dwThreadId, + "EXIT_PROCESS_DEBUG_EVENT")); + ourstatus->kind = TARGET_WAITKIND_EXITED; + ourstatus->value.integer = current_event.u.ExitProcess.dwExitCode; + CloseHandle (current_process_handle); + *retval = current_event.dwProcessId; + goto out; + + case LOAD_DLL_DEBUG_EVENT: + DEBUG_EVENTS (("gdb: kernel event for pid=%d tid=%d code=%s)\n", + (unsigned) current_event.dwProcessId, + (unsigned) current_event.dwThreadId, + "LOAD_DLL_DEBUG_EVENT")); + catch_errors (handle_load_dll, NULL, "", RETURN_MASK_ALL); + registers_changed (); /* mark all regs invalid */ + break; + + case UNLOAD_DLL_DEBUG_EVENT: + DEBUG_EVENTS (("gdb: kernel event for pid=%d tid=%d code=%s)\n", + (unsigned) current_event.dwProcessId, + (unsigned) current_event.dwThreadId, + "UNLOAD_DLL_DEBUG_EVENT")); + break; /* FIXME: don't know what to do here */ + + case EXCEPTION_DEBUG_EVENT: + DEBUG_EVENTS (("gdb: kernel event for pid=%d tid=%d code=%s)\n", + (unsigned) current_event.dwProcessId, + (unsigned) current_event.dwThreadId, + "EXCEPTION_DEBUG_EVENT")); + if (handle_exception (ourstatus)) /* sets continue_status */ + { + *retval = current_event.dwThreadId; + goto out; + } + break; + + case OUTPUT_DEBUG_STRING_EVENT: + DEBUG_EVENTS (("gdb: kernel event for pid=%d tid=%d code=%s)\n", + (unsigned) current_event.dwProcessId, + (unsigned) current_event.dwThreadId, + "OUTPUT_DEBUG_STRING_EVENT")); + if (handle_output_debug_string (ourstatus)) + { + *retval = main_thread_id; + goto out; + } + break; + default: + printf_unfiltered ("gdb: kernel event for pid=%d tid=%d\n", + current_event.dwProcessId, + current_event.dwThreadId); + printf_unfiltered (" unknown event code %d\n", + current_event.dwDebugEventCode); + break; + } + + breakout = 0; + CHECK (child_continue (-1)); + continue_status = 0; + +out: + return breakout; +} + + +/* Wait for interesting events to occur in the target process. */ +static int child_wait (int pid, struct target_waitstatus *ourstatus) { + DWORD event_code; + int retval; + /* We loop when we get a non-standard exception rather than return with a SPURIOUS because resume can try and step or modify things, which needs a current_thread->h. But some of these exceptions mark @@ -553,102 +770,10 @@ child_wait (int pid, struct target_waitstatus *ourstatus) while (1) { - DWORD continue_status; - BOOL debug_event = WaitForDebugEvent (¤t_event, 20); - char *p; - thread_info *th; - int sig; - - if (debug_event) - { - event_count++; - - continue_status = DBG_CONTINUE; - - switch (current_event.dwDebugEventCode) - { - case CREATE_THREAD_DEBUG_EVENT: - DEBUG_EVENTS (("gdb: kernel event for pid=%d tid=%x code=%s)\n", - current_event.dwProcessId, current_event.dwThreadId, - "CREATE_THREAD_DEBUG_EVENT")); - /* Record the existence of this thread */ - child_add_thread (current_event.dwThreadId, - current_event.u.CreateThread.hThread); - if (info_verbose) - printf_unfiltered ("[New %s]\n", - target_pid_to_str (current_event.dwThreadId)); - break; - - case EXIT_THREAD_DEBUG_EVENT: - DEBUG_EVENTS (("gdb: kernel event for pid=%d tid=%d code=%s)\n", - current_event.dwProcessId, current_event.dwThreadId, - "EXIT_THREAD_DEBUG_EVENT")); - child_delete_thread (current_event.dwThreadId); - break; - - case CREATE_PROCESS_DEBUG_EVENT: - DEBUG_EVENTS (("gdb: kernel event for pid=%d tid=%d code=%s)\n", - current_event.dwProcessId, current_event.dwThreadId, - "CREATE_PROCESS_DEBUG_EVENT")); - current_process_handle = current_event.u.CreateProcessInfo.hProcess; - - main_thread_id = inferior_pid = current_event.dwThreadId; - /* Add the main thread */ - current_thread = child_add_thread (inferior_pid, - current_event.u.CreateProcessInfo.hThread); - break; - - case EXIT_PROCESS_DEBUG_EVENT: - DEBUG_EVENTS (("gdb: kernel event for pid=%d tid=%d code=%s)\n", - current_event.dwProcessId, current_event.dwThreadId, - "EXIT_PROCESS_DEBUG_EVENT")); - ourstatus->kind = TARGET_WAITKIND_EXITED; - ourstatus->value.integer = current_event.u.ExitProcess.dwExitCode; - CloseHandle (current_process_handle); - return current_event.dwProcessId; - break; - - case LOAD_DLL_DEBUG_EVENT: - DEBUG_EVENTS (("gdb: kernel event for pid=%d tid=%d code=%s)\n", - current_event.dwProcessId, current_event.dwThreadId, - "LOAD_DLL_DEBUG_EVENT")); - catch_errors (handle_load_dll, NULL, "", RETURN_MASK_ALL); - registers_changed (); /* mark all regs invalid */ - break; - - case UNLOAD_DLL_DEBUG_EVENT: - DEBUG_EVENTS (("gdb: kernel event for pid=%d tid=%d code=%s)\n", - current_event.dwProcessId, current_event.dwThreadId, - "UNLOAD_DLL_DEBUG_EVENT")); - break; /* FIXME: don't know what to do here */ - - case EXCEPTION_DEBUG_EVENT: - DEBUG_EVENTS (("gdb: kernel event for pid=%d tid=%d code=%s)\n", - current_event.dwProcessId, current_event.dwThreadId, - "EXCEPTION_DEBUG_EVENT")); - if (handle_exception (ourstatus)) - return current_event.dwThreadId; - continue_status = DBG_EXCEPTION_NOT_HANDLED; - break; - - case OUTPUT_DEBUG_STRING_EVENT: /* message from the kernel */ - DEBUG_EVENTS (("gdb: kernel event for pid=%d tid=%d code=%s)\n", - current_event.dwProcessId, current_event.dwThreadId, - "OUTPUT_DEBUG_STRING_EVENT")); - if (handle_output_debug_string (ourstatus)) - return main_thread_id; - break; - default: - printf_unfiltered ("gdb: kernel event for pid=%d tid=%d\n", - current_event.dwProcessId, - current_event.dwThreadId); - printf_unfiltered (" unknown event code %d\n", - current_event.dwDebugEventCode); - break; - } - - CHECK (child_continue (continue_status, -1)); - } + if (continue_status != 0) + CHECK (child_continue (-1)); + if (get_child_debug_event (pid, ourstatus, &event_code, &retval)) + return retval; else { int detach = 0; @@ -754,13 +879,13 @@ child_create_inferior (exec_file, allargs, env) char *temp; int envlen; int i; - STARTUPINFO si; PROCESS_INFORMATION pi; struct target_waitstatus dummy; BOOL ret; DWORD flags; char *args; + DWORD event_code; if (!exec_file) { @@ -887,16 +1012,19 @@ child_create_inferior (exec_file, allargs, env) target_terminal_init (); target_terminal_inferior (); - /* Ignore the first trap */ - child_wait (inferior_pid, &dummy); + /* Run until process and threads are loaded */ + do + get_child_debug_event (inferior_pid, &dummy, &event_code, &ret); + while (event_code != EXCEPTION_DEBUG_EVENT); - proceed ((CORE_ADDR) -1, TARGET_SIGNAL_0, 0); + proceed ((CORE_ADDR) - 1, TARGET_SIGNAL_0, 0); } static void child_mourn_inferior () { - (void) child_continue (DBG_CONTINUE, -1); + continue_status = DBG_CONTINUE; + (void) child_continue (-1); unpush_target (&child_ops); generic_mourn_inferior (); } @@ -908,7 +1036,7 @@ static void child_stop () { DEBUG_EVENTS (("gdb: GenerateConsoleCtrlEvent (CTRLC_EVENT, 0)\n")); - CHECK (GenerateConsoleCtrlEvent (CTRL_C_EVENT, 0)); + CHECK (GenerateConsoleCtrlEvent (CTRL_C_EVENT, current_event.dwProcessId)); registers_changed (); /* refresh register state */ } @@ -942,7 +1070,8 @@ child_kill_inferior (void) for (;;) { - if (!child_continue (DBG_CONTINUE, -1)) + continue_status = DBG_CONTINUE; + if (!child_continue (-1)) break; if (!WaitForDebugEvent (¤t_event, INFINITE)) break; @@ -962,8 +1091,6 @@ child_resume (int pid, int step, enum target_signal sig) { int i; thread_info *th; - DWORD continue_status = last_sig > 0 && last_sig < NSIG ? - DBG_EXCEPTION_NOT_HANDLED : DBG_CONTINUE; DEBUG_EXEC (("gdb: child_resume (pid=%d, step=%d, sig=%d);\n", pid, step, sig)); @@ -987,11 +1114,8 @@ child_resume (int pid, int step, enum target_signal sig) /* Allow continuing with the same signal that interrupted us. Otherwise complain. */ - if (sig && sig != last_sig) - fprintf_unfiltered (gdb_stderr, "Can't send signals to the child. signal %d\n", sig); - last_sig = 0; - child_continue (continue_status, pid); + child_continue (pid); } static void @@ -1131,3 +1255,40 @@ cygwin_pid_to_str (int pid) sprintf (buf, "thread %d.0x%x", current_event.dwProcessId, pid); return buf; } +#ifdef NOTYET +CORE_ADDR +win32_read_fp () +{ + STACKFRAME *sf = current_thread->sf; + + memset (&sf, 0, sizeof(sf)); + sf->AddrPC.Offset = current_thread->context.Eip; + sf->AddrPC.Mode = AddrModeFlat; + sf->AddrStack.Offset = current_thread->context.Esp; + sf->AddrStack.Mode = AddrModeFlat; + sf->AddrFrame.Offset = current_thread->context.Ebp; + if (!StackWalk (IMAGE_FILE_MACHINE_I386, current_process_handle, + current->thread->h, sf, NULL, NULL, + SymFunctionTableAccess, SymGetModuleBase, NULL)) + return NULL; + return (CORE_ADDR) sf.AddrFrame.Offset; +} + +CORE_ADDR +child_frame_chain(struct frame_info *thisframe) +{ + STACKFRAME *sf = current->thread->sf; +#if 0 + sf.AddrPC.Offset = thisframe->pc; + sf.AddrPC.Mode = AddrModeFlat; + sf.AddrStack.Offset = thisframe->; + sf.AddrStack.Mode = AddrModeFlat; + sf.AddrFrame.Offset = cx->Ebp; +#endif + if (!StackWalk (IMAGE_FILE_MACHINE_I386, current_process_handle, + current->thread->h, &sf, NULL, NULL, + SymFunctionTableAccess, SymGetModuleBase, NULL)) + return NULL; + return (CORE_ADDR) sf->AddrFrame.Offset; +} +#endif diff --git a/gdb/xcoffread.c b/gdb/xcoffread.c index 41ab7635a3d..944128293fa 100644 --- a/gdb/xcoffread.c +++ b/gdb/xcoffread.c @@ -753,7 +753,7 @@ process_linenos (start, end) start_subfile (fakename, (char *) 0); free (current_subfile->name); } - current_subfile->name = strdup (inclTable[ii].name); + current_subfile->name = xstrdup (inclTable[ii].name); #endif if (lv == lineTb) diff --git a/sim/ChangeLog b/sim/ChangeLog index eb1261fdffa..2dd4f3ab39a 100644 --- a/sim/ChangeLog +++ b/sim/ChangeLog @@ -1,3 +1,9 @@ +1999-11-18 Ben Elliston <bje@cygnus.com> + + * configure.in: Require autoconf 2.13 and remove obsolete + invocation of AC_C_CROSS. + * configure: Regenerate. + 1999-09-29 Doug Evans <devans@casey.cygnus.com> * configure.in: Configure the testsuite directory for thumb. diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog index eb432557bd5..bdaf8af8c30 100644 --- a/sim/arm/ChangeLog +++ b/sim/arm/ChangeLog @@ -1,3 +1,10 @@ +1999-11-22 Nick Clifton <nickc@cygnus.com> + + * armos.c (SWIread): Generate an error message if a huge read is + performed. + (SWIwrite): Generate an error message if a huge write is + performed. + 1999-10-27 Nick Clifton <nickc@cygnus.com> * thumbemu.c (ARMul_ThumbDecode): Accept 0xbebe as a thumb diff --git a/sim/arm/armemu.c b/sim/arm/armemu.c index fa994e06c2e..b9b669df076 100644 --- a/sim/arm/armemu.c +++ b/sim/arm/armemu.c @@ -878,7 +878,6 @@ mainswitch: break ; case 0x10 : /* TST reg and MRS CPSR and SWP word */ - #ifdef MODET if (BITS(4,11) == 0xB) { /* STRH register offset, no write-back, down, pre indexed */ @@ -2410,13 +2409,13 @@ mainswitch: * Co-Processor Data Transfers * \***************************************************************************/ - case 0xc0 : - case 0xc4 : /* Store , No WriteBack , Post Dec */ + case 0xc4 : + case 0xc0 : /* Store , No WriteBack , Post Dec */ ARMul_STC(state,instr,LHS) ; break ; - case 0xc1 : - case 0xc5 : /* Load , No WriteBack , Post Dec */ + case 0xc5 : + case 0xc1 : /* Load , No WriteBack , Post Dec */ ARMul_LDC(state,instr,LHS) ; break ; @@ -2511,7 +2510,8 @@ mainswitch: * Co-Processor Register Transfers (MCR) and Data Ops * \***************************************************************************/ - case 0xe0 : case 0xe2 : case 0xe4 : case 0xe6 : + case 0xe2 : + case 0xe0 : case 0xe4 : case 0xe6 : case 0xe8 : case 0xea : case 0xec : case 0xee : if (BIT(4)) { /* MCR */ if (DESTReg == 15) { diff --git a/sim/arm/armos.c b/sim/arm/armos.c index 9f0f1fee49b..be4cbaf1c1d 100644 --- a/sim/arm/armos.c +++ b/sim/arm/armos.c @@ -308,6 +308,12 @@ SWIread (ARMul_State *state, ARMword f, ARMword ptr, ARMword len) int i; char *local = malloc (len); + if (local == NULL) + { + fprintf (stderr, "sim: Unable to read 0x%x bytes - out of memory\n", len); + return; + } + res = read (f, local, len); if (res > 0) for (i = 0; i < res; i++) @@ -325,10 +331,15 @@ SWIwrite (ARMul_State *state, ARMword f, ARMword ptr, ARMword len) int i; char *local = malloc (len); - for (i = 0; i < len; i++) + if (local == NULL) { - local[i] = ARMul_ReadByte (state, ptr + i); + fprintf (stderr, "sim: Unable to write 0x%x bytes - out of memory\n", len); + return; } + + for (i = 0; i < len; i++) + local[i] = ARMul_ReadByte (state, ptr + i); + res = write (f, local, len); state->Reg[0] = res == -1 ? -1 : len - res; free (local); diff --git a/sim/common/ChangeLog b/sim/common/ChangeLog index c2d1c8c3c9b..1aa9ecc42c4 100644 --- a/sim/common/ChangeLog +++ b/sim/common/ChangeLog @@ -1,3 +1,34 @@ +1999-12-01 Dave Brolley <brolley@cygnus.com> + + * cgen-accfp.c (subsf): Check status code. + (mulsf): Ditto. + (negsf): Ditto. + (abssf): Ditto. + (sqrtsf): Ditto. + (invsf): Ditto. + (minsf): Ditto. + (maxsf): Ditto. + (subdf): Ditto. + (muldf): Ditto. + (divdf): Ditto. + (negdf): Ditto. + (absdf): Ditto. + (sqrtdf): Ditto. + (invdf): Ditto. + (mindf): Ditto. + (maxdf): Ditto. + +1999-11-26 Dave Brolley <brolley@cygnus.com> + + * cgen-par.h (fn_df_write): Mode of data is DF. + (sim_queue_fn_df_write): Mode of data is DF. + * cgen-par.c (sim_queue_fn_df_write): Mode of data is DF. + +1999-11-22 Dave Brolley <brolley@cygnus.com> + + * cgen-trace.c (SIZE_TRACE_BUF): Inxrease size of trace buffer. + * cgen-par.h (CGEN_WRITE_QUEUE_SIZE): Increase size of queue. + 1999-11-04 Dave Brolley <brolley@cygnus.com> * cgen-par.h (cgen_write_queue_kind): Add CGEN_FN_XI_WRITE and diff --git a/sim/common/cgen-accfp.c b/sim/common/cgen-accfp.c index 0ef61fd4185..e9175225a87 100644 --- a/sim/common/cgen-accfp.c +++ b/sim/common/cgen-accfp.c @@ -42,10 +42,13 @@ subsf (CGEN_FPU* fpu, SF x, SF y) sim_fpu op2; sim_fpu ans; unsigned32 res; + sim_fpu_status status; sim_fpu_32to (&op1, x); sim_fpu_32to (&op2, y); - sim_fpu_sub (&ans, &op1, &op2); + status = sim_fpu_sub (&ans, &op1, &op2); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to32 (&res, &ans); return res; @@ -58,10 +61,13 @@ mulsf (CGEN_FPU* fpu, SF x, SF y) sim_fpu op2; sim_fpu ans; unsigned32 res; + sim_fpu_status status; sim_fpu_32to (&op1, x); sim_fpu_32to (&op2, y); - sim_fpu_mul (&ans, &op1, &op2); + status = sim_fpu_mul (&ans, &op1, &op2); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to32 (&res, &ans); return res; @@ -92,9 +98,12 @@ negsf (CGEN_FPU* fpu, SF x) sim_fpu op1; sim_fpu ans; unsigned32 res; + sim_fpu_status status; sim_fpu_32to (&op1, x); - sim_fpu_neg (&ans, &op1); + status = sim_fpu_neg (&ans, &op1); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to32 (&res, &ans); return res; @@ -106,9 +115,12 @@ abssf (CGEN_FPU* fpu, SF x) sim_fpu op1; sim_fpu ans; unsigned32 res; + sim_fpu_status status; sim_fpu_32to (&op1, x); - sim_fpu_abs (&ans, &op1); + status = sim_fpu_abs (&ans, &op1); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to32 (&res, &ans); return res; @@ -120,9 +132,12 @@ sqrtsf (CGEN_FPU* fpu, SF x) sim_fpu op1; sim_fpu ans; unsigned32 res; + sim_fpu_status status; sim_fpu_32to (&op1, x); - sim_fpu_sqrt (&ans, &op1); + status = sim_fpu_sqrt (&ans, &op1); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to32 (&res, &ans); return res; @@ -134,9 +149,12 @@ invsf (CGEN_FPU* fpu, SF x) sim_fpu op1; sim_fpu ans; unsigned32 res; + sim_fpu_status status; sim_fpu_32to (&op1, x); - sim_fpu_inv (&ans, &op1); + status = sim_fpu_inv (&ans, &op1); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to32 (&res, &ans); return res; @@ -149,10 +167,13 @@ minsf (CGEN_FPU* fpu, SF x, SF y) sim_fpu op2; sim_fpu ans; unsigned32 res; + sim_fpu_status status; sim_fpu_32to (&op1, x); sim_fpu_32to (&op2, y); - sim_fpu_min (&ans, &op1, &op2); + status = sim_fpu_min (&ans, &op1, &op2); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to32 (&res, &ans); return res; @@ -165,10 +186,13 @@ maxsf (CGEN_FPU* fpu, SF x, SF y) sim_fpu op2; sim_fpu ans; unsigned32 res; + sim_fpu_status status; sim_fpu_32to (&op1, x); sim_fpu_32to (&op2, y); - sim_fpu_max (&ans, &op1, &op2); + status = sim_fpu_max (&ans, &op1, &op2); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to32 (&res, &ans); return res; @@ -354,10 +378,13 @@ subdf (CGEN_FPU* fpu, DF x, DF y) sim_fpu op2; sim_fpu ans; unsigned64 res; + sim_fpu_status status; sim_fpu_64to (&op1, x); sim_fpu_64to (&op2, y); - sim_fpu_sub (&ans, &op1, &op2); + status = sim_fpu_sub (&ans, &op1, &op2); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to64 (&res, &ans); return res; @@ -370,10 +397,13 @@ muldf (CGEN_FPU* fpu, DF x, DF y) sim_fpu op2; sim_fpu ans; unsigned64 res; + sim_fpu_status status; sim_fpu_64to (&op1, x); sim_fpu_64to (&op2, y); - sim_fpu_mul (&ans, &op1, &op2); + status = sim_fpu_mul (&ans, &op1, &op2); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to64 (&res, &ans); return res; @@ -386,10 +416,13 @@ divdf (CGEN_FPU* fpu, DF x, DF y) sim_fpu op2; sim_fpu ans; unsigned64 res; + sim_fpu_status status; sim_fpu_64to (&op1, x); sim_fpu_64to (&op2, y); - sim_fpu_div (&ans, &op1, &op2); + status = sim_fpu_div (&ans, &op1, &op2); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to64 (&res, &ans); return res; @@ -401,9 +434,12 @@ negdf (CGEN_FPU* fpu, DF x) sim_fpu op1; sim_fpu ans; unsigned64 res; + sim_fpu_status status; sim_fpu_64to (&op1, x); - sim_fpu_neg (&ans, &op1); + status = sim_fpu_neg (&ans, &op1); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to64 (&res, &ans); return res; @@ -415,9 +451,12 @@ absdf (CGEN_FPU* fpu, DF x) sim_fpu op1; sim_fpu ans; unsigned64 res; + sim_fpu_status status; sim_fpu_64to (&op1, x); - sim_fpu_abs (&ans, &op1); + status = sim_fpu_abs (&ans, &op1); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to64 (&res, &ans); return res; @@ -429,9 +468,12 @@ sqrtdf (CGEN_FPU* fpu, DF x) sim_fpu op1; sim_fpu ans; unsigned64 res; + sim_fpu_status status; sim_fpu_64to (&op1, x); - sim_fpu_sqrt (&ans, &op1); + status = sim_fpu_sqrt (&ans, &op1); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to64 (&res, &ans); return res; @@ -443,9 +485,12 @@ invdf (CGEN_FPU* fpu, DF x) sim_fpu op1; sim_fpu ans; unsigned64 res; + sim_fpu_status status; sim_fpu_64to (&op1, x); - sim_fpu_inv (&ans, &op1); + status = sim_fpu_inv (&ans, &op1); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to64 (&res, &ans); return res; @@ -458,10 +503,13 @@ mindf (CGEN_FPU* fpu, DF x, DF y) sim_fpu op2; sim_fpu ans; unsigned64 res; + sim_fpu_status status; sim_fpu_64to (&op1, x); sim_fpu_64to (&op2, y); - sim_fpu_min (&ans, &op1, &op2); + status = sim_fpu_min (&ans, &op1, &op2); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to64 (&res, &ans); return res; @@ -474,10 +522,13 @@ maxdf (CGEN_FPU* fpu, DF x, DF y) sim_fpu op2; sim_fpu ans; unsigned64 res; + sim_fpu_status status; sim_fpu_64to (&op1, x); sim_fpu_64to (&op2, y); - sim_fpu_max (&ans, &op1, &op2); + status = sim_fpu_max (&ans, &op1, &op2); + if (status != 0) + (*fpu->ops->error) (fpu, status); sim_fpu_to64 (&res, &ans); return res; diff --git a/sim/common/cgen-par.c b/sim/common/cgen-par.c index fece2c9f11f..44cc50f005a 100644 --- a/sim/common/cgen-par.c +++ b/sim/common/cgen-par.c @@ -142,7 +142,7 @@ void sim_queue_fn_xi_write ( void sim_queue_fn_df_write ( SIM_CPU *cpu, - void (*write_function)(SIM_CPU *cpu, UINT, DI), + void (*write_function)(SIM_CPU *cpu, UINT, DF), UINT regno, DF value ) diff --git a/sim/common/cgen-par.h b/sim/common/cgen-par.h index 6771e40635b..3748d947ffd 100644 --- a/sim/common/cgen-par.h +++ b/sim/common/cgen-par.h @@ -73,8 +73,8 @@ typedef struct { } fn_di_write; struct { UINT regno; - DI value; - void (*function)(SIM_CPU *, UINT, DI); + DF value; + void (*function)(SIM_CPU *, UINT, DF); } fn_df_write; struct { UINT regno; @@ -121,7 +121,7 @@ extern void cgen_write_queue_element_execute ( /* Instance of the queue for parallel write-after support. */ /* FIXME: Should be dynamic? */ -#define CGEN_WRITE_QUEUE_SIZE (4 * 4) /* 4 writes x 4 insns -- for now. */ +#define CGEN_WRITE_QUEUE_SIZE (64 * 4) /* 64 writes x 4 insns -- for now. */ typedef struct { int index; @@ -151,7 +151,7 @@ extern void sim_queue_pc_write (SIM_CPU *, USI); extern void sim_queue_fn_hi_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, UHI), UINT, UHI); extern void sim_queue_fn_si_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, USI), UINT, SI); extern void sim_queue_fn_di_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, DI), UINT, DI); -extern void sim_queue_fn_df_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, DI), UINT, DF); +extern void sim_queue_fn_df_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, DF), UINT, DF); extern void sim_queue_fn_xi_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, SI *), UINT, SI *); extern void sim_queue_fn_pc_write (SIM_CPU *, void (*)(SIM_CPU *, USI), USI); diff --git a/sim/common/cgen-trace.c b/sim/common/cgen-trace.c index db852d5306c..4e382d4930a 100644 --- a/sim/common/cgen-trace.c +++ b/sim/common/cgen-trace.c @@ -51,7 +51,7 @@ with this program; if not, write to the Free Software Foundation, Inc., #endif #ifndef SIZE_TRACE_BUF -#define SIZE_TRACE_BUF 256 +#define SIZE_TRACE_BUF 1024 #endif static void diff --git a/sim/configure b/sim/configure index 3b8c1f6aacf..38aab98c5c5 100755 --- a/sim/configure +++ b/sim/configure @@ -30,7 +30,6 @@ program_suffix=NONE program_transform_name=s,x,x, silent= site= -sitefile= srcdir= target=NONE verbose= @@ -145,7 +144,6 @@ Configuration: --help print this message --no-create do not create output files --quiet, --silent do not print \`checking...' messages - --site-file=FILE use FILE as the site file --version print the version of autoconf that created configure Directory and file names: --prefix=PREFIX install architecture-independent files in PREFIX @@ -316,11 +314,6 @@ EOF -site=* | --site=* | --sit=*) site="$ac_optarg" ;; - -site-file | --site-file | --site-fil | --site-fi | --site-f) - ac_prev=sitefile ;; - -site-file=* | --site-file=* | --site-fil=* | --site-fi=* | --site-f=*) - sitefile="$ac_optarg" ;; - -srcdir | --srcdir | --srcdi | --srcd | --src | --sr) ac_prev=srcdir ;; -srcdir=* | --srcdir=* | --srcdi=* | --srcd=* | --src=* | --sr=*) @@ -486,16 +479,12 @@ fi srcdir=`echo "${srcdir}" | sed 's%\([^/]\)/*$%\1%'` # Prefer explicitly selected file to automatically selected ones. -if test -z "$sitefile"; then - if test -z "$CONFIG_SITE"; then - if test "x$prefix" != xNONE; then - CONFIG_SITE="$prefix/share/config.site $prefix/etc/config.site" - else - CONFIG_SITE="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site" - fi +if test -z "$CONFIG_SITE"; then + if test "x$prefix" != xNONE; then + CONFIG_SITE="$prefix/share/config.site $prefix/etc/config.site" + else + CONFIG_SITE="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site" fi -else - CONFIG_SITE="$sitefile" fi for ac_site_file in $CONFIG_SITE; do if test -r "$ac_site_file"; then @@ -538,7 +527,7 @@ fi # Extract the first word of "gcc", so it can be a program name with args. set dummy gcc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:542: checking for $ac_word" >&5 +echo "configure:531: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -568,7 +557,7 @@ if test -z "$CC"; then # Extract the first word of "cc", so it can be a program name with args. set dummy cc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:572: checking for $ac_word" >&5 +echo "configure:561: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -619,7 +608,7 @@ fi # Extract the first word of "cl", so it can be a program name with args. set dummy cl; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:623: checking for $ac_word" >&5 +echo "configure:612: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -651,7 +640,7 @@ fi fi echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6 -echo "configure:655: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5 +echo "configure:644: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5 ac_ext=c # CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options. @@ -662,12 +651,12 @@ cross_compiling=$ac_cv_prog_cc_cross cat > conftest.$ac_ext << EOF -#line 666 "configure" +#line 655 "configure" #include "confdefs.h" main(){return(0);} EOF -if { (eval echo configure:671: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:660: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then ac_cv_prog_cc_works=yes # If we can't run a trivial program, we are probably using a cross compiler. if (./conftest; exit) 2>/dev/null; then @@ -693,12 +682,12 @@ if test $ac_cv_prog_cc_works = no; then { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; } fi echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6 -echo "configure:697: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5 +echo "configure:686: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5 echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6 cross_compiling=$ac_cv_prog_cc_cross echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6 -echo "configure:702: checking whether we are using GNU C" >&5 +echo "configure:691: checking whether we are using GNU C" >&5 if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -707,7 +696,7 @@ else yes; #endif EOF -if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:711: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then +if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:700: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then ac_cv_prog_gcc=yes else ac_cv_prog_gcc=no @@ -726,7 +715,7 @@ ac_test_CFLAGS="${CFLAGS+set}" ac_save_CFLAGS="$CFLAGS" CFLAGS= echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6 -echo "configure:730: checking whether ${CC-cc} accepts -g" >&5 +echo "configure:719: checking whether ${CC-cc} accepts -g" >&5 if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -788,7 +777,7 @@ ac_configure=$ac_aux_dir/configure # This should be Cygnus configure. # SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff" # ./install, which can be erroneously created by make from ./install.sh. echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6 -echo "configure:792: checking for a BSD compatible install" >&5 +echo "configure:781: checking for a BSD compatible install" >&5 if test -z "$INSTALL"; then if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -847,7 +836,7 @@ else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; } fi echo $ac_n "checking host system type""... $ac_c" 1>&6 -echo "configure:851: checking host system type" >&5 +echo "configure:840: checking host system type" >&5 host_alias=$host case "$host_alias" in @@ -868,7 +857,7 @@ host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'` echo "$ac_t""$host" 1>&6 echo $ac_n "checking build system type""... $ac_c" 1>&6 -echo "configure:872: checking build system type" >&5 +echo "configure:861: checking build system type" >&5 build_alias=$build case "$build_alias" in @@ -894,7 +883,7 @@ fi # Extract the first word of "${ac_tool_prefix}ar", so it can be a program name with args. set dummy ${ac_tool_prefix}ar; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:898: checking for $ac_word" >&5 +echo "configure:887: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_AR'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -926,7 +915,7 @@ fi # Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args. set dummy ${ac_tool_prefix}ranlib; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:930: checking for $ac_word" >&5 +echo "configure:919: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -958,7 +947,7 @@ if test -n "$ac_tool_prefix"; then # Extract the first word of "ranlib", so it can be a program name with args. set dummy ranlib; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:962: checking for $ac_word" >&5 +echo "configure:951: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1038,7 +1027,7 @@ else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; } fi echo $ac_n "checking host system type""... $ac_c" 1>&6 -echo "configure:1042: checking host system type" >&5 +echo "configure:1031: checking host system type" >&5 host_alias=$host case "$host_alias" in @@ -1059,7 +1048,7 @@ host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'` echo "$ac_t""$host" 1>&6 echo $ac_n "checking target system type""... $ac_c" 1>&6 -echo "configure:1063: checking target system type" >&5 +echo "configure:1052: checking target system type" >&5 target_alias=$target case "$target_alias" in @@ -1077,7 +1066,7 @@ target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'` echo "$ac_t""$target" 1>&6 echo $ac_n "checking build system type""... $ac_c" 1>&6 -echo "configure:1081: checking build system type" >&5 +echo "configure:1070: checking build system type" >&5 build_alias=$build case "$build_alias" in @@ -1121,7 +1110,7 @@ test "$program_transform_name" = "" && program_transform_name="s,x,x," # Extract the first word of "gcc", so it can be a program name with args. set dummy gcc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:1125: checking for $ac_word" >&5 +echo "configure:1114: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1151,7 +1140,7 @@ if test -z "$CC"; then # Extract the first word of "cc", so it can be a program name with args. set dummy cc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:1155: checking for $ac_word" >&5 +echo "configure:1144: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1202,7 +1191,7 @@ fi # Extract the first word of "cl", so it can be a program name with args. set dummy cl; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:1206: checking for $ac_word" >&5 +echo "configure:1195: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1234,7 +1223,7 @@ fi fi echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6 -echo "configure:1238: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5 +echo "configure:1227: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5 ac_ext=c # CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options. @@ -1245,12 +1234,12 @@ cross_compiling=$ac_cv_prog_cc_cross cat > conftest.$ac_ext << EOF -#line 1249 "configure" +#line 1238 "configure" #include "confdefs.h" main(){return(0);} EOF -if { (eval echo configure:1254: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:1243: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then ac_cv_prog_cc_works=yes # If we can't run a trivial program, we are probably using a cross compiler. if (./conftest; exit) 2>/dev/null; then @@ -1276,12 +1265,12 @@ if test $ac_cv_prog_cc_works = no; then { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; } fi echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6 -echo "configure:1280: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5 +echo "configure:1269: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5 echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6 cross_compiling=$ac_cv_prog_cc_cross echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6 -echo "configure:1285: checking whether we are using GNU C" >&5 +echo "configure:1274: checking whether we are using GNU C" >&5 if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1290,7 +1279,7 @@ else yes; #endif EOF -if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1294: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then +if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1283: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then ac_cv_prog_gcc=yes else ac_cv_prog_gcc=no @@ -1309,7 +1298,7 @@ ac_test_CFLAGS="${CFLAGS+set}" ac_save_CFLAGS="$CFLAGS" CFLAGS= echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6 -echo "configure:1313: checking whether ${CC-cc} accepts -g" >&5 +echo "configure:1302: checking whether ${CC-cc} accepts -g" >&5 if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1347,7 +1336,7 @@ AR=${AR-ar} # Extract the first word of "ranlib", so it can be a program name with args. set dummy ranlib; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:1351: checking for $ac_word" >&5 +echo "configure:1340: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1376,7 +1365,6 @@ fi # Put a plausible default for CC_FOR_BUILD in Makefile. - if test "x$cross_compiling" = "xno"; then CC_FOR_BUILD='$(CC)' else diff --git a/sim/configure.in b/sim/configure.in index ce47feda2f4..8bee260306c 100644 --- a/sim/configure.in +++ b/sim/configure.in @@ -1,5 +1,5 @@ dnl Process this file with autoconf to produce a configure script. -AC_PREREQ(2.12.1)dnl +AC_PREREQ(2.13)dnl AC_INIT(Makefile.in) AC_PROG_CC @@ -18,7 +18,6 @@ AC_SUBST(AR) AC_PROG_RANLIB # Put a plausible default for CC_FOR_BUILD in Makefile. -AC_C_CROSS if test "x$cross_compiling" = "xno"; then CC_FOR_BUILD='$(CC)' else diff --git a/sim/d10v/ChangeLog b/sim/d10v/ChangeLog index 449e256085f..f39999d6c1b 100644 --- a/sim/d10v/ChangeLog +++ b/sim/d10v/ChangeLog @@ -1,3 +1,8 @@ +1999-11-25 Nick Clifton <nickc@cygnus.com> + + * simops.c (OP_4E0F): New function: Simulate new bit pattern for + cpfg instruction. + Fri Oct 29 18:34:28 1999 Andrew Cagney <cagney@b1.cygnus.com> * simops.c (move_to_cr): Don't allow user to set PSW.DM in either diff --git a/sim/d10v/simops.c b/sim/d10v/simops.c index d80c9238894..9c1f3f65a1b 100644 --- a/sim/d10v/simops.c +++ b/sim/d10v/simops.c @@ -1087,6 +1087,28 @@ OP_4E09 () trace_output_flag (); } +/* cpfg */ +void +OP_4E0F () +{ + uint8 val; + + trace_input ("cpfg", OP_FLAG_OUTPUT, OP_FLAG, OP_VOID); + + if (OP[1] == 0) + val = PSW_F0; + else if (OP[1] == 1) + val = PSW_F1; + else + val = PSW_C; + if (OP[0] == 0) + SET_PSW_F0 (val); + else + SET_PSW_F1 (val); + + trace_output_flag (); +} + /* dbt */ void OP_5F20 () diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index 6c8bc4a0dbb..8c3860bf2bf 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,11 @@ +1999-11-29 Mark Salter <msalter@cygnus.com> + + * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask + to clear status bits in sdisr register. This is how the hardware works. + + * interp.c (sim_open): Added more memory aliases for jmr3904 hardware + being used by cygmon. + 1999-11-11 Andrew Haley <aph@cygnus.com> * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0 diff --git a/sim/mips/dv-tx3904sio.c b/sim/mips/dv-tx3904sio.c index a1e3ddbefd2..5ba8e37a82e 100644 --- a/sim/mips/dv-tx3904sio.c +++ b/sim/mips/dv-tx3904sio.c @@ -1,6 +1,6 @@ /* This file is part of the program GDB, the GNU debugger. - Copyright (C) 1998 Free Software Foundation, Inc. + Copyright (C) 1998, 1999 Free Software Foundation, Inc. Contributed by Cygnus Solutions. This program is free software; you can redistribute it and/or modify @@ -167,6 +167,7 @@ struct tx3904sio unsigned_4 sdisr; #define SDISR_WR_MASK 0x00070000U #define SDISR_SET_BYTE(c,o,b) ((c)->sdisr = SDISR_WR_MASK & (((c)->sdisr & ~LSMASK32((o)*8+7,(o)*8)) | ((b)<< (o)*8))) +#define SDISR_CLEAR_FLAG_BYTE(c,o,b) ((c)->sdisr = SDISR_WR_MASK & (((c)->sdisr & ~LSMASK32((o)*8+7,(o)*8)) & ((b)<< (o)*8))) #define SDISR_GET_TDIS(c) ((c)->sdisr & 0x00020000) #define SDISR_SET_TDIS(c) ((c)->sdisr |= 0x00020000) #define SDISR_GET_RDIS(c) ((c)->sdisr & 0x00010000) @@ -419,7 +420,7 @@ tx3904sio_io_write_buffer (struct hw *me, last_int = controller->sdisr & controller->sdicr; /* HW_TRACE ((me, "sdisr - sdisr %08x sdicr %08x", controller->sdisr, controller->sdicr)); */ - SDISR_SET_BYTE(controller, reg_offset, write_byte); + SDISR_CLEAR_FLAG_BYTE(controller, reg_offset, write_byte); /* HW_TRACE ((me, "sdisr + sdisr %08x sdicr %08x", controller->sdisr, controller->sdicr)); */ next_int = controller->sdisr & controller->sdicr; diff --git a/sim/mips/interp.c b/sim/mips/interp.c index 9c53ff9081a..a056a01cc13 100644 --- a/sim/mips/interp.c +++ b/sim/mips/interp.c @@ -462,8 +462,9 @@ sim_open (kind, cb, abfd, argv) sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx", 0xFFFF9000, 0x200); /* EBIF */ sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx", 0xFFFFF500, 0x300); /* PIO */ sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx", 0xFFFF8000, 0x804); /* DRAMC */ - sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx", 0xB2100000, 0x004); /* ISA ctl */ sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx", 0xB1000000, 0x400); /* ISA I/O */ + sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx", 0xB2100000, 0x004); /* ISA ctl */ + sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx", 0xB2500000, 0x004); /* LED/switch */ sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx", 0xB2700000, 0x004); /* RTC */ sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx", 0xB3C00000, 0x004); /* RTC */ diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen index be554f525d4..78998b09ba4 100644 --- a/sim/mips/mips.igen +++ b/sim/mips/mips.igen @@ -3235,6 +3235,7 @@ // MOVF +// MOVT 000000,5.RS,3.CC,0,1.TF,5.RD,00000000001:SPECIAL:32::MOVtf "mov%s<TF> r<RD>, r<RS>, <CC>" *mipsIV: @@ -3246,6 +3247,7 @@ // MOVF.fmt +// MOVT.fmt 010001,10,3.FMT,3.CC,0,1.TF,5.FS,5.FD,010001:COP1:32::MOVtf.fmt "mov%s<TF>.%s<FMT> f<FD>, f<FS>, <CC>" *mipsIV: diff --git a/sim/mn10300/ChangeLog b/sim/mn10300/ChangeLog index cc37c7b2392..23f3ca6a472 100644 --- a/sim/mn10300/ChangeLog +++ b/sim/mn10300/ChangeLog @@ -59,6 +59,15 @@ Tue Feb 16 23:57:17 1999 Jeffrey A Law (law@cygnus.com) generation. (mn103int_finish): Install it as ioctl handler. * dv-mn103tim.c: Support timer 6 specially. Endianness fixes. +Wed Oct 14 12:11:05 1998 Jeffrey A Law (law@cygnus.com) + + * am33.igen: Allow autoincrement stores using the same register + for source and destination operands. + +Mon Aug 31 10:19:55 1998 Jeffrey A Law (law@cygnus.com) + + * am33.igen: Reverse HI/LO outputs of 4 operand "mul" and "mulu". + Fri Aug 28 14:40:49 1998 Joyce Janczyn <janczyn@cygnus.com> * interp.c (sim_open): Check for invalid --board option, fix @@ -73,6 +82,21 @@ Mon Aug 24 11:50:09 1998 Joyce Janczyn <janczyn@cygnus.com> * sim-main.h (SIM_HANDLES_LMA): Define SIM_HANDLES_LMA. +Wed Aug 12 12:36:07 1998 Jeffrey A Law (law@cygnus.com) + + * am33.igen: Handle case where first DSP operation modifies a + register used in the second DSP operation correctly. + +Tue Jul 28 10:10:25 1998 Jeffrey A Law (law@cygnus.com) + + * am33.igen: Detect cases where two operands must not match for + DSP instructions too. + +Mon Jul 27 12:04:17 1998 Jeffrey A Law (law@cygnus.com) + + * am33.igen: Detect cases where two operands must not match in + non-DSP instructions. + Fri Jul 24 18:15:21 1998 Joyce Janczyn <janczyn@cygnus.com> * op_utils.c (do_syscall): Rewrite to use common/syscall.c. @@ -83,21 +107,71 @@ Fri Jul 24 18:15:21 1998 Joyce Janczyn <janczyn@cygnus.com> * mn10300.igen: Change C++ style comments to C style comments. Check for divide by zero in div and divu ops. +Fri Jul 24 12:49:28 1998 Jeffrey A Law (law@cygnus.com) + + * am33.igen (translate_xreg): New function. Use it as needed. + +Thu Jul 23 10:05:28 1998 Jeffrey A Law (law@cygnus.com) + + * am33.igen: Add some missing instructions. + + * am33.igen: Autoincrement loads/store fixes. + +Tue Jul 21 09:48:14 1998 Jeffrey A Law (law@cygnus.com) + + * am33.igen: Add mov_lCC DSP instructions. + + * am33.igen: Add most am33 DSP instructions. + Thu Jul 9 10:06:55 1998 Jeffrey A Law (law@cygnus.com) * mn10300.igen: Fix Z bit for addc and subc instructions. Minor fixes in multiply/divide patterns. + * am33.igen: Add missing mul[u] imm32,Rn. Fix condition code + handling for many instructions. Fix sign extension for some + 24bit immediates. + + * am33.igen: Fix Z bit for remaining addc/subc instructions. + Do not sign extend immediate for mov imm,XRn. + More random mul, mac & div fixes. + Remove some unused variables. + Sign extend 24bit displacement in memory addresses. + + * am33.igen: Fix Z bit for addc Rm,Rn and subc Rm,Rn. Various + fixes to 2 register multiply, divide and mac instructions. Set + Z,N correctly for sat16. Sign extend 24 bit immediate for add, + and sub instructions. + + * am33.igen: Add remaining non-DSP instructions. + +Wed Jul 8 16:29:12 1998 Jeffrey A Law (law@cygnus.com) + + * am33.igen (translate_rreg): New function. Use it as appropriate. + + * am33.igen: More am33 instructions. Fix "div". + +Mon Jul 6 15:39:22 1998 Jeffrey A Law (law@cygnus.com) + + * mn10300.igen: Add am33 support. + + * Makefile.in: Use multi-sim to support both a mn10300 and am33 + simulator. + + * am33.igen: Add many more am33 instructions. Wed Jul 1 17:07:09 1998 Jeffrey A Law (law@cygnus.com) * mn10300_sim.h (FETCH24): Define. + * mn10300_sim.h: Add defines for some registers found on the AM33. + * am33.igen: New file with some am33 support. Tue Jun 30 11:23:20 1998 Jeffrey A Law (law@cygnus.com) * mn10300_sim.h: Include bfd.h (struct state): Add more room for processor specific registers. + (REG_E0): Define. Thu Jun 25 10:12:03 1998 Joyce Janczyn <janczyn@cygnus.com> diff --git a/sim/mn10300/Makefile.in b/sim/mn10300/Makefile.in index 612576cce3b..4d02e5bc70d 100644 --- a/sim/mn10300/Makefile.in +++ b/sim/mn10300/Makefile.in @@ -113,6 +113,8 @@ tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../igen/igen ../igen/igen \ $(IGEN_TRACE) \ -G gen-direct-access \ + -M mn10300,am33 -G gen-multi-sim=am33 \ + -I $(srcdir) \ -i $(IGEN_INSN) \ -o $(IGEN_DC) \ -x \ diff --git a/sim/mn10300/am33.igen b/sim/mn10300/am33.igen new file mode 100644 index 00000000000..31bbc730de5 --- /dev/null +++ b/sim/mn10300/am33.igen @@ -0,0 +1,8683 @@ +// Helper: +// +// Given an extended register number, translate it into an index into the +// register array. This is necessary as the upper 8 extended registers are +// actually synonyms for the d0-d3/a0-a3 registers. +// +// + +:function:::int:translate_rreg:int rreg +{ + + /* The higher register numbers actually correspond to the + basic machine's address and data registers. */ + if (rreg > 7 && rreg < 12) + return REG_A0 + rreg - 8; + else if (rreg > 11 && rreg < 16) + return REG_D0 + rreg - 12; + else + return REG_E0 + rreg; +} + +:function:::int:translate_xreg:int xreg +{ + switch (xreg) + { + case 0: + return REG_SP; + case 1: + return REG_MDRQ; + case 2: + return REG_MCRH; + case 3: + return REG_MCRL; + case 4: + return REG_MCVF; + default: + abort (); + } +} + +// 1111 0000 0010 00An; mov USP,An +8.0xf0+4.0x2,00,2.AN0:D0m:::mov +"mov" +*am33 +{ + PC = cia; + State.regs[REG_A0 + AN0] = State.regs[REG_USP]; +} + + +// 1111 0000 0010 01An; mov SSP,An +8.0xf0+4.0x2,01,2.AN0:D0n:::mov +"mov" +*am33 +{ + PC = cia; + State.regs[REG_A0 + AN0] = State.regs[REG_SSP]; +} + + +// 1111 0000 0010 10An; mov MSP,An +8.0xf0+4.0x2,10,2.AN0:D0o:::mov +"mov" +*am33 +{ + PC = cia; + State.regs[REG_A0 + AN0] = State.regs[REG_MSP]; +} + + +// 1111 0000 0010 11An; mov PC,An +8.0xf0+4.0x2,11,2.AN0:D0p:::mov +"mov" +*am33 +{ + PC = cia; + State.regs[REG_A0 + AN0] = PC; +} + + +// 1111 0000 0011 Am00; mov Am,USP +8.0xf0+4.0x3,2.AM1,00:D0q:::mov +"mov" +*am33 +{ + PC = cia; + State.regs[REG_USP] = State.regs[REG_A0 + AM1]; +} + +// 1111 0000 0011 Am01; mov Am,SSP +8.0xf0+4.0x3,2.AM1,01:D0r:::mov +"mov" +*am33 +{ + PC = cia; + State.regs[REG_SSP] = State.regs[REG_A0 + AM1]; +} + +// 1111 0000 0011 Am10; mov Am,MSP +8.0xf0+4.0x3,2.AM1,10:D0s:::mov +"mov" +*am33 +{ + PC = cia; + State.regs[REG_MSP] = State.regs[REG_A0 + AM1]; +} + + +// 1111 0000 1110 imm4; syscall +8.0xf0+4.0xe,IMM4:D0t:::syscall +"syscall" +*am33 +{ + unsigned int sp, next_pc; + + PC = cia; + sp = State.regs[REG_SP]; + next_pc = State.regs[REG_PC] + 2; + store_word (sp - 4, next_pc); + store_word (sp - 8, PSW); + State.regs[REG_PC] = 0x40000000 + IMM4 * 8; + nia = PC; +} + + +// 1111 0010 1110 11Dn; mov EPSW,Dn +8.0xf2+4.0xe,11,2.DN0:D0u:::mov +"mov" +*am33 +{ + PC = cia; + State.regs[REG_D0 + DN0] = PSW; +} + + +// 1111 0010 1111 Dm01; mov Dm,EPSW +8.0xf2+4.0xf,2.DM1,01:D0v:::mov +"mov" +*am33 +{ + PC = cia; + PSW = State.regs[REG_D0 + DM1]; +} + +// 1111 0101 00Am Rn; mov Am,Rn +8.0xf5+00,2.AM1,4.RN0:D0w:::mov +"mov" +*am33 +{ + int destreg = translate_rreg (SD_, RN0); + + PC = cia; + State.regs[destreg] = State.regs[REG_A0 + AM1]; +} + +// 1111 0101 01Dm Rn; mov Dm,Rn +8.0xf5+01,2.DM1,4.RN0:D0x:::mov +"mov" +*am33 +{ + int destreg = translate_rreg (SD_, RN0); + + PC = cia; + State.regs[destreg] = State.regs[REG_D0 + DM1]; +} + +// 1111 0101 10Rm An; mov Rm,An +8.0xf5+10,4.RM1,2.AN0:D0y:::mov +"mov" +*am33 +{ + int destreg = translate_rreg (SD_, RM1); + + PC = cia; + State.regs[REG_A0 + AN0] = State.regs[destreg]; +} + +// 1111 0101 11Rm Dn; mov Rm,Dn +8.0xf5+11,4.RM1,2.DN0:D0z:::mov +"mov" +*am33 +{ + int destreg = translate_rreg (SD_, RM1); + + PC = cia; + State.regs[REG_D0 + DN0] = State.regs[destreg]; +} + + +// 1111 1000 1100 1110 regs....; movm (USP),regs +8.0xf8+8.0xce+8.REGS:D1a:::movm +"movm" +*am33 +{ + unsigned long usp = State.regs[REG_USP]; + unsigned long mask; + + PC = cia; + mask = REGS; + + if (mask & 0x8) + { + usp += 4; + State.regs[REG_LAR] = load_word (usp); + usp += 4; + State.regs[REG_LIR] = load_word (usp); + usp += 4; + State.regs[REG_MDR] = load_word (usp); + usp += 4; + State.regs[REG_A0 + 1] = load_word (usp); + usp += 4; + State.regs[REG_A0] = load_word (usp); + usp += 4; + State.regs[REG_D0 + 1] = load_word (usp); + usp += 4; + State.regs[REG_D0] = load_word (usp); + usp += 4; + } + + if (mask & 0x10) + { + State.regs[REG_A0 + 3] = load_word (usp); + usp += 4; + } + + if (mask & 0x20) + { + State.regs[REG_A0 + 2] = load_word (usp); + usp += 4; + } + + if (mask & 0x40) + { + State.regs[REG_D0 + 3] = load_word (usp); + usp += 4; + } + + if (mask & 0x80) + { + State.regs[REG_D0 + 2] = load_word (usp); + usp += 4; + } + + if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33) + { + if (mask & 0x1) + { + /* Need to restore MDQR, MCRH, MCRL, and MCVF */ + usp += 16; + State.regs[REG_E0 + 1] = load_word (usp); + usp += 4; + State.regs[REG_E0 + 0] = load_word (usp); + usp += 4; + } + + if (mask & 0x2) + { + State.regs[REG_E0 + 7] = load_word (usp); + usp += 4; + State.regs[REG_E0 + 6] = load_word (usp); + usp += 4; + State.regs[REG_E0 + 5] = load_word (usp); + usp += 4; + State.regs[REG_E0 + 4] = load_word (usp); + usp += 4; + } + + if (mask & 0x4) + { + State.regs[REG_E0 + 3] = load_word (usp); + usp += 4; + State.regs[REG_E0 + 2] = load_word (usp); + usp += 4; + } + } + + /* And make sure to update the stack pointer. */ + State.regs[REG_USP] = usp; +} + +// 1111 1000 1100 1111 regs....; movm (USP),regs +8.0xf8+8.0xcf+8.REGS:D1b:::movm +"movm" +*am33 +{ + unsigned long usp = State.regs[REG_USP]; + unsigned long mask; + + if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33) + { + if (mask & 0x4) + { + usp -= 4; + store_word (usp, State.regs[REG_E0 + 2]); + usp -= 4; + store_word (usp, State.regs[REG_E0 + 3]); + } + + if (mask & 0x2) + { + usp -= 4; + store_word (usp, State.regs[REG_E0 + 4]); + usp -= 4; + store_word (usp, State.regs[REG_E0 + 5]); + usp -= 4; + store_word (usp, State.regs[REG_E0 + 6]); + usp -= 4; + store_word (usp, State.regs[REG_E0 + 7]); + } + + if (mask & 0x1) + { + usp -= 4; + store_word (usp, State.regs[REG_E0 + 0]); + usp -= 4; + store_word (usp, State.regs[REG_E0 + 1]); + usp -= 16; + /* Need to save MDQR, MCRH, MCRL, and MCVF */ + } + } + + if (mask & 0x80) + { + usp -= 4; + store_word (usp, State.regs[REG_D0 + 2]); + } + + if (mask & 0x40) + { + usp -= 4; + store_word (usp, State.regs[REG_D0 + 3]); + } + + if (mask & 0x20) + { + usp -= 4; + store_word (usp, State.regs[REG_A0 + 2]); + } + + if (mask & 0x10) + { + usp -= 4; + store_word (usp, State.regs[REG_A0 + 3]); + } + + if (mask & 0x8) + { + usp -= 4; + store_word (usp, State.regs[REG_D0]); + usp -= 4; + store_word (usp, State.regs[REG_D0 + 1]); + usp -= 4; + store_word (usp, State.regs[REG_A0]); + usp -= 4; + store_word (usp, State.regs[REG_A0 + 1]); + usp -= 4; + store_word (usp, State.regs[REG_MDR]); + usp -= 4; + store_word (usp, State.regs[REG_LIR]); + usp -= 4; + store_word (usp, State.regs[REG_LAR]); + usp -= 4; + } + + /* And make sure to update the stack pointer. */ + State.regs[REG_USP] = usp; +} + +// 1111 1100 1111 1100 imm32...; and imm32,EPSW +8.0xfc+8.0xfc+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:4a:::and +"and" +*am33 +{ + PC = cia; + PSW &= FETCH32(IMM32A, IMM32B, IMM32C, IMM32D); +} + +// 1111 1100 1111 1101 imm32...; or imm32,EPSW +8.0xfc+8.0xfd+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4a:::or +"or" +*am33 +{ + PC = cia; + PSW |= FETCH32(IMM32A, IMM32B, IMM32C, IMM32D); +} + +// 1111 1001 0000 1000 Rm Rn; mov Rm,Rn (Rm != Rn) +8.0xf9+8.0x08+4.RM2,4.RN0!RM2:D1g:::mov +"mov" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + State.regs[dstreg] = State.regs[srcreg]; +} + +// 1111 1001 0001 1000 Rn Rn; ext Rn +8.0xf9+8.0x18+4.RN0,4.RN2=RN0:D1:::ext +"mov" +*am33 +{ + int srcreg; + + PC = cia; + srcreg = translate_rreg (SD_, RN0); + if (State.regs[srcreg] & 0x80000000) + State.regs[REG_MDR] = -1; + else + State.regs[REG_MDR] = 0; +} + +// 1111 1001 0010 1000 Rm Rn; extb Rm,Rn +8.0xf9+8.0x28+4.RM2,4.RN0!RM2:D1:::extb +"extb" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + State.regs[dstreg] = EXTEND8 (State.regs[srcreg]); +} + +// 1111 1001 0011 1000 Rm Rn; extbu Rm,Rn +8.0xf9+8.0x38+4.RM2,4.RN0!RM2:D1:::extbu +"extbu" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + State.regs[dstreg] = State.regs[srcreg] & 0xff; +} + +// 1111 1001 0100 1000 Rm Rn; exth Rm,Rn +8.0xf9+8.0x48+4.RM2,4.RN0!RM2:D1:::exth +"exth" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + State.regs[dstreg] = EXTEND16 (State.regs[srcreg]); +} + +// 1111 1001 0101 1000 Rm Rn; exthu Rm,Rn +8.0xf9+8.0x58+4.RM2,4.RN0!RM2:D1:::exthu +"exthu" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + State.regs[dstreg] = State.regs[srcreg] & 0xffff; +} + +// 1111 1001 0110 1000 Rn Rn; clr Rn +8.0xf9+8.0x68+4.RM2,4.RN0=RM2:D1:::clr +"clr" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + State.regs[dstreg] = 0; + PSW |= PSW_Z; + PSW &= ~(PSW_V | PSW_C | PSW_N); +} + +// 1111 1001 0111 1000 Rm Rn; add Rm,Rn +8.0xf9+8.0x78+4.RM2,4.RN0:D1b:::add +"add" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + genericAdd (State.regs[srcreg], dstreg); +} + +// 1111 1001 1000 1000 Rm Rn; addc Rm,Rn +8.0xf9+8.0x88+4.RM2,4.RN0:D1b:::addc +"addc" +*am33 +{ + int srcreg, dstreg; + int z, c, n, v; + unsigned long reg1, reg2, sum; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + + reg1 = State.regs[srcreg]; + reg2 = State.regs[dstreg]; + sum = reg1 + reg2 + ((PSW & PSW_C) != 0); + State.regs[dstreg] = sum; + + z = ((PSW & PSW_Z) != 0) && (sum == 0); + n = (sum & 0x80000000); + c = (sum < reg1) || (sum < reg2); + v = ((reg2 & 0x80000000) == (reg1 & 0x80000000) + && (reg2 & 0x80000000) != (sum & 0x80000000)); + + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0) + | (c ? PSW_C : 0) | (v ? PSW_V : 0)); +} + +// 1111 1001 1001 1000 Rm Rn; sub Rm,Rn +8.0xf9+8.0x98+4.RM2,4.RN0:D1b:::sub +"sub" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + genericSub (State.regs[srcreg], dstreg); +} + +// 1111 1001 1010 1000 Rm Rn; subc Rm,Rn +8.0xf9+8.0xa8+4.RM2,4.RN0:D1b:::subc +"subc" +*am33 +{ + int srcreg, dstreg; + int z, c, n, v; + unsigned long reg1, reg2, difference; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + + reg1 = State.regs[srcreg]; + reg2 = State.regs[dstreg]; + difference = reg2 - reg1 - ((PSW & PSW_C) != 0); + State.regs[dstreg] = difference; + + z = ((PSW & PSW_Z) != 0) && (difference == 0); + n = (difference & 0x80000000); + c = (reg1 > reg2); + v = ((reg2 & 0x80000000) == (reg1 & 0x80000000) + && (reg2 & 0x80000000) != (difference & 0x80000000)); + + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0) + | (c ? PSW_C : 0) | (v ? PSW_V : 0)); +} + +// 1111 1001 1011 1000 Rn Rn; inc Rn +8.0xf9+8.0xb8+4.RN0,4.RN2=RN0:D1:::inc +"inc" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + genericAdd (1, dstreg); +} + +// 1111 1001 1101 1000 Rn Rn; inc Rn +8.0xf9+8.0xc8+4.RN0,4.RN2=RN0:D1:::inc4 +"inc4" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + State.regs[dstreg] += 4; +} + +// 1111 1001 1101 1000 Rm Rn; cmp Rm,Rn +8.0xf9+8.0xd8+4.RM2,4.RN0:D1:::cmp +"cmp" +*am33 +{ + int srcreg1, srcreg2; + + PC = cia; + srcreg1 = translate_rreg (SD_, RN0); + srcreg2 = translate_rreg (SD_, RM2); + genericCmp (State.regs[srcreg2], State.regs[srcreg1]); +} + +// 1111 1001 1110 1000 XRm Rn; mov XRm,Rn +8.0xf9+8.0xe8+4.XRM2,4.RN0:D1l:::mov +"mov" +*am33 +{ + int dstreg, srcreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + srcreg = translate_xreg (SD_, XRM2); + + State.regs[dstreg] = State.regs[srcreg]; +} + +// 1111 1001 1111 1000 Rm XRn; mov Rm,XRn +8.0xf9+8.0xf8+4.RM2,4.XRN0:D1m:::mov +"mov" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_xreg (SD_, XRN0); + + State.regs[dstreg] = State.regs[srcreg]; +} + +// 1111 1001 0000 1001 Rm Rn; and Rm,Rn +8.0xf9+8.0x09+4.RM2,4.RN0:D1a:::and +"and" +*am33 +{ + int srcreg, dstreg; + int z, n; + + PC = cia; + + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + + State.regs[dstreg] &= State.regs[srcreg]; + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1001 0001 1001 Rm Rn; or Rm,Rn +8.0xf9+8.0x19+4.RM2,4.RN0:D1a:::or +"or" +*am33 +{ + int srcreg, dstreg; + int z, n; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + + State.regs[dstreg] |= State.regs[srcreg]; + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1001 0010 1001 Rm Rn; xor Rm,Rn +8.0xf9+8.0x29+4.RM2,4.RN0:D1a:::xor +"xor" +*am33 +{ + int srcreg, dstreg; + int z, n; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + + State.regs[dstreg] ^= State.regs[srcreg]; + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1001 0011 1001 Rn Rn; not Rn +8.0xf9+8.0x39+4.RM2,4.RN0=RM2:D1:::not +"not" +*am33 +{ + int dstreg; + int z, n; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + State.regs[dstreg] = ~State.regs[dstreg]; + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1001 0100 1001 Rm Rn; asr Rm,Rn +8.0xf9+8.0x49+4.RM2,4.RN0:D1a:::asr +"asr" +*am33 +{ + int srcreg, dstreg; + long temp; + int c, z, n; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + + temp = State.regs[dstreg]; + c = temp & 1; + temp >>= State.regs[srcreg]; + State.regs[dstreg] = temp; + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0)); +} + +// 1111 1001 0101 1001 Rm Rn; lsr Rm,Rn +8.0xf9+8.0x59+4.RM2,4.RN0:D1a:::lsr +"lsr" +*am33 +{ + int srcreg, dstreg; + int z, n, c; + + PC = cia; + + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + + c = State.regs[dstreg] & 1; + State.regs[dstreg] >>= State.regs[srcreg]; + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0)); +} + +// 1111 1001 0110 1001 Rm Rn; asl Rm,Rn +8.0xf9+8.0x69+4.RM2,4.RN0:D1a:::asl +"asl" +*am33 +{ + int srcreg, dstreg; + int z, n; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + + State.regs[dstreg] <<= State.regs[srcreg]; + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1001 0111 1001 Rn Rn; asl2 Rn +8.0xf9+8.0x79+4.RM2,4.RN0=RM2:D1:::asl2 +"asl2" +*am33 +{ + int dstreg; + int n, z; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + State.regs[dstreg] <<= 2; + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1001 1000 1001 Rn Rn; ror Rn +8.0xf9+8.0x89+4.RM2,4.RN0=RM2:D1:::ror +"ror" +*am33 +{ + int dstreg; + int c, n, z; + unsigned long value; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + value = State.regs[dstreg]; + c = (value & 0x1); + + value >>= 1; + value |= ((PSW & PSW_C) != 0) ? 0x80000000 : 0; + State.regs[dstreg] = value; + z = (value == 0); + n = (value & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0)); +} + +// 1111 1001 1001 1001 Rn Rn; rol Rn +8.0xf9+8.0x99+4.RM2,4.RN0=RM2:D1:::rol +"rol" +*am33 +{ + int dstreg; + int c, n, z; + unsigned long value; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + value = State.regs[dstreg]; + c = (value & 0x80000000) ? 1 : 0; + + value <<= 1; + value |= ((PSW & PSW_C) != 0); + State.regs[dstreg] = value; + z = (value == 0); + n = (value & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0)); +} + +// 1111 1001 1010 1001 Rm Rn; mul Rm,Rn +8.0xf9+8.0xa9+4.RM2,4.RN0:D1b:::mul +"mul" +*am33 +{ + int srcreg, dstreg; + unsigned long long temp; + int n, z; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + + temp = ((signed64)(signed32)State.regs[dstreg] + * (signed64)(signed32)State.regs[srcreg]); + State.regs[dstreg] = temp & 0xffffffff; + State.regs[REG_MDR] = (temp & 0xffffffff00000000LL) >> 32; + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1001 1011 1001 Rm Rn; mulu Rm,Rn +8.0xf9+8.0xb9+4.RM2,4.RN0:D1b:::mulu +"mulu" +*am33 +{ + int srcreg, dstreg; + unsigned long long temp; + int n, z; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + + temp = ((unsigned64)State.regs[dstreg] + * (unsigned64)State.regs[srcreg]); + State.regs[dstreg] = temp & 0xffffffff; + State.regs[REG_MDR] = (temp & 0xffffffff00000000LL) >> 32; + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1001 1100 1001 Rm Rn; div Rm,Rn +8.0xf9+8.0xc9+4.RM2,4.RN0:D1b:::div +"div" +*am33 +{ + int srcreg, dstreg; + long long temp; + int n, z; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + + temp = State.regs[REG_MDR]; + temp <<= 32; + temp |= State.regs[dstreg]; + State.regs[REG_MDR] = temp % (signed32)State.regs[srcreg]; + temp /= (signed32)State.regs[srcreg]; + State.regs[dstreg] = temp & 0xffffffff; + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1001 1101 1001 Rm Rn; divu Rm,Rn +8.0xf9+8.0xd9+4.RM2,4.RN0:D1b:::divu +"divu" +*am33 +{ + int srcreg, dstreg; + unsigned long long temp; + int n, z; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + + temp = State.regs[REG_MDR]; + temp <<= 32; + temp |= State.regs[dstreg]; + State.regs[REG_MDR] = temp % State.regs[srcreg]; + temp /= State.regs[srcreg]; + State.regs[dstreg] = temp & 0xffffffff; + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + + +// 1111 1001 0000 1010 Rm Rn; mov (Rm),Rn +8.0xf9+8.0x0a+4.RN2,4.RM0:D1h:::mov +"mov" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM0); + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_word (State.regs[srcreg]); +} + +// 1111 1001 0001 1010 Rm Rn; mov Rm,(Rn) +8.0xf9+8.0x1a+4.RM2,4.RN0:D1i:::mov +"mov" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + store_word (State.regs[dstreg], State.regs[srcreg]); +} + +// 1111 1001 0010 1010 Rm Rn; movbu (Rm),Rn +8.0xf9+8.0x2a+4.RN2,4.RM0:D1g:::movbu +"movbu" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM0); + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_byte (State.regs[srcreg]); +} + +// 1111 1001 0011 1010 Rm Rn; movbu Rm,(Rn) +8.0xf9+8.0x3a+4.RM2,4.RN0:D1i:::movbu +"movbu" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + store_byte (State.regs[dstreg], State.regs[srcreg]); +} + +// 1111 1001 0100 1010 Rm Rn; movhu (Rm),Rn +8.0xf9+8.0x4a+4.RN2,4.RM0:D1g:::movhu +"movhu" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM0); + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_half (State.regs[srcreg]); +} + +// 1111 1001 0101 1010 Rm Rn; movhu Rm,(Rn) +8.0xf9+8.0x5a+4.RM2,4.RN0:D1i:::movhu +"movhu" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + store_half (State.regs[dstreg], State.regs[srcreg]); +} + +// 1111 1001 0110 1010 Rm Rn; mov (Rm+),Rn +8.0xf9+8.0x6a+4.RN2,4.RM0!RN2:D1y:::mov +"mov" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM0); + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_word (State.regs[srcreg]); + State.regs[srcreg] += 4; +} + +// 1111 1001 0111 1010 Rm Rn; mov Rm,(Rn+) +8.0xf9+8.0x7a+4.RM2,4.RN0:D1z:::mov +"mov" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + store_word (State.regs[dstreg], State.regs[srcreg]); + State.regs[dstreg] += 4; +} + +// 1111 1001 1000 1010 Rn 0000; mov (sp),Rn +8.0xf9+8.0x8a+4.RN2,4.0000:D1j:::mov +"mov" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_word (State.regs[REG_SP]); +} + +// 1111 1001 1001 1010 Rm 0000; mov Rm, (sp) +8.0xf9+8.0x9a+4.RM2,4.0000:D1k:::mov +"mov" +*am33 +{ + int srcreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + store_word (State.regs[REG_SP], State.regs[srcreg]); +} + +// 1111 1001 1010 1010 Rn 0000; mobvu (sp),Rn +8.0xf9+8.0xaa+4.RN2,4.0000:D1j:::movbu +"movbu" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_byte (State.regs[REG_SP]); +} + +// 1111 1001 1011 1010 Rm 0000; movbu Rm, (sp) +8.0xf9+8.0xba+4.RM2,4.0000:D1k:::movbu +"movbu" +*am33 +{ + int srcreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + store_byte (State.regs[REG_SP], State.regs[srcreg]); +} + +// 1111 1001 1000 1100 Rn 0000; movhu (sp),Rn +8.0xf9+8.0xca+4.RN2,4.0000:D1j:::movhu +"movhu" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_half (State.regs[REG_SP]); +} + +// 1111 1001 1001 1101 Rm 0000; movhu Rm, (sp) +8.0xf9+8.0xda+4.RM2,4.0000:D1k:::movhu +"movhu" +*am33 +{ + int srcreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + store_half (State.regs[REG_SP], State.regs[srcreg]); +} + +// 1111 1001 1110 1010 Rm Rn; movhu (Rm+),Rn +8.0xf9+8.0xea+4.RN2,4.RM0!RN2:D1y:::movhu +"movhu" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM0); + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_half (State.regs[srcreg]); + State.regs[srcreg] += 2; +} + +// 1111 1001 1111 1010 Rm Rn; movhu Rm,(Rn+) +8.0xf9+8.0xfa+4.RM2,4.RN0:D1z:::movhu +"movhu" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + store_half (State.regs[dstreg], State.regs[srcreg]); + State.regs[dstreg] += 2; +} + + +// 1111 1001 0000 1011 Rm Rn; mac Rm,Rn +8.0xf9+8.0x0b+4.RM2,4.RN0:D1:::mac +"mac" +*am33 +{ + int srcreg1, srcreg2; + long long temp, sum; + int c, v; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + + temp = ((signed64)(signed32)State.regs[srcreg2] + * (signed64)(signed32)State.regs[srcreg1]); + sum = State.regs[REG_MCRL] + (temp & 0xffffffff); + c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff)); + State.regs[REG_MCRL] = sum; + temp >>= 32; + temp &= 0xffffffff; + sum = State.regs[REG_MCRH] + temp + c; + v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[REG_MCRH] = sum; + if (v) + State.regs[REG_MCVF] = 1; +} + +// 1111 1001 0001 1011 Rm Rn; macu Rm,Rn +8.0xf9+8.0x1b+4.RM2,4.RN0:D1:::macu +"macu" +*am33 +{ + int srcreg1, srcreg2; + unsigned long long temp, sum; + int c, v; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + + temp = ((unsigned64)State.regs[srcreg2] + * (unsigned64)State.regs[srcreg1]); + sum = State.regs[REG_MCRL] + (temp & 0xffffffff); + c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff)); + State.regs[REG_MCRL] = sum; + temp >>= 32; + temp &= 0xffffffff; + sum = State.regs[REG_MCRH] + temp + c; + v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[REG_MCRH] = sum; + if (v) + State.regs[REG_MCVF] = 1; +} + +// 1111 1001 0010 1011 Rm Rn; macb Rm,Rn +8.0xf9+8.0x2b+4.RM2,4.RN0:D1:::macb +"macb" +*am33 +{ + int srcreg1, srcreg2; + long temp, sum; + int v; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + + temp = ((signed32)(signed8)(State.regs[srcreg2] & 0xff) + * (signed32)(signed8)(State.regs[srcreg1] & 0xff)); + sum = State.regs[REG_MCRL] + temp; + v = ((State.regs[REG_MCRL] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[REG_MCRL] = sum; + if (v) + State.regs[REG_MCVF] = 1; +} + +// 1111 1001 0011 1011 Rm Rn; macbu Rm,Rn +8.0xf9+8.0x3b+4.RM2,4.RN0:D1:::macbu +"macbu" +*am33 +{ + int srcreg1, srcreg2; + long long temp, sum; + int v; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + + temp = ((unsigned32)(State.regs[srcreg2] & 0xff) + * (unsigned32)(State.regs[srcreg1] & 0xff)); + sum = State.regs[REG_MCRL] + temp; + v = ((State.regs[REG_MCRL] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[REG_MCRL] = sum; + if (v) + State.regs[REG_MCVF] = 1; +} + +// 1111 1001 0100 1011 Rm Rn; mach Rm,Rn +8.0xf9+8.0x4b+4.RM2,4.RN0:D1:::mach +"mach" +*am33 +{ + int srcreg1, srcreg2; + long long temp, sum; + int c, v; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + + temp = ((unsigned64)(signed16)(State.regs[srcreg2] & 0xffff) + * (unsigned64)(signed16)(State.regs[srcreg1] & 0xffff)); + sum = State.regs[REG_MCRL] + (temp & 0xffffffff); + c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff)); + State.regs[REG_MCRL] = sum; + temp >>= 32; + temp &= 0xffffffff; + sum = State.regs[REG_MCRH] + temp + c; + v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[REG_MCRH] = sum; + if (v) + State.regs[REG_MCVF] = 1; +} + +// 1111 1001 0101 1011 Rm Rn; machu Rm,Rn +8.0xf9+8.0x5b+4.RM2,4.RN0:D1:::machu +"machu" +*am33 +{ + int srcreg1, srcreg2; + long long temp, sum; + int c, v; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + + temp = ((unsigned64)(State.regs[srcreg2] & 0xffff) + * (unsigned64)(State.regs[srcreg1] & 0xffff)); + sum = State.regs[REG_MCRL] + (temp & 0xffffffff); + c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff)); + State.regs[REG_MCRL] = sum; + temp >>= 32; + temp &= 0xffffffff; + sum = State.regs[REG_MCRH] + temp + c; + v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[REG_MCRH] = sum; + if (v) + State.regs[REG_MCVF] = 1; +} + +// 1111 1001 0110 1011 Rm Rn; dmach Rm,Rn +8.0xf9+8.0x6b+4.RM2,4.RN0:D1:::dmach +"dmach" +*am33 +{ + int srcreg1, srcreg2; + long temp, temp2, sum; + int v; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + + temp = ((signed32)(signed16)(State.regs[srcreg2] & 0xffff) + * (signed32)(signed16)(State.regs[srcreg1] & 0xffff)); + temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff) + * (signed32)(signed16)((State.regs[srcreg2] >> 16) & 0xffff)); + sum = temp + temp2 + State.regs[REG_MCRL]; + v = ((State.regs[REG_MCRL] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[REG_MCRL] = sum; + if (v) + State.regs[REG_MCVF] = 1; +} + +// 1111 1001 0111 1011 Rm Rn; dmachu Rm,Rn +8.0xf9+8.0x7b+4.RM2,4.RN0:D1:::dmachu +"dmachu" +*am33 +{ + int srcreg1, srcreg2; + unsigned long temp, temp2, sum; + int v; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + + temp = ((unsigned32)(State.regs[srcreg2] & 0xffff) + * (unsigned32)(State.regs[srcreg1] & 0xffff)); + temp2 = ((unsigned32)((State.regs[srcreg1] >> 16) & 0xffff) + * (unsigned32)((State.regs[srcreg2] >> 16) & 0xffff)); + sum = temp + temp2 + State.regs[REG_MCRL]; + v = ((State.regs[REG_MCRL] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[REG_MCRL] = sum; + if (v) + State.regs[REG_MCVF] = 1; +} + +// 1111 1001 1000 1011 Rm Rn; dmulh Rm,Rn +8.0xf9+8.0x8b+4.RM2,4.RN0:D1:::dmulh +"dmulh" +*am33 +{ + int srcreg, dstreg; + long temp; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + + temp = ((signed32)(signed16)(State.regs[dstreg] & 0xffff) + * (signed32)(signed16)(State.regs[srcreg] & 0xffff)); + State.regs[REG_MDRQ] = temp; + temp = ((signed32)(signed16)((State.regs[dstreg] >> 16) & 0xffff) + * (signed32)(signed16)((State.regs[srcreg] >>16) & 0xffff)); + State.regs[dstreg] = temp; +} + +// 1111 1001 1001 1011 Rm Rn; dmulhu Rm,Rn +8.0xf9+8.0x9b+4.RM2,4.RN0:D1:::dumachu +"dmachu" +*am33 +{ + int srcreg, dstreg; + unsigned long temp; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + + temp = ((unsigned32)(State.regs[dstreg] & 0xffff) + * (unsigned32)(State.regs[srcreg] & 0xffff)); + State.regs[REG_MDRQ] = temp; + temp = ((unsigned32)((State.regs[dstreg] >> 16) & 0xffff) + * (unsigned32)((State.regs[srcreg] >>16) & 0xffff)); + State.regs[dstreg] = temp; +} + +// 1111 1001 1010 1011 Rm Rn; sat16 Rm,Rn +8.0xf9+8.0xab+4.RM2,4.RN0:D1:::sat16 +"sat16" +*am33 +{ + int srcreg, dstreg; + int value, z, n; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + + value = State.regs[srcreg]; + + if (value >= 0x7fff) + State.regs[dstreg] = 0x7fff; + else if (value <= 0xffff8000) + State.regs[dstreg] = 0xffff8000; + else + State.regs[dstreg] = value; + + n = (State.regs[dstreg] & 0x8000) != 0; + z = (State.regs[dstreg] == 0); + PSW &= ~(PSW_Z | PSW_N); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1001 1011 1011 Rm Rn; mcste Rm,Rn +8.0xf9+8.0xbb+4.RM2,4.RN0:D1:::mcste +"mcste" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + + PSW &= ~(PSW_V | PSW_C); + PSW |= (State.regs[REG_MCVF] ? PSW_V : 0); + + /* 32bit saturation. */ + if (State.regs[srcreg] == 0x20) + { + long long tmp; + + tmp = State.regs[REG_MCRH]; + tmp <<= 32; + tmp += State.regs[REG_MCRL]; + + if (tmp > 0x7fffffff) + State.regs[dstreg] = 0x7fffffff; + else if (tmp < 0xffffffff80000000LL) + State.regs[dstreg] = 0x80000000; + else + State.regs[dstreg] = tmp; + } + /* 16bit saturation */ + else if (State.regs[srcreg] == 0x10) + { + long long tmp; + + tmp = State.regs[REG_MCRH]; + tmp <<= 32; + tmp += State.regs[REG_MCRL]; + + if (tmp > 0x7fff) + State.regs[dstreg] = 0x7fff; + else if (tmp < 0xffffffffffff8000LL) + State.regs[dstreg] = 0x8000; + else + State.regs[dstreg] = tmp; + } + /* 8 bit saturation */ + else if (State.regs[srcreg] == 0x8) + { + long long tmp; + + tmp = State.regs[REG_MCRH]; + tmp <<= 32; + tmp += State.regs[REG_MCRL]; + + if (tmp > 0x7f) + State.regs[dstreg] = 0x7f; + else if (tmp < 0xffffffffffffff80LL) + State.regs[dstreg] = 0x80; + else + State.regs[dstreg] = tmp; + } + /* 9 bit saturation */ + else if (State.regs[srcreg] == 0x9) + { + long long tmp; + + tmp = State.regs[REG_MCRH]; + tmp <<= 32; + tmp += State.regs[REG_MCRL]; + + if (tmp > 0x80) + State.regs[dstreg] = 0x80; + else if (tmp < 0xffffffffffffff81LL) + State.regs[dstreg] = 0x81; + else + State.regs[dstreg] = tmp; + } + /* 9 bit saturation */ + else if (State.regs[srcreg] == 0x30) + { + long long tmp; + + tmp = State.regs[REG_MCRH]; + tmp <<= 32; + tmp += State.regs[REG_MCRL]; + + if (tmp > 0x7fffffffffffLL) + tmp = 0x7fffffffffffLL; + else if (tmp < 0xffff800000000000LL) + tmp = 0xffff800000000000LL; + + tmp >>= 16; + State.regs[dstreg] = tmp; + } +} + +// 1111 1001 1100 1011 Rm Rn; swap Rm,Rn +8.0xf9+8.0xcb+4.RM2,4.RN0:D1:::swap +"swap" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + + State.regs[dstreg] = (((State.regs[srcreg] & 0xff) << 24) + | (((State.regs[srcreg] >> 8) & 0xff) << 16) + | (((State.regs[srcreg] >> 16) & 0xff) << 8) + | ((State.regs[srcreg] >> 24) & 0xff)); +} + +// 1111 1101 1101 1011 Rm Rn; swaph Rm,Rn +8.0xf9+8.0xdb+4.RM2,4.RN0:D1:::swaph +"swaph" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + + State.regs[dstreg] = (((State.regs[srcreg] & 0xff) << 8) + | ((State.regs[srcreg] >> 8) & 0xff) + | (((State.regs[srcreg] >> 16) & 0xff) << 24) + | (((State.regs[srcreg] >> 24) & 0xff) << 16)); +} + +// 1111 1001 1110 1011 Rm Rn; swhw Rm,Rn +8.0xf9+8.0xeb+4.RM2,4.RN0:D1:::swhw +"swhw" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + + State.regs[dstreg] = (((State.regs[srcreg] & 0xffff) << 16) + | ((State.regs[srcreg] >> 16) & 0xffff)); +} + +// 1111 1001 1111 1011 Rm Rn; bsch Rm,Rn +8.0xf9+8.0xfb+4.RM2,4.RN0:D1:::bsch +"bsch" +*am33 +{ + int temp, c, i; + int srcreg, dstreg; + int start; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + + temp = State.regs[srcreg]; + start = (State.regs[dstreg] & 0x1f) - 1; + if (start == -1) + start = 31; + + for (i = start; i >= 0; i--) + { + if (temp & (1 << i)) + { + c = 1; + State.regs[dstreg] = i; + break; + } + } + + if (i < 0) + { + c = 0; + State.regs[dstreg] = 0; + } + PSW &= ~(PSW_C); + PSW |= (c ? PSW_C : 0); +} + + +// 1111 1011 0000 1000 Rn Rn IMM8; mov IMM8,Rn +8.0xfb+8.0x08+4.RM2,4.RN0=RM2+8.IMM8:D2j:::mov +"mov" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + State.regs[dstreg] = EXTEND8 (IMM8); +} + +// 1111 1011 0001 1000 Rn Rn IMM8; movu IMM8,Rn +8.0xfb+8.0x18+4.RM2,4.RN0=RM2+8.IMM8:D2:::movu +"movu" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + State.regs[dstreg] = IMM8 & 0xff; +} + +// 1111 1011 0111 1000 Rn Rn IMM8; add IMM8,Rn +8.0xfb+8.0x78+4.RM2,4.RN0=RM2+8.IMM8:D2d:::add +"add" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + genericAdd (EXTEND8 (IMM8), dstreg); +} + +// 1111 1011 1000 1000 Rn Rn IMM8; addc IMM8,Rn +8.0xfb+8.0x88+4.RM2,4.RN0=RM2+8.IMM8:D2d:::addc +"addc" +*am33 +{ + int dstreg, imm; + int z, c, n, v; + unsigned long reg1, reg2, sum; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + imm = EXTEND8 (IMM8); + reg2 = State.regs[dstreg]; + sum = imm + reg2 + ((PSW & PSW_C) != 0); + State.regs[dstreg] = sum; + + z = ((PSW & PSW_Z) != 0) && (sum == 0); + n = (sum & 0x80000000); + c = (sum < imm) || (sum < reg2); + v = ((reg2 & 0x80000000) == (imm & 0x80000000) + && (reg2 & 0x80000000) != (sum & 0x80000000)); + + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0) + | (c ? PSW_C : 0) | (v ? PSW_V : 0)); +} + +// 1111 1011 1001 1000 Rn Rn IMM8; sub IMM8,Rn +8.0xfb+8.0x98+4.RM2,4.RN0=RM2+8.IMM8:D2d:::sub +"sub" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + genericSub (EXTEND8 (IMM8), dstreg); +} + +// 1111 1011 1010 1000 Rn Rn IMM8; subc IMM8,Rn +8.0xfb+8.0xa8+4.RM2,4.RN0=RM2+8.IMM8:D2d:::subc +"subc" +*am33 +{ + int imm, dstreg; + int z, c, n, v; + unsigned long reg1, reg2, difference; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + imm = EXTEND8 (IMM8); + reg2 = State.regs[dstreg]; + difference = reg2 - imm - ((PSW & PSW_C) != 0); + State.regs[dstreg] = difference; + + z = ((PSW & PSW_Z) != 0) && (difference == 0); + n = (difference & 0x80000000); + c = (imm > reg2); + v = ((reg2 & 0x80000000) == (imm & 0x80000000) + && (reg2 & 0x80000000) != (difference & 0x80000000)); + + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0) + | (c ? PSW_C : 0) | (v ? PSW_V : 0)); +} + +// 1111 1011 1101 1000 Rn Rn IMM8; cmp IMM8,Rn +8.0xfb+8.0xd8+4.RM2,4.RN0=RM2+8.IMM8:D2b:::cmp +"cmp" +*am33 +{ + int srcreg; + + PC = cia; + srcreg = translate_rreg (SD_, RN0); + genericCmp (EXTEND8 (IMM8), State.regs[srcreg]); +} + +// 1111 1011 1111 1000 XRn XRn IMM8; mov IMM8,XRn +8.0xfb+8.0xf8+4.XRM2,4.XRN0=XRM2+8.IMM8:D2k:::mov +"mov" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_xreg (SD_, XRN0); + + State.regs[dstreg] = IMM8; +} + +// 1111 1011 0000 1001 Rn Rn IMM8; and IMM8,Rn +8.0xfb+8.0x09+4.RM2,4.RN0=RM2+8.IMM8:D2d:::and +"and" +*am33 +{ + int dstreg; + int z, n; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + State.regs[dstreg] &= (IMM8 & 0xff); + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1011 0001 1001 Rn Rn IMM8; or IMM8,Rn +8.0xfb+8.0x19+4.RM2,4.RN0=RM2+8.IMM8:D2d:::or +"or" +*am33 +{ + int dstreg; + int z, n; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + State.regs[dstreg] |= (IMM8 & 0xff); + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1011 0010 1001 Rn Rn IMM8; xor IMM8,Rn +8.0xfb+8.0x29+4.RM2,4.RN0=RM2+8.IMM8:D2d:::xor +"xor" +*am33 +{ + int dstreg; + int z, n; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + State.regs[dstreg] ^= (IMM8 & 0xff); + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1011 0100 1001 Rn Rn IMM8; asr IMM8,Rn +8.0xfb+8.0x49+4.RM2,4.RN0=RM2+8.IMM8:D2a:::asr +"asr" +*am33 +{ + int dstreg; + long temp; + int c, z, n; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + temp = State.regs[dstreg]; + c = temp & 1; + temp >>= (IMM8 & 0xff); + State.regs[dstreg] = temp; + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0)); +} + +// 1111 1011 0101 1001 Rn Rn IMM8; lsr IMM8,Rn +8.0xfb+8.0x59+4.RM2,4.RN0=RM2+8.IMM8:D2a:::lsr +"lsr" +*am33 +{ + int dstreg; + int z, n, c; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + c = State.regs[dstreg] & 1; + State.regs[dstreg] >>= (IMM8 & 0xff); + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0)); +} + +// 1111 1011 0110 1001 Rn Rn IMM8; asl IMM8,Rn +8.0xfb+8.0x69+4.RM2,4.RN0=RM2+8.IMM8:D2a:::asl +"asl" +*am33 +{ + int srcreg, dstreg; + int z, n; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + State.regs[dstreg] <<= (IMM8 & 0xff); + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1011 1010 1001 Rn Rn IMM8; mul IMM8,Rn +8.0xfb+8.0xa9+4.RM2,4.RN0=RM2+8.IMM8:D2a:::mul +"mul" +*am33 +{ + int dstreg; + unsigned long long temp; + int z, n; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + temp = ((signed64)(signed32)State.regs[dstreg] + * (signed64)(signed32)EXTEND8 (IMM8)); + State.regs[dstreg] = temp & 0xffffffff; + State.regs[REG_MDR] = (temp & 0xffffffff00000000LL) >> 32; + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1011 1011 1001 Rn Rn IMM8; mulu IMM8,Rn +8.0xfb+8.0xb9+4.RM2,4.RN0=RM2+8.IMM8:D2a:::mulu +"mulu" +*am33 +{ + int dstreg; + unsigned long long temp; + int z, n; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + temp = ((unsigned64)State.regs[dstreg] + * (unsigned64)(IMM8 & 0xff)); + State.regs[dstreg] = temp & 0xffffffff; + State.regs[REG_MDR] = (temp & 0xffffffff00000000LL) >> 32; + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1011 1110 1001 Rn Rn IMM8; btst imm8,Rn +8.0xfb+8.0xe9+4.RN2,4.RM0=RN2+8.IMM8:D2l:::btst +"btst" +*am33 +{ + int srcreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM0); + genericBtst(IMM8, State.regs[srcreg]); +} + +// 1111 1011 0000 1010 Rn Rm IMM8; mov (d8,Rm),Rn +8.0xfb+8.0x0a+4.RN2,4.RM0+8.IMM8:D2l:::mov +"mov" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM0); + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_word (State.regs[srcreg] + EXTEND8 (IMM8)); +} + +// 1111 1011 0001 1010 Rn Rm IMM8; mov Rm,(d8,Rn) +8.0xfb+8.0x1a+4.RM2,4.RN0+8.IMM8:D2m:::mov +"mov" +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + store_word (State.regs[dstreg] + EXTEND8 (IMM8), State.regs[srcreg]); +} + +// 1111 1011 0010 1010 Rn Rm IMM8; movbu (d8,Rm),Rn +8.0xfb+8.0x2a+4.RN2,4.RM0+8.IMM8:D2l:::movbu +"movbu" +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM0); + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_byte (State.regs[srcreg] + EXTEND8 (IMM8)); +} + +// 1111 1011 0011 1010 Rn Rm IMM8; movbu Rm,(d8,Rn) +8.0xfb+8.0x3a+4.RM2,4.RN0+8.IMM8:D2m:::movbu +"movbu" +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + store_byte (State.regs[dstreg] + EXTEND8 (IMM8), State.regs[srcreg]); +} + +// 1111 1011 0100 1010 Rn Rm IMM8; movhu (d8,Rm),Rn +8.0xfb+8.0x4a+4.RN2,4.RM0+8.IMM8:D2l:::movhu +"movhu" +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM0); + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_half (State.regs[srcreg] + EXTEND8 (IMM8)); +} + +// 1111 1011 0101 1010 Rn Rm IMM8; movhu Rm,(d8,Rn) +8.0xfb+8.0x5a+4.RM2,4.RN0+8.IMM8:D2m:::movhu +"movhu" +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + store_half (State.regs[dstreg] + EXTEND8 (IMM8), State.regs[srcreg]); +} + +// 1111 1011 0110 1010 Rn Rm IMM8; mov (d8,Rm+),Rn +8.0xfb+8.0x6a+4.RN2,4.RM0!RN2+8.IMM8:D2y:::mov +"mov" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM0); + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_word (State.regs[srcreg]); + State.regs[srcreg] += EXTEND8 (IMM8); +} + +// 1111 1011 0111 1010 Rn Rm IMM8; mov Rm,(d8,Rn+) +8.0xfb+8.0x7a+4.RM2,4.RN0+8.IMM8:D2z:::mov +"mov" +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + store_word (State.regs[dstreg], State.regs[srcreg]); + State.regs[dstreg] += EXTEND8 (IMM8); +} + + +// 1111 1011 1000 1010 Rn 0000 IMM8; mov (d8,sp),Rn +8.0xfb+8.0x8a+4.RN2,4.0x0+8.IMM8:D2n:::mov +"mov" +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_word (State.regs[REG_SP] + EXTEND8 (IMM8)); +} + +// 1111 1011 1001 1010 Rm 0000 IMM8; mov Rm,(d8,Rn) +8.0xfb+8.0x9a+4.RM2,4.0x0+8.IMM8:D2o:::mov +"mov" +{ + int srcreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + store_word (State.regs[REG_SP] + EXTEND8 (IMM8), State.regs[srcreg]); +} + +// 1111 1011 1010 1010 Rn Rm IMM8; movbu (d8,sp),Rn +8.0xfb+8.0xaa+4.RN2,4.0x0+8.IMM8:D2n:::movbu +"movbu" +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_byte (State.regs[REG_SP] + EXTEND8 (IMM8)); +} + +// 1111 1011 1011 1010 Rn Rm IMM8; movbu Rm,(sp,Rn) +8.0xfb+8.0xba+4.RM2,4.0x0+8.IMM8:D2o:::movbu +"movbu" +{ + int srcreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + store_byte (State.regs[REG_SP] + EXTEND8 (IMM8), State.regs[srcreg]); +} + +// 1111 1011 1100 1010 Rn Rm IMM8; movhu (d8,sp),Rn +8.0xfb+8.0xca+4.RN2,4.0x0+8.IMM8:D2n:::movhu +"movhu" +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_half (State.regs[REG_SP] + EXTEND8 (IMM8)); +} + +// 1111 1011 1101 1010 Rn Rm IMM8; movhu Rm,(d8,sp) +8.0xfb+8.0xda+4.RM2,4.0x0+8.IMM8:D2o:::movhu +"movhu" +{ + int srcreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + store_half (State.regs[REG_SP] + EXTEND8 (IMM8), State.regs[srcreg]); +} + +// 1111 1011 1110 1010 Rn Rm IMM8; movhu (d8,Rm+),Rn +8.0xfb+8.0xea+4.RN2,4.RM0!RN2+8.IMM8:D2y:::movhu +"movhu" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM0); + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_half (State.regs[srcreg]); + State.regs[srcreg] += EXTEND8 (IMM8); +} + +// 1111 1011 1111 1010 Rn Rm IMM8; movhu Rm,(d8,Rn+) +8.0xfb+8.0xfa+4.RM2,4.RN0+8.IMM8:D2z:::movhu +"movhu" +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + store_half (State.regs[dstreg], State.regs[srcreg]); + State.regs[dstreg] += EXTEND8 (IMM8); +} + + +// 1111 1011 0000 1011 Rn Rn IMM8; mac imm8,Rn +8.0xfb+8.0x0b+4.RN2,4.RN0=RN2+8.IMM8:D2:::mac +"mac" +{ + int srcreg; + long long temp, sum; + int c, v; + + PC = cia; + srcreg = translate_rreg (SD_, RN2); + + temp = ((signed64)(signed32)EXTEND8 (IMM8) + * (signed64)(signed32)State.regs[srcreg]); + sum = State.regs[REG_MCRL] + (temp & 0xffffffff); + c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff)); + State.regs[REG_MCRL] = sum; + temp >>= 32; + temp &= 0xffffffff; + sum = State.regs[REG_MCRH] + temp + c; + v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[REG_MCRH] = sum; + if (v) + State.regs[REG_MCVF] = 1; +} + +// 1111 1011 0001 1011 Rn Rn IMM8; macu imm8,Rn +8.0xfb+8.0x1b+4.RN2,4.RN0=RN2+8.IMM8:D2:::macu +"macu" +{ + int srcreg; + long long temp, sum; + int c, v; + + PC = cia; + srcreg = translate_rreg (SD_, RN2); + + temp = ((unsigned64) (IMM8) + * (unsigned64)State.regs[srcreg]); + sum = State.regs[REG_MCRL] + (temp & 0xffffffff); + c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff)); + State.regs[REG_MCRL] = sum; + temp >>= 32; + temp &= 0xffffffff; + sum = State.regs[REG_MCRH] + temp + c; + v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[REG_MCRH] = sum; + if (v) + State.regs[REG_MCVF] = 1; +} + +// 1111 1011 0010 1011 Rn Rn IMM8; macb imm8,Rn +8.0xfb+8.0x2b+4.RN2,4.RN0=RN2+8.IMM8:D2:::macb +"macb" +{ + int srcreg; + long long temp, sum; + int c, v; + + PC = cia; + srcreg = translate_rreg (SD_, RN2); + + temp = ((signed64)(signed8)EXTEND8 (IMM8) + * (signed64)(signed8)State.regs[srcreg] & 0xff); + sum = State.regs[REG_MCRL] + (temp & 0xffffffff); + c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff)); + State.regs[REG_MCRL] = sum; + temp >>= 32; + temp &= 0xffffffff; + sum = State.regs[REG_MCRH] + temp + c; + v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[REG_MCRH] = sum; + if (v) + State.regs[REG_MCVF] = 1; +} + +// 1111 1011 0011 1011 Rn Rn IMM8; macbu imm8,Rn +8.0xfb+8.0x3b+4.RN2,4.RN0=RN2+8.IMM8:D2:::macbu +"macbu" +{ + int srcreg; + long long temp, sum; + int c, v; + + PC = cia; + srcreg = translate_rreg (SD_, RN2); + + temp = ((unsigned64) (IMM8) + * (unsigned64)State.regs[srcreg] & 0xff); + sum = State.regs[REG_MCRL] + (temp & 0xffffffff); + c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff)); + State.regs[REG_MCRL] = sum; + temp >>= 32; + temp &= 0xffffffff; + sum = State.regs[REG_MCRH] + temp + c; + v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[REG_MCRH] = sum; + if (v) + State.regs[REG_MCVF] = 1; +} + +// 1111 1011 0100 1011 Rn Rn IMM8; mach imm8,Rn +8.0xfb+8.0x4b+4.RN2,4.RN0=RN2+8.IMM8:D2:::mach +"mach" +{ + int srcreg; + long long temp, sum; + int c, v; + + PC = cia; + srcreg = translate_rreg (SD_, RN2); + + temp = ((signed64)(signed16)EXTEND8 (IMM8) + * (signed64)(signed16)State.regs[srcreg] & 0xffff); + sum = State.regs[REG_MCRL] + (temp & 0xffffffff); + c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff)); + State.regs[REG_MCRL] = sum; + temp >>= 32; + temp &= 0xffffffff; + sum = State.regs[REG_MCRH] + temp + c; + v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[REG_MCRH] = sum; + if (v) + State.regs[REG_MCVF] = 1; +} + +// 1111 1011 0101 1011 Rn Rn IMM8; machu imm8,Rn +8.0xfb+8.0x5b+4.RN2,4.RN0=RN2+8.IMM8:D2:::machu +"machu" +{ + int srcreg; + long long temp, sum; + int c, v; + + PC = cia; + srcreg = translate_rreg (SD_, RN2); + + temp = ((unsigned64) (IMM8) + * (unsigned64)State.regs[srcreg] & 0xffff); + sum = State.regs[REG_MCRL] + (temp & 0xffffffff); + c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff)); + State.regs[REG_MCRL] = sum; + temp >>= 32; + temp &= 0xffffffff; + sum = State.regs[REG_MCRH] + temp + c; + v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[REG_MCRH] = sum; + if (v) + State.regs[REG_MCVF] = 1; +} + +// 1111 1011 1011 1011 Rn Rn IMM8; mcste imm8,Rn +8.0xfb+8.0xbb+4.RN2,4.RN0=RN2+8.IMM8:D2:::mcste +"mcste" +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + PSW &= ~(PSW_V | PSW_C); + PSW |= (State.regs[REG_MCVF] ? PSW_V : 0); + + /* 32bit saturation. */ + if (IMM8 == 0x20) + { + long long tmp; + + tmp = State.regs[REG_MCRH]; + tmp <<= 32; + tmp += State.regs[REG_MCRL]; + + if (tmp > 0x7fffffff) + State.regs[dstreg] = 0x7fffffff; + else if (tmp < 0xffffffff80000000LL) + State.regs[dstreg] = 0x80000000; + else + State.regs[dstreg] = tmp; + } + /* 16bit saturation */ + else if (IMM8 == 0x10) + { + long long tmp; + + tmp = State.regs[REG_MCRH]; + tmp <<= 32; + tmp += State.regs[REG_MCRL]; + + if (tmp > 0x7fff) + State.regs[dstreg] = 0x7fff; + else if (tmp < 0xffffffffffff8000LL) + State.regs[dstreg] = 0x8000; + else + State.regs[dstreg] = tmp; + } + /* 8 bit saturation */ + else if (IMM8 == 0x8) + { + long long tmp; + + tmp = State.regs[REG_MCRH]; + tmp <<= 32; + tmp += State.regs[REG_MCRL]; + + if (tmp > 0x7f) + State.regs[dstreg] = 0x7f; + else if (tmp < 0xffffffffffffff80LL) + State.regs[dstreg] = 0x80; + else + State.regs[dstreg] = tmp; + } + /* 9 bit saturation */ + else if (IMM8 == 0x9) + { + long long tmp; + + tmp = State.regs[REG_MCRH]; + tmp <<= 32; + tmp += State.regs[REG_MCRL]; + + if (tmp > 0x80) + State.regs[dstreg] = 0x80; + else if (tmp < 0xffffffffffffff81LL) + State.regs[dstreg] = 0x81; + else + State.regs[dstreg] = tmp; + } + /* 9 bit saturation */ + else if (IMM8 == 0x30) + { + long long tmp; + + tmp = State.regs[REG_MCRH]; + tmp <<= 32; + tmp += State.regs[REG_MCRL]; + + if (tmp > 0x7fffffffffffLL) + tmp = 0x7fffffffffffLL; + else if (tmp < 0xffff800000000000LL) + tmp = 0xffff800000000000LL; + + tmp >>= 16; + State.regs[dstreg] = tmp; + } +} + +// 1111 1011 0111 1100 Rm Rn Rd; add Rm,Rn,Rd +8.0xfb+8.0x7c+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::add +"add" +*am33 +{ + int z, c, n, v; + unsigned long sum, source1, source2; + int srcreg1, srcreg2, dstreg; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + dstreg = translate_rreg (SD_, RD0); + + source1 = State.regs[srcreg1]; + source2 = State.regs[srcreg2]; + sum = source1 + source2; + State.regs[dstreg] = sum; + + z = (sum == 0); + n = (sum & 0x80000000); + c = (sum < source1) || (sum < source2); + v = ((source1 & 0x80000000) == (source2 & 0x80000000) + && (source1 & 0x80000000) != (sum & 0x80000000)); + + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0) + | (c ? PSW_C : 0) | (v ? PSW_V : 0)); +} + +// 1111 1011 1000 1100 Rm Rn Rd; addc Rm,Rn,Rd +8.0xfb+8.0x8c+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::addc +"addc" +*am33 +{ + int z, c, n, v; + unsigned long sum, source1, source2; + int srcreg1, srcreg2, dstreg; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + dstreg = translate_rreg (SD_, RD0); + + source1 = State.regs[srcreg1]; + source2 = State.regs[srcreg2]; + sum = source1 + source2 + ((PSW & PSW_C) != 0); + State.regs[dstreg] = sum; + + z = ((PSW & PSW_Z) != 0) && (sum == 0); + n = (sum & 0x80000000); + c = (sum < source1) || (sum < source2); + v = ((source1 & 0x80000000) == (source2 & 0x80000000) + && (source1 & 0x80000000) != (sum & 0x80000000)); + + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0) + | (c ? PSW_C : 0) | (v ? PSW_V : 0)); +} + +// 1111 1011 1001 1100 Rm Rn Rd; sub Rm,Rn,Rd +8.0xfb+8.0x9c+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::sub +"sub" +*am33 +{ + int z, c, n, v; + unsigned long difference, source1, source2; + int srcreg1, srcreg2, dstreg; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + dstreg = translate_rreg (SD_, RD0); + + source1 = State.regs[srcreg1]; + source2 = State.regs[srcreg2]; + difference = source2 - source1; + State.regs[dstreg] = difference; + + z = (difference == 0); + n = (difference & 0x80000000); + c = (source1 > source1); + v = ((source1 & 0x80000000) == (source2 & 0x80000000) + && (source1 & 0x80000000) != (difference & 0x80000000)); + + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0) + | (c ? PSW_C : 0) | (v ? PSW_V : 0)); +} + +// 1111 1011 1010 1100 Rm Rn Rd; subc Rm,Rn,Rd +8.0xfb+8.0xac+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::subc +"subc" +*am33 +{ + int z, c, n, v; + unsigned long difference, source1, source2; + int srcreg1, srcreg2, dstreg; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + dstreg = translate_rreg (SD_, RD0); + + source1 = State.regs[srcreg1]; + source2 = State.regs[srcreg2]; + difference = source2 - source1 - ((PSW & PSW_C) != 0); + State.regs[dstreg] = difference; + + z = ((PSW & PSW_Z) != 0) && (difference == 0); + n = (difference & 0x80000000); + c = (source1 > source2); + v = ((source1 & 0x80000000) == (source2 & 0x80000000) + && (source1 & 0x80000000) != (difference & 0x80000000)); + + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0) + | (c ? PSW_C : 0) | (v ? PSW_V : 0)); +} + +// 1111 1011 0000 1101 Rm Rn Rd; and Rm,Rn,Rd +8.0xfb+8.0x0d+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::and +"and" +*am33 +{ + int z, n; + int srcreg1, srcreg2, dstreg; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + dstreg = translate_rreg (SD_, RD0); + + State.regs[dstreg] = State.regs[srcreg1] & State.regs[srcreg2]; + + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000); + + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)); +} + +// 1111 1011 0001 1101 Rm Rn Rd; or Rm,Rn,Rd +8.0xfb+8.0x1d+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::or +"or" +*am33 +{ + int z, n; + int srcreg1, srcreg2, dstreg; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + dstreg = translate_rreg (SD_, RD0); + + State.regs[dstreg] = State.regs[srcreg1] | State.regs[srcreg2]; + + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000); + + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)); +} + +// 1111 1011 0010 1101 Rm Rn Rd; xor Rm,Rn,Rd +8.0xfb+8.0x2d+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::xor +"xor" +*am33 +{ + int z, n; + int srcreg1, srcreg2, dstreg; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + dstreg = translate_rreg (SD_, RD0); + + State.regs[dstreg] = State.regs[srcreg1] ^ State.regs[srcreg2]; + + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000); + + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)); +} + +// 1111 1011 0100 1101 Rm Rn Rd; asr Rm,Rn,Rd +8.0xfb+8.0x4d+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::asr +"asr" +*am33 +{ + int z, c, n; + long temp; + int srcreg1, srcreg2, dstreg; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + dstreg = translate_rreg (SD_, RD0); + + temp = State.regs[srcreg2]; + c = temp & 1; + temp >>= State.regs[srcreg1]; + State.regs[dstreg] = temp; + + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000); + + PSW &= ~(PSW_Z | PSW_N | PSW_C); + PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)); +} + +// 1111 1011 0101 1101 Rm Rn Rd; lsr Rm,Rn,Rd +8.0xfb+8.0x5d+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::lsr +"lsr" +*am33 +{ + int z, c, n; + int srcreg1, srcreg2, dstreg; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + dstreg = translate_rreg (SD_, RD0); + + c = State.regs[srcreg2] & 1; + State.regs[dstreg] = State.regs[srcreg2] >> State.regs[srcreg1]; + + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000); + + PSW &= ~(PSW_Z | PSW_N | PSW_C); + PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)); +} + +// 1111 1011 0110 1101 Rm Rn Rd; asl Rm,Rn,Rd +8.0xfb+8.0x6d+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::asl +"asl" +*am33 +{ + int z, n; + int srcreg1, srcreg2, dstreg; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + dstreg = translate_rreg (SD_, RD0); + + State.regs[dstreg] = State.regs[srcreg2] << State.regs[srcreg1]; + + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000); + + PSW &= ~(PSW_Z | PSW_N | PSW_C); + PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)); +} + +// 1111 1011 1010 1101 Rm Rn Rd1 Rd2; mul Rm,Rn,Rd1,Rd2 +8.0xfb+8.0xad+4.RM2,4.RN0+4.RD0,4.RD2!RD0:D2c:::mul +"mul" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + signed long long temp; + int n, z; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + dstreg1 = translate_rreg (SD_, RD0); + dstreg2 = translate_rreg (SD_, RD2); + + temp = ((signed64)(signed32)State.regs[srcreg1] + * (signed64)(signed32)State.regs[srcreg2]); + State.regs[dstreg2] = temp & 0xffffffff; + State.regs[dstreg1] = (temp & 0xffffffff00000000LL) >> 32; + + z = (State.regs[dstreg1] == 0) && (State.regs[dstreg2] == 0); + n = (State.regs[dstreg1] & 0x80000000); + + PSW &= ~(PSW_Z | PSW_N); + PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)); +} + +// 1111 1011 1011 1101 Rm Rn Rd1 Rd2; mulu Rm,Rn,Rd1,Rd2 +8.0xfb+8.0xbd+4.RM2,4.RN0+4.RD0,4.RD2!RD0:D2c:::mulu +"mulu" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + signed long long temp; + int n, z; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + dstreg1 = translate_rreg (SD_, RD0); + dstreg2 = translate_rreg (SD_, RD2); + + temp = ((unsigned64)State.regs[srcreg1] + * (unsigned64)State.regs[srcreg2]); + State.regs[dstreg2] = temp & 0xffffffff; + State.regs[dstreg1] = (temp & 0xffffffff00000000LL) >> 32; + + z = (State.regs[dstreg1] == 0) && (State.regs[dstreg2] == 0); + n = (State.regs[dstreg1] & 0x80000000); + + PSW &= ~(PSW_Z | PSW_N); + PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)); +} + +// 1111 1011 0000 1110 Rn 0000 abs8 ; mov (abs8),Rn +8.0xfb+8.0x0e+4.RN2,4.0x0+8.IMM8:D2p:::mov +"mov" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_word (IMM8); +} + +// 1111 1011 0001 1110 Rm 0000 abs8 ; mov Rn,(abs8) +8.0xfb+8.0x1e+4.RM2,4.0x0+8.IMM8:D2q:::mov +"mov" +*am33 +{ + int srcreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + store_word (IMM8, State.regs[srcreg]); +} + +// 1111 1011 0010 1110 Rn 0000 abs8 ; movbu (abs8),Rn +8.0xfb+8.0x2e+4.RN2,4.0x0+8.IMM8:D2p:::movbu +"movbu" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_byte (IMM8); +} + +// 1111 1011 0011 1110 Rm 0000 abs8 ; movbu Rn,(abs8) +8.0xfb+8.0x3e+4.RM2,4.0x0+8.IMM8:D2q:::movbu +"movbu" +*am33 +{ + int srcreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + store_byte (IMM8, State.regs[srcreg]); +} + +// 1111 1011 0100 1110 Rn 0000 abs8 ; movhu (abs8),Rn +8.0xfb+8.0x4e+4.RN2,4.0x0+8.IMM8:D2p:::movhu +"movhu" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_half (IMM8); +} + +// 1111 1011 0101 1110 Rm 0000 abs8 ; movhu Rn,(abs8) +8.0xfb+8.0x5e+4.RM2,4.0x0+8.IMM8:D2q:::movhu +"movhu" +*am33 +{ + int srcreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + store_half (IMM8, State.regs[srcreg]); +} + +// 1111 1011 1000 1110 Ri Rm Rn; mov (Ri,Rm),Rn +8.0xfb+8.0x8e+4.RI0,4.RM0+4.RN0,4.0x0:D2r:::mov +"mov" +*am33 +{ + int srcreg1, srcreg2, dstreg; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM0); + srcreg1 = translate_rreg (SD_, RI0); + dstreg = translate_rreg (SD_, RN0); + State.regs[dstreg] = load_word (State.regs[srcreg1] + State.regs[srcreg2]); +} + +// 1111 1011 1001 1110 Ri Rm Rn; mov Rn,(Ri,Rm) +8.0xfb+8.0x9e+4.RI0,4.RN0+4.RM0,4.0x0:D2s:::mov +"mov" +*am33 +{ + int srcreg, dstreg1, dstreg2; + + PC = cia; + srcreg = translate_rreg (SD_, RM0); + dstreg1 = translate_rreg (SD_, RI0); + dstreg2 = translate_rreg (SD_, RN0); + store_word (State.regs[dstreg1] + State.regs[dstreg2], State.regs[srcreg]); +} + +// 1111 1011 1010 1110 Ri Rm Rn; movbu (Ri,Rm),Rn +8.0xfb+8.0xae+4.RI0,4.RM0+4.RN0,4.0x0:D2r:::movbu +"movbu" +*am33 +{ + int srcreg1, srcreg2, dstreg; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM0); + srcreg1 = translate_rreg (SD_, RI0); + dstreg = translate_rreg (SD_, RN0); + State.regs[dstreg] = load_byte (State.regs[srcreg1] + State.regs[srcreg2]); +} + +// 1111 1011 1011 1110 Ri Rm Rn; movbu Rn,(Ri,Rm) +8.0xfb+8.0xbe+4.RI0,4.RN0+4.RM0,4.0x0:D2s:::movbu +"movbu" +*am33 +{ + int srcreg, dstreg1, dstreg2; + + PC = cia; + srcreg = translate_rreg (SD_, RM0); + dstreg1 = translate_rreg (SD_, RI0); + dstreg2 = translate_rreg (SD_, RN0); + store_byte (State.regs[dstreg1] + State.regs[dstreg2], State.regs[srcreg]); +} + +// 1111 1011 1100 1110 Ri Rm Rn; movhu (Ri,Rm),Rn +8.0xfb+8.0xce+4.RI0,4.RM0+4.RN0,4.0x0:D2r:::movhu +"movhu" +*am33 +{ + int srcreg1, srcreg2, dstreg; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM0); + srcreg1 = translate_rreg (SD_, RI0); + dstreg = translate_rreg (SD_, RN0); + State.regs[dstreg] = load_half (State.regs[srcreg1] + State.regs[srcreg2]); +} + +// 1111 1011 1101 1110 Ri Rm Rn; movhu Rn,(Ri,Rm) +8.0xfb+8.0xde+4.RI0,4.RN0+4.RM0,4.0x0:D2s:::movhu +"movhu" +*am33 +{ + int srcreg, dstreg1, dstreg2; + + PC = cia; + srcreg = translate_rreg (SD_, RM0); + dstreg1 = translate_rreg (SD_, RI0); + dstreg2 = translate_rreg (SD_, RN0); + store_half (State.regs[dstreg1] + State.regs[dstreg2], State.regs[srcreg]); +} + +// 1111 1011 0000 1111 Rm Rn Rd1 Rd2; mac Rm,Rn,Rd1,Rd2 +8.0xfb+8.0x0f+4.RM2,4.RN0+4.RD0,4.RD2!RD0:D2c:::mac +"mac" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + signed long long temp; + unsigned long sum; + int c, v; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + dstreg1 = translate_rreg (SD_, RD0); + dstreg2 = translate_rreg (SD_, RD2); + + temp = ((signed64)(signed32)State.regs[srcreg1] + * (signed64)(signed32)State.regs[srcreg2]); + + sum = State.regs[dstreg2] + (temp & 0xffffffff); + c = (sum < State.regs[dstreg2]) || (sum < (temp & 0xffffffff)); + State.regs[dstreg2] = sum; + temp >>= 32; + temp &= 0xffffffff; + sum = State.regs[dstreg1] + temp + c; + v = ((State.regs[dstreg1] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[dstreg1] = sum; + if (v) + { + State.regs[REG_MCVF] = 1; + PSW &= ~(PSW_V); + PSW |= (( v ? PSW_V : 0)); + } +} + +// 1111 1011 0001 1111 Rm Rn Rd1 Rd2; macu Rm,Rn,Rd1,Rd2 +8.0xfb+8.0x1f+4.RM2,4.RN0+4.RD0,4.RD2!RD0:D2c:::macu +"macu" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + signed long long temp; + unsigned long sum; + int c, v; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + dstreg1 = translate_rreg (SD_, RD0); + dstreg2 = translate_rreg (SD_, RD2); + + temp = ((unsigned64)State.regs[srcreg1] + * (unsigned64)State.regs[srcreg2]); + + sum = State.regs[dstreg2] + (temp & 0xffffffff); + c = (sum < State.regs[dstreg2]) || (sum < (temp & 0xffffffff)); + State.regs[dstreg2] = sum; + temp >>= 32; + temp &= 0xffffffff; + sum = State.regs[dstreg1] + temp + c; + v = ((State.regs[dstreg1] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[dstreg1] = sum; + if (v) + { + State.regs[REG_MCVF] = 1; + PSW &= ~(PSW_V); + PSW |= (( v ? PSW_V : 0)); + } +} + +// 1111 1011 0010 1111 Rm Rn Rd1; macb Rm,Rn,Rd1 +8.0xfb+8.0x2f+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::macb +"macb" +*am33 +{ + int srcreg1, srcreg2, dstreg; + long temp, sum; + int v; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + dstreg = translate_rreg (SD_, RD0); + + temp = ((signed32)(State.regs[srcreg2] & 0xff) + * (signed32)(State.regs[srcreg1] & 0xff)); + sum = State.regs[dstreg] + temp; + v = ((State.regs[dstreg] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[dstreg] = sum; + if (v) + { + State.regs[REG_MCVF] = 1; + PSW &= ~(PSW_V); + PSW |= ((v ? PSW_V : 0)); + } +} + +// 1111 1011 0011 1111 Rm Rn Rd1; macbu Rm,Rn,Rd1 +8.0xfb+8.0x3f+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::macbu +"macbu" +*am33 +{ + int srcreg1, srcreg2, dstreg; + long temp, sum; + int v; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + dstreg = translate_rreg (SD_, RD0); + + temp = ((unsigned32)(State.regs[srcreg2] & 0xff) + * (unsigned32)(State.regs[srcreg1] & 0xff)); + sum = State.regs[dstreg] + temp; + v = ((State.regs[dstreg] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[dstreg] = sum; + if (v) + { + State.regs[REG_MCVF] = 1; + PSW &= ~(PSW_V); + PSW |= ((v ? PSW_V : 0)); + } +} + +// 1111 1011 0100 1111 Rm Rn Rd1; mach Rm,Rn,Rd1,Rd2 +8.0xfb+8.0x4f+4.RM2,4.RN0+4.RD0,4.RD2!RD0:D2c:::mach +"mach" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + long long temp, sum; + int v; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + dstreg1 = translate_rreg (SD_, RD0); + dstreg2 = translate_rreg (SD_, RD0); + + temp = ((signed32)(State.regs[srcreg2] & 0xffff) + * (signed32)(State.regs[srcreg1] & 0xffff)); + State.regs[dstreg2] += (temp & 0xffffffff); + sum = State.regs[dstreg1] + ((temp >> 32) & 0xffffffff); + v = ((State.regs[dstreg1] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[dstreg1] = sum; + if (v) + { + State.regs[REG_MCVF] = 1; + PSW &= ~(PSW_V); + PSW |= ((v ? PSW_V : 0)); + } +} + +// 1111 1011 0101 1111 Rm Rn Rd1; machu Rm,Rn,Rd1,Rd2 +8.0xfb+8.0x5f+4.RM2,4.RN0+4.RD0,4.RD2!RD0:D2c:::machu +"machu" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + long long temp, sum; + int v; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + dstreg1 = translate_rreg (SD_, RD0); + dstreg2 = translate_rreg (SD_, RD0); + + temp = ((unsigned32)(State.regs[srcreg2] & 0xffff) + * (unsigned32)(State.regs[srcreg1] & 0xffff)); + State.regs[dstreg2] += (temp & 0xffffffff); + sum = State.regs[dstreg1] + ((temp >> 32) & 0xffffffff); + v = ((State.regs[dstreg1] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[dstreg1] = sum; + if (v) + { + State.regs[REG_MCVF] = 1; + PSW &= ~(PSW_V); + PSW |= ((v ? PSW_V : 0)); + } +} + +// 1111 1011 0110 1111 Rm Rn Rd1; dmach Rm,Rn,Rd1 +8.0xfb+8.0x6f+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::dmach +"dmach" +*am33 +{ + int srcreg1, srcreg2, dstreg; + long temp, temp2, sum; + int v; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + dstreg = translate_rreg (SD_, RD0); + + temp = ((signed32)(State.regs[srcreg2] & 0xffff) + * (signed32)(State.regs[srcreg1] & 0xffff)); + temp2 = ((signed32)((State.regs[srcreg1] >> 16) & 0xffff) + * (signed32)((State.regs[srcreg2] >> 16) & 0xffff)); + sum = temp + temp2 + State.regs[dstreg]; + v = ((State.regs[dstreg] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[dstreg] = sum; + if (v) + { + State.regs[REG_MCVF] = 1; + PSW &= ~(PSW_V); + PSW |= ((v ? PSW_V : 0)); + } +} + +// 1111 1011 0111 1111 Rm Rn Rd1; dmachu Rm,Rn,Rd1 +8.0xfb+8.0x7f+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::dmachu +"dmachu" +*am33 +{ + int srcreg1, srcreg2, dstreg; + long temp, temp2, sum; + int v; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + dstreg = translate_rreg (SD_, RD0); + + temp = ((unsigned32)(State.regs[srcreg2] & 0xffff) + * (unsigned32)(State.regs[srcreg1] & 0xffff)); + temp2 = ((unsigned32)((State.regs[srcreg1] >> 16) & 0xffff) + * (unsigned32)((State.regs[srcreg2] >> 16) & 0xffff)); + sum = temp + temp2 + State.regs[dstreg]; + v = ((State.regs[dstreg] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[dstreg] = sum; + if (v) + { + State.regs[REG_MCVF] = 1; + PSW &= ~(PSW_V); + PSW |= ((v ? PSW_V : 0)); + } +} + +// 1111 1011 1000 1111 Rm Rn Rd1 Rd2; dmulh Rm,Rn,Rd1,Rd2 +8.0xfb+8.0x8f+4.RM2,4.RN0+4.RD0,4.RD2!RD0:D2c:::dmulh +"dmulh" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + signed long long temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + dstreg1 = translate_rreg (SD_, RD0); + dstreg2 = translate_rreg (SD_, RD2); + + temp = ((signed32)(State.regs[srcreg1] & 0xffff) + * (signed32)(State.regs[srcreg1] & 0xffff)); + State.regs[dstreg2] = temp; + temp = ((signed32)((State.regs[srcreg1] >> 16) & 0xffff) + * (signed32)((State.regs[srcreg1] >>16) & 0xffff)); + State.regs[dstreg1] = temp; +} + +// 1111 1011 1001 1111 Rm Rn Rd1 Rd2; dmulhu Rm,Rn,Rd1,Rd2 +8.0xfb+8.0x9f+4.RM2,4.RN0+4.RD0,4.RD2!RD0:D2c:::dmulhu +"dmulhu" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + signed long long temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + dstreg1 = translate_rreg (SD_, RD0); + dstreg2 = translate_rreg (SD_, RD2); + + temp = ((unsigned32)(State.regs[srcreg1] & 0xffff) + * (unsigned32)(State.regs[srcreg1] & 0xffff)); + State.regs[dstreg2] = temp; + temp = ((unsigned32)((State.regs[srcreg1] >> 16) & 0xffff) + * (unsigned32)((State.regs[srcreg1] >>16) & 0xffff)); + State.regs[dstreg1] = temp; +} + +// 1111 1011 1010 1111 Rm Rn; sat24 Rm,Rn +8.0xfb+8.0xaf+4.RM2,4.RN0+8.0x0:D2:::sat24 +"sat24" +*am33 +{ + int srcreg, dstreg; + int value, n, z; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + + value = State.regs[srcreg]; + + if (value >= 0x7fffff) + State.regs[dstreg] = 0x7fffff; + else if (value <= 0xff800000) + State.regs[dstreg] = 0xff800000; + else + State.regs[dstreg] = value; + + n = (State.regs[dstreg] & 0x800000) != 0; + z = (State.regs[dstreg] == 0); + PSW &= ~(PSW_Z | PSW_N); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1011 1111 1111 Rm Rn Rd1; bsch Rm,Rn,Rd1 +8.0xfb+8.0xff+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::bsch +"bsch" +*am33 +{ + int temp, c, i; + int srcreg1, srcreg2, dstreg; + int start; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM2); + srcreg2 = translate_rreg (SD_, RN0); + dstreg = translate_rreg (SD_, RD0); + + temp = State.regs[srcreg1]; + start = (State.regs[srcreg2] & 0x1f) - 1; + if (start == -1) + start = 31; + + for (i = start; i >= 0; i--) + { + if (temp & (1 << i)) + { + c = 1; + State.regs[dstreg] = i; + break; + } + } + + if (i < 0) + { + c = 0; + State.regs[dstreg] = 0; + } + PSW &= ~(PSW_C); + PSW |= (c ? PSW_C : 0); +} + +// 1111 1101 0000 1000 Rn Rn IMM32; mov imm24,Rn +8.0xfd+8.0x08+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4t:::mov +"mov" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + State.regs[dstreg] = EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C)); +} + +// 1111 1101 0001 1000 Rn Rn IMM32; movu imm24,Rn +8.0xfd+8.0x18+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4k:::movu +"movu" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + State.regs[dstreg] = FETCH24 (IMM24A, IMM24B, IMM24C) & 0xffffff; +} + +// 1111 1101 0111 1000 Rn Rn IMM32; add imm24,Rn +8.0xfd+8.0x78+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4c:::add +"add" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + genericAdd (EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C)), dstreg); +} + +// 1111 1101 1000 1000 Rn Rn IMM32; addc imm24,Rn +8.0xfd+8.0x88+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4b:::addc +"addc" +*am33 +{ + int dstreg, z, n, c, v; + unsigned long sum, imm, reg2; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + imm = EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C)); + reg2 = State.regs[dstreg]; + sum = imm + reg2 + ((PSW & PSW_C) != 0); + State.regs[dstreg] = sum; + + z = ((PSW & PSW_Z) != 0) && (sum == 0); + n = (sum & 0x80000000); + c = (sum < imm) || (sum < reg2); + v = ((reg2 & 0x80000000) == (imm & 0x80000000) + && (reg2 & 0x80000000) != (sum & 0x80000000)); + + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0) + | (c ? PSW_C : 0) | (v ? PSW_V : 0)); +} + +// 1111 1101 1001 1000 Rn Rn IMM32; sub imm24,Rn +8.0xfd+8.0x98+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4b:::sub +"sub" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + genericSub (EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C)), dstreg); +} + +// 1111 1101 1010 1000 Rn Rn IMM32; subc imm24,Rn +8.0xfd+8.0xa8+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4b:::subc +"subc" +*am33 +{ + int dstreg, z, n, c, v; + unsigned long difference, imm, reg2; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + imm = EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C)); + reg2 = State.regs[dstreg]; + difference = reg2 - imm - ((PSW & PSW_C) != 0); + State.regs[dstreg] = difference; + + z = ((PSW & PSW_Z) != 0) && (difference == 0); + n = (difference & 0x80000000); + c = (imm > reg2); + v = ((reg2 & 0x80000000) == (imm & 0x80000000) + && (reg2 & 0x80000000) != (difference & 0x80000000)); + + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0) + | (c ? PSW_C : 0) | (v ? PSW_V : 0)); +} + +// 1111 1101 1101 1000 Rn Rn IMM32; cmp imm24,Rn +8.0xfd+8.0xd8+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4b:::cmp +"cmp" +*am33 +{ + int srcreg; + + PC = cia; + srcreg = translate_rreg (SD_, RN0); + genericCmp (EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C)), State.regs[srcreg]); +} + +// 1111 1101 1111 1000 XRn XRn IMM32; mov imm24,XRn +8.0xfd+8.0xf8+4.XRM2,4.XRN0=XRM2+8.IMM24A+8.IMM24B+8.IMM24C:D4o:::mov +"mov" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_xreg (SD_, XRN0); + + State.regs[dstreg] = FETCH24 (IMM24A, IMM24B, IMM24C) & 0xffffff; +} + +// 1111 1101 0000 1001 Rn Rn IMM24; and imm24,Rn +8.0xfd+8.0x09+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4b:::and +"and" +*am33 +{ + int dstreg; + int z,n; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + State.regs[dstreg] &= (FETCH24 (IMM24A, IMM24B, IMM24C) & 0xffffff); + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1101 0001 1001 Rn Rn IMM24; or imm24,Rn +8.0xfd+8.0x19+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4b:::or +"or" +*am33 +{ + int dstreg; + int z,n; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + State.regs[dstreg] |= (FETCH24 (IMM24A, IMM24B, IMM24C) & 0xffffff); + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1101 0010 1001 Rn Rn IMM24; xor imm24,Rn +8.0xfd+8.0x29+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4b:::xor +"xor" +*am33 +{ + int dstreg; + int z,n; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + State.regs[dstreg] ^= (FETCH24 (IMM24A, IMM24B, IMM24C) & 0xffffff); + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1101 0100 1001 Rn Rn IMM24; asr imm24,Rn +8.0xfd+8.0x49+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4b:::asr +"asr" +*am33 +{ + int dstreg; + long temp; + int c, z, n; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + temp = State.regs[dstreg]; + c = temp & 1; + temp >>= (FETCH24 (IMM24A, IMM24B, IMM24C)); + State.regs[dstreg] = temp; + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0)); +} + + +// 1111 1101 0101 1001 Rn Rn IMM24; lsr imm24,Rn +8.0xfd+8.0x59+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4b:::lsr +"lsr" +*am33 +{ + int dstreg; + int z, n, c; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + c = State.regs[dstreg] & 1; + State.regs[dstreg] >>= (FETCH24 (IMM24A, IMM24B, IMM24C)); + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0)); +} + +// 1111 1101 0110 1001 Rn Rn IMM24; asl imm24,Rn +8.0xfd+8.0x69+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4b:::asl +"asl" +*am33 +{ + int srcreg, dstreg; + int z, n; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + State.regs[dstreg] <<= (FETCH24 (IMM24A, IMM24B, IMM24C)); + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1101 1010 1001 Rn Rn IMM24; mul imm24,Rn +8.0xfd+8.0xa9+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4b:::mul +"mul" +*am33 +{ + int dstreg; + unsigned long long temp; + int z, n; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + temp = ((signed64)(signed32)State.regs[dstreg] + * (signed64)(signed32)EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C))); + State.regs[dstreg] = temp & 0xffffffff; + State.regs[REG_MDR] = (temp & 0xffffffff00000000LL) >> 32; + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1101 1011 1001 Rn Rn IMM24; mulu imm24,Rn +8.0xfd+8.0xb9+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4b:::mulu +"mulu" +*am33 +{ + int dstreg; + unsigned long long temp; + int z, n; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + temp = ((unsigned64)State.regs[dstreg] + * (unsigned64)EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C))); + State.regs[dstreg] = temp & 0xffffffff; + State.regs[REG_MDR] = (temp & 0xffffffff00000000LL) >> 32; + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1101 1110 1001 Rn Rn IMM24; btst imm24,,Rn +8.0xfd+8.0xe9+4.RN2,4.RN0=RN2+8.IMM24A+8.IMM24B+8.IMM24C:D4p:::btst +"btst" +*am33 +{ + int srcreg; + + PC = cia; + srcreg = translate_rreg (SD_, RN0); + genericBtst (FETCH24 (IMM24A, IMM24B, IMM24C), State.regs[srcreg]); +} + +// 1111 1101 0000 1010 Rn Rm IMM24; mov (d24,Rm),Rn +8.0xfd+8.0x0a+4.RN2,4.RM0+8.IMM24A+8.IMM24B+8.IMM24C:D4p:::mov +"mov" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM0); + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_word (State.regs[srcreg] + + EXTEND24 (FETCH24 (IMM24A, + IMM24B, IMM24C))); +} + +// 1111 1101 0001 1010 Rm Rn IMM24; mov Rm,(d24,Rn) +8.0xfd+8.0x1a+4.RM2,4.RN0+8.IMM24A+8.IMM24B+8.IMM24C:D4q:::mov +"mov" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + store_word (State.regs[dstreg] + EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C)), + State.regs[srcreg]); +} + +// 1111 1101 0010 1010 Rn Rm IMM24; movbu (d24,Rm),Rn +8.0xfd+8.0x2a+4.RN2,4.RM0+8.IMM24A+8.IMM24B+8.IMM24C:D4p:::movbu +"movbu" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM0); + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_byte (State.regs[srcreg] + + EXTEND24 (FETCH24 (IMM24A, + IMM24B, IMM24C))); +} + +// 1111 1101 0011 1010 Rm Rn IMM24; movbu Rm,(d24,Rn) +8.0xfd+8.0x3a+4.RM2,4.RN0+8.IMM24A+8.IMM24B+8.IMM24C:D4q:::movbu +"movbu" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + store_byte (State.regs[dstreg] + EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C)), + State.regs[srcreg]); +} + +// 1111 1101 0100 1010 Rn Rm IMM24; movhu (d24,Rm),Rn +8.0xfd+8.0x4a+4.RN2,4.RM0+8.IMM24A+8.IMM24B+8.IMM24C:D4p:::movhu +"movhu" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM0); + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_half (State.regs[srcreg] + + EXTEND24 (FETCH24 (IMM24A, + IMM24B, IMM24C))); +} + +// 1111 1101 0101 1010 Rm Rn IMM24; movhu Rm,(d24,Rn) +8.0xfd+8.0x5a+4.RM2,4.RN0+8.IMM24A+8.IMM24B+8.IMM24C:D4q:::movhu +"movhu" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + store_half (State.regs[dstreg] + EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C)), + State.regs[srcreg]); +} + +// 1111 1101 0110 1010 Rn Rm IMM24; mov (d24,Rm+),Rn +8.0xfd+8.0x6a+4.RN2,4.RM0!RN2+8.IMM24A+8.IMM24B+8.IMM24C:D4y:::mov +"mov" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM0); + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_word (State.regs[srcreg]); + State.regs[srcreg] += EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C)); +} + +// 1111 1101 0111 1010 Rm Rn IMM24; mov Rm,(d24,Rn+) +8.0xfd+8.0x7a+4.RM2,4.RN0+8.IMM24A+8.IMM24B+8.IMM24C:D4z:::mov +"mov" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + store_word (State.regs[dstreg], State.regs[srcreg]); + State.regs[dstreg] += EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C)); +} + + +// 1111 1101 1000 1010 Rn 0000 IMM24; mov (d24,sp),Rn +8.0xfd+8.0x8a+4.RN2,4.0x0+IMM24A+8.IMM24B+8.IMM24C:D4r:::mov +"mov" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_word (State.regs[REG_SP] + + EXTEND24 (FETCH24 (IMM24A, + IMM24B, IMM24C))); +} + +// 1111 1101 1001 1010 Rm 0000 IMM24; mov Rm,(d24,sp) +8.0xfd+8.0x9a+4.RM2,4.0x0+8.IMM24A+8.IMM24B+8.IMM24C:D4s:::mov +"mov" +*am33 +{ + int srcreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + store_word (State.regs[REG_SP] + EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C)), + State.regs[srcreg]); +} + +// 1111 1101 1010 1010 Rn 0000 IMM24; movbu (d24,Rm),Rn +8.0xfd+8.0xaa+4.RN2,4.0x0+8.IMM24A+8.IMM24B+8.IMM24C:D4r:::movbu +"movbu" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_byte (State.regs[REG_SP] + + EXTEND24 (FETCH24 (IMM24A, + IMM24B, IMM24C))); +} + +// 1111 1101 1011 1010 Rm 0000 IMM24; movbu Rm,(d24,sp) +8.0xfd+8.0xba+4.RM2,4.0x0+8.IMM24A+8.IMM24B+8.IMM24C:D4s:::movbu +"movbu" +*am33 +{ + int srcreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + store_byte (State.regs[REG_SP] + EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C)), + State.regs[srcreg]); +} + +// 1111 1101 1100 1010 Rn 0000 IMM24; movhu (d24,sp),Rn +8.0xfd+8.0xca+4.RN2,4.0x0+8.IMM24A+8.IMM24B+8.IMM24C:D4r:::movhu +"movhu" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_half (State.regs[REG_SP] + + EXTEND24 (FETCH24 (IMM24A, + IMM24B, IMM24C))); +} + +// 1111 1101 1101 1010 Rm Rn IMM24; movhu Rm,(d24,sp) +8.0xfd+8.0xda+4.RM2,4.RN0+8.IMM24A+8.IMM24B+8.IMM24C:D4s:::movhu +"movhu" +*am33 +{ + int srcreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + store_half (State.regs[REG_SP] + EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C)), + State.regs[srcreg]); +} + +// 1111 1101 1110 1010 Rn Rm IMM24; movhu (d24,Rm+),Rn +8.0xfd+8.0xea+4.RN2,4.RM0!RN2+8.IMM24A+8.IMM24B+8.IMM24C:D4y:::movhu +"movhu" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM0); + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_half (State.regs[srcreg]); + State.regs[dstreg] += EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C)); +} + +// 1111 1101 1111 1010 Rm Rn IMM24; movhu Rm,(d24,Rn+) +8.0xfd+8.0xfa+4.RM2,4.RN0+8.IMM24A+8.IMM24B+8.IMM24C:D4z:::movhu +"movhu" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + store_half (State.regs[dstreg], State.regs[srcreg]); + State.regs[srcreg] += EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C)); +} + +// 1111 1101 0000 1011 Rn IMM24; mac imm24,Rn +8.0xfd+8.0x0b+4.RN2,4.RN0=RN2+8.IMM24A+8.IMM24B+8.IMM24C:D4z:::mac +"mac" +*am33 +{ + int srcreg; + long long temp, sum; + int c, v; + + PC = cia; + srcreg = translate_rreg (SD_, RN2); + + temp = ((signed64)EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C)) + * (signed64)State.regs[srcreg]); + sum = State.regs[REG_MCRL] + (temp & 0xffffffff); + c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff)); + State.regs[REG_MCRL] = sum; + temp >>= 32; + temp &= 0xffffffff; + sum = State.regs[REG_MCRH] + temp + c; + v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[REG_MCRH] = sum; + if (v) + State.regs[REG_MCVF] = 1; +} + +// 1111 1101 0001 1011 Rn IMM24; macu imm24,Rn +8.0xfd+8.0x1b+4.RN2,4.RN0=RN2+8.IMM24A+8.IMM24B+8.IMM24C:D4z:::macu +"macu" +*am33 +{ + int srcreg; + long long temp, sum; + int c, v; + + PC = cia; + srcreg = translate_rreg (SD_, RN2); + + temp = ((unsigned64) (FETCH24 (IMM24A, IMM24B, IMM24C)) + * (unsigned64)State.regs[srcreg]); + sum = State.regs[REG_MCRL] + (temp & 0xffffffff); + c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff)); + State.regs[REG_MCRL] = sum; + temp >>= 32; + temp &= 0xffffffff; + sum = State.regs[REG_MCRH] + temp + c; + v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[REG_MCRH] = sum; + if (v) + State.regs[REG_MCVF] = 1; +} + +// 1111 1101 0010 1011 Rn IMM24; macb imm24,Rn +8.0xfd+8.0x2b+4.RN2,4.RN0=RN2+8.IMM24A+8.IMM24B+8.IMM24C:D4z:::macb +"macb" +*am33 +{ + int srcreg; + long long temp, sum; + int c, v; + + PC = cia; + srcreg = translate_rreg (SD_, RN2); + + temp = ((signed64)EXTEND8 (FETCH24 (IMM24A, IMM24B, IMM24C)) + * (signed64)State.regs[srcreg] & 0xff); + sum = State.regs[REG_MCRL] + (temp & 0xffffffff); + c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff)); + State.regs[REG_MCRL] = sum; + temp >>= 32; + temp &= 0xffffffff; + sum = State.regs[REG_MCRH] + temp + c; + v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[REG_MCRH] = sum; + if (v) + State.regs[REG_MCVF] = 1; +} + +// 1111 1101 0011 1011 Rn IMM24; macbu imm24,Rn +8.0xfd+8.0x3b+4.RN2,4.RN0=RN2+8.IMM24A+8.IMM24B+8.IMM24C:D4z:::macbu +"macbu" +*am33 +{ + int srcreg; + long long temp, sum; + int c, v; + + PC = cia; + srcreg = translate_rreg (SD_, RN2); + + temp = ((unsigned64) (FETCH24 (IMM24A, IMM24B, IMM24C)) + * (unsigned64)State.regs[srcreg] & 0xff); + sum = State.regs[REG_MCRL] + (temp & 0xffffffff); + c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff)); + State.regs[REG_MCRL] = sum; + temp >>= 32; + temp &= 0xffffffff; + sum = State.regs[REG_MCRH] + temp + c; + v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[REG_MCRH] = sum; + if (v) + State.regs[REG_MCVF] = 1; +} + +// 1111 1101 0100 1011 Rn IMM24; mach imm24,Rn +8.0xfd+8.0x4b+4.RN2,4.RN0=RN2+8.IMM24A+8.IMM24B+8.IMM24C:D4z:::mach +"mach" +*am33 +{ + int srcreg; + long long temp, sum; + int c, v; + + PC = cia; + srcreg = translate_rreg (SD_, RN2); + + temp = ((signed64)EXTEND16 (FETCH24 (IMM24A, IMM24B, IMM24C)) + * (signed64)State.regs[srcreg] & 0xffff); + sum = State.regs[REG_MCRL] + (temp & 0xffffffff); + c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff)); + State.regs[REG_MCRL] = sum; + temp >>= 32; + temp &= 0xffffffff; + sum = State.regs[REG_MCRH] + temp + c; + v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[REG_MCRH] = sum; + if (v) + State.regs[REG_MCVF] = 1; +} + +// 1111 1101 0101 1011 Rn IMM24; machu imm24,Rn +8.0xfd+8.0x5b+4.RN2,4.RN0=RN2+8.IMM24A+8.IMM24B+8.IMM24C:D4z:::machu +"machu" +*am33 +{ + int srcreg; + long long temp, sum; + int c, v; + + PC = cia; + srcreg = translate_rreg (SD_, RN2); + + temp = ((unsigned64) (FETCH24 (IMM24A, IMM24B, IMM24C) & 0xffff) + * (unsigned64)State.regs[srcreg] & 0xffff); + sum = State.regs[REG_MCRL] + (temp & 0xffffffff); + c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff)); + State.regs[REG_MCRL] = sum; + temp >>= 32; + temp &= 0xffffffff; + sum = State.regs[REG_MCRH] + temp + c; + v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[REG_MCRH] = sum; + if (v) + State.regs[REG_MCVF] = 1; +} + +// 1111 1101 0000 1110 Rn 0000 ABS24; mov (abs24),Rn +8.0xfd+8.0x0e+4.RN2,4.0x0+8.IMM24A+8.IMM24B+8.IMM24C:D4u:::mov +"mov" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_word (FETCH24 (IMM24A, IMM24B, IMM24C)); +} + +// 1111 1101 0001 1110 Rm 0000 ABS24; mov Rm,(abs24) +8.0xfd+8.0x1e+4.RM2,4.0x0+8.IMM24A+8.IMM24B+8.IMM24C:D4v:::mov +"mov" +*am33 +{ + int srcreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + store_word (FETCH24 (IMM24A, IMM24B, IMM24C), State.regs[srcreg]); +} + + +// 1111 1101 0010 1110 Rn 0000 ABS24; movbu (abs24),Rn +8.0xfd+8.0x2e+4.RN2,4.0x0+8.IMM24A+8.IMM24B+8.IMM24C:D4t:::movbu +"movbu" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_byte (FETCH24 (IMM24A, IMM24B, IMM24C)); +} + +// 1111 1101 0011 1110 Rm 0000 ABS24; movbu Rm,(abs24) +8.0xfd+8.0x3e+4.RM2,4.0x0+8.IMM24A+8.IMM24B+8.IMM24C:D4u:::movbu +"movbu" +*am33 +{ + int srcreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + store_byte (FETCH24 (IMM24A, IMM24B, IMM24C), State.regs[srcreg]); +} + + +// 1111 1101 0100 1110 Rn 0000 ABS24; movhu (abs24),Rn +8.0xfd+8.0x4e+4.RN2,4.0x0+8.IMM24A+8.IMM24B+8.IMM24C:D4t:::movhu +"movhu" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_half (FETCH24 (IMM24A, IMM24B, IMM24C)); +} + +// 1111 1101 0101 1110 Rm 0000 ABS24; movhu Rm,(abs24) +8.0xfd+8.0x5e+4.RM2,4.0x0+8.IMM24A+8.IMM24B+8.IMM24C:D4u:::movhu +"movhu" +*am33 +{ + int srcreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + store_half (FETCH24 (IMM24A, IMM24B, IMM24C), State.regs[srcreg]); +} + + +// 1111 1110 0000 1000 Rn Rn IMM32; mov imm32,Rn +8.0xfe+8.0x08+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::mov +"mov" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + State.regs[dstreg] = FETCH32(IMM32A, IMM32B, IMM32C, IMM32D); +} + +// 1111 1110 0001 1000 Rn Rn IMM32; movu imm32,Rn +8.0xfe+8.0x18+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::movu +"movu" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + State.regs[dstreg] = FETCH32(IMM32A, IMM32B, IMM32C, IMM32D); +} + +// 1111 1110 0111 1000 Rn Rn IMM32; add imm32,Rn +8.0xfe+8.0x78+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::add +"add" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + genericAdd (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D), dstreg); +} + +// 1111 1110 1000 1000 Rn Rn IMM32; addc imm32,Rn +8.0xfe+8.0x88+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::addc +"addc" +*am33 +{ + int dstreg; + unsigned int imm, reg2, sum; + int z, n, c, v; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + imm = FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D); + reg2 = State.regs[dstreg]; + sum = imm + reg2 + ((PSW & PSW_C) != 0); + State.regs[dstreg] = sum; + + z = ((PSW & PSW_Z) != 0) && (sum == 0); + n = (sum & 0x80000000); + c = (sum < imm) || (sum < reg2); + v = ((reg2 & 0x80000000) == (imm & 0x80000000) + && (reg2 & 0x80000000) != (sum & 0x80000000)); + + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0) + | (c ? PSW_C : 0) | (v ? PSW_V : 0)); +} + +// 1111 1110 1001 1000 Rn Rn IMM32; sub imm32,Rn +8.0xfe+8.0x98+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::sub +"sub" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + genericSub (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D), dstreg); +} + +// 1111 1110 1010 1000 Rn Rn IMM32; subc imm32,Rn +8.0xfe+8.0xa8+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::subc +"subc" +*am33 +{ + int dstreg; + unsigned int imm, reg2, difference; + int z, n, c, v; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + imm = FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D); + reg2 = State.regs[dstreg]; + difference = reg2 - imm - ((PSW & PSW_C) != 0); + State.regs[dstreg] = difference; + + z = ((PSW & PSW_Z) != 0) && (difference == 0); + n = (difference & 0x80000000); + c = (imm > reg2); + v = ((reg2 & 0x80000000) == (imm & 0x80000000) + && (reg2 & 0x80000000) != (difference & 0x80000000)); + + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0) + | (c ? PSW_C : 0) | (v ? PSW_V : 0)); +} + +// 1111 1110 0111 1000 Rn Rn IMM32; cmp imm32,Rn +8.0xfe+8.0xd8+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::cmp +"cmp" +*am33 +{ + int srcreg; + + PC = cia; + srcreg = translate_rreg (SD_, RN0); + genericCmp (FETCH32(IMM32A, IMM32B, IMM32C, IMM32D), State.regs[srcreg]); +} + +// 1111 1110 1111 1000 XRn XRn IMM32; mov imm32,XRn +8.0xfe+8.0xf8+4.XRM2,4.XRN0=XRM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5b:::mov +"mov" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_xreg (SD_, XRN0); + + State.regs[dstreg] = FETCH32(IMM32A, IMM32B, IMM32C, IMM32D); +} + +// 1111 1110 0000 1001 Rn Rn IMM32; and imm32,Rn +8.0xfe+8.0x09+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::and +"and" +*am33 +{ + int dstreg; + int z,n; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + State.regs[dstreg] &= (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D)); + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1110 0001 1001 Rn Rn IMM32; or imm32,Rn +8.0xfe+8.0x19+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::or +"or" +*am33 +{ + int dstreg; + int z,n; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + State.regs[dstreg] |= (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D)); + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1110 0010 1001 Rn Rn IMM32; xor imm32,Rn +8.0xfe+8.0x29+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::xor +"xor" +*am33 +{ + int dstreg; + int z,n; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + State.regs[dstreg] ^= (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D)); + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1110 0100 1001 Rn Rn IMM32; asr imm32,Rn +8.0xfe+8.0x49+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::asr +"asr" +*am33 +{ + int dstreg; + long temp; + int c, z, n; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + temp = State.regs[dstreg]; + c = temp & 1; + temp >>= (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D)); + State.regs[dstreg] = temp; + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0)); +} + +// 1111 1110 0101 1001 Rn Rn IMM32; lsr imm32,Rn +8.0xfe+8.0x59+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::lsr +"lsr" +*am33 +{ + int dstreg; + int z, n, c; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + c = State.regs[dstreg] & 1; + State.regs[dstreg] >>= (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D)); + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0)); +} + +// 1111 1110 0110 1001 Rn Rn IMM32; asl imm32,Rn +8.0xfe+8.0x69+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::asl +"asl" +*am33 +{ + int srcreg, dstreg; + int z, n; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + State.regs[dstreg] <<= (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D)); + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1110 1010 1001 Rn Rn IMM32; mul imm32,Rn +8.0xfe+8.0xa9+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::mul +"mul" +*am33 +{ + int dstreg; + unsigned long long temp; + int z, n; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + temp = ((signed64)(signed32)State.regs[dstreg] + * (signed64)(signed32)(FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D))); + State.regs[dstreg] = temp & 0xffffffff; + State.regs[REG_MDR] = (temp & 0xffffffff00000000LL) >> 32; + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1110 1011 1001 Rn Rn IMM32; mulu imm32,Rn +8.0xfe+8.0xb9+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::mulu +"mulu" +*am33 +{ + int dstreg; + unsigned long long temp; + int z, n; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + + temp = ((unsigned64)State.regs[dstreg] + * (unsigned64) (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D))); + State.regs[dstreg] = temp & 0xffffffff; + State.regs[REG_MDR] = (temp & 0xffffffff00000000LL) >> 32; + z = (State.regs[dstreg] == 0); + n = (State.regs[dstreg] & 0x80000000) != 0; + PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); + PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0)); +} + +// 1111 1110 1110 1001 Rn Rn IMM32; btst imm32,Rn +8.0xfe+8.0xe9+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5a:::btst +"btst" +*am33 +{ + int srcreg; + + PC = cia; + srcreg = translate_rreg (SD_, RN0); + genericBtst (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D), State.regs[srcreg]); +} + +// 1111 1110 0000 1010 Rn Rm IMM32; mov (d32,Rm),Rn +8.0xfe+8.0x0a+4.RN2,4.RM0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5f:::mov +"mov" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM0); + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_word (State.regs[srcreg] + + FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D)); +} + +// 1111 1110 0001 1010 Rm Rn IMM32; mov Rm,(d32,Rn) +8.0xfe+8.0x1a+4.RM2,4.RN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5g:::mov +"mov" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + store_word (State.regs[dstreg] + FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D), + State.regs[srcreg]); +} + +// 1111 1110 0010 1010 Rn Rm IMM32; movbu (d32,Rm),Rn +8.0xfe+8.0x2a+4.RN2,4.RM0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::movbu +"movbu" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM0); + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_byte (State.regs[srcreg] + + FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D)); +} + +// 1111 1110 0011 1010 Rm Rn IMM32; movbu Rm,(d32,Rn) +8.0xfe+8.0x3a+4.RM2,4.RN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5b:::movbu +"movbu" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + store_byte (State.regs[dstreg] + FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D), + State.regs[srcreg]); +} + +// 1111 1110 0100 1010 Rn Rm IMM32; movhu (d32,Rm),Rn +8.0xfe+8.0x4a+4.RN2,4.RM0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::movhu +"movhu" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM0); + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_half (State.regs[srcreg] + + FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D)); +} + +// 1111 1110 0101 1010 Rm Rn IMM32; movhu Rm,(d32,Rn) +8.0xfe+8.0x5a+4.RM2,4.RN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5b:::movhu +"movhu" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + store_half (State.regs[dstreg] + FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D), + State.regs[srcreg]); +} + +// 1111 1110 0110 1010 Rn Rm IMM32; mov (d32,Rm+),Rn +8.0xfe+8.0x6a+4.RN2,4.RM0!RN2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5y:::mov +"mov" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM0); + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_word (State.regs[srcreg]); + State.regs[srcreg] += FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D); +} + +// 1111 1110 0111 1010 Rm Rn IMM32; mov Rm,(d32,Rn+) +8.0xfe+8.0x7a+4.RM2,4.RN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5z:::mov +"mov" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + store_word (State.regs[dstreg], State.regs[srcreg]); + State.regs[dstreg] += FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D); +} + + +// 1111 1110 1000 1010 Rn 0000 IMM32; mov (d32,sp),Rn +8.0xfe+8.0x8a+4.RN2,4.0x0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5c:::mov +"mov" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_word (State.regs[REG_SP] + + FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D)); +} + +// 1111 1110 1001 1010 Rm 0000 IMM32; mov Rm,(d32,sp) +8.0xfe+8.0x9a+4.RM2,4.0x0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5d:::mov +"mov" +*am33 +{ + int srcreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + store_word (State.regs[REG_SP] + FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D), + State.regs[srcreg]); +} + +// 1111 1110 1010 1010 Rn 0000 IMM32; movbu (d32,sp),Rn +8.0xfe+8.0xaa+4.RN2,4.0x0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5c:::movbu +"movbu" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_byte (State.regs[REG_SP] + + FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D)); +} + +// 1111 1110 1011 1010 Rm 0000 IMM32; movbu Rm,(d32,sp) +8.0xfe+8.0xba+4.RM2,4.0x0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5d:::movbu +"movbu" +*am33 +{ + int srcreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + store_byte (State.regs[REG_SP] + FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D), + State.regs[srcreg]); +} + +// 1111 1110 1100 1010 Rn 0000 IMM32; movhu (d32,sp),Rn +8.0xfe+8.0xca+4.RN2,4.0x0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5c:::movhu +"movhu" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_half (State.regs[REG_SP] + + FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D)); +} + +// 1111 1110 1101 1010 Rm 0000 IMM32; movhu Rm,(d32,sp) +8.0xfe+8.0xda+4.RM2,4.0x0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5d:::movhu +"movhu" +*am33 +{ + int srcreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + store_half (State.regs[REG_SP] + FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D), + State.regs[srcreg]); +} + + +// 1111 1110 1110 1010 Rn Rm IMM32; movhu (d32,Rm+),Rn +8.0xfe+8.0xea+4.RN2,4.RM0!RN2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5y:::movhu +"movhu" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM0); + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_half (State.regs[srcreg]); + State.regs[srcreg] += FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D); +} + +// 1111 1110 1111 1010 Rm Rn IMM32; movhu Rm,(d32,Rn+) +8.0xfe+8.0xfa+4.RM2,4.RN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5f:::movhu +"movhu" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + dstreg = translate_rreg (SD_, RN0); + store_half (State.regs[dstreg], State.regs[srcreg]); + State.regs[dstreg] += FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D); +} + + +// 1111 1110 0000 1011 Rn Rn IMM32; mac imm32,Rn +8.0xfe+8.0x0b+4.RN2,4.RN0=RN2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::mac +"mac" +*am33 +{ + int srcreg, imm; + long long temp, sum; + int c, v; + + PC = cia; + srcreg = translate_rreg (SD_, RN0); + imm = FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D); + + temp = ((signed64)(signed32)State.regs[srcreg] + * (signed64)(signed32)imm); + sum = State.regs[REG_MCRL] + (temp & 0xffffffff); + c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff)); + State.regs[REG_MCRL] = sum; + temp >>= 32; + temp &= 0xffffffff; + sum = State.regs[REG_MCRH] + temp + c; + v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[REG_MCRH] = sum; + if (v) + State.regs[REG_MCVF] = 1; +} + +// 1111 1110 0001 1011 Rn Rn IMM32; macu imm32,Rn +8.0xfe+8.0x1b+4.RN2,4.RN0=RN2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::macu +"macu" +*am33 +{ + int srcreg, imm; + long long temp, sum; + int c, v; + + PC = cia; + srcreg = translate_rreg (SD_, RN0); + imm = FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D); + + temp = ((unsigned64)State.regs[srcreg] + * (unsigned64)imm); + sum = State.regs[REG_MCRL] + (temp & 0xffffffff); + c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff)); + State.regs[REG_MCRL] = sum; + temp >>= 32; + temp &= 0xffffffff; + sum = State.regs[REG_MCRH] + temp + c; + v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[REG_MCRH] = sum; + if (v) + State.regs[REG_MCVF] = 1; +} + +// 1111 1110 0010 1011 Rn Rn IMM32; macb imm32,Rn +8.0xfe+8.0x2b+4.RN2,4.RN0=RN2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::macb +"macb" +*am33 +{ + int srcreg, imm; + long temp, sum; + int v; + + PC = cia; + srcreg = translate_rreg (SD_, RN0); + imm = FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D); + + temp = ((signed32)(signed8)(State.regs[srcreg] & 0xff) + * (signed32)(signed8)(imm & 0xff)); + sum = State.regs[REG_MCRL] + temp; + v = ((State.regs[REG_MCRL] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[REG_MCRL] = sum; + if (v) + State.regs[REG_MCVF] = 1; +} + +// 1111 1110 0011 1011 Rn Rn IMM32; macbu imm32,Rn +8.0xfe+8.0x3b+4.RN2,4.RN0=RN2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::macbu +"macbu" +*am33 +{ + int srcreg, imm; + long temp, sum; + int v; + + PC = cia; + srcreg = translate_rreg (SD_, RN0); + imm = FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D); + + temp = ((unsigned32)(State.regs[srcreg] & 0xff) + * (unsigned32)(imm & 0xff)); + sum = State.regs[REG_MCRL] + temp; + v = ((State.regs[REG_MCRL] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[REG_MCRL] = sum; + if (v) + State.regs[REG_MCVF] = 1; +} + +// 1111 1110 0100 1011 Rn Rn IMM32; mach imm32,Rn +8.0xfe+8.0x4b+4.RN2,4.RN0=RN2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::mach +"mach" +*am33 +{ + int srcreg, imm; + long temp, sum; + int v; + + PC = cia; + srcreg = translate_rreg (SD_, RN0); + imm = FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D); + + temp = ((signed32)(signed16)(State.regs[srcreg] & 0xffff) + * (signed32)(signed16)(imm & 0xffff)); + sum = State.regs[REG_MCRL] + temp; + v = ((State.regs[REG_MCRL] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[REG_MCRL] = sum; + if (v) + State.regs[REG_MCVF] = 1; +} + +// 1111 1110 0101 1011 Rn Rn IMM32; machu imm32,Rn +8.0xfe+8.0x5b+4.RN2,4.RN0=RN2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::machu +"machu" +*am33 +{ + int srcreg, imm; + long temp, sum; + int v; + + PC = cia; + srcreg = translate_rreg (SD_, RN0); + imm = FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D); + + temp = ((unsigned32)(State.regs[srcreg] & 0xffff) + * (unsigned32)(imm & 0xffff)); + sum = State.regs[REG_MCRL] + temp; + v = ((State.regs[REG_MCRL] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[REG_MCRL] = sum; + if (v) + State.regs[REG_MCVF] = 1; +} + +// 1111 1110 0110 1011 Rn Rn IMM32; dmach imm32,Rn +8.0xfe+8.0x6b+4.RN2,4.RN0=RN2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::dmach +"dmach" +*am33 +{ + int srcreg, imm; + long temp, temp2, sum; + int v; + + PC = cia; + srcreg = translate_rreg (SD_, RN0); + imm = FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D); + + temp = ((signed32)(signed16)(State.regs[srcreg] & 0xffff) + * (signed32)(signed16)(imm & 0xffff)); + temp2 = ((signed32)(signed16)((State.regs[srcreg] >> 16) & 0xffff) + * (signed32)(signed16)((imm >> 16) & 0xffff)); + sum = temp + temp2 + State.regs[REG_MCRL]; + v = ((State.regs[REG_MCRL] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[REG_MCRL] = sum; + if (v) + State.regs[REG_MCVF] = 1; +} + +// 1111 1110 0111 1011 Rn Rn IMM32; dmachu imm32,Rn +8.0xfe+8.0x7b+4.RN2,4.RN0=RN2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::dmachu +"dmachu" +*am33 +{ + int srcreg, imm; + long temp, temp2, sum; + int v; + + PC = cia; + srcreg = translate_rreg (SD_, RN0); + imm = FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D); + + temp = ((unsigned32)(State.regs[srcreg] & 0xffff) + * (unsigned32)(imm & 0xffff)); + temp2 = ((unsigned32)((State.regs[srcreg] >> 16) & 0xffff) + * (unsigned32)((imm >> 16) & 0xffff)); + sum = temp + temp2 + State.regs[REG_MCRL]; + v = ((State.regs[REG_MCRL] & 0x80000000) == (temp & 0x80000000) + && (temp & 0x80000000) != (sum & 0x80000000)); + State.regs[REG_MCRL] = sum; + if (v) + State.regs[REG_MCVF] = 1; +} + +// 1111 1110 1000 1011 Rn Rn IMM32; dmulh imm32,Rn +8.0xfe+8.0x8b+4.RN2,4.RN0=RN2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::dmulh +"dmulh" +*am33 +{ + int imm, dstreg; + long temp; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + imm = FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D); + + temp = ((signed32)(signed16)(State.regs[dstreg] & 0xffff) + * (signed32)(signed16)(imm & 0xffff)); + State.regs[REG_MDRQ] = temp; + temp = ((signed32)(signed16)((State.regs[dstreg] >> 16) & 0xffff) + * (signed32)(signed16)((imm>>16) & 0xffff)); + State.regs[dstreg] = temp; +} + +// 1111 1110 1001 1011 Rn Rn IMM32; dmulhu imm32,Rn +8.0xfe+8.0x9b+4.RN2,4.RN0=RN2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::dmulhu +"dmulhu" +*am33 +{ + int imm, dstreg; + long temp; + + PC = cia; + dstreg = translate_rreg (SD_, RN0); + imm = FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D); + + temp = ((unsigned32)(State.regs[dstreg] & 0xffff) + * (unsigned32)(imm & 0xffff)); + State.regs[REG_MDRQ] = temp; + temp = ((unsigned32)((State.regs[dstreg] >> 16) & 0xffff) + * (unsigned32)((imm >>16) & 0xffff)); + State.regs[dstreg] = temp; +} + +// 1111 1110 0000 1110 Rn 0000 IMM32; mov (abs32),Rn +8.0xfe+8.0x0e+4.RN2,4.0x0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5h:::mov +"mov" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_word (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D)); +} + +// 1111 1110 0001 1110 Rm 0000 IMM32; mov Rn,(abs32) +8.0xfe+8.0x1e+4.RM2,4.0x0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5e:::mov +"mov" +*am33 +{ + int srcreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + store_word (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D), State.regs[srcreg]); +} + +// 1111 1110 0020 1110 Rn 0000 IMM32; movbu (abs32),Rn +8.0xfe+8.0x2e+4.RN2,4.0x0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5i:::movbu +"movbu" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_byte (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D)); +} + +// 1111 1110 0011 1110 Rm 0000 IMM32; movbu Rn,(abs32) +8.0xfe+8.0x3e+4.RM2,4.0x0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5e:::movbu +"movbu" +*am33 +{ + int srcreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + store_byte (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D), State.regs[srcreg]); +} + +// 1111 1110 0100 1110 Rn 0000 IMM32; movhu (abs32),Rn +8.0xfe+8.0x4e+4.RN2,4.0x0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5j:::movhu +"movhu" +*am33 +{ + int dstreg; + + PC = cia; + dstreg = translate_rreg (SD_, RN2); + State.regs[dstreg] = load_half (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D)); +} + +// 1111 1110 0101 1110 Rm 0000 IMM32; movhu Rn,(abs32) +8.0xfe+8.0x5e+4.RM2,4.0x0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5e:::movhu +"movhu" +*am33 +{ + int srcreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM2); + store_half (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D), State.regs[srcreg]); +} + +// 1111 0111 0000 0000 Rm1 Rn1 Rm2 Rn2; add_add Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x00+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::add_add +"add_add" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] + State.regs[srcreg1]; + State.regs[dstreg2] += State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0001 0000 Rm1 Rn1 imm4 Rn2; add_add Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x10+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::add_add +"add_add" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] + State.regs[srcreg1]; + State.regs[dstreg2] += EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 0010 0000 Rm1 Rn1 Rm2 Rn2; add_sub Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x20+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::add_sub +"add_sub" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] + State.regs[srcreg1]; + State.regs[dstreg2] -= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0011 0000 Rm1 Rn1 imm4 Rn2; add_sub Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x30+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::add_sub +"add_sub" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] + State.regs[srcreg1]; + State.regs[dstreg2] -= EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 0100 0000 Rm1 Rn1 Rm2 Rn2; add_cmp Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x40+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::add_cmp +"add_cmp" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (State.regs[srcreg2], State.regs[dstreg2]); + State.regs[dstreg1] += State.regs[srcreg1]; +} + +// 1111 0111 0101 0000 Rm1 Rn1 imm4 Rn2; add_cmp Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x50+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::add_cmp +"add_cmp" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (EXTEND4 (IMM4), State.regs[dstreg2]); + State.regs[dstreg1] += State.regs[srcreg1]; +} + +// 1111 0111 0110 0000 Rm1 Rn1 Rm2 Rn2; add_mov Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x60+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::add_mov +"add_mov" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] + State.regs[srcreg1]; + State.regs[dstreg2] = State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0111 0000 Rm1 Rn1 imm4 Rn2; add_mov Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x70+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::add_mov +"add_mov" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] + State.regs[srcreg1]; + State.regs[dstreg2] = EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 1000 0000 Rm1 Rn1 Rm2 Rn2; add_asr Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x80+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::add_asr +"add_asr" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] + State.regs[srcreg1]; + temp = State.regs[dstreg2]; + temp >>= State.regs[srcreg2]; + State.regs[dstreg2] = temp; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1001 0000 Rm1 Rn1 imm4 Rn2; add_asr Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x90+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::add_asr +"add_asr" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] + State.regs[srcreg1]; + temp = State.regs[dstreg2]; + temp >>= IMM4; + State.regs[dstreg2] = temp; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1010 0000 Rm1 Rn1 Rm2 Rn2; add_lsr Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0xa0+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::add_lsr +"add_lsr" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] + State.regs[srcreg1]; + State.regs[dstreg2] >>= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1011 0000 Rm1 Rn1 imm4 Rn2; add_lsr Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0xb0+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::add_lsr +"add_lsr" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] + State.regs[srcreg1]; + State.regs[dstreg2] >>= IMM4; + State.regs[dstreg1] = result1; +} + + +// 1111 0111 1100 0000 Rm1 Rn1 Rm2 Rn2; add_asl Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0xc0+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::add_asl +"add_asl" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] + State.regs[srcreg1]; + State.regs[dstreg2] <<= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1101 0000 Rm1 Rn1 imm4 Rn2; add_asl Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0xd0+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::add_asl +"add_asl" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] + State.regs[srcreg1]; + State.regs[dstreg2] <<= IMM4; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0000 0001 Rm1 Rn1 Rm2 Rn2; cmp_add Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x01+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::cmp_add +"cmp_add" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (State.regs[srcreg1], State.regs[dstreg1]); + State.regs[dstreg2] += State.regs[srcreg2]; +} + +// 1111 0111 0001 0001 Rm1 Rn1 imm4 Rn2; cmp_add Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x11+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::cmp_add +"cmp_add" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (State.regs[srcreg1], State.regs[dstreg1]); + State.regs[dstreg2] += EXTEND4 (IMM4); +} + +// 1111 0111 0010 0001 Rm1 Rn1 Rm2 Rn2; cmp_sub Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x21+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::cmp_sub +"cmp_sub" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (State.regs[srcreg1], State.regs[dstreg1]); + State.regs[dstreg2] -= State.regs[srcreg2]; +} + +// 1111 0111 0011 0001 Rm1 Rn1 imm4 Rn2; cmp_sub Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x31+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::cmp_sub +"cmp_sub" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (State.regs[srcreg1], State.regs[dstreg1]); + State.regs[dstreg2] -= EXTEND4 (IMM4); +} + +// 1111 0111 0110 0001 Rm1 Rn1 Rm2 Rn2; cmp_mov Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x61+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::cmp_mov +"cmp_mov" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (State.regs[srcreg1], State.regs[dstreg1]); + State.regs[dstreg2] = State.regs[srcreg2]; +} + +// 1111 0111 0111 0001 Rm1 Rn1 imm4 Rn2; cmp_mov Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x71+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::cmp_mov +"cmp_mov" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (State.regs[srcreg1], State.regs[dstreg1]); + State.regs[dstreg2] = EXTEND4 (IMM4); +} + +// 1111 0111 1000 0001 Rm1 Rn1 Rm2 Rn2; cmp_asr Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x81+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::cmp_asr +"cmp_asr" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (State.regs[srcreg1], State.regs[dstreg1]); + temp = State.regs[dstreg2]; + temp >>= State.regs[srcreg2]; + State.regs[dstreg2] = temp; +} + +// 1111 0111 1001 0001 Rm1 Rn1 imm4 Rn2; cmp_asr Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x91+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::cmp_asr +"cmp_asr" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (State.regs[srcreg1], State.regs[dstreg1]); + temp = State.regs[dstreg2]; + temp >>= IMM4; + State.regs[dstreg2] = temp; +} + +// 1111 0111 1010 0001 Rm1 Rn1 Rm2 Rn2; cmp_lsr Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0xa1+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::cmp_lsr +"cmp_lsr" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (State.regs[srcreg1], State.regs[dstreg1]); + State.regs[dstreg2] >>= State.regs[srcreg2]; +} + +// 1111 0111 1011 0001 Rm1 Rn1 imm4 Rn2; cmp_lsr Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0xb1+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::cmp_lsr +"cmp_lsr" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (State.regs[srcreg1], State.regs[dstreg1]); + State.regs[dstreg2] >>= IMM4; +} + + +// 1111 0111 1100 0001 Rm1 Rn1 Rm2 Rn2; cmp_asl Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0xc1+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::cmp_asl +"cmp_asl" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (State.regs[srcreg1], State.regs[dstreg1]); + State.regs[dstreg2] <<= State.regs[srcreg2]; +} + +// 1111 0111 1101 0001 Rm1 Rn1 imm4 Rn2; cmp_asl Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0xd1+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::cmp_asl +"cmp_asl" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (State.regs[srcreg1], State.regs[dstreg1]); + State.regs[dstreg2] <<= IMM4; +} + +// 1111 0111 0000 0010 Rm1 Rn1 Rm2 Rn2; sub_add Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x02+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::sub_add +"sub_add" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] - State.regs[srcreg1]; + State.regs[dstreg2] += State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0001 0010 Rm1 Rn1 imm4 Rn2; sub_add Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x12+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::sub_add +"sub_add" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] - State.regs[srcreg1]; + State.regs[dstreg2] += EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 0010 0010 Rm1 Rn1 Rm2 Rn2; sub_sub Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x22+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::sub_sub +"sub_sub" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] - State.regs[srcreg1]; + State.regs[dstreg2] -= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0011 0010 Rm1 Rn1 imm4 Rn2; sub_sub Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x32+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::sub_sub +"sub_sub" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] - State.regs[srcreg1]; + State.regs[dstreg2] -= EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 0100 0010 Rm1 Rn1 Rm2 Rn2; sub_cmp Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x42+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::sub_cmp +"sub_cmp" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (State.regs[srcreg2], State.regs[dstreg2]); + State.regs[dstreg1] -= State.regs[srcreg1]; +} + +// 1111 0111 0101 0010 Rm1 Rn1 imm4 Rn2; sub_cmp Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x52+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::sub_cmp +"sub_cmp" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (EXTEND4 (IMM4), State.regs[dstreg2]); + State.regs[dstreg1] -= State.regs[srcreg1]; +} + +// 1111 0111 0110 0010 Rm1 Rn1 Rm2 Rn2; sub_mov Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x62+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::sub_mov +"sub_mov" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] - State.regs[srcreg1]; + State.regs[dstreg2] = State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0111 0010 Rm1 Rn1 imm4 Rn2; sub_mov Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x72+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::sub_mov +"sub_mov" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] - State.regs[srcreg1]; + State.regs[dstreg2] = EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 1000 0010 Rm1 Rn1 Rm2 Rn2; sub_asr Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x82+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::sub_asr +"sub_asr" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] - State.regs[srcreg1]; + temp = State.regs[dstreg2]; + temp >>= State.regs[srcreg2]; + State.regs[dstreg2] = temp; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1001 0010 Rm1 Rn1 imm4 Rn2; sub_asr Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x92+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::sub_asr +"sub_asr" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] - State.regs[srcreg1]; + temp = State.regs[dstreg2]; + temp >>= IMM4; + State.regs[dstreg2] = temp; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1010 0010 Rm1 Rn1 Rm2 Rn2; sub_lsr Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0xa2+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::sub_lsr +"sub_lsr" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] - State.regs[srcreg1]; + State.regs[dstreg2] >>= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1011 0010 Rm1 Rn1 imm4 Rn2; sub_lsr Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0xb2+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::sub_lsr +"sub_lsr" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] - State.regs[srcreg1]; + State.regs[dstreg2] >>= IMM4; + State.regs[dstreg1] = result1; +} + + +// 1111 0111 1100 0010 Rm1 Rn1 Rm2 Rn2; sub_asl Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0xc2+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::sub_asl +"sub_asl" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] - State.regs[srcreg1]; + State.regs[dstreg2] <<= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1101 0010 Rm1 Rn1 imm4 Rn2; sub_asl Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0xd2+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::sub_asl +"sub_asl" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] - State.regs[srcreg1]; + State.regs[dstreg2] <<= IMM4; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0000 0011 Rm1 Rn1 Rm2 Rn2; mov_add Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x03+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::mov_add +"mov_add" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[srcreg1]; + State.regs[dstreg2] += State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0001 0011 Rm1 Rn1 imm4 Rn2; mov_add Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x13+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::mov_add +"mov_add" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[srcreg1]; + State.regs[dstreg2] += EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 0010 0011 Rm1 Rn1 Rm2 Rn2; mov_sub Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x23+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::mov_sub +"mov_sub" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[srcreg1]; + State.regs[dstreg2] -= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0011 0011 Rm1 Rn1 imm4 Rn2; mov_sub Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x33+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::mov_sub +"mov_sub" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[srcreg1]; + State.regs[dstreg2] -= EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 0100 0011 Rm1 Rn1 Rm2 Rn2; mov_cmp Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x43+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::mov_cmp +"mov_cmp" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (State.regs[srcreg2], State.regs[dstreg2]); + State.regs[dstreg1] = State.regs[srcreg1]; +} + +// 1111 0111 0101 0011 Rm1 Rn1 imm4 Rn2; mov_cmp Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x53+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::mov_cmp +"mov_cmp" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (EXTEND4 (IMM4), State.regs[dstreg2]); + State.regs[dstreg1] = State.regs[srcreg1]; +} + +// 1111 0111 0110 0011 Rm1 Rn1 Rm2 Rn2; mov_mov Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x63+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::mov_mov +"mov_mov" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[srcreg1]; + State.regs[dstreg2] = State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0111 0011 Rm1 Rn1 imm4 Rn2; mov_mov Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x73+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::mov_mov +"mov_mov" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[srcreg1]; + State.regs[dstreg2] = EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 1000 0011 Rm1 Rn1 Rm2 Rn2; mov_asr Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x83+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::mov_asr +"mov_asr" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[srcreg1]; + temp = State.regs[dstreg2]; + temp >>= State.regs[srcreg2]; + State.regs[dstreg2] = temp; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1001 0011 Rm1 Rn1 imm4 Rn2; mov_asr Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x93+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::mov_asr +"mov_asr" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[srcreg1]; + temp = State.regs[dstreg2]; + temp >>= IMM4; + State.regs[dstreg2] = temp; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1010 0011 Rm1 Rn1 Rm2 Rn2; mov_lsr Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0xa3+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::mov_lsr +"mov_lsr" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[srcreg1]; + State.regs[dstreg2] >>= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1011 0011 Rm1 Rn1 imm4 Rn2; mov_lsr Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0xb3+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::mov_lsr +"mov_lsr" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[srcreg1]; + State.regs[dstreg2] >>= IMM4; + State.regs[dstreg1] = result1; +} + + +// 1111 0111 1100 0011 Rm1 Rn1 Rm2 Rn2; mov_asl Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0xc3+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::mov_asl +"mov_asl" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[srcreg1]; + State.regs[dstreg2] <<= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1101 0011 Rm1 Rn1 imm4 Rn2; mov_asl Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0xd3+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::mov_asl +"mov_asl" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[srcreg1]; + State.regs[dstreg2] <<= IMM4; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0000 0100 imm4 Rn1 Rm2 Rn2; add_add imm4, Rn1, Rm2, Rn2 +8.0xf7+8.0x04+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::add_add +"add_add" +*am33 +{ + int srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] + EXTEND4 (IMM4A); + State.regs[dstreg2] += State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0001 0100 imm4 Rn1 imm4 Rn2; add_add imm4, Rn1, imm4, Rn2 +8.0xf7+8.0x14+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::add_add +"add_add" +*am33 +{ + int dstreg1, dstreg2; + int result1; + + PC = cia; + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] + EXTEND4 (IMM4A); + State.regs[dstreg2] += EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 0010 0100 imm4 Rn1 Rm2 Rn2; add_sub imm4, Rn1, Rm2, Rn2 +8.0xf7+8.0x24+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::add_sub +"add_sub" +*am33 +{ + int srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] + EXTEND4 (IMM4A); + State.regs[dstreg2] -= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0011 0100 imm4 Rn1 imm4 Rn2; add_sub imm4, Rn1, imm4, Rn2 +8.0xf7+8.0x34+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::add_sub +"add_sub" +*am33 +{ + int dstreg1, dstreg2; + int result1; + + PC = cia; + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] + EXTEND4 (IMM4A); + State.regs[dstreg2] -= EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 0100 0100 imm4 Rn1 Rm2 Rn2; add_cmp imm4, Rn1, Rm2, Rn2 +8.0xf7+8.0x44+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::add_cmp +"add_cmp" +*am33 +{ + int srcreg2, dstreg1, dstreg2; + + PC = cia; + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (State.regs[srcreg2], State.regs[dstreg2]); + State.regs[dstreg1] += EXTEND4 (IMM4A); +} + +// 1111 0111 0101 0100 imm4 Rn1 imm4 Rn2; add_cmp imm4, Rn1, imm4, Rn2 +8.0xf7+8.0x54+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::add_cmp +"add_cmp" +*am33 +{ + int dstreg1, dstreg2; + + PC = cia; + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (EXTEND4 (IMM4), State.regs[dstreg2]); + State.regs[dstreg1] += EXTEND4 (IMM4A); +} + +// 1111 0111 0110 0100 imm4 Rn1 Rm2 Rn2; add_mov imm4, Rn1, Rm2, Rn2 +8.0xf7+8.0x64+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::add_mov +"add_mov" +*am33 +{ + int srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] + EXTEND4 (IMM4A); + State.regs[dstreg2] = State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0111 0100 imm4 Rn1 imm4 Rn2; add_mov imm4, Rn1, imm4, Rn2 +8.0xf7+8.0x74+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::add_mov +"add_mov" +*am33 +{ + int dstreg1, dstreg2; + int result1; + + PC = cia; + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] + EXTEND4 (IMM4A); + State.regs[dstreg2] = EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 1000 0100 imm4 Rn1 Rm2 Rn2; add_asr imm4, Rn1, Rm2, Rn2 +8.0xf7+8.0x84+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::add_asr +"add_asr" +*am33 +{ + int srcreg2, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] + EXTEND4 (IMM4A); + temp = State.regs[dstreg2]; + temp >>= State.regs[srcreg2]; + State.regs[dstreg2] = temp; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1001 0100 imm4 Rn1 imm4 Rn2; add_asr imm4, Rn1, imm4, Rn2 +8.0xf7+8.0x94+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::add_asr +"add_asr" +*am33 +{ + int dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] + EXTEND4 (IMM4A); + temp = State.regs[dstreg2]; + temp >>= IMM4; + State.regs[dstreg2] = temp; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1010 0100 imm4 Rn1 Rm2 Rn2; add_lsr imm4, Rn1, Rm2, Rn2 +8.0xf7+8.0xa4+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::add_lsr +"add_lsr" +*am33 +{ + int srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] + EXTEND4 (IMM4A); + State.regs[dstreg2] >>= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1011 0100 imm4 Rn1 imm4 Rn2; add_lsr imm4, Rn1, imm4, Rn2 +8.0xf7+8.0xb4+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::add_lsr +"add_lsr" +*am33 +{ + int dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] + EXTEND4 (IMM4A); + State.regs[dstreg2] >>= IMM4; + State.regs[dstreg1] = result1; +} + + +// 1111 0111 1100 0100 imm4 Rn1 Rm2 Rn2; add_asl imm4, Rn1, Rm2, Rn2 +8.0xf7+8.0xc4+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::add_asl +"add_asl" +*am33 +{ + int srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] + EXTEND4 (IMM4A); + State.regs[dstreg2] <<= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1101 0100 imm4 Rn1 imm4 Rn2; add_asl imm4, Rn1, imm4, Rn2 +8.0xf7+8.0xd4+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::add_asl +"add_asl" +*am33 +{ + int dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] + EXTEND4 (IMM4A); + State.regs[dstreg2] <<= IMM4; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0000 0101 imm4 Rn1 Rm2 Rn2; cmp_add imm4, Rn1, Rm2, Rn2 +8.0xf7+8.0x05+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::cmp_add +"cmp_add" +*am33 +{ + int srcreg2, dstreg1, dstreg2; + + PC = cia; + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (EXTEND4 (IMM4A), State.regs[dstreg1]); + State.regs[dstreg2] += State.regs[srcreg2]; +} + +// 1111 0111 0001 0101 imm4 Rn1 imm4 Rn2; cmp_add imm4, Rn1, imm4, Rn2 +8.0xf7+8.0x15+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::cmp_add +"cmp_add" +*am33 +{ + int dstreg1, dstreg2; + + PC = cia; + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (EXTEND4 (IMM4A), State.regs[dstreg1]); + State.regs[dstreg2] += EXTEND4 (IMM4); +} + +// 1111 0111 0010 0101 imm4 Rn1 Rm2 Rn2; cmp_sub imm4, Rn1, Rm2, Rn2 +8.0xf7+8.0x25+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::cmp_sub +"cmp_sub" +*am33 +{ + int srcreg2, dstreg1, dstreg2; + + PC = cia; + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (EXTEND4 (IMM4A), State.regs[dstreg1]); + State.regs[dstreg2] -= State.regs[srcreg2]; +} + +// 1111 0111 0011 0101 imm4 Rn1 imm4 Rn2; cmp_sub imm4, Rn1, imm4, Rn2 +8.0xf7+8.0x35+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::cmp_sub +"cmp_sub" +*am33 +{ + int dstreg1, dstreg2; + + PC = cia; + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (EXTEND4 (IMM4A), State.regs[dstreg1]); + State.regs[dstreg2] -= EXTEND4 (IMM4); +} + +// 1111 0111 0110 0101 imm4 Rn1 Rm2 Rn2; cmp_mov imm4, Rn1, Rm2, Rn2 +8.0xf7+8.0x65+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::cmp_mov +"cmp_mov" +*am33 +{ + int srcreg2, dstreg1, dstreg2; + + PC = cia; + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (EXTEND4 (IMM4A), State.regs[dstreg1]); + State.regs[dstreg2] = State.regs[srcreg2]; +} + +// 1111 0111 0111 0101 imm4 Rn1 imm4 Rn2; cmp_mov imm4, Rn1, imm4, Rn2 +8.0xf7+8.0x75+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::cmp_mov +"cmp_mov" +*am33 +{ + int dstreg1, dstreg2; + + PC = cia; + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (EXTEND4 (IMM4A), State.regs[dstreg1]); + State.regs[dstreg2] = EXTEND4 (IMM4); +} + +// 1111 0111 1000 0101 imm4 Rn1 Rm2 Rn2; cmp_asr imm4, Rn1, Rm2, Rn2 +8.0xf7+8.0x85+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::cmp_asr +"cmp_asr" +*am33 +{ + int srcreg2, dstreg1, dstreg2; + signed int temp; + + PC = cia; + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (EXTEND4 (IMM4A), State.regs[dstreg1]); + temp = State.regs[dstreg2]; + temp >>= State.regs[srcreg2]; + State.regs[dstreg2] = temp; +} + +// 1111 0111 1001 0101 imm4 Rn1 imm4 Rn2; cmp_asr imm4, Rn1, imm4, Rn2 +8.0xf7+8.0x95+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::cmp_asr +"cmp_asr" +*am33 +{ + int dstreg1, dstreg2; + signed int temp; + + PC = cia; + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (EXTEND4 (IMM4A), State.regs[dstreg1]); + temp = State.regs[dstreg2]; + temp >>= IMM4; + State.regs[dstreg2] = temp; +} + +// 1111 0111 1010 0101 imm4 Rn1 Rm2 Rn2; cmp_lsr imm4, Rn1, Rm2, Rn2 +8.0xf7+8.0xa5+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::cmp_lsr +"cmp_lsr" +*am33 +{ + int srcreg2, dstreg1, dstreg2; + + PC = cia; + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (EXTEND4 (IMM4A), State.regs[dstreg1]); + State.regs[dstreg2] >>= State.regs[srcreg2]; +} + +// 1111 0111 1011 0101 imm4 Rn1 imm4 Rn2; cmp_lsr imm4, Rn1, imm4, Rn2 +8.0xf7+8.0xb5+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::cmp_lsr +"cmp_lsr" +*am33 +{ + int dstreg1, dstreg2; + signed int temp; + + PC = cia; + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (EXTEND4 (IMM4A), State.regs[dstreg1]); + State.regs[dstreg2] >>= IMM4; +} + + +// 1111 0111 1100 0101 imm4 Rn1 Rm2 Rn2; cmp_asl imm4, Rn1, Rm2, Rn2 +8.0xf7+8.0xc5+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::cmp_asl +"cmp_asl" +*am33 +{ + int srcreg2, dstreg1, dstreg2; + + PC = cia; + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (EXTEND4 (IMM4A), State.regs[dstreg1]); + State.regs[dstreg2] <<= State.regs[srcreg2]; +} + +// 1111 0111 1101 0101 imm4 Rn1 imm4 Rn2; cmp_asl imm4, Rn1, imm4, Rn2 +8.0xf7+8.0xd5+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::cmp_asl +"cmp_asl" +*am33 +{ + int dstreg1, dstreg2; + signed int temp; + + PC = cia; + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (EXTEND4 (IMM4A), State.regs[dstreg1]); + State.regs[dstreg2] <<= IMM4; +} + +// 1111 0111 0000 0110 imm4 Rn1 Rm2 Rn2; sub_add imm4, Rn1, Rm2, Rn2 +8.0xf7+8.0x06+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::sub_add +"sub_add" +*am33 +{ + int srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] - EXTEND4 (IMM4A); + State.regs[dstreg2] += State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0001 0110 imm4 Rn1 imm4 Rn2; sub_add imm4, Rn1, imm4, Rn2 +8.0xf7+8.0x16+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::sub_add +"sub_add" +*am33 +{ + int dstreg1, dstreg2; + int result1; + + PC = cia; + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] - EXTEND4 (IMM4A); + State.regs[dstreg2] += EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 0010 0110 imm4 Rn1 Rm2 Rn2; sub_sub imm4, Rn1, Rm2, Rn2 +8.0xf7+8.0x26+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::sub_sub +"sub_sub" +*am33 +{ + int srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] - EXTEND4 (IMM4A); + State.regs[dstreg2] -= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0011 0110 imm4 Rn1 imm4 Rn2; sub_sub imm4, Rn1, imm4, Rn2 +8.0xf7+8.0x36+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::sub_sub +"sub_sub" +*am33 +{ + int dstreg1, dstreg2; + int result1; + + PC = cia; + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] - EXTEND4 (IMM4A); + State.regs[dstreg2] -= EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 0100 0110 imm4 Rn1 Rm2 Rn2; sub_cmp imm4, Rn1, Rm2, Rn2 +8.0xf7+8.0x46+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::sub_cmp +"sub_cmp" +*am33 +{ + int srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (State.regs[srcreg2], State.regs[dstreg2]); + State.regs[dstreg1] -= EXTEND4 (IMM4A); +} + +// 1111 0111 0101 0110 imm4 Rn1 imm4 Rn2; sub_cmp imm4, Rn1, imm4, Rn2 +8.0xf7+8.0x56+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::sub_cmp +"sub_cmp" +*am33 +{ + int dstreg1, dstreg2; + int result1; + + PC = cia; + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (EXTEND4 (IMM4), State.regs[dstreg2]); + State.regs[dstreg1] -= EXTEND4 (IMM4A); +} + +// 1111 0111 0110 0110 imm4 Rn1 Rm2 Rn2; sub_mov imm4, Rn1, Rm2, Rn2 +8.0xf7+8.0x66+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::sub_mov +"sub_mov" +*am33 +{ + int srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] - EXTEND4 (IMM4A); + State.regs[dstreg2] = State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0111 0110 imm4 Rn1 imm4 Rn2; sub_mov imm4, Rn1, imm4, Rn2 +8.0xf7+8.0x76+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::sub_mov +"sub_mov" +*am33 +{ + int dstreg1, dstreg2; + int result1; + + PC = cia; + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] - EXTEND4 (IMM4A); + State.regs[dstreg2] = EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 1000 0110 imm4 Rn1 Rm2 Rn2; sub_asr imm4, Rn1, Rm2, Rn2 +8.0xf7+8.0x86+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::sub_asr +"sub_asr" +*am33 +{ + int srcreg2, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] - EXTEND4 (IMM4A); + temp = State.regs[dstreg2]; + temp >>= State.regs[srcreg2]; + State.regs[dstreg2] = temp; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1001 0110 imm4 Rn1 imm4 Rn2; sub_asr imm4, Rn1, imm4, Rn2 +8.0xf7+8.0x96+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::sub_asr +"sub_asr" +*am33 +{ + int dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] - EXTEND4 (IMM4A); + temp = State.regs[dstreg2]; + temp >>= IMM4; + State.regs[dstreg2] = temp; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1010 0110 imm4 Rn1 Rm2 Rn2; sub_lsr imm4, Rn1, Rm2, Rn2 +8.0xf7+8.0xa6+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::sub_lsr +"sub_lsr" +*am33 +{ + int srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] - EXTEND4 (IMM4A); + State.regs[dstreg2] >>= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1011 0110 imm4 Rn1 imm4 Rn2; sub_lsr imm4, Rn1, imm4, Rn2 +8.0xf7+8.0xb6+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::sub_lsr +"sub_lsr" +*am33 +{ + int dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] - EXTEND4 (IMM4A); + State.regs[dstreg2] >>= IMM4; + State.regs[dstreg1] = result1; +} + + +// 1111 0111 1100 0110 imm4 Rn1 Rm2 Rn2; sub_asl imm4, Rn1, Rm2, Rn2 +8.0xf7+8.0xc6+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::sub_asl +"sub_asl" +*am33 +{ + int srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] - EXTEND4 (IMM4A); + State.regs[dstreg2] <<= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1101 0110 imm4 Rn1 imm4 Rn2; sub_asl imm4, Rn1, imm4, Rn2 +8.0xf7+8.0xd6+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::sub_asl +"sub_asl" +*am33 +{ + int dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] - EXTEND4 (IMM4A); + State.regs[dstreg2] <<= IMM4; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0000 0111 imm4 Rn1 Rm2 Rn2; mov_add imm4, Rn1, Rm2, Rn2 +8.0xf7+8.0x07+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::mov_add +"mov_add" +*am33 +{ + int srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = EXTEND4 (IMM4A); + State.regs[dstreg2] += State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0001 0111 imm4 Rn1 imm4 Rn2; mov_add imm4, Rn1, imm4, Rn2 +8.0xf7+8.0x17+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::mov_add +"mov_add" +*am33 +{ + int dstreg1, dstreg2; + int result1; + + PC = cia; + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = EXTEND4 (IMM4A); + State.regs[dstreg2] += EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 0010 0111 imm4 Rn1 Rm2 Rn2; mov_sub imm4, Rn1, Rm2, Rn2 +8.0xf7+8.0x27+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::mov_sub +"mov_sub" +*am33 +{ + int srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = EXTEND4 (IMM4A); + State.regs[dstreg2] -= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0011 0111 imm4 Rn1 imm4 Rn2; mov_sub imm4, Rn1, imm4, Rn2 +8.0xf7+8.0x37+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::mov_sub +"mov_sub" +*am33 +{ + int dstreg1, dstreg2; + int result1; + + PC = cia; + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = EXTEND4 (IMM4A); + State.regs[dstreg2] -= EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 0100 0111 imm4 Rn1 Rm2 Rn2; mov_cmp imm4, Rn1, Rm2, Rn2 +8.0xf7+8.0x47+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::mov_cmp +"mov_cmp" +*am33 +{ + int srcreg2, dstreg1, dstreg2; + + PC = cia; + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (State.regs[srcreg2], State.regs[dstreg2]); + State.regs[dstreg1] = EXTEND4 (IMM4A); +} + +// 1111 0111 0101 0111 imm4 Rn1 imm4 Rn2; mov_cmp imm4, Rn1, imm4, Rn2 +8.0xf7+8.0x57+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::mov_cmp +"mov_cmp" +*am33 +{ + int dstreg1, dstreg2; + + PC = cia; + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (EXTEND4 (IMM4), State.regs[dstreg2]); + State.regs[dstreg1] = EXTEND4 (IMM4A); +} + +// 1111 0111 0110 0111 imm4 Rn1 Rm2 Rn2; mov_mov imm4, Rn1, Rm2, Rn2 +8.0xf7+8.0x67+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::mov_mov +"mov_mov" +*am33 +{ + int srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = EXTEND4 (IMM4A); + State.regs[dstreg2] = State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0111 0111 imm4 Rn1 imm4 Rn2; mov_mov imm4, Rn1, imm4, Rn2 +8.0xf7+8.0x77+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::mov_mov +"mov_mov" +*am33 +{ + int dstreg1, dstreg2; + int result1; + + PC = cia; + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = EXTEND4 (IMM4A); + State.regs[dstreg2] = EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 1000 0111 imm4 Rn1 Rm2 Rn2; mov_asr imm4, Rn1, Rm2, Rn2 +8.0xf7+8.0x87+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::mov_asr +"mov_asr" +*am33 +{ + int srcreg2, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = EXTEND4 (IMM4A); + temp = State.regs[dstreg2]; + temp >>= State.regs[srcreg2]; + State.regs[dstreg2] = temp; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1001 0111 imm4 Rn1 imm4 Rn2; mov_asr imm4, Rn1, imm4, Rn2 +8.0xf7+8.0x97+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::mov_asr +"mov_asr" +*am33 +{ + int dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = EXTEND4 (IMM4A); + temp = State.regs[dstreg2]; + temp >>= IMM4; + State.regs[dstreg2] = temp; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1010 0111 imm4 Rn1 Rm2 Rn2; mov_lsr imm4, Rn1, Rm2, Rn2 +8.0xf7+8.0xa7+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::mov_lsr +"mov_lsr" +*am33 +{ + int srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = EXTEND4 (IMM4A); + State.regs[dstreg2] >>= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1011 0111 imm4 Rn1 imm4 Rn2; mov_lsr imm4, Rn1, imm4, Rn2 +8.0xf7+8.0xb7+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::mov_lsr +"mov_lsr" +*am33 +{ + int dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = EXTEND4 (IMM4A); + State.regs[dstreg2] >>= IMM4; + State.regs[dstreg1] = result1; +} + + +// 1111 0111 1100 0111 imm4 Rn1 Rm2 Rn2; mov_asl imm4, Rn1, Rm2, Rn2 +8.0xf7+8.0xc7+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::mov_asl +"mov_asl" +*am33 +{ + int srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = EXTEND4 (IMM4A); + State.regs[dstreg2] <<= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1101 0111 imm4 Rn1 imm4 Rn2; mov_asl imm4, Rn1, imm4, Rn2 +8.0xf7+8.0xd7+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::mov_asl +"mov_asl" +*am33 +{ + int dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = EXTEND4 (IMM4A); + State.regs[dstreg2] <<= IMM4; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0000 1000 Rm1 Rn1 Rm2 Rn2; and_add Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x08+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::and_add +"and_add" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] & State.regs[srcreg1]; + State.regs[dstreg2] += State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0001 1000 Rm1 Rn1 imm4 Rn2; and_add Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x18+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::and_add +"and_add" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] & State.regs[srcreg1]; + State.regs[dstreg2] += EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 0010 1000 Rm1 Rn1 Rm2 Rn2; and_sub Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x28+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::and_sub +"and_sub" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] & State.regs[srcreg1]; + State.regs[dstreg2] -= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0011 1000 Rm1 Rn1 imm4 Rn2; and_sub Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x38+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::and_sub +"and_sub" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] & State.regs[srcreg1]; + State.regs[dstreg2] -= EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 0100 1000 Rm1 Rn1 Rm2 Rn2; and_cmp Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x48+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::and_cmp +"and_cmp" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (State.regs[srcreg2], State.regs[dstreg2]); + State.regs[dstreg1] &= State.regs[srcreg1]; +} + +// 1111 0111 0101 1000 Rm1 Rn1 imm4 Rn2; and_cmp Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x58+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::and_cmp +"and_cmp" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (EXTEND4 (IMM4), State.regs[dstreg2]); + State.regs[dstreg1] &= State.regs[srcreg1]; +} + +// 1111 0111 0110 1000 Rm1 Rn1 Rm2 Rn2; and_mov Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x68+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::and_mov +"and_mov" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] & State.regs[srcreg1]; + State.regs[dstreg2] = State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0111 1000 Rm1 Rn1 imm4 Rn2; and_mov Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x78+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::and_mov +"and_mov" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] & State.regs[srcreg1]; + State.regs[dstreg2] = EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 1000 1000 Rm1 Rn1 Rm2 Rn2; and_asr Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x88+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::and_asr +"and_asr" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] & State.regs[srcreg1]; + temp = State.regs[dstreg2]; + temp >>= State.regs[srcreg2]; + State.regs[dstreg2] = temp; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1001 1000 Rm1 Rn1 imm4 Rn2; and_asr Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x98+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::and_asr +"and_asr" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] & State.regs[srcreg1]; + temp = State.regs[dstreg2]; + temp >>= IMM4; + State.regs[dstreg2] = temp; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1010 1000 Rm1 Rn1 Rm2 Rn2; and_lsr Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0xa8+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::and_lsr +"and_lsr" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] & State.regs[srcreg1]; + State.regs[dstreg2] >>= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1011 1000 Rm1 Rn1 imm4 Rn2; and_lsr Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0xb8+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::and_lsr +"and_lsr" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] & State.regs[srcreg1]; + State.regs[dstreg2] >>= IMM4; + State.regs[dstreg1] = result1; +} + + +// 1111 0111 1100 1000 Rm1 Rn1 Rm2 Rn2; and_asl Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0xc8+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::and_asl +"and_asl" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] & State.regs[srcreg1]; + State.regs[dstreg2] <<= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1101 1000 Rm1 Rn1 imm4 Rn2; and_asl Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0xd8+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::and_asl +"and_asl" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] & State.regs[srcreg1]; + State.regs[dstreg2] <<= IMM4; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0000 1001 Rm1 Rn1 Rm2 Rn2; dmach_add Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x09+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::dmach_add +"dmach_add" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + long temp, temp2, sum; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + temp = ((signed32)(signed16)(State.regs[dstreg1] & 0xffff) + * (signed32)(signed16)(State.regs[srcreg1] & 0xffff)); + temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff) + * (signed32)(signed16)((State.regs[dstreg1] >> 16) & 0xffff)); + sum = temp + temp2 + State.regs[REG_MCRL]; + + State.regs[dstreg2] += State.regs[srcreg2]; + State.regs[dstreg1] = sum; +} + +// 1111 0111 0001 1001 Rm1 Rn1 imm4 Rn2; dmach_add Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x19+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::dmach_add +"dmach_add" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + long temp, temp2, sum; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + temp = ((signed32)(signed16)(State.regs[dstreg1] & 0xffff) + * (signed32)(signed16)(State.regs[srcreg1] & 0xffff)); + temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff) + * (signed32)(signed16)((State.regs[dstreg1] >> 16) & 0xffff)); + sum = temp + temp2 + State.regs[REG_MCRL]; + + State.regs[dstreg2] += EXTEND4 (IMM4); + State.regs[dstreg1] = sum; +} + +// 1111 0111 0010 1001 Rm1 Rn1 Rm2 Rn2; dmach_sub Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x29+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::dmach_sub +"dmach_sub" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + long temp, temp2, sum; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + temp = ((signed32)(signed16)(State.regs[dstreg1] & 0xffff) + * (signed32)(signed16)(State.regs[srcreg1] & 0xffff)); + temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff) + * (signed32)(signed16)((State.regs[dstreg1] >> 16) & 0xffff)); + sum = temp + temp2 + State.regs[REG_MCRL]; + + State.regs[dstreg2] -= State.regs[srcreg2]; + State.regs[dstreg1] = sum; +} + +// 1111 0111 0011 1001 Rm1 Rn1 imm4 Rn2; dmach_sub Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x39+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::dmach_sub +"dmach_sub" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + long temp, temp2, sum; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + temp = ((signed32)(signed16)(State.regs[dstreg1] & 0xffff) + * (signed32)(signed16)(State.regs[srcreg1] & 0xffff)); + temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff) + * (signed32)(signed16)((State.regs[dstreg1] >> 16) & 0xffff)); + sum = temp + temp2 + State.regs[REG_MCRL]; + + State.regs[dstreg2] -= EXTEND4 (IMM4); + State.regs[dstreg1] = sum; +} + +// 1111 0111 0100 1001 Rm1 Rn1 Rm2 Rn2; dmach_cmp Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x49+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::dmach_cmp +"dmach_cmp" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + long temp, temp2, sum; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + temp = ((signed32)(signed16)(State.regs[dstreg1] & 0xffff) + * (signed32)(signed16)(State.regs[srcreg1] & 0xffff)); + temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff) + * (signed32)(signed16)((State.regs[dstreg1] >> 16) & 0xffff)); + sum = temp + temp2 + State.regs[REG_MCRL]; + + genericCmp (State.regs[srcreg2], State.regs[dstreg2]); + State.regs[dstreg1] = sum; +} + +// 1111 0111 0101 1001 Rm1 Rn1 imm4 Rn2; dmach_cmp Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x59+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::dmach_cmp +"dmach_cmp" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + long temp, temp2, sum; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + temp = ((signed32)(signed16)(State.regs[dstreg1] & 0xffff) + * (signed32)(signed16)(State.regs[srcreg1] & 0xffff)); + temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff) + * (signed32)(signed16)((State.regs[dstreg1] >> 16) & 0xffff)); + sum = temp + temp2 + State.regs[REG_MCRL]; + + genericCmp (EXTEND4 (IMM4), State.regs[dstreg2]); + State.regs[dstreg1] = sum; +} + +// 1111 0111 0110 1001 Rm1 Rn1 Rm2 Rn2; dmach_mov Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x69+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::dmach_mov +"dmach_mov" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + long temp, temp2, sum; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + temp = ((signed32)(signed16)(State.regs[dstreg1] & 0xffff) + * (signed32)(signed16)(State.regs[srcreg1] & 0xffff)); + temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff) + * (signed32)(signed16)((State.regs[dstreg1] >> 16) & 0xffff)); + sum = temp + temp2 + State.regs[REG_MCRL]; + + State.regs[dstreg2] = State.regs[srcreg2]; + State.regs[dstreg1] = sum; +} + +// 1111 0111 0111 1001 Rm1 Rn1 imm4 Rn2; dmach_mov Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x79+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::dmach_mov +"dmach_mov" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + long temp, temp2, sum; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + temp = ((signed32)(signed16)(State.regs[dstreg1] & 0xffff) + * (signed32)(signed16)(State.regs[srcreg1] & 0xffff)); + temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff) + * (signed32)(signed16)((State.regs[dstreg1] >> 16) & 0xffff)); + sum = temp + temp2 + State.regs[REG_MCRL]; + + State.regs[dstreg2] = EXTEND4 (IMM4); + State.regs[dstreg1] = sum; +} + +// 1111 0111 1000 1001 Rm1 Rn1 Rm2 Rn2; dmach_asr Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x89+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::dmach_asr +"dmach_asr" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + long temp, temp2, sum; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + temp = ((signed32)(signed16)(State.regs[dstreg1] & 0xffff) + * (signed32)(signed16)(State.regs[srcreg1] & 0xffff)); + temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff) + * (signed32)(signed16)((State.regs[dstreg1] >> 16) & 0xffff)); + sum = temp + temp2 + State.regs[REG_MCRL]; + + temp = State.regs[dstreg2]; + temp >>= State.regs[srcreg2]; + State.regs[dstreg2] = temp; + State.regs[dstreg1] = sum; +} + +// 1111 0111 1001 1001 Rm1 Rn1 imm4 Rn2; dmach_asr Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x99+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::dmach_asr +"dmach_asr" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + long temp, temp2, sum; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + temp = ((signed32)(signed16)(State.regs[dstreg1] & 0xffff) + * (signed32)(signed16)(State.regs[srcreg1] & 0xffff)); + temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff) + * (signed32)(signed16)((State.regs[dstreg1] >> 16) & 0xffff)); + sum = temp + temp2 + State.regs[REG_MCRL]; + + temp = State.regs[dstreg2]; + temp >>= IMM4; + State.regs[dstreg2] = temp; + State.regs[dstreg1] = sum; +} + +// 1111 0111 1010 1001 Rm1 Rn1 Rm2 Rn2; dmach_lsr Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0xa9+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::dmach_lsr +"dmach_lsr" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + long temp, temp2, sum; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + temp = ((signed32)(signed16)(State.regs[dstreg1] & 0xffff) + * (signed32)(signed16)(State.regs[srcreg1] & 0xffff)); + temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff) + * (signed32)(signed16)((State.regs[dstreg1] >> 16) & 0xffff)); + sum = temp + temp2 + State.regs[REG_MCRL]; + + State.regs[dstreg2] >>= State.regs[srcreg2]; + State.regs[dstreg1] = sum; +} + +// 1111 0111 1011 1001 Rm1 Rn1 imm4 Rn2; dmach_lsr Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0xb9+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::dmach_lsr +"dmach_lsr" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + long temp, temp2, sum; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + temp = ((signed32)(signed16)(State.regs[dstreg1] & 0xffff) + * (signed32)(signed16)(State.regs[srcreg1] & 0xffff)); + temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff) + * (signed32)(signed16)((State.regs[dstreg1] >> 16) & 0xffff)); + sum = temp + temp2 + State.regs[REG_MCRL]; + + State.regs[dstreg2] >>= IMM4; + State.regs[dstreg1] = sum; +} + + +// 1111 0111 1100 1001 Rm1 Rn1 Rm2 Rn2; dmach_asl Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0xc9+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::dmach_asl +"dmach_asl" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + long temp, temp2, sum; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + temp = ((signed32)(signed16)(State.regs[dstreg1] & 0xffff) + * (signed32)(signed16)(State.regs[srcreg1] & 0xffff)); + temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff) + * (signed32)(signed16)((State.regs[dstreg1] >> 16) & 0xffff)); + sum = temp + temp2 + State.regs[REG_MCRL]; + + State.regs[dstreg2] <<= State.regs[srcreg2]; + State.regs[dstreg1] = sum; +} + +// 1111 0111 1101 1001 Rm1 Rn1 imm4 Rn2; dmach_asl Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0xd9+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::dmach_asl +"dmach_asl" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + long temp, temp2, sum; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + temp = ((signed32)(signed16)(State.regs[dstreg1] & 0xffff) + * (signed32)(signed16)(State.regs[srcreg1] & 0xffff)); + temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff) + * (signed32)(signed16)((State.regs[dstreg1] >> 16) & 0xffff)); + sum = temp + temp2 + State.regs[REG_MCRL]; + + State.regs[dstreg2] <<= IMM4; + State.regs[dstreg1] = sum; +} + +// 1111 0111 0000 1010 Rm1 Rn1 Rm2 Rn2; xor_add Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x0a+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::xor_add +"xor_add" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] ^ State.regs[srcreg1]; + State.regs[dstreg2] += State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0001 1010 Rm1 Rn1 imm4 Rn2; xor_add Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x1a+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::xor_add +"xor_add" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] ^ State.regs[srcreg1]; + State.regs[dstreg2] += EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 0010 1010 Rm1 Rn1 Rm2 Rn2; xor_sub Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x2a+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::xor_sub +"xor_sub" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] ^ State.regs[srcreg1]; + State.regs[dstreg2] -= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0011 1010 Rm1 Rn1 imm4 Rn2; xor_sub Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x3a+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::xor_sub +"xor_sub" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] ^ State.regs[srcreg1]; + State.regs[dstreg2] -= EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 0100 1010 Rm1 Rn1 Rm2 Rn2; xor_cmp Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x4a+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::xor_cmp +"xor_cmp" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (State.regs[srcreg2], State.regs[dstreg2]); + State.regs[dstreg1] ^= State.regs[srcreg1]; +} + +// 1111 0111 0101 1010 Rm1 Rn1 imm4 Rn2; xor_cmp Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x5a+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::xor_cmp +"xor_cmp" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (EXTEND4 (IMM4), State.regs[dstreg2]); + State.regs[dstreg1] ^= State.regs[srcreg1]; +} + +// 1111 0111 0110 1010 Rm1 Rn1 Rm2 Rn2; xor_mov Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x6a+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::xor_mov +"xor_mov" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] ^ State.regs[srcreg1]; + State.regs[dstreg2] = State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0111 1010 Rm1 Rn1 imm4 Rn2; xor_mov Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x7a+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::xor_mov +"xor_mov" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] ^ State.regs[srcreg1]; + State.regs[dstreg2] = EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 1000 1010 Rm1 Rn1 Rm2 Rn2; xor_asr Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x8a+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::xor_asr +"xor_asr" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] ^ State.regs[srcreg1]; + temp = State.regs[dstreg2]; + temp >>= State.regs[srcreg2]; + State.regs[dstreg2] = temp; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1001 1010 Rm1 Rn1 imm4 Rn2; xor_asr Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x9a+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::xor_asr +"xor_asr" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] ^ State.regs[srcreg1]; + temp = State.regs[dstreg2]; + temp >>= IMM4; + State.regs[dstreg2] = temp; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1010 1010 Rm1 Rn1 Rm2 Rn2; xor_lsr Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0xaa+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::xor_lsr +"xor_lsr" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] ^ State.regs[srcreg1]; + State.regs[dstreg2] >>= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1011 1010 Rm1 Rn1 imm4 Rn2; xor_lsr Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0xba+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::xor_lsr +"xor_lsr" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] ^ State.regs[srcreg1]; + State.regs[dstreg2] >>= IMM4; + State.regs[dstreg1] = result1; +} + + +// 1111 0111 1100 1010 Rm1 Rn1 Rm2 Rn2; xor_asl Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0xca+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::xor_asl +"xor_asl" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] ^ State.regs[srcreg1]; + State.regs[dstreg2] <<= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1101 1010 Rm1 Rn1 imm4 Rn2; xor_asl Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0xda+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::xor_asl +"xor_asl" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] ^ State.regs[srcreg1]; + State.regs[dstreg2] <<= IMM4; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0000 1011 Rm1 Rn1 Rm2 Rn2; swhw_add Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x0b+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::swhw_add +"swhw_add" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] ^ State.regs[srcreg1]; + State.regs[dstreg2] += State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0001 1011 Rm1 Rn1 imm4 Rn2; swhw_add Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x1b+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::swhw_add +"swhw_add" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = (((State.regs[srcreg1] & 0xffff) << 16) + | ((State.regs[srcreg1] >> 16) & 0xffff)); + State.regs[dstreg2] += EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 0010 1011 Rm1 Rn1 Rm2 Rn2; swhw_sub Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x2b+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::swhw_sub +"swhw_sub" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = (((State.regs[srcreg1] & 0xffff) << 16) + | ((State.regs[srcreg1] >> 16) & 0xffff)); + State.regs[dstreg2] -= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0011 1011 Rm1 Rn1 imm4 Rn2; swhw_sub Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x3b+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::swhw_sub +"swhw_sub" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = (((State.regs[srcreg1] & 0xffff) << 16) + | ((State.regs[srcreg1] >> 16) & 0xffff)); + State.regs[dstreg2] -= EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 0100 1011 Rm1 Rn1 Rm2 Rn2; swhw_cmp Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x4b+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::swhw_cmp +"swhw_cmp" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (State.regs[srcreg2], State.regs[dstreg2]); + State.regs[dstreg1] = (((State.regs[srcreg1] & 0xffff) << 16) + | ((State.regs[srcreg1] >> 16) & 0xffff)); +} + +// 1111 0111 0101 1011 Rm1 Rn1 imm4 Rn2; swhw_cmp Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x5b+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::swhw_cmp +"swhw_cmp" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (EXTEND4 (IMM4), State.regs[dstreg2]); + State.regs[dstreg1] = (((State.regs[srcreg1] & 0xffff) << 16) + | ((State.regs[srcreg1] >> 16) & 0xffff)); +} + +// 1111 0111 0110 1011 Rm1 Rn1 Rm2 Rn2; swhw_mov Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x6b+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::swhw_mov +"swhw_mov" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = (((State.regs[srcreg1] & 0xffff) << 16) + | ((State.regs[srcreg1] >> 16) & 0xffff)); + State.regs[dstreg2] = State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0111 1011 Rm1 Rn1 imm4 Rn2; swhw_mov Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x7b+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::swhw_mov +"swhw_mov" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = (((State.regs[srcreg1] & 0xffff) << 16) + | ((State.regs[srcreg1] >> 16) & 0xffff)); + State.regs[dstreg2] = EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 1000 1011 Rm1 Rn1 Rm2 Rn2; swhw_asr Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x8b+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::swhw_asr +"swhw_asr" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = (((State.regs[srcreg1] & 0xffff) << 16) + | ((State.regs[srcreg1] >> 16) & 0xffff)); + temp = State.regs[dstreg2]; + temp >>= State.regs[srcreg2]; + State.regs[dstreg2] = temp; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1001 1011 Rm1 Rn1 imm4 Rn2; swhw_asr Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x9b+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::swhw_asr +"swhw_asr" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = (((State.regs[srcreg1] & 0xffff) << 16) + | ((State.regs[srcreg1] >> 16) & 0xffff)); + temp = State.regs[dstreg2]; + temp >>= IMM4; + State.regs[dstreg2] = temp; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1010 1011 Rm1 Rn1 Rm2 Rn2; swhw_lsr Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0xab+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::swhw_lsr +"swhw_lsr" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = (((State.regs[srcreg1] & 0xffff) << 16) + | ((State.regs[srcreg1] >> 16) & 0xffff)); + State.regs[dstreg2] >>= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1011 1011 Rm1 Rn1 imm4 Rn2; swhw_lsr Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0xbb+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::swhw_lsr +"swhw_lsr" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = (((State.regs[srcreg1] & 0xffff) << 16) + | ((State.regs[srcreg1] >> 16) & 0xffff)); + State.regs[dstreg2] >>= IMM4; + State.regs[dstreg1] = result1; +} + + +// 1111 0111 1100 1011 Rm1 Rn1 Rm2 Rn2; swhw_asl Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0xcb+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::swhw_asl +"swhw_asl" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = (((State.regs[srcreg1] & 0xffff) << 16) + | ((State.regs[srcreg1] >> 16) & 0xffff)); + State.regs[dstreg2] <<= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1101 1011 Rm1 Rn1 imm4 Rn2; swhw_asl Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0xdb+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::swhw_asl +"swhw_asl" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = (((State.regs[srcreg1] & 0xffff) << 16) + | ((State.regs[srcreg1] >> 16) & 0xffff)); + State.regs[dstreg2] <<= IMM4; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0000 1100 Rm1 Rn1 Rm2 Rn2; or_add Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x0c+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::or_add +"or_add" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] | State.regs[srcreg1]; + State.regs[dstreg2] += State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0001 1100 Rm1 Rn1 imm4 Rn2; or_add Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x1c+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::or_add +"or_add" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] | State.regs[srcreg1]; + State.regs[dstreg2] += EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 0010 1100 Rm1 Rn1 Rm2 Rn2; or_sub Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x2c+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::or_sub +"or_sub" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] | State.regs[srcreg1]; + State.regs[dstreg2] -= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0011 1100 Rm1 Rn1 imm4 Rn2; or_sub Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x3c+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::or_sub +"or_sub" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] | State.regs[srcreg1]; + State.regs[dstreg2] -= EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 0100 1100 Rm1 Rn1 Rm2 Rn2; or_cmp Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x4c+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::or_cmp +"or_cmp" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (State.regs[srcreg2], State.regs[dstreg2]); + State.regs[dstreg1] |= State.regs[srcreg1]; +} + +// 1111 0111 0101 1100 Rm1 Rn1 imm4 Rn2; or_cmp Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x5c+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::or_cmp +"or_cmp" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (EXTEND4 (IMM4), State.regs[dstreg2]); + State.regs[dstreg1] |= State.regs[srcreg1]; +} + +// 1111 0111 0110 1100 Rm1 Rn1 Rm2 Rn2; or_mov Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x6c+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::or_mov +"or_mov" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] | State.regs[srcreg1]; + State.regs[dstreg2] = State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0111 1100 Rm1 Rn1 imm4 Rn2; or_mov Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x7c+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::or_mov +"or_mov" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] | State.regs[srcreg1]; + State.regs[dstreg2] = EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 1000 1100 Rm1 Rn1 Rm2 Rn2; or_asr Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x8c+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::or_asr +"or_asr" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] | State.regs[srcreg1]; + temp = State.regs[dstreg2]; + temp >>= State.regs[srcreg2]; + State.regs[dstreg2] = temp; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1001 1100 Rm1 Rn1 imm4 Rn2; or_asr Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x9c+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::or_asr +"or_asr" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] | State.regs[srcreg1]; + temp = State.regs[dstreg2]; + temp >>= IMM4; + State.regs[dstreg2] = temp; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1010 1100 Rm1 Rn1 Rm2 Rn2; or_lsr Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0xac+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::or_lsr +"or_lsr" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] | State.regs[srcreg1]; + State.regs[dstreg2] >>= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1011 1100 Rm1 Rn1 imm4 Rn2; or_lsr Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0xbc+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::or_lsr +"or_lsr" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] | State.regs[srcreg1]; + State.regs[dstreg2] >>= IMM4; + State.regs[dstreg1] = result1; +} + + +// 1111 0111 1100 1100 Rm1 Rn1 Rm2 Rn2; or_asl Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0xcc+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::or_asl +"or_asl" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] | State.regs[srcreg1]; + State.regs[dstreg2] <<= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1101 1100 Rm1 Rn1 imm4 Rn2; or_asl Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0xdc+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::or_asl +"or_asl" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + result1 = State.regs[dstreg1] | State.regs[srcreg1]; + State.regs[dstreg2] <<= IMM4; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0000 1101 Rm1 Rn1 Rm2 Rn2; sat16_add Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x0d+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::sat16_add +"sat16_add" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + if (State.regs[srcreg1] >= 0x7fff) + result1 = 0x7fff; + else if (State.regs[srcreg1] <= 0xffff8000) + result1 = 0xffff8000; + else + result1 = State.regs[srcreg1]; + + State.regs[dstreg2] += State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0001 1101 Rm1 Rn1 imm4 Rn2; sat16_add Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x1d+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::sat16_add +"sat16_add" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + if (State.regs[srcreg1] >= 0x7fff) + result1 = 0x7fff; + else if (State.regs[srcreg1] <= 0xffff8000) + result1 = 0xffff8000; + else + result1 = State.regs[srcreg1]; + + State.regs[dstreg2] += EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 0010 1101 Rm1 Rn1 Rm2 Rn2; sat16_sub Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x2d+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::sat16_sub +"sat16_sub" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + if (State.regs[srcreg1] >= 0x7fff) + result1 = 0x7fff; + else if (State.regs[srcreg1] <= 0xffff8000) + result1 = 0xffff8000; + else + result1 = State.regs[srcreg1]; + + State.regs[dstreg2] -= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0011 1101 Rm1 Rn1 imm4 Rn2; sat16_sub Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x3d+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::sat16_sub +"sat16_sub" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + if (State.regs[srcreg1] >= 0x7fff) + result1 = 0x7fff; + else if (State.regs[srcreg1] <= 0xffff8000) + result1 = 0xffff8000; + else + result1 = State.regs[srcreg1]; + + State.regs[dstreg2] -= EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 0100 1101 Rm1 Rn1 Rm2 Rn2; sat16_cmp Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x4d+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::sat16_cmp +"sat16_cmp" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + State.regs[dstreg1] = result1; + if (State.regs[srcreg1] >= 0x7fff) + State.regs[dstreg1] = 0x7fff; + else if (State.regs[srcreg1] <= 0xffff8000) + State.regs[dstreg1] = 0xffff8000; + else + State.regs[dstreg1] = State.regs[srcreg1]; +} + +// 1111 0111 0101 1101 Rm1 Rn1 imm4 Rn2; sat16_cmp Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x5d+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::sat16_cmp +"sat16_cmp" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + genericCmp (EXTEND4 (IMM4), State.regs[dstreg2]); + if (State.regs[srcreg1] >= 0x7fff) + State.regs[dstreg1] = 0x7fff; + else if (State.regs[srcreg1] <= 0xffff8000) + State.regs[dstreg1] = 0xffff8000; + else + State.regs[dstreg1] = State.regs[srcreg1]; +} + +// 1111 0111 0110 1101 Rm1 Rn1 Rm2 Rn2; sat16_mov Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x6d+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::sat16_mov +"sat16_mov" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + if (State.regs[srcreg1] >= 0x7fff) + result1 = 0x7fff; + else if (State.regs[srcreg1] <= 0xffff8000) + result1 = 0xffff8000; + else + result1 = State.regs[srcreg1]; + + State.regs[dstreg2] = State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 0111 1101 Rm1 Rn1 imm4 Rn2; sat16_mov Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x7d+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::sat16_mov +"sat16_mov" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + if (State.regs[srcreg1] >= 0x7fff) + result1 = 0x7fff; + else if (State.regs[srcreg1] <= 0xffff8000) + result1 = 0xffff8000; + else + result1 = State.regs[srcreg1]; + + State.regs[dstreg2] = EXTEND4 (IMM4); + State.regs[dstreg1] = result1; +} + +// 1111 0111 1000 1101 Rm1 Rn1 Rm2 Rn2; sat16_asr Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0x8d+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::sat16_asr +"sat16_asr" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + if (State.regs[srcreg1] >= 0x7fff) + result1 = 0x7fff; + else if (State.regs[srcreg1] <= 0xffff8000) + result1 = 0xffff8000; + else + result1 = State.regs[srcreg1]; + + temp = State.regs[dstreg2]; + temp >>= State.regs[srcreg2]; + State.regs[dstreg2] = temp; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1001 1101 Rm1 Rn1 imm4 Rn2; sat16_asr Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0x9d+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::sat16_asr +"sat16_asr" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + if (State.regs[srcreg1] >= 0x7fff) + result1 = 0x7fff; + else if (State.regs[srcreg1] <= 0xffff8000) + result1 = 0xffff8000; + else + result1 = State.regs[srcreg1]; + + temp = State.regs[dstreg2]; + temp >>= IMM4; + State.regs[dstreg2] = temp; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1010 1101 Rm1 Rn1 Rm2 Rn2; sat16_lsr Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0xad+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::sat16_lsr +"sat16_lsr" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + if (State.regs[srcreg1] >= 0x7fff) + result1 = 0x7fff; + else if (State.regs[srcreg1] <= 0xffff8000) + result1 = 0xffff8000; + else + result1 = State.regs[srcreg1]; + + State.regs[dstreg2] >>= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1011 1101 Rm1 Rn1 imm4 Rn2; sat16_lsr Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0xbd+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::sat16_lsr +"sat16_lsr" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + if (State.regs[srcreg1] >= 0x7fff) + result1 = 0x7fff; + else if (State.regs[srcreg1] <= 0xffff8000) + result1 = 0xffff8000; + else + result1 = State.regs[srcreg1]; + + State.regs[dstreg2] >>= IMM4; + State.regs[dstreg1] = result1; +} + + +// 1111 0111 1100 1101 Rm1 Rn1 Rm2 Rn2; sat16_asl Rm1, Rn1, Rm2, Rn2 +8.0xf7+8.0xcd+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::sat16_asl +"sat16_asl" +*am33 +{ + int srcreg1, srcreg2, dstreg1, dstreg2; + int result1; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + srcreg2 = translate_rreg (SD_, RM2); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + if (State.regs[srcreg1] >= 0x7fff) + result1 = 0x7fff; + else if (State.regs[srcreg1] <= 0xffff8000) + result1 = 0xffff8000; + else + result1 = State.regs[srcreg1]; + + State.regs[dstreg2] <<= State.regs[srcreg2]; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1101 1101 Rm1 Rn1 imm4 Rn2; sat16_asl Rm1, Rn1, imm4, Rn2 +8.0xf7+8.0xdd+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::sat16_asl +"sat16_asl" +*am33 +{ + int srcreg1, dstreg1, dstreg2; + int result1; + signed int temp; + + PC = cia; + srcreg1 = translate_rreg (SD_, RM1); + dstreg1 = translate_rreg (SD_, RN1); + dstreg2 = translate_rreg (SD_, RN2); + + if (State.regs[srcreg1] >= 0x7fff) + result1 = 0x7fff; + else if (State.regs[srcreg1] <= 0xffff8000) + result1 = 0xffff8000; + else + result1 = State.regs[srcreg1]; + + State.regs[dstreg2] <<= IMM4; + State.regs[dstreg1] = result1; +} + +// 1111 0111 1110 0000 Rm1 Rn1 imm4 0000; mov_llt (Rm+,imm4),Rn +8.0xf7+8.0xe0+4.RN,4.RM!RN+4.IMM4,4.0x0:D2:::mov_llt +"mov_llt" +*am33 +{ + int srcreg, dstreg; + int result1; + + PC = cia; + srcreg = translate_rreg (SD_, RM); + dstreg = translate_rreg (SD_, RN); + + State.regs[dstreg] = load_word (State.regs[srcreg]); + State.regs[srcreg] += EXTEND4 (IMM4); + + if (((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0)) + { + State.regs[REG_PC] = State.regs[REG_LAR] - 4; + nia = PC; + } + State.regs[dstreg] = result1; +} + +// 1111 0111 1110 0000 Rm1 Rn1 imm4 0001; mov_lgt (Rm+,imm4),Rn +8.0xf7+8.0xe0+4.RN,4.RM!RN+4.IMM4,4.0x1:D2:::mov_lgt +"mov_lgt" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM); + dstreg = translate_rreg (SD_, RN); + + State.regs[dstreg] = load_word (State.regs[srcreg]); + State.regs[srcreg] += EXTEND4 (IMM4); + + if (!((PSW & PSW_Z) + || (((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0)))) + { + State.regs[REG_PC] = State.regs[REG_LAR] - 4; + nia = PC; + } +} + +// 1111 0111 1110 0000 Rm1 Rn1 imm4 0010; mov_lge (Rm+,imm4),Rn +8.0xf7+8.0xe0+4.RN,4.RM!RN+4.IMM4,4.0x2:D2:::mov_lge +"mov_lge" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM); + dstreg = translate_rreg (SD_, RN); + + State.regs[dstreg] = load_word (State.regs[srcreg]); + State.regs[srcreg] += EXTEND4 (IMM4); + + if (!(((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0))) + { + State.regs[REG_PC] = State.regs[REG_LAR] - 4; + nia = PC; + } +} + +// 1111 0111 1110 0000 Rm1 Rn1 imm4 0011; mov_lle (Rm+,imm4),Rn +8.0xf7+8.0xe0+4.RN,4.RM!RN+4.IMM4,4.0x3:D2:::mov_lle +"mov_lle" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM); + dstreg = translate_rreg (SD_, RN); + + State.regs[dstreg] = load_word (State.regs[srcreg]); + State.regs[srcreg] += EXTEND4 (IMM4); + + if ((PSW & PSW_Z) + || (((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0))) + { + State.regs[REG_PC] = State.regs[REG_LAR] - 4; + nia = PC; + } +} + +// 1111 0111 1110 0000 Rm1 Rn1 imm4 0100; mov_lcs (Rm+,imm4),Rn +8.0xf7+8.0xe0+4.RN,4.RM!RN+4.IMM4,4.0x4:D2:::mov_lcs +"mov_lcs" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM); + dstreg = translate_rreg (SD_, RN); + + State.regs[dstreg] = load_word (State.regs[srcreg]); + State.regs[srcreg] += EXTEND4 (IMM4); + + if (PSW & PSW_C) + { + State.regs[REG_PC] = State.regs[REG_LAR] - 4; + nia = PC; + } +} + +// 1111 0111 1110 0000 Rm1 Rn1 imm4 0101; mov_lhi (Rm+,imm4),Rn +8.0xf7+8.0xe0+4.RN,4.RM!RN+4.IMM4,4.0x5:D2:::mov_lhi +"mov_lhi" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM); + dstreg = translate_rreg (SD_, RN); + + State.regs[dstreg] = load_word (State.regs[srcreg]); + State.regs[srcreg] += EXTEND4 (IMM4); + + if (!(((PSW & PSW_C) != 0) || (PSW & PSW_Z) != 0)) + { + State.regs[REG_PC] = State.regs[REG_LAR] - 4; + nia = PC; + } +} + +// 1111 0111 1110 0000 Rm1 Rn1 imm4 0110; mov_lcc (Rm+,imm4),Rn +8.0xf7+8.0xe0+4.RN,4.RM!RN+4.IMM4,4.0x6:D2:::mov_lcc +"mov_lcc" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM); + dstreg = translate_rreg (SD_, RN); + + State.regs[dstreg] = load_word (State.regs[srcreg]); + State.regs[srcreg] += EXTEND4 (IMM4); + + if (!(PSW & PSW_C)) + { + State.regs[REG_PC] = State.regs[REG_LAR] - 4; + nia = PC; + } +} + +// 1111 0111 1110 0000 Rm1 Rn1 imm4 0111; mov_lls (Rm+,imm4),Rn +8.0xf7+8.0xe0+4.RN,4.RM!RN+4.IMM4,4.0x7:D2:::mov_lls +"mov_lls" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM); + dstreg = translate_rreg (SD_, RN); + + State.regs[dstreg] = load_word (State.regs[srcreg]); + State.regs[srcreg] += EXTEND4 (IMM4); + + if (((PSW & PSW_C) != 0) || (PSW & PSW_Z) != 0) + { + State.regs[REG_PC] = State.regs[REG_LAR] - 4; + nia = PC; + } +} + +// 1111 0111 1110 0000 Rm1 Rn1 imm4 1000; mov_leq (Rm+,imm4),Rn +8.0xf7+8.0xe0+4.RN,4.RM!RN+4.IMM4,4.0x8:D2:::mov_leq +"mov_leq" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM); + dstreg = translate_rreg (SD_, RN); + + State.regs[dstreg] = load_word (State.regs[srcreg]); + State.regs[srcreg] += EXTEND4 (IMM4); + + if (PSW & PSW_Z) + { + State.regs[REG_PC] = State.regs[REG_LAR] - 4; + nia = PC; + } +} + +// 1111 0111 1110 0000 Rm1 Rn1 imm4 1001; mov_lne (Rm+,imm4),Rn +8.0xf7+8.0xe0+4.RN,4.RM!RN+4.IMM4,4.0x9:D2:::mov_lne +"mov_lne" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM); + dstreg = translate_rreg (SD_, RN); + + State.regs[dstreg] = load_word (State.regs[srcreg]); + State.regs[srcreg] += EXTEND4 (IMM4); + + if (!(PSW & PSW_Z)) + { + State.regs[REG_PC] = State.regs[REG_LAR] - 4; + nia = PC; + } +} + +// 1111 0111 1110 0000 Rm1 Rn1 imm4 1010; mov_lra (Rm+,imm4),Rn +8.0xf7+8.0xe0+4.RN,4.RM!RN+4.IMM4,4.0xa:D2:::mov_lra +"mov_lra" +*am33 +{ + int srcreg, dstreg; + + PC = cia; + srcreg = translate_rreg (SD_, RM); + dstreg = translate_rreg (SD_, RN); + + State.regs[dstreg] = load_word (State.regs[srcreg]); + State.regs[srcreg] += EXTEND4 (IMM4); + + State.regs[REG_PC] = State.regs[REG_LAR] - 4; + nia = PC; +} diff --git a/sim/mn10300/mn10300.igen b/sim/mn10300/mn10300.igen index 1b42db401e8..2ffa9805ec5 100644 --- a/sim/mn10300/mn10300.igen +++ b/sim/mn10300/mn10300.igen @@ -3,6 +3,7 @@ :option:::insn-specifying-widths:true :option:::hi-bit-nr:7 :model:::mn10300:mn10300: +:model:::am33:am33: // What do we do with an illegal instruction? :internal::::illegal: @@ -15,6 +16,7 @@ 4.0x8,2.DM1,2.DN0=DM1+8.IMM8:S0i:::mov "mov" *mn10300 +*am33 { /* OP_8000 (); */ signed32 immed = EXTEND8 (IMM8); @@ -26,6 +28,7 @@ 4.0x8,2.DM1,2.DN0!DM1:S0:::mov "mov" *mn10300 +*am33 { PC = cia; /* OP_80 (); */ @@ -37,6 +40,7 @@ 8.0xf1+1110,2.DM1,2.AN0:D0:::mov "mov" *mn10300 +*am33 { /* OP_F1E0 (); */ PC = cia; @@ -48,6 +52,7 @@ 8.0xf1+1101,2.AM1,2.DN0:D0a:::mov "mov" *mn10300 +*am33 { /* OP_F1D0 (); */ PC = cia; @@ -59,6 +64,7 @@ 4.0x9,2.AM1,2.AN0=AM1+8.IMM8:S0ai:::mov "mov" *mn10300 +*am33 { PC = cia; /* OP_9000 (); */ @@ -70,6 +76,7 @@ 4.0x9,2.AM1,2.AN0!AM1:S0a:::mov "mov" *mn10300 +*am33 { PC = cia; /* OP_90 (); */ @@ -81,6 +88,7 @@ 4.0x3,11,2.AN0:S0b:::mov "mov" *mn10300 +*am33 { /* OP_3C (); */ PC = cia; @@ -92,6 +100,7 @@ 8.0xf2+4.0xf,2.AM1,00:D0b:::mov "mov" *mn10300 +*am33 { /* OP_F2F0 (); */ PC = cia; @@ -103,6 +112,7 @@ 8.0xf2+4.0xe,01,2.DN0:D0c:::mov "mov" *mn10300 +*am33 { /* OP_F2E4 (); */ PC = cia; @@ -114,6 +124,7 @@ 8.0xf2+4.0xf,2.DM1,11:D0d:::mov "mov" *mn10300 +*am33 { /* OP_F2F3 (); */ PC = cia; @@ -125,6 +136,7 @@ 8.0xf2+4.0xe,00,2.DN0:D0e:::mov "mov" *mn10300 +*am33 { /* OP_F2E0 (); */ PC = cia; @@ -136,6 +148,7 @@ 8.0xf2+4.0xf,2.DM1,10:D0f:::mov "mov" *mn10300 +*am33 { /* OP_F2F2 (); */ PC = cia; @@ -147,6 +160,7 @@ 4.0x7,2.DN1,2.AM0:S0c:::mov "mov" *mn10300 +*am33 { /* OP_70 (); */ PC = cia; @@ -158,6 +172,7 @@ 8.0xf8+4.0x0,2.DN1,2.AM0+8.D8:D1:::mov "mov" *mn10300 +*am33 { /* OP_F80000 (); */ PC = cia; @@ -170,6 +185,7 @@ 8.0xfa+4.0x0,2.DN1,2.AM0+8.D16A+8.D16B:D2:::mov "mov" *mn10300 +*am33 { /* OP_FA000000 (); */ PC = cia; @@ -182,6 +198,7 @@ 8.0xfc+4.0x0,2.DN1,2.AM0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4:::mov "mov" *mn10300 +*am33 { /* OP_FC000000 (); */ PC = cia; @@ -195,6 +212,7 @@ 4.0x5,10,2.DN0+8.D8:S1:::mov "mov" *mn10300 +*am33 { /* OP_5800 (); */ PC = cia; @@ -206,6 +224,7 @@ 8.0xfa+4.0xb,01,2.DN0+8.IMM16A+8.IMM16B:D2a:::mov "mov" *mn10300 +*am33 { /* OP_FAB40000 (); */ PC = cia; @@ -218,6 +237,7 @@ 8.0xfc+4.0xb,01,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4a:::mov "mov" *mn10300 +*am33 { /* OP_FCB40000 (); */ PC = cia; @@ -230,6 +250,7 @@ 8.0xf3+00,2.DN2,2.DI,2.AM0:D0g:::mov "mov" *mn10300 +*am33 { /* OP_F300 (); */ PC = cia; @@ -242,6 +263,7 @@ 4.0x3,00,2.DN0+8.IMM16A+8.IMM16B:S2:::mov "mov" *mn10300 +*am33 { /* OP_300000 (); */ PC = cia; @@ -252,6 +274,7 @@ 8.0xfc+4.0xa,01,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4b:::mov "mov" *mn10300 +*am33 { /* OP_FCA40000 (); */ PC = cia; @@ -263,6 +286,7 @@ 8.0xf0+4.0x0,2.AN1,2.AM0:D0h:::mov "mov" *mn10300 +*am33 { /* OP_F000 (); */ PC = cia; @@ -274,6 +298,7 @@ 8.0xf8+4.0x2,2.AN1,2.AM0+8.D8:D1a:::mov "mov" *mn10300 +*am33 { /* OP_F82000 (); */ PC = cia; @@ -286,6 +311,7 @@ 8.0xfa+4.0x2,2.AN1,2.AM0+8.D16A+8.D16B:D2b:::mov "mov" *mn10300 +*am33 { /* OP_FA200000 (); */ PC = cia; @@ -299,6 +325,7 @@ 8.0xfc+4.0x2,2.AN1,2.AM0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4c:::mov "mov" *mn10300 +*am33 { /* OP_FC200000 (); */ PC = cia; @@ -312,6 +339,7 @@ 4.0x5,11,2.AN0+8.D8:S1a:::mov "mov" *mn10300 +*am33 { /* OP_5C00 (); */ PC = cia; @@ -324,6 +352,7 @@ 8.0xfa+4.0xb,00,2.AN0+8.IMM16A+8.IMM16B:D2c:::mov "mov" *mn10300 +*am33 { /* OP_FAB00000 (); */ PC = cia; @@ -336,6 +365,7 @@ 8.0xfc+4.0xb,00,2.AN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4d:::mov "mov" *mn10300 +*am33 { /* OP_FCB00000 (); */ PC = cia; @@ -349,6 +379,7 @@ 8.0xf3+10,2.AN2,2.DI,2.AM0:D0i:::mov "mov" *mn10300 +*am33 { /* OP_F380 (); */ PC = cia; @@ -362,6 +393,7 @@ 8.0xfa+4.0xa,00,2.AN0+8.IMM16A+8.IMM16B:D2d:::mov "mov" *mn10300 +*am33 { /* OP_FAA00000 (); */ PC = cia; @@ -373,6 +405,7 @@ 8.0xfc+4.0xa,00,2.AN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4e:::mov "mov" *mn10300 +*am33 { /* OP_FCA00000 (); */ PC = cia; @@ -385,6 +418,7 @@ 8.0xf8+4.0xf,00,2.AM0+8.D8:D1b:::mov "mov" *mn10300 +*am33 { /* OP_F8F000 (); */ PC = cia; @@ -397,6 +431,7 @@ 4.0x6,2.DM1,2.AN0:S0d:::mov "mov" *mn10300 +*am33 { /* OP_60 (); */ PC = cia; @@ -408,6 +443,7 @@ 8.0xf8+4.0x1,2.DM1,2.AN0+8.D8:D1c:::mov "mov" *mn10300 +*am33 { /* OP_F81000 (); */ PC = cia; @@ -420,6 +456,7 @@ 8.0xfa+4.0x1,2.DM1,2.AN0+8.D16A+8.D16B:D2e:::mov "mov" *mn10300 +*am33 { /* OP_FA100000 (); */ PC = cia; @@ -432,6 +469,7 @@ 8.0xfc+4.0x1,2.DM1,2.AN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4f:::mov "mov" *mn10300 +*am33 { /* OP_FC100000 (); */ PC = cia; @@ -445,6 +483,7 @@ 4.0x4,2.DM1,10+8.D8:S1b:::mov "mov" *mn10300 +*am33 { /* OP_4200 (); */ PC = cia; @@ -456,6 +495,7 @@ 8.0xfa+4.0x9,2.DM1,01+8.IMM16A+8.IMM16B:D2f:::mov "mov" *mn10300 +*am33 { /* OP_FA910000 (); */ PC = cia; @@ -468,6 +508,7 @@ 8.0xfc+4.0x9,2.DM1,01+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4g:::mov "mov" *mn10300 +*am33 { /* OP_FC910000 (); */ PC = cia; @@ -480,6 +521,7 @@ 8.0xf3+01,2.DM2,2.DI,2.AN0:D0j:::mov "mov" *mn10300 +*am33 { /* OP_F340 (); */ PC = cia; @@ -492,6 +534,7 @@ 4.0x0,2.DM1,01+8.IMM16A+8.IMM16B:S2a:::mov "mov" *mn10300 +*am33 { /* OP_10000 (); */ PC = cia; @@ -503,6 +546,7 @@ 8.0xfc+4.0x8,2.DM1,01+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4h:::mov "mov" *mn10300 +*am33 { /* OP_FC810000 (); */ PC = cia; @@ -515,6 +559,7 @@ 8.0xf0+4.0x1,2.AM1,2.AN0:D0k:::mov "mov" *mn10300 +*am33 { /* OP_F010 (); */ PC = cia; @@ -526,6 +571,7 @@ 8.0xf8+4.0x3,2.AM1,2.AN0+8.D8:D1d:::mov "mov" *mn10300 +*am33 { /* OP_F83000 (); */ PC = cia; @@ -538,6 +584,7 @@ 8.0xfa+4.0x3,2.AM1,2.AN0+8.D16A+8.D16B:D2g:::mov "mov" *mn10300 +*am33 { /* OP_FA300000 (); */ PC = cia; @@ -550,6 +597,7 @@ 8.0xfc+4.0x3,2.AM1,2.AN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4i:::mov "mov" *mn10300 +*am33 { /* OP_FC300000 (); */ PC = cia; @@ -563,6 +611,9 @@ 4.0x4,2.AM1,11+8.D8:S1c:::mov "mov" *mn10300 + +*am33 + { /* OP_4300 (); */ PC = cia; @@ -574,6 +625,9 @@ 8.0xfa+4.0x9,2.AM1,00+8.IMM16A+8.IMM16B:D2h:::mov "mov" *mn10300 + +*am33 + { /* OP_FA900000 (); */ PC = cia; @@ -586,6 +640,9 @@ 8.0xfc+4.0x9,2.AM1,00+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4j:::mov "mov" *mn10300 + +*am33 + { /* OP_FC900000 (); */ PC = cia; @@ -598,6 +655,9 @@ 8.0xf3+11,2.AM2,2.DI,2.AN0:D0l:::mov "mov" *mn10300 + +*am33 + { /* OP_F3C0 (); */ PC = cia; @@ -610,6 +670,9 @@ 8.0xfa+4.0x8,2.AM1,00+8.IMM16A+8.IMM16B:D2i:::mov "mov" *mn10300 + +*am33 + { /* OP_FA800000 (); */ PC = cia; @@ -622,6 +685,9 @@ 8.0xfc+4.0x8,2.AM1,00+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4k:::mov "mov" *mn10300 + +*am33 + { /* OP_FC800000 (); */ PC = cia; @@ -634,6 +700,9 @@ 8.0xf8+4.0xf,01,2.AN0+8.D8:D1e:::mov "mov" *mn10300 + +*am33 + { /* OP_F8F400 (); */ PC = cia; @@ -646,6 +715,9 @@ 4.0x2,11,2.DN0+8.IMM16A+8.IMM16B:S2b:::mov "mov" *mn10300 + +*am33 + { /* OP_2C0000 (); */ unsigned long value; @@ -660,6 +732,9 @@ 8.0xfc+4.0xc,11,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4l:::mov "mov" *mn10300 + +*am33 + { /* OP_FCCC0000 (); */ unsigned long value; @@ -674,6 +749,9 @@ 4.0x2,01,2.AN0+8.IMM16A+8.IMM16B:S2c:::mov "mov" *mn10300 + +*am33 + { /* OP_240000 (); */ unsigned long value; @@ -688,6 +766,9 @@ 8.0xfc+4.0xd,11,2.AN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4m:::mov "mov" *mn10300 + +*am33 + { /* OP_FCDC0000 (); */ PC = cia; @@ -699,6 +780,9 @@ 8.0xf0+4.0x4,2.DN1,2.AM0:D0:::movbu "movbu" *mn10300 + +*am33 + { /* OP_F040 (); */ PC = cia; @@ -711,6 +795,9 @@ 8.0xf8+4.0x4,2.DN1,2.AM0+8.D8:D1f:::movbu "movbu" *mn10300 + +*am33 + { /* OP_F84000 (); */ PC = cia; @@ -723,6 +810,9 @@ 8.0xfa+4.0x4,2.DN1,2.AM0+8.D16A+8.D16B:D2:::movbu "movbu" *mn10300 + +*am33 + { /* OP_FA400000 (); */ PC = cia; @@ -736,6 +826,9 @@ 8.0xfc+4.0x4,2.DN1,2.AM0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4:::movbu "movbu" *mn10300 + +*am33 + { /* OP_FC400000 (); */ PC = cia; @@ -749,6 +842,9 @@ 8.0xf8+4.0xb,10,2.DN0+8.D8:D1a:::movbu "movbu" *mn10300 + +*am33 + { /* OP_F8B800 (); */ PC = cia; @@ -761,6 +857,9 @@ 8.0xfa+4.0xb,10,2.DN0+8.IMM16A+8.IMM16B:D2a:::movbu "movbu" *mn10300 + +*am33 + { /* OP_FAB80000 (); */ PC = cia; @@ -774,6 +873,9 @@ 8.0xfc+4.0xb,10,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4a:::movbu "movbu" *mn10300 + +*am33 + { /* OP_FCB80000 (); */ PC = cia; @@ -787,6 +889,9 @@ 8.0xf4+00,2.DN2,2.DI,2.AM0:D0a:::movbu "movbu" *mn10300 + +*am33 + { /* OP_F400 (); */ PC = cia; @@ -800,6 +905,9 @@ 4.0x3,01,2.DN0+8.IMM16A+8.IMM16B:S2:::movbu "movbu" *mn10300 + +*am33 + { /* OP_340000 (); */ PC = cia; @@ -811,6 +919,9 @@ 8.0xfc+4.0xa,10,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4b:::movbu "movbu" *mn10300 + +*am33 + { /* OP_FCA80000 (); */ PC = cia; @@ -823,6 +934,9 @@ 8.0xf0+4.0x5,2.DM1,2.AN0:D0b:::movbu "movbu" *mn10300 + +*am33 + { /* OP_F050 (); */ PC = cia; @@ -834,6 +948,9 @@ 8.0xf8+4.0x5,2.DM1,2.AN0+8.D8:D1b:::movbu "movbu" *mn10300 + +*am33 + { /* OP_F85000 (); */ PC = cia; @@ -846,6 +963,9 @@ 8.0xfa+4.0x5,2.DM1,2.AN0+8.D16A+8.D16B:D2b:::movbu "movbu" *mn10300 + +*am33 + { /* OP_FA500000 (); */ PC = cia; @@ -858,6 +978,9 @@ 8.0xfc+4.0x5,2.DM1,2.AN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4c:::movbu "movbu" *mn10300 + +*am33 + { /* OP_FC500000 (); */ PC = cia; @@ -871,6 +994,9 @@ 8.0xf8+4.0x9,2.DM1,10+8.D8:D1c:::movbu "movbu" *mn10300 + +*am33 + { /* OP_F89200 (); */ PC = cia; @@ -882,6 +1008,9 @@ 8.0xfa+4.0x9,2.DM1,10+8.IMM16A+8.IMM16B:D2c:::movbu "movbu" *mn10300 + +*am33 + { /* OP_FA920000 (); */ PC = cia; @@ -894,6 +1023,9 @@ 8.0xfc+4.0x9,2.DM1,10+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4d:::movbu "movbu" *mn10300 + +*am33 + { /* OP_FC920000 (); */ PC = cia; @@ -906,6 +1038,9 @@ 8.0xf4+01,2.DM2,2.DI,2.AN0:D0c:::movbu "movbu" *mn10300 + +*am33 + { /* OP_F440 (); */ PC = cia; @@ -918,6 +1053,9 @@ 4.0x0,2.DM1,10+8.IMM16A+8.IMM16B:S2a:::movbu "movbu" *mn10300 + +*am33 + { /* OP_20000 (); */ PC = cia; @@ -930,6 +1068,9 @@ 8.0xfc+4.0x8,2.DM1,10+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4e:::movbu "movbu" *mn10300 + +*am33 + { /* OP_FC820000 (); */ PC = cia; @@ -942,6 +1083,9 @@ 8.0xf0+4.0x6,2.DN1,2.AM0:D0:::movhu "movhu" *mn10300 + +*am33 + { /* OP_F060 (); */ PC = cia; @@ -954,6 +1098,9 @@ 8.0xf8+4.0x6,2.DN1,2.AM0+8.D8:D1d:::movhu "movhu" *mn10300 + +*am33 + { /* OP_F86000 (); */ PC = cia; @@ -966,6 +1113,9 @@ 8.0xfa+4.0x6,2.DN1,2.AM0+8.D16A+8.D16B:D2:::movhu "movhu" *mn10300 + +*am33 + { /* OP_FA600000 (); */ PC = cia; @@ -979,6 +1129,9 @@ 8.0xfc+4.0x6,2.DN1,2.AM0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4:::movhu "movhu" *mn10300 + +*am33 + { /* OP_FC600000 (); */ PC = cia; @@ -992,6 +1145,9 @@ 8.0xf8+4.0xb,11,2.DN0+8.D8:D1a:::movhu "movhu" *mn10300 + +*am33 + { /* OP_F8BC00 (); */ PC = cia; @@ -1004,6 +1160,9 @@ 8.0xfa+4.0xb,11,2.DN0+8.IMM16A+8.IMM16B:D2a:::movhu "movhu" *mn10300 + +*am33 + { /* OP_FABC0000 (); */ PC = cia; @@ -1016,6 +1175,9 @@ 8.0xfc+4.0xb,11,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4a:::movhu "movhu" *mn10300 + +*am33 + { /* OP_FCBC0000 (); */ PC = cia; @@ -1028,6 +1190,9 @@ 8.0xf4+10,2.DN2,2.DI,2.AM0:D0a:::movhu "movhu" *mn10300 + +*am33 + { /* OP_F480 (); */ PC = cia; @@ -1040,6 +1205,9 @@ 4.0x3,10,2.DN0+8.IMM16A+8.IMM16B:S2:::movhu "movhu" *mn10300 + +*am33 + { /* OP_380000 (); */ PC = cia; @@ -1051,6 +1219,9 @@ 8.0xfc+4.0xa,11,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4b:::movhu "movhu" *mn10300 + +*am33 + { /* OP_FCAC0000 (); */ PC = cia; @@ -1063,6 +1234,9 @@ 8.0xf0+4.0x7,2.DM1,2.AN0:D0b:::movhu "movhu" *mn10300 + +*am33 + { /* OP_F070 (); */ PC = cia; @@ -1075,6 +1249,9 @@ 8.0xf8+4.0x7,2.DM1,2.AN0+8.D8:D1b:::movhu "movhu" *mn10300 + +*am33 + { /* OP_F87000 (); */ PC = cia; @@ -1087,6 +1264,9 @@ 8.0xfa+4.0x7,2.DM1,2.AN0+8.D16A+8.D16B:D2b:::movhu "movhu" *mn10300 + +*am33 + { /* OP_FA700000 (); */ PC = cia; @@ -1099,6 +1279,9 @@ 8.0xfc+4.0x7,2.DM1,2.AN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4c:::movhu "movhu" *mn10300 + +*am33 + { /* OP_FC700000 (); */ PC = cia; @@ -1112,6 +1295,9 @@ 8.0xf8+4.0x9,2.DM1,11+8.D8:D1c:::movhu "movhu" *mn10300 + +*am33 + { /* OP_F89300 (); */ PC = cia; @@ -1124,6 +1310,9 @@ 8.0xfa+4.0x9,2.DM1,11+8.IMM16A+8.IMM16B:D2c:::movhu "movhu" *mn10300 + +*am33 + { /* OP_FA930000 (); */ PC = cia; @@ -1136,6 +1325,9 @@ 8.0xfc+4.0x9,2.DM1,11+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4d:::movhu "movhu" *mn10300 + +*am33 + { /* OP_FC930000 (); */ PC = cia; @@ -1148,6 +1340,9 @@ 8.0xf4+11,2.DM2,2.DI,2.AN0:D0c:::movhu "movhu" *mn10300 + +*am33 + { /* OP_F4C0 (); */ PC = cia; @@ -1160,6 +1355,9 @@ 4.0x0,2.DM1,11+8.IMM16A+8.IMM16B:S2a:::movhu "movhu" *mn10300 + +*am33 + { /* OP_30000 (); */ PC = cia; @@ -1171,6 +1369,9 @@ 8.0xfc+4.0x8,2.DM1,11+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4e:::movhu "movhu" *mn10300 + +*am33 + { /* OP_FC830000 (); */ PC = cia; @@ -1183,6 +1384,9 @@ 8.0xf2+4.0xd,00,2.DN0:D0:::ext "ext" *mn10300 + +*am33 + { /* OP_F2D0 (); */ PC = cia; @@ -1197,6 +1401,9 @@ 4.0x1,00,2.DN0:S0:::extb "extb" *mn10300 + +*am33 + { /* OP_10 (); */ PC = cia; @@ -1208,6 +1415,9 @@ 4.0x1,01,2.DN0:S0:::extbu "extbu" *mn10300 + +*am33 + { /* OP_14 (); */ PC = cia; @@ -1219,6 +1429,9 @@ 4.0x1,10,2.DN0:S0:::exth "exth" *mn10300 + +*am33 + { /* OP_18 (); */ PC = cia; @@ -1230,6 +1443,9 @@ 4.0x1,11,2.DN0:S0:::exthu "exthu" *mn10300 + +*am33 + { /* OP_1C (); */ PC = cia; @@ -1241,6 +1457,9 @@ 4.0x0,2.DN1,00:S0:::clr "clr" *mn10300 + +*am33 + { /* OP_0 (); */ PC = cia; @@ -1255,6 +1474,9 @@ 4.0xe,2.DM1,2.DN0:S0:::add "add" *mn10300 + +*am33 + { /* OP_E0 (); */ PC = cia; @@ -1265,6 +1487,9 @@ 8.0xf1+4.0x6,2.DM1,2.AN0:D0:::add "add" *mn10300 + +*am33 + { /* OP_F160 (); */ PC = cia; @@ -1276,6 +1501,9 @@ 8.0xf1+4.0x5,2.AM1,2.DN0:D0a:::add "add" *mn10300 + +*am33 + { /* OP_F150 (); */ PC = cia; @@ -1287,6 +1515,9 @@ 8.0xf1+4.0x7,2.AM1,2.AN0:D0b:::add "add" *mn10300 + +*am33 + { /* OP_F170 (); */ PC = cia; @@ -1298,6 +1529,9 @@ 4.0x2,10,2.DN0+8.IMM8:S1:::add "add" *mn10300 + +*am33 + { /* OP_2800 (); */ PC = cia; @@ -1309,6 +1543,9 @@ 8.0xfa+4.0xc,00,2.DN0+8.IMM16A+8.IMM16B:D2:::add "add" *mn10300 + +*am33 + { /* OP_FAC00000 (); */ PC = cia; @@ -1320,6 +1557,9 @@ 8.0xfc+4.0xc,00,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4:::add "add" *mn10300 + +*am33 + { /* OP_FCC00000 (); */ PC = cia; @@ -1331,6 +1571,9 @@ 4.0x2,00,2.AN0+8.IMM8:S1a:::add "add" *mn10300 + +*am33 + { /* OP_2000 (); */ PC = cia; @@ -1342,6 +1585,9 @@ 8.0xfa+4.0xd,00,2.AN0+8.IMM16A+8.IMM16B:D2a:::add "add" *mn10300 + +*am33 + { /* OP_FAD00000 (); */ PC = cia; @@ -1353,6 +1599,9 @@ 8.0xfc+4.0xd,00,2.AN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4a:::add "add" *mn10300 + +*am33 + { /* OP_FCD00000 (); */ PC = cia; @@ -1364,6 +1613,9 @@ 8.0xf8+8.0xfe+8.IMM8:D1:::add "add" *mn10300 + +*am33 + { /* OP_F8FE00 (); */ unsigned long imm; @@ -1379,6 +1631,9 @@ 8.0xfa+8.0xfe+8.IMM16A+8.IMM16B:D2b:::add "add" *mn10300 + +*am33 + { /* OP_FAFE0000 (); */ unsigned long imm; @@ -1394,6 +1649,9 @@ 8.0xfc+8.0xfe+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4b:::add "add" *mn10300 + +*am33 + { /* OP_FCFE0000 (); */ unsigned long imm; @@ -1409,6 +1667,9 @@ 8.0xf1+4.0x4,2.DM1,2.DN0:D0:::addc "addc" *mn10300 + +*am33 + { /* OP_F140 (); */ int z, c, n, v; @@ -1436,6 +1697,9 @@ 8.0xf1+4.0x0,2.DM1,2.DN0:D0:::sub "sub" *mn10300 + +*am33 + { /* OP_F100 (); */ PC = cia; @@ -1446,6 +1710,9 @@ 8.0xf1+4.0x2,2.DM1,2.AN0:D0a:::sub "sub" *mn10300 + +*am33 + { /* OP_F120 (); */ PC = cia; @@ -1457,6 +1724,9 @@ 8.0xf1+4.0x1,2.AM1,2.DN0:D0b:::sub "sub" *mn10300 + +*am33 + { /* OP_F110 (); */ PC = cia; @@ -1468,6 +1738,9 @@ 8.0xf1+4.0x3,2.AM1,2.AN0:D0c:::sub "sub" *mn10300 + +*am33 + { /* OP_F130 (); */ PC = cia; @@ -1479,6 +1752,9 @@ 8.0xfc+4.0xc,01,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4:::sub "sub" *mn10300 + +*am33 + { /* OP_FCC40000 (); */ PC = cia; @@ -1490,6 +1766,9 @@ 8.0xfc+4.0xd,01,2.AN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4a:::sub "sub" *mn10300 + +*am33 + { /* OP_FCD40000 (); */ PC = cia; @@ -1501,6 +1780,9 @@ 8.0xf1+4.0x8,2.DM1,2.DN0:D0:::subc "subc" *mn10300 + +*am33 + { /* OP_F180 (); */ int z, c, n, v; @@ -1528,6 +1810,9 @@ 8.0xf2+4.0x4,2.DM1,2.DN0:D0:::mul "mul" *mn10300 + +*am33 + { /* OP_F240 (); */ unsigned long long temp; @@ -1549,6 +1834,9 @@ 8.0xf2+4.0x5,2.DM1,2.DN0:D0:::mulu "mulu" *mn10300 + +*am33 + { /* OP_F250 (); */ unsigned long long temp; @@ -1570,6 +1858,9 @@ 8.0xf2+4.0x6,2.DM1,2.DN0:D0:::div "div" *mn10300 + +*am33 + { /* OP_F260 (); */ signed64 temp; @@ -1604,6 +1895,9 @@ 8.0xf2+4.0x7,2.DM1,2.DN0:D0:::divu "divu" *mn10300 + +*am33 + { /* OP_F270 (); */ unsigned64 temp; @@ -1637,6 +1931,9 @@ 4.0x4,2.DN1,00:S0:::inc "inc" *mn10300 + +*am33 + { /* OP_40 (); */ unsigned int imm; @@ -1651,6 +1948,9 @@ 4.0x4,2.AN1,01:S0a:::inc "inc" *mn10300 + +*am33 + { /* OP_41 (); */ PC = cia; @@ -1662,6 +1962,9 @@ 4.0x5,00,2.AN0:S0:::inc4 "inc4" *mn10300 + +*am33 + { /* OP_50 (); */ PC = cia; @@ -1673,6 +1976,9 @@ 4.0xa,2.DM1,2.DN0=DM1+IMM8:S0i:::cmp "cmp" *mn10300 + +*am33 + { PC = cia; /* OP_A000 (); */ @@ -1684,6 +1990,9 @@ 4.0xa,2.DM1,2.DN0!DM1:S0:::cmp "cmp" *mn10300 + +*am33 + { PC = cia; /* OP_A0 (); */ @@ -1695,6 +2004,9 @@ 8.0xf1+4.0xa,2.DM1,2.AN0:D0:::cmp "cmp" *mn10300 + +*am33 + { /* OP_F1A0 (); */ PC = cia; @@ -1706,6 +2018,9 @@ 8.0xf1+4.0x9,2.AM1,2.DN0:D0a:::cmp "cmp" *mn10300 + +*am33 + { /* OP_F190 (); */ PC = cia; @@ -1717,6 +2032,9 @@ 4.0xb,2.AM1,2.AN0=AM1+IMM8:S0ai:::cmp "cmp" *mn10300 + +*am33 + { PC = cia; /* OP_B000 (); */ @@ -1729,6 +2047,9 @@ 4.0xb,2.AM1,2.AN0!AM1:S0a:::cmp "cmp" *mn10300 + +*am33 + { PC = cia; /* OP_B0 (); */ @@ -1740,6 +2061,9 @@ 8.0xfa+4.0xc,10,2.DN0+8.IMM16A+8.IMM16B:D2:::cmp "cmp" *mn10300 + +*am33 + { /* OP_FAC80000 (); */ PC = cia; @@ -1752,6 +2076,9 @@ 8.0xfc+4.0xc,10,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4:::cmp "cmp" *mn10300 + +*am33 + { /* OP_FCC80000 (); */ PC = cia; @@ -1764,6 +2091,9 @@ 8.0xfa+4.0xd,10,2.AN0+8.IMM16A+8.IMM16B:D2a:::cmp "cmp" *mn10300 + +*am33 + { /* OP_FAD80000 (); */ PC = cia; @@ -1776,6 +2106,9 @@ 8.0xfc+4.0xd,10,2.AN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4a:::cmp "cmp" *mn10300 + +*am33 + { /* OP_FCD80000 (); */ PC = cia; @@ -1788,6 +2121,9 @@ 8.0xf2+4.0x0,2.DM1,2.DN0:D0:::and "and" *mn10300 + +*am33 + { /* OP_F200 (); */ int n, z; @@ -1805,6 +2141,9 @@ 8.0xf8+4.0xe,00,2.DN0+8.IMM8:D1:::and "and" *mn10300 + +*am33 + { /* OP_F8E000 (); */ int n, z; @@ -1822,6 +2161,9 @@ 8.0xfa+4.0xe,00,2.DN0+8.IMM16A+8.IMM16B:D2:::and "and" *mn10300 + +*am33 + { /* OP_FAE00000 (); */ int n, z; @@ -1839,6 +2181,9 @@ 8.0xfc+4.0xe,00,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4:::and "and" *mn10300 + +*am33 + { /* OP_FCE00000 (); */ int n, z; @@ -1857,6 +2202,9 @@ 8.0xfa+8.0xfc+8.IMM16A+8.IMM16B:D2a:::and "and" *mn10300 + +*am33 + { /* OP_FAFC0000 (); */ PC = cia; @@ -1869,6 +2217,9 @@ 8.0xf2+4.0x1,2.DM1,2.DN0:D0:::or "or" *mn10300 + +*am33 + { /* OP_F210 (); */ PC = cia; @@ -1880,6 +2231,9 @@ 8.0xf8+4.0xe,01,2.DN0+8.IMM8:D1:::or "or" *mn10300 + +*am33 + { /* OP_F8E400 (); */ PC = cia; @@ -1891,6 +2245,9 @@ 8.0xfa+4.0xe,01,2.DN0+8.IMM16A+8.IMM16B:D2:::or "or" *mn10300 + +*am33 + { /* OP_FAE40000 (); */ PC = cia; @@ -1902,6 +2259,9 @@ 8.0xfc+4.0xe,01,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4:::or "or" *mn10300 + +*am33 + { /* OP_FCE40000 (); */ PC = cia; @@ -1913,6 +2273,9 @@ 8.0xfa+8.0xfd+8.IMM16A+8.IMM16B:D2a:::or "or" *mn10300 + +*am33 + { /* OP_FAFD0000 (); */ PC = cia; @@ -1924,6 +2287,9 @@ 8.0xf2+4.0x2,2.DM1,2.DN0:D0:::xor "xor" *mn10300 + +*am33 + { /* OP_F220 (); */ PC = cia; @@ -1935,6 +2301,9 @@ 8.0xfa+4.0xe,10,2.DN0+8.IMM16A+8.IMM16B:D2:::xor "xor" *mn10300 + +*am33 + { /* OP_FAE80000 (); */ PC = cia; @@ -1946,6 +2315,9 @@ 8.0xfc+4.0xe,10,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4:::xor "xor" *mn10300 + +*am33 + { /* OP_FCE80000 (); */ PC = cia; @@ -1957,6 +2329,9 @@ 8.0xf2+4.0x3,00,2.DN0:D0:::not "not" *mn10300 + +*am33 + { /* OP_F230 (); */ int n, z; @@ -1974,6 +2349,9 @@ 8.0xf8+4.0xe,11,2.DN0+8.IMM8:D1:::btst "btst" *mn10300 + +*am33 + { /* OP_F8EC00 (); */ PC = cia; @@ -1985,6 +2363,9 @@ 8.0xfa+4.0xe,11,2.DN0+8.IMM16A+8.IMM16B:D2:::btst "btst" *mn10300 + +*am33 + { /* OP_FAEC0000 (); */ PC = cia; @@ -1996,6 +2377,9 @@ 8.0xfc+4.0xe,11,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4:::btst "btst" *mn10300 + +*am33 + { /* OP_FCEC0000 (); */ PC = cia; @@ -2008,6 +2392,9 @@ 8.0xfe+8.0x02+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D+8.IMM8:D5:::btst "btst" *mn10300 + +*am33 + { /* OP_FE020000 (); */ PC = cia; @@ -2021,6 +2408,9 @@ 8.0xfa+4.0xf,10,2.AN0+8.D8+8.IMM8:D2a:::btst "btst" *mn10300 + +*am33 + { /* OP_FAF80000 (); */ PC = cia; @@ -2033,6 +2423,9 @@ 8.0xf0+4.8,2.DM1,2.AN0:D0:::bset "bset" *mn10300 + +*am33 + { /* OP_F080 (); */ unsigned long temp; @@ -2053,6 +2446,9 @@ 8.0xfe+8.0x00+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D+8.IMM8:D5:::bset "bset" *mn10300 + +*am33 + { /* OP_FE000000 (); */ unsigned long temp; @@ -2073,6 +2469,9 @@ 8.0xfa+4.0xf,00,2.AN0+8.D8+8.IMM8:D2:::bset "bset" *mn10300 + +*am33 + { /* OP_FAF00000 (); */ unsigned long temp; @@ -2092,6 +2491,9 @@ 8.0xf0+4.0x9,2.DM1,2.AN0:D0:::bclr "bclr" *mn10300 + +*am33 + { /* OP_F090 (); */ unsigned long temp; @@ -2112,6 +2514,9 @@ 8.0xfe+8.0x01+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D+8.IMM8:D5:::bclr "bclr" *mn10300 + +*am33 + { /* OP_FE010000 (); */ unsigned long temp; @@ -2132,6 +2537,9 @@ 8.0xfa+4.0xf,01,2.AN0+8.D8+8.IMM8:D2:::bclr "bclr" *mn10300 + +*am33 + { /* OP_FAF40000 (); */ unsigned long temp; @@ -2151,6 +2559,9 @@ 8.0xf2+4.0xb,2.DM1,2.DN0:D0:::asr "asr" *mn10300 + +*am33 + { /* OP_F2B0 (); */ long temp; @@ -2172,6 +2583,9 @@ 8.0xf8+4.0xc,10,2.DN0+8.IMM8:D1:::asr "asr" *mn10300 + +*am33 + { /* OP_F8C800 (); */ long temp; @@ -2193,6 +2607,9 @@ 8.0xf2+4.0xa,2.DM1,2.DN0:D0:::lsr "lsr" *mn10300 + +*am33 + { /* OP_F2A0 (); */ int z, n, c; @@ -2212,6 +2629,9 @@ 8.0xf8+4.0xc,01,2.DN0+8.IMM8:D1:::lsr "lsr" *mn10300 + +*am33 + { /* OP_F8C400 (); */ int z, n, c; @@ -2230,6 +2650,9 @@ 8.0xf2+4.0x9,2.DM1,2.DN0:D0:::asl "asl" *mn10300 + +*am33 + { /* OP_F290 (); */ int n, z; @@ -2248,6 +2671,9 @@ 8.0xf8+4.0xc,00,2.DN0+8.IMM8:D1:::asl "asl" *mn10300 + +*am33 + { /* OP_F8C000 (); */ int n, z; @@ -2265,6 +2691,9 @@ 4.0x5,01,2.DN0:S0:::asl2 "asl2" *mn10300 + +*am33 + { /* OP_54 (); */ int n, z; @@ -2282,6 +2711,9 @@ 8.0xf2+4.0x8,01,2.DN0:D0:::ror "ror" *mn10300 + +*am33 + { /* OP_F284 (); */ unsigned long value; @@ -2305,6 +2737,9 @@ 8.0xf2+4.0x8,00,2.DN0:D0:::rol "rol" *mn10300 + +*am33 + { /* OP_F280 (); */ unsigned long value; @@ -2328,6 +2763,9 @@ 8.0xc8+8.D8:S1:::beq "beq" *mn10300 + +*am33 + { /* OP_C800 (); */ PC = cia; @@ -2343,6 +2781,9 @@ 8.0xc9+8.D8:S1:::bne "bne" *mn10300 + +*am33 + { /* OP_C900 (); */ PC = cia; @@ -2358,6 +2799,9 @@ 8.0xc1+8.D8:S1:::bgt "bgt" *mn10300 + +*am33 + { /* OP_C100 (); */ PC = cia; @@ -2374,6 +2818,9 @@ 8.0xc2+8.D8:S1:::bge "bge" *mn10300 + +*am33 + { /* OP_C200 (); */ PC = cia; @@ -2389,6 +2836,9 @@ 8.0xc3+8.D8:S1:::ble "ble" *mn10300 + +*am33 + { /* OP_C300 (); */ PC = cia; @@ -2405,6 +2855,9 @@ 8.0xc0+8.D8:S1:::blt "blt" *mn10300 + +*am33 + { /* OP_C000 (); */ PC = cia; @@ -2420,6 +2873,9 @@ 8.0xc5+8.D8:S1:::bhi "bhi" *mn10300 + +*am33 + { /* OP_C500 (); */ PC = cia; @@ -2435,6 +2891,9 @@ 8.0xc6+8.D8:S1:::bcc "bcc" *mn10300 + +*am33 + { /* OP_C600 (); */ PC = cia; @@ -2450,6 +2909,9 @@ 8.0xc7+8.D8:S1:::bls "bls" *mn10300 + +*am33 + { /* OP_C700 (); */ PC = cia; @@ -2465,6 +2927,9 @@ 8.0xc4+8.D8:S1:::bcs "bcs" *mn10300 + +*am33 + { /* OP_C400 (); */ PC = cia; @@ -2480,6 +2945,9 @@ 8.0xf8+8.0xe8+8.D8:D1:::bvc "bvc" *mn10300 + +*am33 + { /* OP_F8E800 (); */ PC = cia; @@ -2495,6 +2963,9 @@ 8.0xf8+8.0xe9+8.D8:D1:::bvs "bvs" *mn10300 + +*am33 + { /* OP_F8E900 (); */ PC = cia; @@ -2510,6 +2981,9 @@ 8.0xf8+8.0xea+8.D8:D1:::bnc "bnc" *mn10300 + +*am33 + { /* OP_F8EA00 (); */ PC = cia; @@ -2525,6 +2999,9 @@ 8.0xf8+8.0xeb+8.D8:D1:::bns "bns" *mn10300 + +*am33 + { /* OP_F8EB00 (); */ PC = cia; @@ -2540,6 +3017,9 @@ 8.0xca+8.D8:S1:::bra "bra" *mn10300 + +*am33 + { /* OP_CA00 (); */ PC = cia; @@ -2552,6 +3032,9 @@ 8.0xd8:S0:::leq "leq" *mn10300 + +*am33 + { /* OP_D8 (); */ PC = cia; @@ -2567,6 +3050,9 @@ 8.0xd9:S0:::lne "lne" *mn10300 + +*am33 + { /* OP_D9 (); */ PC = cia; @@ -2582,6 +3068,9 @@ 8.0xd1:S0:::lgt "lgt" *mn10300 + +*am33 + { /* OP_D1 (); */ PC = cia; @@ -2598,6 +3087,9 @@ 8.0xd2:S0:::lge "lge" *mn10300 + +*am33 + { /* OP_D2 (); */ PC = cia; @@ -2613,6 +3105,9 @@ 8.0xd3:S0:::lle "lle" *mn10300 + +*am33 + { /* OP_D3 (); */ PC = cia; @@ -2629,6 +3124,9 @@ 8.0xd0:S0:::llt "llt" *mn10300 + +*am33 + { /* OP_D0 (); */ PC = cia; @@ -2644,6 +3142,9 @@ 8.0xd5:S0:::lhi "lhi" *mn10300 + +*am33 + { /* OP_D5 (); */ PC = cia; @@ -2659,6 +3160,9 @@ 8.0xd6:S0:::lcc "lcc" *mn10300 + +*am33 + { /* OP_D6 (); */ PC = cia; @@ -2674,6 +3178,9 @@ 8.0xd7:S0:::lls "lls" *mn10300 + +*am33 + { /* OP_D7 (); */ PC = cia; @@ -2689,6 +3196,9 @@ 8.0xd4:S0:::lcs "lcs" *mn10300 + +*am33 + { /* OP_D4 (); */ PC = cia; @@ -2704,6 +3214,9 @@ 8.0xda:S0:::lra "lra" *mn10300 + +*am33 + { /* OP_DA (); */ PC = cia; @@ -2716,6 +3229,9 @@ 8.0xdb:S0:::setlb "setlb" *mn10300 + +*am33 + { /* OP_DB (); */ PC = cia; @@ -2728,6 +3244,9 @@ 8.0xf0+4.0xf,01,2.AN0:D0:::jmp "jmp" *mn10300 + +*am33 + { /* OP_F0F4 (); */ PC = State.regs[REG_A0 + AN0]; @@ -2739,6 +3258,9 @@ 8.0xcc+8.D16A+8.D16B:S2:::jmp "jmp" *mn10300 + +*am33 + { /* OP_CC0000 (); */ PC = cia + EXTEND16(FETCH16(D16A, D16B)); @@ -2750,6 +3272,9 @@ 8.0xdc+8.D32A+8.D32B+8.D32C+8.D32D:S4:::jmp "jmp" *mn10300 + +*am33 + { /* OP_DC000000 (); */ PC = cia + FETCH32(D32A, D32B, D32C, D32D); @@ -2761,6 +3286,9 @@ 8.0xf0+4.0xf,00,2.AN0:D0:::calls "calls" *mn10300 + +*am33 + { /* OP_F0F0 (); */ unsigned int next_pc, sp; @@ -2779,6 +3307,9 @@ 8.0xfa+8.0xff+8.D16A+8.D16B:D2:::calls "calls" *mn10300 + +*am33 + { /* OP_FAFF0000 (); */ unsigned int next_pc, sp; @@ -2797,6 +3328,9 @@ 8.0xfc+8.0xff+8.D32A+8.D32B+8.D32C+8.D32D:D4:::calls "calls" *mn10300 + +*am33 + { /* OP_FCFF0000 (); */ unsigned int next_pc, sp; @@ -2815,6 +3349,9 @@ 8.0xf0+8.0xfc:D0:::rets "rets" *mn10300 + +*am33 + { /* OP_F0FC (); */ unsigned int sp; @@ -2829,6 +3366,9 @@ 8.0xf0+8.0xfd:D0:::rti "rti" *mn10300 + +*am33 + { /* OP_F0FD (); */ unsigned int sp; @@ -2845,6 +3385,9 @@ 8.0xf0+8.0xfe:D0:::trap "trap" *mn10300 + +*am33 + { /* OP_F0FE (); */ unsigned int sp, next_pc; @@ -2861,6 +3404,9 @@ 8.0xf0+8.0xff:D0:::rtm "rtm" *mn10300 + +*am33 + { /* OP_F0FF (); */ PC = cia; @@ -2872,6 +3418,9 @@ 8.0xcb:S0:::nop "nop" *mn10300 + +*am33 + { /* OP_CB (); */ PC = cia; @@ -2893,6 +3442,9 @@ 8.0xf6+4.0xf,2.DM1,2.DN0:D0:::getx "getx" *mn10300 + +*am33 + { /* OP_F6F0 (); */ int z, n; @@ -2911,6 +3463,9 @@ 8.0xf6+4.0x0,2.DM1,2.DN0:D0:::mulq "mulq" *mn10300 + +*am33 + { /* OP_F600 (); */ unsigned long long temp; @@ -2932,6 +3487,9 @@ 8.0xf9+4.0x,00,2.DN0+8.IMM8:D1:::mulq "mulq" *mn10300 + +*am33 + { /* OP_F90000 (); */ unsigned long long temp; @@ -2953,6 +3511,9 @@ 8.0xfb+4.0x0,00,2.DN0+8.IMM16A+8.IMM16B:D2:::mulq "mulq" *mn10300 + +*am33 + { /* OP_FB000000 (); */ unsigned long long temp; @@ -2974,6 +3535,9 @@ 8.0xfd+4.0x0,00,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4:::mulq "mulq" *mn10300 + +*am33 + { /* OP_FD000000 (); */ unsigned long long temp; @@ -2995,6 +3559,9 @@ 8.0xf6+4.0x1,2.DM1,2.DN0:D0:::mulqu "mulqu" *mn10300 + +*am33 + { /* OP_F610 (); */ unsigned long long temp; @@ -3016,6 +3583,9 @@ 8.0xf9+4.0x1,01,2.DN0+8.IMM8:D1:::mulqu "mulqu" *mn10300 + +*am33 + { /* OP_F91400 (); */ unsigned long long temp; @@ -3037,6 +3607,9 @@ 8.0xfb+4.0x1,01,2.DN0+8.IMM16A+8.IMM16B:D2:::mulqu "mulqu" *mn10300 + +*am33 + { /* OP_FB140000 (); */ unsigned long long temp; @@ -3058,6 +3631,9 @@ 8.0xfd+4.0x1,01,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4:::mulqu "mulqu" *mn10300 + +*am33 + { /* OP_FD140000 (); */ unsigned long long temp; @@ -3079,6 +3655,9 @@ 8.0xf6+4.0x4,2.DM1,2.DN0:D0:::sat16 "sat16" *mn10300 + +*am33 + { /* OP_F640 (); */ int temp; @@ -3095,6 +3674,9 @@ 8.0xf6+4.0x5,2.DM1,2.DN0:D0:::sat24 "sat24" *mn10300 + +*am33 + { /* OP_F650 (); */ int temp; @@ -3111,6 +3693,9 @@ 8.0xf6+4.0x7,2.DM1,2.DN0:D0:::bsch "bsch" *mn10300 + +*am33 + { /* OP_F670 (); */ int temp, c; @@ -3128,6 +3713,9 @@ 8.0xf0+8.0xc0:D0:::syscall "syscall" *mn10300 + +*am33 + { /* OP_F0C0 (); */ PC = cia; @@ -3139,6 +3727,9 @@ 8.0xff:S0:::break "break" *mn10300 + +*am33 + { /* OP_FF (); */ PC = cia; @@ -3149,6 +3740,9 @@ 8.0xce+8.REGS:S1:::movm "movm" *mn10300 + +*am33 + { /* OP_CE00 (); */ unsigned long sp = State.regs[REG_SP]; @@ -3200,6 +3794,38 @@ sp += 4; } + if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33) + { + if (mask & 0x1) + { + /* Need to restore MDQR, MCRH, MCRL, and MCVF */ + sp += 16; + State.regs[REG_E0 + 1] = load_word (sp); + sp += 4; + State.regs[REG_E0 + 0] = load_word (sp); + sp += 4; + } + + if (mask & 0x2) + { + State.regs[REG_E0 + 7] = load_word (sp); + sp += 4; + State.regs[REG_E0 + 6] = load_word (sp); + sp += 4; + State.regs[REG_E0 + 5] = load_word (sp); + sp += 4; + State.regs[REG_E0 + 4] = load_word (sp); + sp += 4; + } + + if (mask & 0x4) + { + State.regs[REG_E0 + 3] = load_word (sp); + sp += 4; + State.regs[REG_E0 + 2] = load_word (sp); + sp += 4; + } + } /* And make sure to update the stack pointer. */ State.regs[REG_SP] = sp; @@ -3210,6 +3836,9 @@ 8.0xcf+8.REGS:S1a:::movm "movm" *mn10300 + +*am33 + { /* OP_CF00 (); */ unsigned long sp = State.regs[REG_SP]; @@ -3218,6 +3847,38 @@ PC = cia; mask = REGS; + if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33) + { + if (mask & 0x4) + { + sp -= 4; + store_word (sp, State.regs[REG_E0 + 2]); + sp -= 4; + store_word (sp, State.regs[REG_E0 + 3]); + } + + if (mask & 0x2) + { + sp -= 4; + store_word (sp, State.regs[REG_E0 + 4]); + sp -= 4; + store_word (sp, State.regs[REG_E0 + 5]); + sp -= 4; + store_word (sp, State.regs[REG_E0 + 6]); + sp -= 4; + store_word (sp, State.regs[REG_E0 + 7]); + } + + if (mask & 0x1) + { + sp -= 4; + store_word (sp, State.regs[REG_E0 + 0]); + sp -= 4; + store_word (sp, State.regs[REG_E0 + 1]); + sp -= 16; + /* Need to save MDQR, MCRH, MCRL, and MCVF */ + } + } if (mask & 0x80) { @@ -3271,6 +3932,9 @@ 8.0xcd+8.D16A+8.D16B+8.REGS+8.IMM8:S4:::call "call" *mn10300 + +*am33 + { /* OP_CD000000 (); */ unsigned int next_pc, sp; @@ -3283,6 +3947,38 @@ mask = REGS; + if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33) + { + if (mask & 0x4) + { + sp -= 4; + store_word (sp, State.regs[REG_E0 + 2]); + sp -= 4; + store_word (sp, State.regs[REG_E0 + 3]); + } + + if (mask & 0x2) + { + sp -= 4; + store_word (sp, State.regs[REG_E0 + 4]); + sp -= 4; + store_word (sp, State.regs[REG_E0 + 5]); + sp -= 4; + store_word (sp, State.regs[REG_E0 + 6]); + sp -= 4; + store_word (sp, State.regs[REG_E0 + 7]); + } + + if (mask & 0x1) + { + sp -= 4; + store_word (sp, State.regs[REG_E0 + 0]); + sp -= 4; + store_word (sp, State.regs[REG_E0 + 1]); + sp -= 16; + /* Need to save MDQR, MCRH, MCRL, and MCVF */ + } + } if (mask & 0x80) { @@ -3342,6 +4038,9 @@ 8.0xdd+8.D32A+8.D32B+8.D32C+8.D32D+8.REGS+8.IMM8:S6:::call "call" *mn10300 + +*am33 + { /* OP_DD000000 (); */ unsigned int next_pc, sp; @@ -3355,6 +4054,38 @@ mask = REGS; + if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33) + { + if (mask & 0x4) + { + sp -= 4; + store_word (sp, State.regs[REG_E0 + 2]); + sp -= 4; + store_word (sp, State.regs[REG_E0 + 3]); + } + + if (mask & 0x2) + { + sp -= 4; + store_word (sp, State.regs[REG_E0 + 4]); + sp -= 4; + store_word (sp, State.regs[REG_E0 + 5]); + sp -= 4; + store_word (sp, State.regs[REG_E0 + 6]); + sp -= 4; + store_word (sp, State.regs[REG_E0 + 7]); + } + + if (mask & 0x1) + { + sp -= 4; + store_word (sp, State.regs[REG_E0 + 0]); + sp -= 4; + store_word (sp, State.regs[REG_E0 + 1]); + sp -= 16; + /* Need to save MDQR, MCRH, MCRL, and MCVF */ + } + } if (mask & 0x80) { @@ -3413,6 +4144,9 @@ 8.0xdf+8.REGS+8.IMM8:S2:::ret "ret" *mn10300 + +*am33 + { /* OP_DF0000 (); */ unsigned int sp, offset; @@ -3425,6 +4159,40 @@ offset = -4; mask = REGS; + if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33) + { + + if (mask & 0x4) + { + State.regs[REG_E0 + 2] = load_word (sp + offset); + offset -= 4; + State.regs[REG_E0 + 3] = load_word (sp + offset); + offset -= 4; + } + + if (mask & 0x2) + { + State.regs[REG_E0 + 4] = load_word (sp + offset); + offset -= 4; + State.regs[REG_E0 + 5] = load_word (sp + offset); + offset -= 4; + State.regs[REG_E0 + 6] = load_word (sp + offset); + offset -= 4; + State.regs[REG_E0 + 7] = load_word (sp + offset); + offset -= 4; + } + + if (mask & 0x1) + { + /* Need to restore MDQR, MCRH, MCRL, and MCVF */ + offset -= 16; + State.regs[REG_E0 + 0] = load_word (sp + offset); + offset -= 4; + State.regs[REG_E0 + 1] = load_word (sp + offset); + offset -= 4; + } + + } if (mask & 0x80) { @@ -3478,6 +4246,9 @@ 8.0xde+8.REGS+8.IMM8:S2:::retf "retf" *mn10300 + +*am33 + { /* OP_DE0000 (); */ unsigned int sp, offset; @@ -3491,6 +4262,40 @@ offset = -4; mask = REGS; + if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33) + { + + if (mask & 0x4) + { + State.regs[REG_E0 + 2] = load_word (sp + offset); + offset -= 4; + State.regs[REG_E0 + 3] = load_word (sp + offset); + offset -= 4; + } + + if (mask & 0x2) + { + State.regs[REG_E0 + 4] = load_word (sp + offset); + offset -= 4; + State.regs[REG_E0 + 5] = load_word (sp + offset); + offset -= 4; + State.regs[REG_E0 + 6] = load_word (sp + offset); + offset -= 4; + State.regs[REG_E0 + 7] = load_word (sp + offset); + offset -= 4; + } + + if (mask & 0x1) + { + /* Need to restore MDQR, MCRH, MCRL, and MCVF */ + offset -= 16; + State.regs[REG_E0 + 0] = load_word (sp + offset); + offset -= 4; + State.regs[REG_E0 + 1] = load_word (sp + offset); + offset -= 4; + } + + } if (mask & 0x80) { @@ -3536,3 +4341,6 @@ nia = PC; } + +:include::am33:am33.igen + diff --git a/sim/mn10300/mn10300_sim.h b/sim/mn10300/mn10300_sim.h index b794fd05419..0e419432ce8 100644 --- a/sim/mn10300/mn10300_sim.h +++ b/sim/mn10300/mn10300_sim.h @@ -115,6 +115,13 @@ extern struct simops Simops[]; #define REG_LIR 12 #define REG_LAR 13 #define REG_MDRQ 14 +#define REG_E0 15 +#define REG_SSP 23 +#define REG_MSP 24 +#define REG_USP 25 +#define REG_MCRH 26 +#define REG_MCRL 27 +#define REG_MCVF 28 #if WITH_COMMON /* These definitions conflict with similar macros in common. */ |