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authorAlan Modra <amodra@bigpond.net.au>2001-05-23 03:41:11 +0000
committerAlan Modra <amodra@bigpond.net.au>2001-05-23 03:41:11 +0000
commita5a2ee98ff90018d452d5ff39a422e9b374186ff (patch)
treeed322e9f72fc2bad4b55e15dc9966eac031ee866
parent0cd9cb55824acd7dbe38add9028a166329bfe89a (diff)
downloadgdb-a5a2ee98ff90018d452d5ff39a422e9b374186ff.tar.gz
Merge from mainline.
-rw-r--r--bfd/ChangeLog42
-rw-r--r--bfd/bfd-in2.h4
-rw-r--r--bfd/coff-i386.c13
-rw-r--r--bfd/cpu-arc.c11
-rw-r--r--bfd/ecoff.c38
-rw-r--r--bfd/elf32-arc.c28
-rw-r--r--bfd/elf32-hppa.c1
-rw-r--r--bfd/elf32-i386.c57
-rw-r--r--bfd/section.c18
-rw-r--r--opcodes/ChangeLog69
-rw-r--r--opcodes/arc-opc.c592
11 files changed, 503 insertions, 370 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index afec33559cd..8946131e489 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,45 @@
+2001-05-23 Alan Modra <amodra@one.net.au>
+
+ Merge from mainline.
+ 2001-05-17 Alan Modra <amodra@one.net.au>
+ * elf32-hppa.c (hppa_build_one_stub): Add an assert to check
+ plt.offset.
+
+ 2001-05-16 Alan Modra <amodra@one.net.au>
+ * section.c (asection): Add linker_has_input field.
+ (STD_SECTION): Adjust initialization to suit.
+ * ecoff.c (bfd_debug_section): Likewise.
+ * bfd-in2.h: Regenerate.
+
+ 2001-05-07 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+ * ecoff.c (bfd_debug_section): Fix initialization.
+
+ 2001-05-12 Peter Targett <peter.targett@arccores.com>
+ * cpu-arc.c (arch_info_struct): Add entry 'base' representing old
+ name for 'arc5' core versions.
+ (bfd_arc_arch): Make bfd_mach_arc_6 default.
+ * elf32-arc.c (arc_elf_object_p): Make E_ARC_MACH_ARC6 default
+ architecture.
+ (arc_elf_final_write_processing): Make bfd_mach_arc_6 default.
+
+ 2001-05-08 Ian Lance Taylor <ian@zembu.com>
+ * coff-i386.c (coff_i386_reloc): Don't dump core if output_bfd is
+ NULL or is not COFF.
+ (coff_i386_rtype_to_howto): Don't dump core if output section
+ owner is not COFF.
+
+ 2001-04-13 Roger Sayle <roger@metaphorics.com>
+ * coff-i386.c (TARGET_SYM): SEC_READONLY is an applicable section
+ flag on pe-i386 targets.
+
+ 2001-04-26 H.J. Lu <hjl@gnu.org>
+ * elf32-i386.c (elf_i386_check_relocs): Verify if r_symndx is
+ valid.
+
+ 2001-04-05 David Mosberger <davidm@hpl.hp.com>
+ * elf32-i386.c (elf_i386_fake_sections): Treat ".reloc" as an
+ ordinary "progbits" section.
+
2001-05-04 Richard Henderson <rth@redhat.com>
* elf64-alpha.c (SREL16, SREL32, SREL64): Set pcrel_offset true.
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index b8e864b2eed..9a666b64f65 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -1114,6 +1114,10 @@ typedef struct sec
/* A mark flag used by some of the linker backends. */
unsigned int linker_mark : 1;
+ /* Another mark flag used by some of the linker backends. Set for
+ output sections that have a input section. */
+ unsigned int linker_has_input : 1;
+
/* A mark flag used by some linker backends for garbage collection. */
unsigned int gc_mark : 1;
diff --git a/bfd/coff-i386.c b/bfd/coff-i386.c
index 83d67c4a875..7d4ab5ae398 100644
--- a/bfd/coff-i386.c
+++ b/bfd/coff-i386.c
@@ -1,5 +1,6 @@
/* BFD back-end for Intel 386 COFF files.
- Copyright 1990, 91, 92, 93, 94, 95, 96, 97, 98, 99, 2000
+ Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+ 2000, 2001
Free Software Foundation, Inc.
Written by Cygnus Support.
@@ -128,7 +129,9 @@ coff_i386_reloc (abfd, reloc_entry, symbol, data, input_section, output_bfd,
#ifdef COFF_WITH_PE
/* FIXME: How should this case be handled? */
- if (reloc_entry->howto->type == R_IMAGEBASE)
+ if (reloc_entry->howto->type == R_IMAGEBASE
+ && output_bfd != NULL
+ && bfd_get_flavour(output_bfd) == bfd_target_coff_flavour)
diff -= pe_data (output_bfd)->pe_opthdr.ImageBase;
#endif
@@ -488,7 +491,9 @@ coff_i386_rtype_to_howto (abfd, sec, rel, h, sym, addendp)
*addendp -= sym->n_value;
}
- if (rel->r_type == R_IMAGEBASE)
+ if (rel->r_type == R_IMAGEBASE
+ && (bfd_get_flavour(sec->output_section->owner)
+ == bfd_target_coff_flavour))
{
*addendp -= pe_data(sec->output_section->owner)->pe_opthdr.ImageBase;
}
@@ -575,7 +580,7 @@ const bfd_target
(SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC /* section flags */
#ifdef COFF_WITH_PE
- | SEC_LINK_ONCE | SEC_LINK_DUPLICATES
+ | SEC_LINK_ONCE | SEC_LINK_DUPLICATES | SEC_READONLY
#endif
| SEC_CODE | SEC_DATA),
diff --git a/bfd/cpu-arc.c b/bfd/cpu-arc.c
index dbd7fb1bae5..2904ae32d52 100644
--- a/bfd/cpu-arc.c
+++ b/bfd/cpu-arc.c
@@ -1,5 +1,5 @@
/* BFD support for the ARC processor
- Copyright 1994, 1995, 1997 Free Software Foundation, Inc.
+ Copyright 1994, 1995, 1997, 2001 Free Software Foundation, Inc.
Contributed by Doug Evans (dje@cygnus.com).
This file is part of BFD, the Binary File Descriptor library.
@@ -33,7 +33,7 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
print_name, \
4, /* section alignment power */ \
default_p, \
- bfd_default_compatible, \
+ bfd_default_compatible, \
bfd_default_scan, \
next, \
}
@@ -41,13 +41,14 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
static const bfd_arch_info_type arch_info_struct[] =
{
ARC ( bfd_mach_arc_5, "arc5", false, &arch_info_struct[1] ),
- ARC ( bfd_mach_arc_6, "arc6", false, &arch_info_struct[2] ),
- ARC ( bfd_mach_arc_7, "arc7", false, &arch_info_struct[3] ),
+ ARC ( bfd_mach_arc_5, "base", false, &arch_info_struct[2] ),
+ ARC ( bfd_mach_arc_6, "arc6", false, &arch_info_struct[3] ),
+ ARC ( bfd_mach_arc_7, "arc7", false, &arch_info_struct[4] ),
ARC ( bfd_mach_arc_8, "arc8", false, NULL ),
};
const bfd_arch_info_type bfd_arc_arch =
- ARC ( bfd_mach_arc_5, "arc", true, &arch_info_struct[0] );
+ ARC ( bfd_mach_arc_6, "arc", true, &arch_info_struct[0] );
/* Utility routines. */
diff --git a/bfd/ecoff.c b/bfd/ecoff.c
index f22112bd75b..db606387e90 100644
--- a/bfd/ecoff.c
+++ b/bfd/ecoff.c
@@ -1,5 +1,5 @@
/* Generic ECOFF (Extended-COFF) routines.
- Copyright 1990, 91, 92, 93, 94, 95, 96, 97, 98, 99, 2000
+ Copyright 1990, 1991, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001
Free Software Foundation, Inc.
Original version by Per Bothner.
Full support added by Ian Lance Taylor, ian@cygnus.com.
@@ -74,20 +74,28 @@ static unsigned int ecoff_armap_hash PARAMS ((CONST char *s,
static asection bfd_debug_section =
{
- /* name, index, next, flags, set_vma, reloc_done, linker_mark, gc_mark */
- "*DEBUG*", 0, 0, 0, 0, 0, 0, 0,
- /* vma, lma, _cooked_size, _raw_size, output_offset, output_section, */
- 0, 0, 0, 0, 0, NULL,
- /* alig, reloc..., orel..., reloc_count, filepos, rel_..., line_... */
- 0, 0, 0, 0, 0, 0, 0,
- /* userdata, contents, lineno, lineno_count */
- 0, 0, 0, 0,
- /* comdat_info, moving_line_filepos, target_index, used_by_bfd, */
- NULL, 0, 0, 0,
- /* cons, owner, symbol */
- 0, 0, (struct symbol_cache_entry *) NULL,
- /* symbol_ptr_ptr, link_order_head, ..._tail */
- (struct symbol_cache_entry **) NULL, NULL, NULL
+ /* name, id, index, next, flags, user_set_vma, reloc_done, */
+ "*DEBUG*", 0, 0, NULL, 0, 0, 0,
+ /* linker_mark, linker_has_input, gc_mark, segment_mark, */
+ 0, 0, 0, 0,
+ /* vma, lma, _cooked_size, _raw_size, */
+ 0, 0, 0, 0,
+ /* output_offset, output_section, alignment_power, */
+ 0, NULL, 0,
+ /* relocation, orelocation, reloc_count, filepos, rel_filepos, */
+ NULL, NULL, 0, 0, 0,
+ /* line_filepos, userdata, contents, lineno, lineno_count, */
+ 0, NULL, NULL, NULL, 0,
+ /* comdat, kept_section, moving_line_filepos, */
+ NULL, NULL, 0,
+ /* target_index, used_by_bfd, constructor_chain, owner, */
+ 0, NULL, NULL, NULL,
+ /* symbol, */
+ (struct symbol_cache_entry *) NULL,
+ /* symbol_ptr_ptr, */
+ (struct symbol_cache_entry **) NULL,
+ /* link_order_head, link_order_tail */
+ NULL, NULL
};
/* Create an ECOFF object. */
diff --git a/bfd/elf32-arc.c b/bfd/elf32-arc.c
index 254b346362f..82b610435fa 100644
--- a/bfd/elf32-arc.c
+++ b/bfd/elf32-arc.c
@@ -1,5 +1,5 @@
/* ARC-specific support for 32-bit ELF
- Copyright (C) 1994, 1995, 1997, 1999, 2000 Free Software Foundation, Inc.
+ Copyright 1994, 1995, 1997, 1999, 2001 Free Software Foundation, Inc.
Contributed by Doug Evans (dje@cygnus.com).
This file is part of BFD, the Binary File Descriptor library.
@@ -57,18 +57,18 @@ static reloc_howto_type elf_arc_howto_table[] =
/* A standard 32 bit relocation. */
HOWTO (R_ARC_32, /* type */
- 0, /* rightshift */
- 2, /* size (0 = byte, 1 = short, 2 = long) */
- 32, /* bitsize */
- false, /* pc_relative */
- 0, /* bitpos */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
- bfd_elf_generic_reloc, /* special_function */
+ bfd_elf_generic_reloc, /* special_function */
"R_ARC_32", /* name */
- false, /* partial_inplace */
- 0xffffffff, /* src_mask */
- 0xffffffff, /* dst_mask */
- false), /* pcrel_offset */
+ false, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ false), /* pcrel_offset */
/* A 26 bit absolute branch, right shifted by 2. */
HOWTO (R_ARC_B26, /* type */
@@ -155,7 +155,7 @@ static boolean
arc_elf_object_p (abfd)
bfd *abfd;
{
- int mach = bfd_mach_arc_5;
+ int mach = bfd_mach_arc_6;
if (elf_elfheader(abfd)->e_machine == EM_ARC)
{
@@ -163,10 +163,10 @@ arc_elf_object_p (abfd)
switch (arch)
{
- default:
case E_ARC_MACH_ARC5:
mach = bfd_mach_arc_5;
break;
+ default:
case E_ARC_MACH_ARC6:
mach = bfd_mach_arc_6;
break;
@@ -193,10 +193,10 @@ arc_elf_final_write_processing (abfd, linker)
switch (bfd_get_mach (abfd))
{
- default:
case bfd_mach_arc_5:
val = E_ARC_MACH_ARC5;
break;
+ default:
case bfd_mach_arc_6:
val = E_ARC_MACH_ARC6;
break;
diff --git a/bfd/elf32-hppa.c b/bfd/elf32-hppa.c
index fdcb3b4ff7e..e46ac4ac0f5 100644
--- a/bfd/elf32-hppa.c
+++ b/bfd/elf32-hppa.c
@@ -938,6 +938,7 @@ hppa_build_one_stub (gen_entry, in_arg)
case hppa_stub_import:
case hppa_stub_import_shared:
+ BFD_ASSERT (stub_entry->h->elf.plt.offset < (bfd_vma) -2);
sym_value = (stub_entry->h->elf.plt.offset
+ hplink->splt->output_offset
+ hplink->splt->output_section->vma
diff --git a/bfd/elf32-i386.c b/bfd/elf32-i386.c
index 4ad2c2be6aa..f4e1e500c32 100644
--- a/bfd/elf32-i386.c
+++ b/bfd/elf32-i386.c
@@ -1,5 +1,5 @@
/* Intel 80386/80486-specific support for 32-bit ELF
- Copyright 1993, 94, 95, 96, 97, 98, 99, 2000
+ Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001
Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -501,6 +501,20 @@ elf_i386_check_relocs (abfd, info, sec, relocs)
r_symndx = ELF32_R_SYM (rel->r_info);
+ if (r_symndx >= symtab_hdr->sh_size / symtab_hdr->sh_entsize)
+ {
+ if (abfd->my_archive)
+ (*_bfd_error_handler) (_("%s(%s): bad symbol index: %d"),
+ bfd_get_filename (abfd->my_archive),
+ bfd_get_filename (abfd),
+ r_symndx);
+ else
+ (*_bfd_error_handler) (_("%s: bad symbol index: %d"),
+ bfd_get_filename (abfd),
+ r_symndx);
+ return false;
+ }
+
if (r_symndx < symtab_hdr->sh_info)
h = NULL;
else
@@ -686,7 +700,7 @@ elf_i386_check_relocs (abfd, info, sec, relocs)
(*_bfd_error_handler) (_("%s: bad relocation section name `%s\'"),
bfd_get_filename (abfd),
name);
- }
+ }
sreloc = bfd_get_section_by_name (dynobj, name);
if (sreloc == NULL)
@@ -2066,6 +2080,44 @@ elf_i386_finish_dynamic_sections (output_bfd, info)
return true;
}
+/* Set the correct type for an x86 ELF section. We do this by the
+ section name, which is a hack, but ought to work. */
+
+static boolean
+elf_i386_fake_sections (abfd, hdr, sec)
+ bfd *abfd ATTRIBUTE_UNUSED;
+ Elf32_Internal_Shdr *hdr;
+ asection *sec;
+{
+ register const char *name;
+
+ name = bfd_get_section_name (abfd, sec);
+
+ if (strcmp (name, ".reloc") == 0)
+ /*
+ * This is an ugly, but unfortunately necessary hack that is
+ * needed when producing EFI binaries on x86. It tells
+ * elf.c:elf_fake_sections() not to consider ".reloc" as a section
+ * containing ELF relocation info. We need this hack in order to
+ * be able to generate ELF binaries that can be translated into
+ * EFI applications (which are essentially COFF objects). Those
+ * files contain a COFF ".reloc" section inside an ELFNN object,
+ * which would normally cause BFD to segfault because it would
+ * attempt to interpret this section as containing relocation
+ * entries for section "oc". With this hack enabled, ".reloc"
+ * will be treated as a normal data section, which will avoid the
+ * segfault. However, you won't be able to create an ELFNN binary
+ * with a section named "oc" that needs relocations, but that's
+ * the kind of ugly side-effects you get when detecting section
+ * types based on their names... In practice, this limitation is
+ * unlikely to bite.
+ */
+ hdr->sh_type = SHT_PROGBITS;
+
+ return true;
+}
+
+
#define TARGET_LITTLE_SYM bfd_elf32_i386_vec
#define TARGET_LITTLE_NAME "elf32-i386"
#define ELF_ARCH bfd_arch_i386
@@ -2096,5 +2148,6 @@ elf_i386_finish_dynamic_sections (output_bfd, info)
#define elf_backend_gc_sweep_hook elf_i386_gc_sweep_hook
#define elf_backend_relocate_section elf_i386_relocate_section
#define elf_backend_size_dynamic_sections elf_i386_size_dynamic_sections
+#define elf_backend_fake_sections elf_i386_fake_sections
#include "elf32-target.h"
diff --git a/bfd/section.c b/bfd/section.c
index 13e10d30f67..71077c90453 100644
--- a/bfd/section.c
+++ b/bfd/section.c
@@ -1,5 +1,6 @@
/* Object file "section" support for the BFD library.
- Copyright (C) 1990, 91, 92, 93, 94, 95, 96, 97, 98, 99, 2000
+ Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+ 2000, 2001
Free Software Foundation, Inc.
Written by Cygnus Support.
@@ -362,6 +363,10 @@ CODE_FRAGMENT
. {* A mark flag used by some of the linker backends. *}
. unsigned int linker_mark : 1;
.
+. {* Another mark flag used by some of the linker backends. Set for
+. output sections that have a input section. *}
+. unsigned int linker_has_input : 1;
+.
. {* A mark flag used by some linker backends for garbage collection. *}
. unsigned int gc_mark : 1;
.
@@ -564,11 +569,14 @@ static const asymbol global_syms[] =
/* name, id, index, next, flags, user_set_vma, reloc_done, */ \
{ NAME, IDX, 0, NULL, FLAGS, 0, 0, \
\
- /* linker_mark, gc_mark, segment_mark, vma, lma, _cooked_size, */ \
- 0, 1, 0, 0, 0, 0, \
+ /* linker_mark, linker_has_input, gc_mark, segment_mark, */ \
+ 0, 0, 1, 0, \
+ \
+ /* vma, lma, _cooked_size, _raw_size, */ \
+ 0, 0, 0, 0, \
\
- /* _raw_size, output_offset, output_section, alignment_power, */ \
- 0, 0, (struct sec *) &SEC, 0, \
+ /* output_offset, output_section, alignment_power, */ \
+ 0, (struct sec *) &SEC, 0, \
\
/* relocation, orelocation, reloc_count, filepos, rel_filepos, */ \
NULL, NULL, 0, 0, 0, \
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 83fb7d67e4d..86c21be3e05 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,12 @@
+2001-05-23 Alan Modra <amodra@one.net.au>
+
+ * arc-opc.c: Whitespace changes.
+
+ Merge from mainline
+ 2001-05-12 Peter Targett <peter.targett@arccores.com>
+ * arc-opc.c (arc_reg_names): Correct attribute for lp_count
+ register to r/w. Formatting fixes throughout file.
+
2001-05-12 Alan Modra <amodra@one.net.au>
* i386-dis.c (prefix_user_table): Correct movq2dq, movdq2q, and
@@ -227,7 +236,7 @@ Sat Jan 13 01:48:24 MET 2001 Jan Hubicka <jh@suse.cz>
* ia64-dis.c (print_insn_ia64): Cast away const on ia64_free_opcode
argument.
- * ia64_gen.c (insert_deplist): Cast sizeof result to int.
+ * ia64-gen.c (insert_deplist): Cast sizeof result to int.
(print_dependency_table): Print NULL if semantics field not set.
(insert_opcode_dependencies): Mark cmp parameter as unused.
(print_main_table): Use fprintf_vma to print long long fields.
@@ -273,7 +282,7 @@ Sat Jan 13 01:48:24 MET 2001 Jan Hubicka <jh@suse.cz>
Delete "sel" code operands from mfc1 and mtc1.
Add MIPS64 opcode changes (dclo, dclz), and "sel" code variants
for dm[ft]c[023].
-
+
2000-12-03 Ed Satterthwaite ehs@sibyte.com and
Chris Demetriou cgd@sibyte.com
@@ -300,7 +309,7 @@ Sat Jan 13 01:48:24 MET 2001 Jan Hubicka <jh@suse.cz>
"mfc2," "mfc3," "mtc1," "mtc2," and "mtc3" for MIPS32. Update
MIPS32 "sdbbp" to use 'B' operand specifier. Add MIPS32
"wait" variant which uses 'J' operand specifier.
-
+
* mips-dis.c (set_mips_isa_type): Update to use
CPU_UNKNOWN and ISA_* constants. Add bfd_mach_mips32 case.
Replace bfd_mach_mips4K with bfd_mach_mips32_4k case.
@@ -356,7 +365,7 @@ Sat Jan 13 01:48:24 MET 2001 Jan Hubicka <jh@suse.cz>
* sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs.
(compute_arch_mask): Add v8plusb and v9b machines.
(print_insn_sparc): siam mode decoding, accept ASRs up to 25.
- * opcodes/sparc-opc.c: Support for Cheetah instruction set.
+ * sparc-opc.c: Support for Cheetah instruction set.
(prefetch_table): Add #invalidate.
2000-10-16 Nick Clifton <nickc@redhat.com>
@@ -373,7 +382,7 @@ Sat Jan 13 01:48:24 MET 2001 Jan Hubicka <jh@suse.cz>
* ia64-ic.tbl: Update from Intel.
* ia64-asmtab.c: Regenerate.
-
+
2000-10-04 Kazu Hirata <kazu@hxi.com>
* ia64-gen.c: Convert C++-style comments to C-style comments.
@@ -406,28 +415,28 @@ Sat Jan 13 01:48:24 MET 2001 Jan Hubicka <jh@suse.cz>
* ia64-asmtab.c: Regnerate.
2000-09-13 Anders Norlander <anorland@acc.umu.se>
-
- * mips-opc.c (mips_builtin_opcodes): Support cache instruction on 4K cores.
- Add mfc0 and mtc0 with sub-selection values.
+
+ * mips-opc.c (mips_builtin_opcodes): Support cache instruction on 4K cores.
+ Add mfc0 and mtc0 with sub-selection values.
Add clo and clz opcodes.
- Add msub and msubu instructions for MIPS32.
- Add madd/maddu aliases for mad/madu for MIPS32.
- Support wait, deret, eret, movn, pref for MIPS32.
+ Add msub and msubu instructions for MIPS32.
+ Add madd/maddu aliases for mad/madu for MIPS32.
+ Support wait, deret, eret, movn, pref for MIPS32.
Support tlbp, tlbr, tlbwi, tlbwr.
- (P4): New define.
-
- * mips-dis.c (print_insn_arg): Print sdbbp 'm' args.
- (print_insn_arg): Handle 'H' args.
- (set_mips_isa_type): Recognize 4K.
+ (P4): New define.
+
+ * mips-dis.c (print_insn_arg): Print sdbbp 'm' args.
+ (print_insn_arg): Handle 'H' args.
+ (set_mips_isa_type): Recognize 4K.
Use CPU_* defines instead of hardcoded numbers.
2000-09-11 Catherine Moore <clm@redhat.com>
* d30v-opc.c (d30v_operand_t): New operand type Rb2.
(d30v_format_tab): Use Rb2 for modinc and moddec.
-
+
2000-09-07 Catherine Moore <clm@redhat.com>
-
+
* d30v-opc.c (d30v_format_tab): Use format Ra for
modinc and moddec.
@@ -439,7 +448,7 @@ Sat Jan 13 01:48:24 MET 2001 Jan Hubicka <jh@suse.cz>
* configure: Regenerate.
* po/opcodes.pot: Regenerate.
-
+
2000-08-31 Alexandre Oliva <aoliva@redhat.com>
* acinclude.m4: Include libtool and gettext macros from the
@@ -480,14 +489,14 @@ Sat Jan 13 01:48:24 MET 2001 Jan Hubicka <jh@suse.cz>
in the buffer.
* fr30-asm.c: Regenerated.
* fr30-desc.c: Regenerated.
- * fr30-desc.h Regenerated.
+ * fr30-desc.h: Regenerated.
* fr30-dis.c: Regenerated.
* fr30-ibld.c: Regenerated.
* fr30-opc.c: Regenerated.
- * fr30-opc.h Regenerated.
+ * fr30-opc.h: Regenerated.
* m32r-asm.c: Regenerated.
* m32r-desc.c: Regenerated.
- * m32r-desc.h Regenerated.
+ * m32r-desc.h: Regenerated.
* m32r-dis.c: Regenerated.
* m32r-ibld.c: Regenerated.
* m32r-opc.c: Regenerated.
@@ -538,7 +547,7 @@ Sat Jan 13 01:48:24 MET 2001 Jan Hubicka <jh@suse.cz>
* cgen.sh: Likewise.
2000-08-02 Jim Wilson <wilson@redhat.com>
-
+
* ia64-dis.c (print_insn_ia64): Call ia64_free_opcode at end.
2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
@@ -674,13 +683,13 @@ Sat Jan 13 01:48:24 MET 2001 Jan Hubicka <jh@suse.cz>
2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
* Makefile.in, configure: regenerate
- * disassemble.c (disassembler): Recognize ARCH_m68hc12,
+ * disassemble.c (disassembler): Recognize ARCH_m68hc12,
ARCH_m68hc11.
- * m68hc11-dis.c (read_memory, print_insn, print_insn_m68hc12):
+ * m68hc11-dis.c (read_memory, print_insn, print_insn_m68hc12):
New functions.
* configure.in: Recognize m68hc12 and m68hc11.
* m68hc11-dis.c, m68hc11-opc.c: New files for support of m68hc1x
- * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
+ * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
and opcode generation for m68hc11 and m68hc12.
2000-06-16 Nick Duffek <nsd@redhat.com>
@@ -770,7 +779,7 @@ Sat Jan 13 01:48:24 MET 2001 Jan Hubicka <jh@suse.cz>
2000-05-11 Thomas de Lellis <tdel@windriver.com>
- * arm-opc.c: Disassembly of thumb ldsb/ldsh
+ * arm-opc.h: Disassembly of thumb ldsb/ldsh
instructions changed to ldrsb/ldrsh.
2000-05-11 Ulf Carlsson <ulfc@engr.sgi.com>
@@ -879,7 +888,7 @@ Sat Jan 13 01:48:24 MET 2001 Jan Hubicka <jh@suse.cz>
* ia64-asmtab.c, ia64-asmtab.h, ia64-dis.c, ia64-gen.c ia64-ic.tbl,
ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c ia64-opc-f.c, ia64-opc-i.c,
ia64-opc-m.c, ia64-opc-x.c, ia64-opc.c, ia64-opc.h, ia64-raw.tbl,
- ia64-war.tbl, ia64-waw.tbl): New files.
+ ia64-war.tbl, ia64-waw.tbl: New files.
2000-04-20 Alexandre Oliva <aoliva@redhat.com>
@@ -914,7 +923,7 @@ Sat Jan 13 01:48:24 MET 2001 Jan Hubicka <jh@suse.cz>
2000-04-05 J"orn Rennecke <amylaar@redhat.com>
- * sh-opc.c (sh_table): Use A_DISP_PC / PCRELIMM_8BY2 for ldre & ldrs.
+ * sh-opc.h (sh_table): Use A_DISP_PC / PCRELIMM_8BY2 for ldre & ldrs.
stc GBR,@-<REG_N> is available for arch_sh1_up.
Group parallel processing insn with identical mnemonics together.
Make three-operand psha / pshl come first.
@@ -1033,7 +1042,7 @@ Sat Jan 13 01:48:24 MET 2001 Jan Hubicka <jh@suse.cz>
2000-02-23 Andrew Haley <aph@redhat.com>
* m32r-asm.c, m32r-desc.c, m32r-desc.h, m32r-dis.c,
- m32r-ibld.c,m32r-opc.h: Rebuild.
+ m32r-ibld.c, m32r-opc.h: Rebuild.
2000-02-23 Linas Vepstas <linas@linas.org>
diff --git a/opcodes/arc-opc.c b/opcodes/arc-opc.c
index 12ee62a263b..c67cd8881a6 100644
--- a/opcodes/arc-opc.c
+++ b/opcodes/arc-opc.c
@@ -1,7 +1,8 @@
/* Opcode table for the ARC.
- Copyright 1994, 1995, 1997, 1998, 2000 Free Software Foundation, Inc.
+ Copyright 1994, 1995, 1997, 1998, 2000, 2001
+ Free Software Foundation, Inc.
Contributed by Doug Evans (dje@cygnus.com).
-
+
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
@@ -381,7 +382,7 @@ const struct arc_operand_value arc_reg_names[] =
{ "r59", 59, REG, 0 },
/* Loop count register (24 bits). */
- { "lp_count", 60, REG, ARC_REGISTER_READONLY },
+ { "lp_count", 60, REG, 0 },
/* Short immediate data indicator setting flags. */
{ "r61", 61, REG, ARC_REGISTER_READONLY },
/* Long immediate data indicator setting flags. */
@@ -653,7 +654,7 @@ arc_opcode_init_insert ()
int
arc_opcode_limm_p (limmp)
- long *limmp;
+ long *limmp;
{
if (limmp)
*limmp = limm;
@@ -667,12 +668,12 @@ arc_opcode_limm_p (limmp)
static arc_insn
insert_reg (insn, operand, mods, reg, value, errmsg)
- arc_insn insn;
- const struct arc_operand *operand;
- int mods;
- const struct arc_operand_value *reg;
- long value;
- const char **errmsg;
+ arc_insn insn;
+ const struct arc_operand *operand;
+ int mods;
+ const struct arc_operand_value *reg;
+ long value;
+ const char **errmsg;
{
static char buf[100];
enum operand op_type = OP_NONE;
@@ -693,21 +694,21 @@ insert_reg (insn, operand, mods, reg, value, errmsg)
{
int marker;
- op_type = OP_SHIMM;
- /* forget about shimm as dest mlm. */
+ op_type = OP_SHIMM;
+ /* forget about shimm as dest mlm. */
- if('a' != operand->fmt)
+ if ('a' != operand->fmt)
{
shimm_p = 1;
shimm = value;
flagshimm_handled_p = 1;
marker = flag_p ? ARC_REG_SHIMM_UPDATE : ARC_REG_SHIMM;
}
- else
- {
+ else
+ {
/* don't request flag setting on shimm as dest. */
marker = ARC_REG_SHIMM;
- }
+ }
insn |= marker << operand->shift;
/* insn |= value & 511; - done later. */
}
@@ -735,33 +736,33 @@ insert_reg (insn, operand, mods, reg, value, errmsg)
*errmsg = "auxiliary register not allowed here";
else
{
- if((insn & I(-1)) == I(2)) /* check for use validity. */
- {
- if(reg->flags & ARC_REGISTER_READONLY)
- *errmsg = "attempt to set readonly register";
- }
- else
- {
- if(reg->flags & ARC_REGISTER_WRITEONLY)
- *errmsg = "attempt to read writeonly register";
- }
+ if ((insn & I(-1)) == I(2)) /* check for use validity. */
+ {
+ if (reg->flags & ARC_REGISTER_READONLY)
+ *errmsg = "attempt to set readonly register";
+ }
+ else
+ {
+ if (reg->flags & ARC_REGISTER_WRITEONLY)
+ *errmsg = "attempt to read writeonly register";
+ }
insn |= ARC_REG_SHIMM << operand->shift;
insn |= reg->value << arc_operands[reg->type].shift;
}
}
else
{
- /* check for use validity. */
- if('a' == operand->fmt || ((insn & I(-1)) < I(2)))
- {
- if(reg->flags & ARC_REGISTER_READONLY)
+ /* check for use validity. */
+ if ('a' == operand->fmt || ((insn & I(-1)) < I(2)))
+ {
+ if (reg->flags & ARC_REGISTER_READONLY)
*errmsg = "attempt to set readonly register";
- }
- if('a' != operand->fmt)
- {
- if(reg->flags & ARC_REGISTER_WRITEONLY)
+ }
+ if ('a' != operand->fmt)
+ {
+ if (reg->flags & ARC_REGISTER_WRITEONLY)
*errmsg = "attempt to read writeonly register";
- }
+ }
/* We should never get an invalid register number here. */
if ((unsigned int) reg->value > 60)
{
@@ -769,23 +770,23 @@ insert_reg (insn, operand, mods, reg, value, errmsg)
*errmsg = buf;
}
insn |= reg->value << operand->shift;
- op_type = OP_REG;
+ op_type = OP_REG;
}
}
switch (operand->fmt)
{
case 'a':
- ls_operand[LS_DEST] = op_type;
+ ls_operand[LS_DEST] = op_type;
break;
case 's':
- ls_operand[LS_BASE] = op_type;
+ ls_operand[LS_BASE] = op_type;
break;
case 'c':
if ((insn & I(-1)) == I(2))
- ls_operand[LS_VALUE] = op_type;
+ ls_operand[LS_VALUE] = op_type;
else
- ls_operand[LS_OFFSET] = op_type;
+ ls_operand[LS_OFFSET] = op_type;
break;
case 'o': case 'O':
ls_operand[LS_OFFSET] = op_type;
@@ -799,12 +800,12 @@ insert_reg (insn, operand, mods, reg, value, errmsg)
static arc_insn
insert_flag (insn, operand, mods, reg, value, errmsg)
- arc_insn insn;
- const struct arc_operand *operand ATTRIBUTE_UNUSED;
- int mods ATTRIBUTE_UNUSED;
- const struct arc_operand_value *reg ATTRIBUTE_UNUSED;
- long value ATTRIBUTE_UNUSED;
- const char **errmsg ATTRIBUTE_UNUSED;
+ arc_insn insn;
+ const struct arc_operand *operand ATTRIBUTE_UNUSED;
+ int mods ATTRIBUTE_UNUSED;
+ const struct arc_operand_value *reg ATTRIBUTE_UNUSED;
+ long value ATTRIBUTE_UNUSED;
+ const char **errmsg ATTRIBUTE_UNUSED;
{
/* We can't store anything in the insn until we've parsed the registers.
Just record the fact that we've got this flag. `insert_reg' will use it
@@ -817,12 +818,12 @@ insert_flag (insn, operand, mods, reg, value, errmsg)
static arc_insn
insert_nullify (insn, operand, mods, reg, value, errmsg)
- arc_insn insn;
- const struct arc_operand *operand;
- int mods ATTRIBUTE_UNUSED;
- const struct arc_operand_value *reg ATTRIBUTE_UNUSED;
- long value;
- const char **errmsg ATTRIBUTE_UNUSED;
+ arc_insn insn;
+ const struct arc_operand *operand;
+ int mods ATTRIBUTE_UNUSED;
+ const struct arc_operand_value *reg ATTRIBUTE_UNUSED;
+ long value;
+ const char **errmsg ATTRIBUTE_UNUSED;
{
nullify_p = 1;
insn |= (value & ((1 << operand->bits) - 1)) << operand->shift;
@@ -836,12 +837,12 @@ insert_nullify (insn, operand, mods, reg, value, errmsg)
static arc_insn
insert_flagfinish (insn, operand, mods, reg, value, errmsg)
- arc_insn insn;
- const struct arc_operand *operand;
- int mods ATTRIBUTE_UNUSED;
- const struct arc_operand_value *reg ATTRIBUTE_UNUSED;
- long value ATTRIBUTE_UNUSED;
- const char **errmsg ATTRIBUTE_UNUSED;
+ arc_insn insn;
+ const struct arc_operand *operand;
+ int mods ATTRIBUTE_UNUSED;
+ const struct arc_operand_value *reg ATTRIBUTE_UNUSED;
+ long value ATTRIBUTE_UNUSED;
+ const char **errmsg ATTRIBUTE_UNUSED;
{
if (flag_p && !flagshimm_handled_p)
{
@@ -857,12 +858,12 @@ insert_flagfinish (insn, operand, mods, reg, value, errmsg)
static arc_insn
insert_cond (insn, operand, mods, reg, value, errmsg)
- arc_insn insn;
- const struct arc_operand *operand;
- int mods ATTRIBUTE_UNUSED;
- const struct arc_operand_value *reg ATTRIBUTE_UNUSED;
- long value;
- const char **errmsg ATTRIBUTE_UNUSED;
+ arc_insn insn;
+ const struct arc_operand *operand;
+ int mods ATTRIBUTE_UNUSED;
+ const struct arc_operand_value *reg ATTRIBUTE_UNUSED;
+ long value;
+ const char **errmsg ATTRIBUTE_UNUSED;
{
cond_p = 1;
insn |= (value & ((1 << operand->bits) - 1)) << operand->shift;
@@ -877,12 +878,12 @@ insert_cond (insn, operand, mods, reg, value, errmsg)
static arc_insn
insert_forcelimm (insn, operand, mods, reg, value, errmsg)
- arc_insn insn;
- const struct arc_operand *operand ATTRIBUTE_UNUSED;
- int mods ATTRIBUTE_UNUSED;
- const struct arc_operand_value *reg ATTRIBUTE_UNUSED;
- long value ATTRIBUTE_UNUSED;
- const char **errmsg ATTRIBUTE_UNUSED;
+ arc_insn insn;
+ const struct arc_operand *operand ATTRIBUTE_UNUSED;
+ int mods ATTRIBUTE_UNUSED;
+ const struct arc_operand_value *reg ATTRIBUTE_UNUSED;
+ long value ATTRIBUTE_UNUSED;
+ const char **errmsg ATTRIBUTE_UNUSED;
{
cond_p = 1;
return insn;
@@ -890,12 +891,12 @@ insert_forcelimm (insn, operand, mods, reg, value, errmsg)
static arc_insn
insert_addr_wb (insn, operand, mods, reg, value, errmsg)
- arc_insn insn;
- const struct arc_operand *operand;
- int mods ATTRIBUTE_UNUSED;
- const struct arc_operand_value *reg ATTRIBUTE_UNUSED;
- long value ATTRIBUTE_UNUSED;
- const char **errmsg ATTRIBUTE_UNUSED;
+ arc_insn insn;
+ const struct arc_operand *operand;
+ int mods ATTRIBUTE_UNUSED;
+ const struct arc_operand_value *reg ATTRIBUTE_UNUSED;
+ long value ATTRIBUTE_UNUSED;
+ const char **errmsg ATTRIBUTE_UNUSED;
{
addrwb_p = 1 << operand->shift;
return insn;
@@ -903,31 +904,31 @@ insert_addr_wb (insn, operand, mods, reg, value, errmsg)
static arc_insn
insert_base (insn, operand, mods, reg, value, errmsg)
- arc_insn insn;
- const struct arc_operand *operand;
- int mods;
- const struct arc_operand_value *reg;
- long value;
- const char **errmsg;
+ arc_insn insn;
+ const struct arc_operand *operand;
+ int mods;
+ const struct arc_operand_value *reg;
+ long value;
+ const char **errmsg;
{
if (reg != NULL)
{
arc_insn myinsn;
myinsn = insert_reg (0, operand,mods, reg, value, errmsg) >> operand->shift;
insn |= B(myinsn);
- ls_operand[LS_BASE] = OP_REG;
+ ls_operand[LS_BASE] = OP_REG;
}
else if (ARC_SHIMM_CONST_P (value) && !cond_p)
{
if (shimm_p && value != shimm)
- {
- /* convert the previous shimm operand to a limm. */
- limm_p = 1;
- limm = shimm;
- insn &= ~C(-1); /* we know where the value is in insn. */
- insn |= C(ARC_REG_LIMM);
- ls_operand[LS_VALUE] = OP_LIMM;
- }
+ {
+ /* convert the previous shimm operand to a limm. */
+ limm_p = 1;
+ limm = shimm;
+ insn &= ~C(-1); /* we know where the value is in insn. */
+ insn |= C(ARC_REG_LIMM);
+ ls_operand[LS_VALUE] = OP_LIMM;
+ }
insn |= ARC_REG_SHIMM << operand->shift;
shimm_p = 1;
shimm = value;
@@ -936,10 +937,10 @@ insert_base (insn, operand, mods, reg, value, errmsg)
else
{
if (limm_p && value != limm)
- {
- *errmsg = "too many long constants";
- return insn;
- }
+ {
+ *errmsg = "too many long constants";
+ return insn;
+ }
limm_p = 1;
limm = value;
insn |= B(ARC_REG_LIMM);
@@ -954,12 +955,12 @@ insert_base (insn, operand, mods, reg, value, errmsg)
static arc_insn
insert_offset (insn, operand, mods, reg, value, errmsg)
- arc_insn insn;
- const struct arc_operand *operand;
- int mods;
- const struct arc_operand_value *reg;
- long value;
- const char **errmsg;
+ arc_insn insn;
+ const struct arc_operand *operand;
+ int mods;
+ const struct arc_operand_value *reg;
+ long value;
+ const char **errmsg;
{
long minval, maxval;
@@ -969,8 +970,8 @@ insert_offset (insn, operand, mods, reg, value, errmsg)
myinsn = insert_reg (0,operand,mods,reg,value,errmsg) >> operand->shift;
ls_operand[LS_OFFSET] = OP_REG;
if (operand->flags & ARC_OPERAND_LOAD) /* not if store, catch it later. */
- if ((insn & I(-1)) != I(1)) /* not if opcode == 1, catch it later. */
- insn |= C(myinsn);
+ if ((insn & I(-1)) != I(1)) /* not if opcode == 1, catch it later. */
+ insn |= C(myinsn);
}
else
{
@@ -988,26 +989,26 @@ insert_offset (insn, operand, mods, reg, value, errmsg)
}
if ((cond_p && !limm_p) || (value < minval || value > maxval))
{
- if (limm_p && value != limm)
- {
- *errmsg = "too many long constants";
- }
- else
- {
- limm_p = 1;
- limm = value;
- if (operand->flags & ARC_OPERAND_STORE)
- insn |= B(ARC_REG_LIMM);
- if (operand->flags & ARC_OPERAND_LOAD)
- insn |= C(ARC_REG_LIMM);
- ls_operand[LS_OFFSET] = OP_LIMM;
- }
+ if (limm_p && value != limm)
+ {
+ *errmsg = "too many long constants";
+ }
+ else
+ {
+ limm_p = 1;
+ limm = value;
+ if (operand->flags & ARC_OPERAND_STORE)
+ insn |= B(ARC_REG_LIMM);
+ if (operand->flags & ARC_OPERAND_LOAD)
+ insn |= C(ARC_REG_LIMM);
+ ls_operand[LS_OFFSET] = OP_LIMM;
+ }
}
else
- {
+ {
if ((value < minval || value > maxval))
*errmsg = "need too many limms";
- else if (shimm_p && value != shimm)
+ else if (shimm_p && value != shimm)
{
/* check for bad operand combinations before we lose info about them. */
if ((insn & I(-1)) == I(1))
@@ -1039,7 +1040,7 @@ insert_offset (insn, operand, mods, reg, value, errmsg)
shimm = value;
shimm_p = 1;
ls_operand[LS_OFFSET] = OP_SHIMM;
- }
+ }
}
out:
return insn;
@@ -1049,24 +1050,25 @@ insert_offset (insn, operand, mods, reg, value, errmsg)
static long
extract_st_syntax (insn, operand, mods, opval, invalid)
- arc_insn *insn;
- const struct arc_operand *operand ATTRIBUTE_UNUSED;
- int mods ATTRIBUTE_UNUSED;
- const struct arc_operand_value **opval ATTRIBUTE_UNUSED;
- int *invalid;
+ arc_insn *insn;
+ const struct arc_operand *operand ATTRIBUTE_UNUSED;
+ int mods ATTRIBUTE_UNUSED;
+ const struct arc_operand_value **opval ATTRIBUTE_UNUSED;
+ int *invalid;
{
#define ST_SYNTAX(V,B,O) \
((ls_operand[LS_VALUE] == (V) && \
ls_operand[LS_BASE] == (B) && \
ls_operand[LS_OFFSET] == (O)))
- if (!((ST_SYNTAX(OP_REG,OP_REG,OP_NONE) && (insn[0] & 511) == 0)
+
+ if (!((ST_SYNTAX(OP_REG,OP_REG,OP_NONE) && (insn[0] & 511) == 0)
|| ST_SYNTAX(OP_REG,OP_LIMM,OP_NONE)
|| (ST_SYNTAX(OP_SHIMM,OP_REG,OP_NONE) && (insn[0] & 511) == 0)
|| (ST_SYNTAX(OP_SHIMM,OP_SHIMM,OP_NONE) && (insn[0] & 511) == 0)
|| ST_SYNTAX(OP_SHIMM,OP_LIMM,OP_NONE)
|| ST_SYNTAX(OP_SHIMM,OP_LIMM,OP_SHIMM)
|| ST_SYNTAX(OP_SHIMM,OP_SHIMM,OP_SHIMM)
- || (ST_SYNTAX(OP_LIMM,OP_REG,OP_NONE) && (insn[0] & 511) == 0)
+ || (ST_SYNTAX(OP_LIMM,OP_REG,OP_NONE) && (insn[0] & 511) == 0)
|| ST_SYNTAX(OP_REG,OP_REG,OP_SHIMM)
|| ST_SYNTAX(OP_REG,OP_SHIMM,OP_SHIMM)
|| ST_SYNTAX(OP_SHIMM,OP_REG,OP_SHIMM)
@@ -1079,31 +1081,31 @@ extract_st_syntax (insn, operand, mods, opval, invalid)
int
arc_limm_fixup_adjust(insn)
- arc_insn insn;
+ arc_insn insn;
{
int retval = 0;
/* check for st shimm,[limm]. */
if ((insn & (I(-1) | C(-1) | B(-1))) ==
- (I(2) | C(ARC_REG_SHIMM) | B(ARC_REG_LIMM)))
+ (I(2) | C(ARC_REG_SHIMM) | B(ARC_REG_LIMM)))
{
retval = insn & 0x1ff;
if (retval & 0x100) /* sign extend 9 bit offset. */
retval |= ~0x1ff;
}
- return(-retval); /* negate offset for return. */
+ return -retval; /* negate offset for return. */
}
/* Used in st insns to do final syntax check. */
static arc_insn
insert_st_syntax (insn, operand, mods, reg, value, errmsg)
- arc_insn insn;
- const struct arc_operand *operand ATTRIBUTE_UNUSED;
- int mods ATTRIBUTE_UNUSED;
- const struct arc_operand_value *reg ATTRIBUTE_UNUSED;
- long value ATTRIBUTE_UNUSED;
- const char **errmsg;
+ arc_insn insn;
+ const struct arc_operand *operand ATTRIBUTE_UNUSED;
+ int mods ATTRIBUTE_UNUSED;
+ const struct arc_operand_value *reg ATTRIBUTE_UNUSED;
+ long value ATTRIBUTE_UNUSED;
+ const char **errmsg;
{
if (ST_SYNTAX(OP_SHIMM,OP_REG,OP_NONE) && shimm != 0)
{
@@ -1121,27 +1123,27 @@ insert_st_syntax (insn, operand, mods, reg, value, errmsg)
if (ST_SYNTAX(OP_REG,OP_SHIMM,OP_NONE) || ST_SYNTAX(OP_LIMM,OP_SHIMM,OP_NONE))
{
/* try to salvage this syntax. */
- if (shimm & 0x1) /* odd shimms won't work. */
- {
- if (limm_p) /* do we have a limm already? */
- {
- *errmsg = "impossible store";
- }
- limm_p = 1;
- limm = shimm;
- shimm = 0;
- shimm_p = 0;
- insn = insn & ~(B(-1) | 511);
- insn |= B(ARC_REG_LIMM);
- ls_operand[LS_BASE] = OP_LIMM;
- }
- else
- {
- shimm >>= 1;
- insn = insn & ~511;
- insn |= shimm;
- ls_operand[LS_OFFSET] = OP_SHIMM;
- }
+ if (shimm & 0x1) /* odd shimms won't work. */
+ {
+ if (limm_p) /* do we have a limm already? */
+ {
+ *errmsg = "impossible store";
+ }
+ limm_p = 1;
+ limm = shimm;
+ shimm = 0;
+ shimm_p = 0;
+ insn = insn & ~(B(-1) | 511);
+ insn |= B(ARC_REG_LIMM);
+ ls_operand[LS_BASE] = OP_LIMM;
+ }
+ else
+ {
+ shimm >>= 1;
+ insn = insn & ~511;
+ insn |= shimm;
+ ls_operand[LS_OFFSET] = OP_SHIMM;
+ }
}
if (ST_SYNTAX(OP_SHIMM,OP_LIMM,OP_NONE))
{
@@ -1165,7 +1167,7 @@ insert_st_syntax (insn, operand, mods, reg, value, errmsg)
|| ST_SYNTAX(OP_SHIMM,OP_REG,OP_SHIMM)
|| ST_SYNTAX(OP_SHIMM,OP_SHIMM,OP_SHIMM)
|| ST_SYNTAX(OP_LIMM,OP_SHIMM,OP_SHIMM)
- || ST_SYNTAX(OP_LIMM,OP_REG,OP_NONE)
+ || ST_SYNTAX(OP_LIMM,OP_REG,OP_NONE)
|| ST_SYNTAX(OP_LIMM,OP_REG,OP_SHIMM)))
*errmsg = "st operand error";
if (addrwb_p)
@@ -1183,12 +1185,12 @@ insert_st_syntax (insn, operand, mods, reg, value, errmsg)
static arc_insn
insert_ld_syntax (insn, operand, mods, reg, value, errmsg)
- arc_insn insn;
- const struct arc_operand *operand ATTRIBUTE_UNUSED;
- int mods ATTRIBUTE_UNUSED;
- const struct arc_operand_value *reg ATTRIBUTE_UNUSED;
- long value ATTRIBUTE_UNUSED;
- const char **errmsg;
+ arc_insn insn;
+ const struct arc_operand *operand ATTRIBUTE_UNUSED;
+ int mods ATTRIBUTE_UNUSED;
+ const struct arc_operand_value *reg ATTRIBUTE_UNUSED;
+ long value ATTRIBUTE_UNUSED;
+ const char **errmsg;
{
#define LD_SYNTAX(D,B,O) \
((ls_operand[LS_DEST] == (D) && \
@@ -1198,19 +1200,19 @@ insert_ld_syntax (insn, operand, mods, reg, value, errmsg)
int test = insn & I(-1);
if (!(test == I(1)))
- {
- if ((ls_operand[LS_DEST] == OP_SHIMM || ls_operand[LS_BASE] == OP_SHIMM
- || ls_operand[LS_OFFSET] == OP_SHIMM))
- *errmsg = "invalid load/shimm insn";
- }
+ {
+ if ((ls_operand[LS_DEST] == OP_SHIMM || ls_operand[LS_BASE] == OP_SHIMM
+ || ls_operand[LS_OFFSET] == OP_SHIMM))
+ *errmsg = "invalid load/shimm insn";
+ }
if (!(LD_SYNTAX(OP_REG,OP_REG,OP_NONE)
|| LD_SYNTAX(OP_REG,OP_REG,OP_REG)
|| LD_SYNTAX(OP_REG,OP_REG,OP_SHIMM)
|| (LD_SYNTAX(OP_REG,OP_LIMM,OP_REG) && !(test == I(1)))
|| (LD_SYNTAX(OP_REG,OP_REG,OP_LIMM) && !(test == I(1)))
- || LD_SYNTAX(OP_REG,OP_SHIMM,OP_SHIMM)
+ || LD_SYNTAX(OP_REG,OP_SHIMM,OP_SHIMM)
|| (LD_SYNTAX(OP_REG,OP_LIMM,OP_NONE) && (test == I(1)))))
- *errmsg = "ld operand error";
+ *errmsg = "ld operand error";
if (addrwb_p)
{
if (ls_operand[LS_BASE] != OP_REG)
@@ -1224,18 +1226,18 @@ insert_ld_syntax (insn, operand, mods, reg, value, errmsg)
static long
extract_ld_syntax (insn, operand, mods, opval, invalid)
- arc_insn *insn;
- const struct arc_operand *operand ATTRIBUTE_UNUSED;
- int mods ATTRIBUTE_UNUSED;
- const struct arc_operand_value **opval ATTRIBUTE_UNUSED;
- int *invalid;
+ arc_insn *insn;
+ const struct arc_operand *operand ATTRIBUTE_UNUSED;
+ int mods ATTRIBUTE_UNUSED;
+ const struct arc_operand_value **opval ATTRIBUTE_UNUSED;
+ int *invalid;
{
int test = insn[0] & I(-1);
if (!(test == I(1)))
{
- if((ls_operand[LS_DEST] == OP_SHIMM || ls_operand[LS_BASE] == OP_SHIMM
- || ls_operand[LS_OFFSET] == OP_SHIMM))
+ if ((ls_operand[LS_DEST] == OP_SHIMM || ls_operand[LS_BASE] == OP_SHIMM
+ || ls_operand[LS_OFFSET] == OP_SHIMM))
*invalid = 1;
}
if (!((LD_SYNTAX(OP_REG,OP_REG,OP_NONE) && (test == I(1)))
@@ -1255,12 +1257,12 @@ extract_ld_syntax (insn, operand, mods, opval, invalid)
static arc_insn
insert_shimmfinish (insn, operand, mods, reg, value, errmsg)
- arc_insn insn;
- const struct arc_operand *operand;
- int mods ATTRIBUTE_UNUSED;
- const struct arc_operand_value *reg ATTRIBUTE_UNUSED;
- long value ATTRIBUTE_UNUSED;
- const char **errmsg ATTRIBUTE_UNUSED;
+ arc_insn insn;
+ const struct arc_operand *operand;
+ int mods ATTRIBUTE_UNUSED;
+ const struct arc_operand_value *reg ATTRIBUTE_UNUSED;
+ long value ATTRIBUTE_UNUSED;
+ const char **errmsg ATTRIBUTE_UNUSED;
{
if (shimm_p)
insn |= (shimm & ((1 << operand->bits) - 1)) << operand->shift;
@@ -1281,12 +1283,12 @@ insert_shimmfinish (insn, operand, mods, reg, value, errmsg)
static arc_insn
insert_limmfinish (insn, operand, mods, reg, value, errmsg)
- arc_insn insn;
- const struct arc_operand *operand ATTRIBUTE_UNUSED;
- int mods ATTRIBUTE_UNUSED;
- const struct arc_operand_value *reg ATTRIBUTE_UNUSED;
- long value ATTRIBUTE_UNUSED;
- const char **errmsg ATTRIBUTE_UNUSED;
+ arc_insn insn;
+ const struct arc_operand *operand ATTRIBUTE_UNUSED;
+ int mods ATTRIBUTE_UNUSED;
+ const struct arc_operand_value *reg ATTRIBUTE_UNUSED;
+ long value ATTRIBUTE_UNUSED;
+ const char **errmsg ATTRIBUTE_UNUSED;
{
#if 0
if (limm_p)
@@ -1297,12 +1299,12 @@ insert_limmfinish (insn, operand, mods, reg, value, errmsg)
static arc_insn
insert_jumpflags (insn, operand, mods, reg, value, errmsg)
- arc_insn insn;
- const struct arc_operand *operand;
- int mods ATTRIBUTE_UNUSED;
- const struct arc_operand_value *reg ATTRIBUTE_UNUSED;
- long value;
- const char **errmsg;
+ arc_insn insn;
+ const struct arc_operand *operand;
+ int mods ATTRIBUTE_UNUSED;
+ const struct arc_operand_value *reg ATTRIBUTE_UNUSED;
+ long value;
+ const char **errmsg;
{
if (!flag_p)
{
@@ -1325,8 +1327,8 @@ insert_jumpflags (insn, operand, mods, reg, value, errmsg)
*errmsg = "bad jump flags value";
}
jumpflags_p = 1;
- limm = (limm & ((1 << operand->shift) - 1))
- | ((value & ((1 << operand->bits) - 1)) << operand->shift);
+ limm = ((limm & ((1 << operand->shift) - 1))
+ | ((value & ((1 << operand->bits) - 1)) << operand->shift));
return insn;
}
@@ -1334,12 +1336,12 @@ insert_jumpflags (insn, operand, mods, reg, value, errmsg)
static arc_insn
insert_unopmacro (insn, operand, mods, reg, value, errmsg)
- arc_insn insn;
- const struct arc_operand *operand;
- int mods ATTRIBUTE_UNUSED;
- const struct arc_operand_value *reg ATTRIBUTE_UNUSED;
- long value ATTRIBUTE_UNUSED;
- const char **errmsg ATTRIBUTE_UNUSED;
+ arc_insn insn;
+ const struct arc_operand *operand;
+ int mods ATTRIBUTE_UNUSED;
+ const struct arc_operand_value *reg ATTRIBUTE_UNUSED;
+ long value ATTRIBUTE_UNUSED;
+ const char **errmsg ATTRIBUTE_UNUSED;
{
insn |= ((insn >> ARC_SHIFT_REGB) & ARC_MASK_REG) << operand->shift;
return insn;
@@ -1349,12 +1351,12 @@ insert_unopmacro (insn, operand, mods, reg, value, errmsg)
static arc_insn
insert_reladdr (insn, operand, mods, reg, value, errmsg)
- arc_insn insn;
- const struct arc_operand *operand;
- int mods ATTRIBUTE_UNUSED;
- const struct arc_operand_value *reg ATTRIBUTE_UNUSED;
- long value;
- const char **errmsg;
+ arc_insn insn;
+ const struct arc_operand *operand;
+ int mods ATTRIBUTE_UNUSED;
+ const struct arc_operand_value *reg ATTRIBUTE_UNUSED;
+ long value;
+ const char **errmsg;
{
if (value & 3)
*errmsg = "branch address not on 4 byte boundary";
@@ -1378,12 +1380,12 @@ insert_reladdr (insn, operand, mods, reg, value, errmsg)
static arc_insn
insert_absaddr (insn, operand, mods, reg, value, errmsg)
- arc_insn insn;
- const struct arc_operand *operand ATTRIBUTE_UNUSED;
- int mods ATTRIBUTE_UNUSED;
- const struct arc_operand_value *reg ATTRIBUTE_UNUSED;
- long value ATTRIBUTE_UNUSED;
- const char **errmsg;
+ arc_insn insn;
+ const struct arc_operand *operand ATTRIBUTE_UNUSED;
+ int mods ATTRIBUTE_UNUSED;
+ const struct arc_operand_value *reg ATTRIBUTE_UNUSED;
+ long value ATTRIBUTE_UNUSED;
+ const char **errmsg;
{
if (limm_p)
{
@@ -1396,7 +1398,7 @@ insert_absaddr (insn, operand, mods, reg, value, errmsg)
}
else
{
- if(nullify != 0x02)
+ if (nullify != 0x02)
{
*errmsg = "must specify .jd or no nullify suffix";
}
@@ -1432,11 +1434,11 @@ arc_opcode_init_extract ()
static long
extract_reg (insn, operand, mods, opval, invalid)
- arc_insn *insn;
- const struct arc_operand *operand;
- int mods;
- const struct arc_operand_value **opval;
- int *invalid ATTRIBUTE_UNUSED;
+ arc_insn *insn;
+ const struct arc_operand *operand;
+ int mods;
+ const struct arc_operand_value **opval;
+ int *invalid ATTRIBUTE_UNUSED;
{
int regno;
long value;
@@ -1449,7 +1451,7 @@ extract_reg (insn, operand, mods, opval, invalid)
if (regno == ARC_REG_SHIMM)
{
op_type = OP_SHIMM;
- /* always return zero if dest is a shimm mlm. */
+ /* always return zero if dest is a shimm mlm. */
if ('a' != operand->fmt)
{
@@ -1491,10 +1493,10 @@ extract_reg (insn, operand, mods, opval, invalid)
value = insn[1];
limm_p = 1;
/* if this is a jump instruction (j,jl), show new pc correctly. */
- if(0x07 == ((*insn & I(-1)) >> 27))
- {
+ if (0x07 == ((*insn & I(-1)) >> 27))
+ {
value = (value & 0xffffff);
- }
+ }
}
/* It's a register, set OPVAL (that's the only way we distinguish registers
from constants here). */
@@ -1522,23 +1524,23 @@ extract_reg (insn, operand, mods, opval, invalid)
*opval = reg;
}
switch(operand->fmt)
- {
- case 'a':
- ls_operand[LS_DEST] = op_type;
- break;
- case 's':
- ls_operand[LS_BASE] = op_type;
- break;
- case 'c':
- if((insn[0]& I(-1)) == I(2))
- ls_operand[LS_VALUE] = op_type;
- else
- ls_operand[LS_OFFSET] = op_type;
- break;
- case 'o': case 'O':
- ls_operand[LS_OFFSET] = op_type;
- break;
- }
+ {
+ case 'a':
+ ls_operand[LS_DEST] = op_type;
+ break;
+ case 's':
+ ls_operand[LS_BASE] = op_type;
+ break;
+ case 'c':
+ if ((insn[0]& I(-1)) == I(2))
+ ls_operand[LS_VALUE] = op_type;
+ else
+ ls_operand[LS_OFFSET] = op_type;
+ break;
+ case 'o': case 'O':
+ ls_operand[LS_OFFSET] = op_type;
+ break;
+ }
return value;
}
@@ -1548,11 +1550,11 @@ extract_reg (insn, operand, mods, opval, invalid)
static long
extract_flag (insn, operand, mods, opval, invalid)
- arc_insn *insn;
- const struct arc_operand *operand;
- int mods ATTRIBUTE_UNUSED;
- const struct arc_operand_value **opval;
- int *invalid ATTRIBUTE_UNUSED;
+ arc_insn *insn;
+ const struct arc_operand *operand;
+ int mods ATTRIBUTE_UNUSED;
+ const struct arc_operand_value **opval;
+ int *invalid ATTRIBUTE_UNUSED;
{
int f;
const struct arc_operand_value *val;
@@ -1579,11 +1581,11 @@ extract_flag (insn, operand, mods, opval, invalid)
static long
extract_cond (insn, operand, mods, opval, invalid)
- arc_insn *insn;
- const struct arc_operand *operand;
- int mods ATTRIBUTE_UNUSED;
- const struct arc_operand_value **opval;
- int *invalid ATTRIBUTE_UNUSED;
+ arc_insn *insn;
+ const struct arc_operand *operand;
+ int mods ATTRIBUTE_UNUSED;
+ const struct arc_operand_value **opval;
+ int *invalid ATTRIBUTE_UNUSED;
{
long cond;
const struct arc_operand_value *val;
@@ -1606,11 +1608,11 @@ extract_cond (insn, operand, mods, opval, invalid)
static long
extract_reladdr (insn, operand, mods, opval, invalid)
- arc_insn *insn;
- const struct arc_operand *operand;
- int mods ATTRIBUTE_UNUSED;
- const struct arc_operand_value **opval ATTRIBUTE_UNUSED;
- int *invalid ATTRIBUTE_UNUSED;
+ arc_insn *insn;
+ const struct arc_operand *operand;
+ int mods ATTRIBUTE_UNUSED;
+ const struct arc_operand_value **opval ATTRIBUTE_UNUSED;
+ int *invalid ATTRIBUTE_UNUSED;
{
long addr;
@@ -1624,27 +1626,27 @@ extract_reladdr (insn, operand, mods, opval, invalid)
/* extract the flags bits from a j or jl long immediate. */
static long
extract_jumpflags(insn, operand, mods, opval, invalid)
- arc_insn *insn;
- const struct arc_operand *operand;
- int mods ATTRIBUTE_UNUSED;
- const struct arc_operand_value **opval ATTRIBUTE_UNUSED;
- int *invalid;
+ arc_insn *insn;
+ const struct arc_operand *operand;
+ int mods ATTRIBUTE_UNUSED;
+ const struct arc_operand_value **opval ATTRIBUTE_UNUSED;
+ int *invalid;
{
if (!flag_p || !limm_p)
*invalid = 1;
- return((flag_p && limm_p)
- ? (insn[1] >> operand->shift) & ((1 << operand->bits) -1): 0);
+ return ((flag_p && limm_p)
+ ? (insn[1] >> operand->shift) & ((1 << operand->bits) -1): 0);
}
/* extract st insn's offset. */
static long
extract_st_offset (insn, operand, mods, opval, invalid)
- arc_insn *insn;
- const struct arc_operand *operand;
- int mods ATTRIBUTE_UNUSED;
- const struct arc_operand_value **opval ATTRIBUTE_UNUSED;
- int *invalid;
+ arc_insn *insn;
+ const struct arc_operand *operand;
+ int mods ATTRIBUTE_UNUSED;
+ const struct arc_operand_value **opval ATTRIBUTE_UNUSED;
+ int *invalid;
{
int value = 0;
@@ -1653,7 +1655,7 @@ extract_st_offset (insn, operand, mods, opval, invalid)
value = insn[0] & 511;
if ((operand->flags & ARC_OPERAND_SIGNED) && (value & 256))
value -= 512;
- if(value)
+ if (value)
ls_operand[LS_OFFSET] = OP_SHIMM;
}
else
@@ -1667,11 +1669,11 @@ extract_st_offset (insn, operand, mods, opval, invalid)
static long
extract_ld_offset (insn, operand, mods, opval, invalid)
- arc_insn *insn;
- const struct arc_operand *operand;
- int mods;
- const struct arc_operand_value **opval;
- int *invalid;
+ arc_insn *insn;
+ const struct arc_operand *operand;
+ int mods;
+ const struct arc_operand_value **opval;
+ int *invalid;
{
int test = insn[0] & I(-1);
int value;
@@ -1685,9 +1687,9 @@ extract_ld_offset (insn, operand, mods, opval, invalid)
ls_operand[LS_OFFSET] = OP_SHIMM;
return(value);
}
-/* if it isn't in the insn, it's concealed behind reg 'c'. */
- return extract_reg(insn,
- &arc_operands[arc_operand_map['c']], mods, opval, invalid);
+ /* if it isn't in the insn, it's concealed behind reg 'c'. */
+ return extract_reg (insn, &arc_operands[arc_operand_map['c']],
+ mods, opval, invalid);
}
/* The only thing this does is set the `invalid' flag if B != C.
@@ -1696,11 +1698,11 @@ extract_ld_offset (insn, operand, mods, opval, invalid)
static long
extract_unopmacro (insn, operand, mods, opval, invalid)
- arc_insn *insn;
- const struct arc_operand *operand ATTRIBUTE_UNUSED;
- int mods ATTRIBUTE_UNUSED;
- const struct arc_operand_value **opval ATTRIBUTE_UNUSED;
- int *invalid;
+ arc_insn *insn;
+ const struct arc_operand *operand ATTRIBUTE_UNUSED;
+ int mods ATTRIBUTE_UNUSED;
+ const struct arc_operand_value **opval ATTRIBUTE_UNUSED;
+ int *invalid;
{
/* This misses the case where B == ARC_REG_SHIMM_UPDATE &&
C == ARC_REG_SHIMM (or vice versa). No big deal. Those insns will get
@@ -1717,8 +1719,8 @@ extract_unopmacro (insn, operand, mods, opval, invalid)
const struct arc_operand_value *
arc_opcode_lookup_suffix (type, value)
- const struct arc_operand *type;
- int value;
+ const struct arc_operand *type;
+ int value;
{
register const struct arc_operand_value *v,*end;
struct arc_ext_operand_value *ext_oper = arc_ext_operands;
@@ -1742,8 +1744,8 @@ arc_opcode_lookup_suffix (type, value)
static const struct arc_operand_value *
lookup_register (type, regno)
- int type;
- long regno;
+ int type;
+ long regno;
{
register const struct arc_operand_value *r,*end;
struct arc_ext_operand_value *ext_oper = arc_ext_operands;
@@ -1769,17 +1771,17 @@ lookup_register (type, regno)
int
arc_insn_is_j(insn)
- arc_insn insn;
+ arc_insn insn;
{
return (insn & (I(-1))) == I(0x7);
}
int
arc_insn_not_jl(insn)
- arc_insn insn;
+ arc_insn insn;
{
- return (insn & (I(-1)|A(-1)|C(-1)|R(-1,7,1)|R(-1,9,1))) !=
- (I(0x7) | R(-1,9,1));
+ return ((insn & (I(-1)|A(-1)|C(-1)|R(-1,7,1)|R(-1,9,1)))
+ != (I(0x7) | R(-1,9,1)));
}
int
@@ -1802,7 +1804,7 @@ arc_operand_type(int opertype)
struct arc_operand_value *
get_ext_suffix(s)
- char *s;
+ char *s;
{
struct arc_ext_operand_value *suffix = arc_ext_operands;
@@ -1813,11 +1815,11 @@ get_ext_suffix(s)
return(&suffix->operand);
suffix = suffix->next;
}
- return(NULL);
+ return NULL;
}
int
arc_get_noshortcut_flag()
{
- return(ARC_REGISTER_NOSHORT_CUT);
+ return ARC_REGISTER_NOSHORT_CUT;
}