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| author | Paul Brook <paul@codesourcery.com> | 2006-10-25 23:28:52 +0000 |
|---|---|---|
| committer | Paul Brook <paul@codesourcery.com> | 2006-10-25 23:28:52 +0000 |
| commit | b7bd0e4357c2560baec5875040e6d15571238636 (patch) | |
| tree | 121f93acd0e4f3b5694100f498a3bfb950ae120b | |
| parent | a092d84c2f2a5e3e762c49f3317dde2ae13dd3a4 (diff) | |
| download | gdb-b7bd0e4357c2560baec5875040e6d15571238636.tar.gz | |
2006-10-25 Paul Brook <paul@codesourcery.com>
gas/
* config/tc-arm.c (do_vfp_sp_const, do_vfp_dp_const): Fix operans
encoding.
gas/testsuite/
* gas/arm/vfpv3-const-conv.s: Improve test coverage.
* gas/arm/vfpv3-const-conv.d: Adjust expected output.
* gas/arm/vfp-neon-syntax_t2.d: Ditto.
* gas/arm/vfp-neon-syntax.d: Ditto.
opcodes/
* arm-dis.c (coprocessor_opcodes): Fix bitfields for fconstd/fconstd.
| -rw-r--r-- | ChangeLog.csl | 15 | ||||
| -rw-r--r-- | opcodes/arm-dis.c | 4 |
2 files changed, 17 insertions, 2 deletions
diff --git a/ChangeLog.csl b/ChangeLog.csl index a5162f4d478..dc6168aa341 100644 --- a/ChangeLog.csl +++ b/ChangeLog.csl @@ -1,3 +1,18 @@ +2006-10-25 Paul Brook <paul@codesourcery.com> + + gas/ + * config/tc-arm.c (do_vfp_sp_const, do_vfp_dp_const): Fix operans + encoding. + + gas/testsuite/ + * gas/arm/vfpv3-const-conv.s: Improve test coverage. + * gas/arm/vfpv3-const-conv.d: Adjust expected output. + * gas/arm/vfp-neon-syntax_t2.d: Ditto. + * gas/arm/vfp-neon-syntax.d: Ditto. + + opcodes/ + * arm-dis.c (coprocessor_opcodes): Fix bitfields for fconstd/fconstd. + 2006-10-24 Mark Shinwell <shinwell@codesourcery.com> gas/ diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index 365a155bed8..b4085c64ba8 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -308,8 +308,8 @@ static const struct opcode32 coprocessor_opcodes[] = {FPU_VFP_EXT_V3, 0x0ebe0a40, 0x0fbe0f50, "fto%16?us%7?lhs%c\t%y1, #%5,0-3k"}, {FPU_VFP_EXT_V3, 0x0ebe0b40, 0x0fbe0f50, "fto%16?us%7?lhd%c\t%z1, #%5,0-3k"}, {FPU_VFP_EXT_V1, 0x0c500b10, 0x0fb00ff0, "fmrrd%c\t%12-15r, %16-19r, %z0"}, - {FPU_VFP_EXT_V3, 0x0eb00a00, 0x0fb00ff0, "fconsts%c\t%y1, #%16-19,0-3d"}, - {FPU_VFP_EXT_V3, 0x0eb00b00, 0x0fb00ff0, "fconstd%c\t%z1, #%16-19,0-3d"}, + {FPU_VFP_EXT_V3, 0x0eb00a00, 0x0fb00ff0, "fconsts%c\t%y1, #%0-3,16-19d"}, + {FPU_VFP_EXT_V3, 0x0eb00b00, 0x0fb00ff0, "fconstd%c\t%z1, #%0-3,16-19d"}, {FPU_VFP_EXT_V2, 0x0c400a10, 0x0ff00fd0, "fmsrr%c\t%y4, %12-15r, %16-19r"}, {FPU_VFP_EXT_V2, 0x0c400b10, 0x0ff00fd0, "fmdrr%c\t%z0, %12-15r, %16-19r"}, {FPU_VFP_EXT_V2, 0x0c500a10, 0x0ff00fd0, "fmrrs%c\t%12-15r, %16-19r, %y4"}, |