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authorNick Clifton <nickc@redhat.com>2001-02-10 00:58:38 +0000
committerNick Clifton <nickc@redhat.com>2001-02-10 00:58:38 +0000
commite3f79c488dbbf824ce0d6ccd4613c84736cc44e8 (patch)
tree2d3ae9d5964159c398acdd79055a82e5f5354f8a
parentd83216809800f699310e29661013da7d120b2098 (diff)
downloadgdb-e3f79c488dbbf824ce0d6ccd4613c84736cc44e8.tar.gz
Add s390 support
-rw-r--r--ChangeLog6
-rw-r--r--bfd/ChangeLog14
-rw-r--r--bfd/Makefile.am17
-rw-r--r--bfd/Makefile.in17
-rw-r--r--bfd/archures.c5
-rw-r--r--bfd/bfd-in2.h54
-rw-r--r--bfd/config.bfd10
-rwxr-xr-xbfd/configure27
-rw-r--r--bfd/configure.in3
-rw-r--r--bfd/cpu-s390.c56
-rw-r--r--bfd/elf.c3
-rw-r--r--bfd/elf32-s390.c2179
-rw-r--r--bfd/elf64-s390.c2178
-rw-r--r--bfd/libbfd.h17
-rw-r--r--bfd/po/POTFILES.in3
-rw-r--r--bfd/po/bfd.pot59
-rw-r--r--bfd/reloc.c69
-rw-r--r--bfd/targets.c7
-rwxr-xr-xconfig.guess2
-rwxr-xr-xconfig.sub2
-rw-r--r--config/ChangeLog7
-rw-r--r--config/mh-s390pic1
-rw-r--r--config/mt-s390pic1
-rw-r--r--configure.in3
-rw-r--r--include/ChangeLog4
-rw-r--r--include/dis-asm.h1
-rw-r--r--include/elf/ChangeLog5
-rw-r--r--include/elf/common.h4
-rw-r--r--include/elf/s390.h73
-rw-r--r--include/opcode/ChangeLog4
-rw-r--r--include/opcode/s390.h130
-rw-r--r--opcodes/ChangeLog11
-rw-r--r--opcodes/Makefile.am8
-rw-r--r--opcodes/Makefile.in8
-rwxr-xr-xopcodes/configure3
-rw-r--r--opcodes/configure.in3
-rw-r--r--opcodes/disassemble.c6
-rw-r--r--opcodes/po/POTFILES.in2
-rw-r--r--opcodes/po/opcodes.pot4
-rw-r--r--opcodes/s390-dis.c231
-rw-r--r--opcodes/s390-mkopc.c172
-rw-r--r--opcodes/s390-opc.c969
-rw-r--r--opcodes/s390-opc.txt601
43 files changed, 6931 insertions, 48 deletions
diff --git a/ChangeLog b/ChangeLog
index 1a63a644fe4..f75ae2b32d2 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,9 @@
+2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
+
+ * config.guess: Add linux target for S/390.
+ * config.sub: Likewise.
+ * configure.in: Likewise.
+
2001-02-06 Ben Elliston <bje@redhat.com>
* configure: Output host type to stdout, not stderr.
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 082c64383b1..9669fd4d47e 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,17 @@
+2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
+
+ * Makefile.am: Add linux target for S/390.
+ * archures.c: Likewise.
+ * bfd-in2.h: Likewise.
+ * config.bfd: Likewise.
+ * configure.in: Likewise.
+ * elf.c: Likewise.
+ * libbfd.h: Likewise.
+ * targets.c: Likewise.
+ * cpu-s390.c: New file.
+ * elf32-s390.c: New file.
+ * elf64-s390.c: New file.
+
2001-02-09 Nick Clifton <nickc@redhat.com>
* peigen.c (_bfd_pe_get_symbol_info): Suppress addition of
diff --git a/bfd/Makefile.am b/bfd/Makefile.am
index 9a60ee65833..821fab117f6 100644
--- a/bfd/Makefile.am
+++ b/bfd/Makefile.am
@@ -72,6 +72,7 @@ ALL_MACHINES = \
cpu-pj.lo \
cpu-powerpc.lo \
cpu-rs6000.lo \
+ cpu-s390.lo \
cpu-sh.lo \
cpu-sparc.lo \
cpu-tic30.lo \
@@ -114,6 +115,7 @@ ALL_MACHINES_CFILES = \
cpu-pj.c \
cpu-powerpc.c \
cpu-rs6000.c \
+ cpu-s390.c \
cpu-sh.c \
cpu-sparc.c \
cpu-tic30.c \
@@ -199,6 +201,7 @@ BFD32_BACKENDS = \
elf32-mips.lo \
elf32-pj.lo \
elf32-ppc.lo \
+ elf32-s390.lo \
elf32-sh.lo \
elf32-sh-lin.lo \
elf32-sparc.lo \
@@ -336,6 +339,7 @@ BFD32_BACKENDS_CFILES = \
elf32-mips.c \
elf32-pj.c \
elf32-ppc.c \
+ elf32-s390.c \
elf32-sh.c \
elf32-sh-lin.c \
elf32-sparc.c \
@@ -417,6 +421,7 @@ BFD64_BACKENDS = \
elf64-ia64.lo \
elf64-gen.lo \
elf64-mips.lo \
+ elf64-s390.lo \
elf64-sparc.lo \
elf64.lo \
nlm32-alpha.lo \
@@ -433,6 +438,7 @@ BFD64_BACKENDS_CFILES = \
elf64-hppa.c \
elf64-gen.c \
elf64-mips.c \
+ elf64-s390.c \
elf64-sparc.c \
elf64.c \
nlm32-alpha.c \
@@ -767,6 +773,7 @@ cpu-ns32k.lo: cpu-ns32k.c $(INCDIR)/filenames.h ns32k.h
cpu-pj.lo: cpu-pj.c $(INCDIR)/filenames.h
cpu-powerpc.lo: cpu-powerpc.c $(INCDIR)/filenames.h
cpu-rs6000.lo: cpu-rs6000.c $(INCDIR)/filenames.h
+cpu-s390.lo: cpu-s390.c $(INCDIR)/filenames.h
cpu-sh.lo: cpu-sh.c $(INCDIR)/filenames.h
cpu-sparc.lo: cpu-sparc.c $(INCDIR)/filenames.h
cpu-tic30.lo: cpu-tic30.c $(INCDIR)/filenames.h
@@ -1025,6 +1032,11 @@ elf32-ppc.lo: elf32-ppc.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/elf/ppc.h $(INCDIR)/elf/reloc-macros.h \
elf32-target.h
+elf32-s390.lo: elf32-s390.c $(INCDIR)/filenames.h \
+ $(INCDIR)/bfdlink.h elf-bfd.h $(INCDIR)/elf/common.h \
+ $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/elf/s390.h \
+ $(INCDIR)/elf/reloc-macros.h $(INCDIR)/opcode/s390.h \
+ elf32-target.h
elf32-sh.lo: elf32-sh.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/elf/sh.h $(INCDIR)/elf/reloc-macros.h \
@@ -1269,6 +1281,11 @@ elf64-mips.lo: elf64-mips.c $(INCDIR)/filenames.h $(INCDIR)/aout/ar.h \
$(INCDIR)/elf/reloc-macros.h $(INCDIR)/coff/sym.h $(INCDIR)/coff/symconst.h \
$(INCDIR)/coff/internal.h $(INCDIR)/coff/ecoff.h $(INCDIR)/coff/alpha.h \
ecoffswap.h elf64-target.h
+elf64-s390.lo: elf64-s390.c $(INCDIR)/filenames.h \
+ elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
+ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/opcode/s390.h \
+ $(INCDIR)/elf/s390.h $(INCDIR)/elf/reloc-macros.h \
+ elf64-target.h
elf64-sparc.lo: elf64-sparc.c $(INCDIR)/filenames.h \
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/opcode/sparc.h \
diff --git a/bfd/Makefile.in b/bfd/Makefile.in
index 0b5f88654e9..808fb723f8c 100644
--- a/bfd/Makefile.in
+++ b/bfd/Makefile.in
@@ -193,6 +193,7 @@ ALL_MACHINES = \
cpu-pj.lo \
cpu-powerpc.lo \
cpu-rs6000.lo \
+ cpu-s390.lo \
cpu-sh.lo \
cpu-sparc.lo \
cpu-tic30.lo \
@@ -236,6 +237,7 @@ ALL_MACHINES_CFILES = \
cpu-pj.c \
cpu-powerpc.c \
cpu-rs6000.c \
+ cpu-s390.c \
cpu-sh.c \
cpu-sparc.c \
cpu-tic30.c \
@@ -322,6 +324,7 @@ BFD32_BACKENDS = \
elf32-mips.lo \
elf32-pj.lo \
elf32-ppc.lo \
+ elf32-s390.lo \
elf32-sh.lo \
elf32-sh-lin.lo \
elf32-sparc.lo \
@@ -460,6 +463,7 @@ BFD32_BACKENDS_CFILES = \
elf32-mips.c \
elf32-pj.c \
elf32-ppc.c \
+ elf32-s390.c \
elf32-sh.c \
elf32-sh-lin.c \
elf32-sparc.c \
@@ -542,6 +546,7 @@ BFD64_BACKENDS = \
elf64-ia64.lo \
elf64-gen.lo \
elf64-mips.lo \
+ elf64-s390.lo \
elf64-sparc.lo \
elf64.lo \
nlm32-alpha.lo \
@@ -559,6 +564,7 @@ BFD64_BACKENDS_CFILES = \
elf64-hppa.c \
elf64-gen.c \
elf64-mips.c \
+ elf64-s390.c \
elf64-sparc.c \
elf64.c \
nlm32-alpha.c \
@@ -1306,6 +1312,7 @@ cpu-ns32k.lo: cpu-ns32k.c $(INCDIR)/filenames.h ns32k.h
cpu-pj.lo: cpu-pj.c $(INCDIR)/filenames.h
cpu-powerpc.lo: cpu-powerpc.c $(INCDIR)/filenames.h
cpu-rs6000.lo: cpu-rs6000.c $(INCDIR)/filenames.h
+cpu-s390.lo: cpu-s390.c $(INCDIR)/filenames.h
cpu-sh.lo: cpu-sh.c $(INCDIR)/filenames.h
cpu-sparc.lo: cpu-sparc.c $(INCDIR)/filenames.h
cpu-tic30.lo: cpu-tic30.c $(INCDIR)/filenames.h
@@ -1564,6 +1571,11 @@ elf32-ppc.lo: elf32-ppc.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/elf/ppc.h $(INCDIR)/elf/reloc-macros.h \
elf32-target.h
+elf32-s390.lo: elf32-s390.c $(INCDIR)/filenames.h \
+ $(INCDIR)/bfdlink.h elf-bfd.h $(INCDIR)/elf/common.h \
+ $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/elf/s390.h \
+ $(INCDIR)/elf/reloc-macros.h $(INCDIR)/opcode/s390.h \
+ elf32-target.h
elf32-sh.lo: elf32-sh.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/elf/sh.h $(INCDIR)/elf/reloc-macros.h \
@@ -1808,6 +1820,11 @@ elf64-mips.lo: elf64-mips.c $(INCDIR)/filenames.h $(INCDIR)/aout/ar.h \
$(INCDIR)/elf/reloc-macros.h $(INCDIR)/coff/sym.h $(INCDIR)/coff/symconst.h \
$(INCDIR)/coff/internal.h $(INCDIR)/coff/ecoff.h $(INCDIR)/coff/alpha.h \
ecoffswap.h elf64-target.h
+elf64-s390.lo: elf64-s390.c $(INCDIR)/filenames.h \
+ elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
+ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/opcode/s390.h \
+ $(INCDIR)/elf/s390.h $(INCDIR)/elf/reloc-macros.h \
+ elf64-target.h
elf64-sparc.lo: elf64-sparc.c $(INCDIR)/filenames.h \
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/opcode/sparc.h \
diff --git a/bfd/archures.c b/bfd/archures.c
index 84b77449512..b15de5227f8 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -248,6 +248,9 @@ DESCRIPTION
.#define bfd_mach_avr4 4
.#define bfd_mach_avr5 5
. bfd_arch_cris, {* Axis CRIS *}
+. bfd_arch_s390, {* IBM s390 *}
+.#define bfd_mach_s390_esa 0
+.#define bfd_mach_s390_esame 1
. bfd_arch_last
. };
*/
@@ -323,6 +326,7 @@ extern const bfd_arch_info_type bfd_fr30_arch;
extern const bfd_arch_info_type bfd_mcore_arch;
extern const bfd_arch_info_type bfd_avr_arch;
extern const bfd_arch_info_type bfd_ia64_arch;
+extern const bfd_arch_info_type bfd_s390_arch;
static const bfd_arch_info_type * const bfd_archures_list[] = {
#ifdef SELECT_ARCHITECTURES
@@ -367,6 +371,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] = {
&bfd_mcore_arch,
&bfd_avr_arch,
&bfd_ia64_arch,
+ &bfd_s390_arch,
#endif
0
};
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index b8e864b2eed..db4576d99d1 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -1517,6 +1517,9 @@ enum bfd_architecture
#define bfd_mach_avr4 4
#define bfd_mach_avr5 5
bfd_arch_cris, /* Axis CRIS */
+ bfd_arch_s390, /* IBM s390 */
+#define bfd_mach_s390_esa 0
+#define bfd_mach_s390_esame 1
bfd_arch_last
};
@@ -2515,6 +2518,57 @@ value of SUBI insn. */
into 22 bits. */
BFD_RELOC_AVR_CALL,
+/* Direct 12 bit. */
+ BFD_RELOC_390_12,
+
+/* 12 bit GOT offset. */
+ BFD_RELOC_390_GOT12,
+
+/* 32 bit PC relative PLT address. */
+ BFD_RELOC_390_PLT32,
+
+/* Copy symbol at runtime. */
+ BFD_RELOC_390_COPY,
+
+/* Create GOT entry. */
+ BFD_RELOC_390_GLOB_DAT,
+
+/* Create PLT entry. */
+ BFD_RELOC_390_JMP_SLOT,
+
+/* Adjust by program base. */
+ BFD_RELOC_390_RELATIVE,
+
+/* 32 bit PC relative offset to GOT. */
+ BFD_RELOC_390_GOTPC,
+
+/* 16 bit GOT offset. */
+ BFD_RELOC_390_GOT16,
+
+/* PC relative 16 bit shifted by 1. */
+ BFD_RELOC_390_PC16DBL,
+
+/* 16 bit PC rel. PLT shifted by 1. */
+ BFD_RELOC_390_PLT16DBL,
+
+/* PC relative 32 bit shifted by 1. */
+ BFD_RELOC_390_PC32DBL,
+
+/* 32 bit PC rel. PLT shifted by 1. */
+ BFD_RELOC_390_PLT32DBL,
+
+/* 32 bit PC rel. GOT shifted by 1. */
+ BFD_RELOC_390_GOTPCDBL,
+
+/* 64 bit GOT offset. */
+ BFD_RELOC_390_GOT64,
+
+/* 64 bit PC relative PLT address. */
+ BFD_RELOC_390_PLT64,
+
+/* 32 bit rel. offset to GOT entry. */
+ BFD_RELOC_390_GOTENT,
+
/* These two relocations are used by the linker to determine which of
the entries in a C++ virtual function table are actually used. When
the --gc-sections option is given, the linker will zero out the entries
diff --git a/bfd/config.bfd b/bfd/config.bfd
index 580c82d9116..f45e8392536 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -46,6 +46,7 @@ m88*) targ_archs=bfd_m88k_arch ;;
mips*) targ_archs=bfd_mips_arch ;;
pj*) targ_archs="bfd_pj_arch bfd_i386_arch";;
powerpc*) targ_archs="bfd_rs6000_arch bfd_powerpc_arch" ;;
+s390*) targ_archs=bfd_s390_arch ;;
rs6000) targ_archs="bfd_rs6000_arch bfd_powerpc_arch" ;;
sparc*) targ_archs=bfd_sparc_arch ;;
v850*) targ_archs=bfd_v850_arch ;;
@@ -718,6 +719,15 @@ case "${targ}" in
targ_selvecs="bfd_powerpcle_pei_vec bfd_powerpc_pei_vec bfd_powerpcle_pe_vec bfd_powerpc_pe_vec"
;;
+ s390-*-linux*)
+ targ_defvec=bfd_elf32_s390_vec
+ ;;
+#ifdef BFD64
+ s390x-*-linux*)
+ targ_defvec=bfd_elf64_s390_vec
+ ;;
+#endif
+
sh-*-linux*)
targ_defvec=bfd_elf32_shblin_vec
targ_selvecs=bfd_elf32_shlin_vec
diff --git a/bfd/configure b/bfd/configure
index d65a37821b5..35bb8a175f0 100755
--- a/bfd/configure
+++ b/bfd/configure
@@ -5982,6 +5982,7 @@ do
bfd_elf32_pjl_vec) tb="$tb elf32-pj.lo elf32.lo $elf";;
bfd_elf32_powerpc_vec) tb="$tb elf32-ppc.lo elf32.lo $elf" ;;
bfd_elf32_powerpcle_vec) tb="$tb elf32-ppc.lo elf32.lo $elf" ;;
+ bfd_elf32_s390_vec) tb="$tb elf32-s390.lo elf32.lo $elf" ;;
bfd_elf32_sh_vec) tb="$tb elf32-sh.lo elf32.lo $elf coff-sh.lo" ;;
bfd_elf32_shl_vec) tb="$tb elf32-sh.lo elf32.lo $elf coff-sh.lo" ;;
bfd_elf32_shlin_vec) tb="$tb elf32-sh-lin.lo elf32.lo $elf coff-sh.lo cofflink.lo" ;;
@@ -5994,6 +5995,8 @@ do
target64=true ;;
bfd_elf64_little_generic_vec) tb="$tb elf64-gen.lo elf64.lo $elf"
target64=true ;;
+ bfd_elf64_s390_vec) tb="$tb elf64-s390.lo elf64.lo $elf"
+ target64=true ;;
bfd_elf64_sparc_vec) tb="$tb elf64-sparc.lo elf64.lo $elf"
target64=true ;;
cisco_core_big_vec) tb="$tb cisco-core.lo" ;;
@@ -6179,17 +6182,17 @@ for ac_hdr in unistd.h
do
ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:6183: checking for $ac_hdr" >&5
+echo "configure:6186: checking for $ac_hdr" >&5
if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 6188 "configure"
+#line 6191 "configure"
#include "confdefs.h"
#include <$ac_hdr>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:6193: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:6196: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
if test -z "$ac_err"; then
rm -rf conftest*
@@ -6218,12 +6221,12 @@ done
for ac_func in getpagesize
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:6222: checking for $ac_func" >&5
+echo "configure:6225: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 6227 "configure"
+#line 6230 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@@ -6246,7 +6249,7 @@ $ac_func();
; return 0; }
EOF
-if { (eval echo configure:6250: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:6253: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
@@ -6271,7 +6274,7 @@ fi
done
echo $ac_n "checking for working mmap""... $ac_c" 1>&6
-echo "configure:6275: checking for working mmap" >&5
+echo "configure:6278: checking for working mmap" >&5
if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -6279,7 +6282,7 @@ else
ac_cv_func_mmap_fixed_mapped=no
else
cat > conftest.$ac_ext <<EOF
-#line 6283 "configure"
+#line 6286 "configure"
#include "confdefs.h"
/* Thanks to Mike Haertel and Jim Avera for this test.
@@ -6419,7 +6422,7 @@ main()
}
EOF
-if { (eval echo configure:6423: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
+if { (eval echo configure:6426: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
then
ac_cv_func_mmap_fixed_mapped=yes
else
@@ -6444,12 +6447,12 @@ fi
for ac_func in madvise mprotect
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:6448: checking for $ac_func" >&5
+echo "configure:6451: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 6453 "configure"
+#line 6456 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@@ -6472,7 +6475,7 @@ $ac_func();
; return 0; }
EOF
-if { (eval echo configure:6476: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:6479: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
diff --git a/bfd/configure.in b/bfd/configure.in
index d643b973ae6..a65cb915193 100644
--- a/bfd/configure.in
+++ b/bfd/configure.in
@@ -531,6 +531,7 @@ do
bfd_elf32_pjl_vec) tb="$tb elf32-pj.lo elf32.lo $elf";;
bfd_elf32_powerpc_vec) tb="$tb elf32-ppc.lo elf32.lo $elf" ;;
bfd_elf32_powerpcle_vec) tb="$tb elf32-ppc.lo elf32.lo $elf" ;;
+ bfd_elf32_s390_vec) tb="$tb elf32-s390.lo elf32.lo $elf" ;;
bfd_elf32_sh_vec) tb="$tb elf32-sh.lo elf32.lo $elf coff-sh.lo" ;;
bfd_elf32_shl_vec) tb="$tb elf32-sh.lo elf32.lo $elf coff-sh.lo" ;;
bfd_elf32_shlin_vec) tb="$tb elf32-sh-lin.lo elf32.lo $elf coff-sh.lo cofflink.lo" ;;
@@ -543,6 +544,8 @@ do
target64=true ;;
bfd_elf64_little_generic_vec) tb="$tb elf64-gen.lo elf64.lo $elf"
target64=true ;;
+ bfd_elf64_s390_vec) tb="$tb elf64-s390.lo elf64.lo $elf"
+ target64=true ;;
bfd_elf64_sparc_vec) tb="$tb elf64-sparc.lo elf64.lo $elf"
target64=true ;;
cisco_core_big_vec) tb="$tb cisco-core.lo" ;;
diff --git a/bfd/cpu-s390.c b/bfd/cpu-s390.c
new file mode 100644
index 00000000000..15eb9a5831e
--- /dev/null
+++ b/bfd/cpu-s390.c
@@ -0,0 +1,56 @@
+/* BFD support for the s390 processor.
+ Copyright (C) 2000, 2001 Free Software Foundation, Inc.
+ Contributed by Carl B. Pedersen and Martin Schwidefsky.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ 02111-1307, USA. */
+
+#include "bfd.h"
+#include "sysdep.h"
+#include "libbfd.h"
+
+const bfd_arch_info_type bfd_s390_esame_arch =
+{
+ 64, /* bits in a word */
+ 64, /* bits in an address */
+ 8, /* bits in a byte */
+ bfd_arch_s390,
+ bfd_mach_s390_esame,
+ "s390",
+ "s390:esame",
+ 3, /* section alignment power */
+ true, /* the default */
+ bfd_default_compatible,
+ bfd_default_scan,
+ NULL
+};
+
+const bfd_arch_info_type bfd_s390_arch =
+{
+ 32, /* bits in a word */
+ 32, /* bits in an address */
+ 8, /* bits in a byte */
+ bfd_arch_s390,
+ bfd_mach_s390_esa,
+ "s390",
+ "s390:390",
+ 3, /* section alignment power */
+ true, /* the default */
+ bfd_default_compatible,
+ bfd_default_scan,
+ &bfd_s390_esame_arch
+};
diff --git a/bfd/elf.c b/bfd/elf.c
index 5ae24eef076..d5d0579782f 100644
--- a/bfd/elf.c
+++ b/bfd/elf.c
@@ -3320,6 +3320,9 @@ prep_headers (abfd)
case bfd_arch_m68hc12:
i_ehdrp->e_machine = EM_68HC12;
break;
+ case bfd_arch_s390:
+ i_ehdrp->e_machine = EM_S390;
+ break;
case bfd_arch_m68k:
i_ehdrp->e_machine = EM_68K;
break;
diff --git a/bfd/elf32-s390.c b/bfd/elf32-s390.c
new file mode 100644
index 00000000000..313a41a1314
--- /dev/null
+++ b/bfd/elf32-s390.c
@@ -0,0 +1,2179 @@
+/* IBM S/390-specific support for 32-bit ELF
+ Copyright (C) 2000, 2001 Free Software Foundation, Inc.
+ Contributed by Carl B. Pedersen and Martin Schwidefsky.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ 02111-1307, USA. */
+
+#include "bfd.h"
+#include "sysdep.h"
+#include "bfdlink.h"
+#include "libbfd.h"
+#include "elf-bfd.h"
+
+static reloc_howto_type *elf_s390_reloc_type_lookup
+ PARAMS ((bfd *, bfd_reloc_code_real_type));
+static void elf_s390_info_to_howto
+ PARAMS ((bfd *, arelent *, Elf_Internal_Rela *));
+static boolean elf_s390_is_local_label_name PARAMS ((bfd *, const char *));
+static struct bfd_hash_entry *elf_s390_link_hash_newfunc
+ PARAMS ((struct bfd_hash_entry *, struct bfd_hash_table *, const char *));
+static struct bfd_link_hash_table *elf_s390_link_hash_table_create
+ PARAMS ((bfd *));
+static boolean elf_s390_check_relocs
+ PARAMS ((bfd *, struct bfd_link_info *, asection *,
+ const Elf_Internal_Rela *));
+static boolean elf_s390_adjust_dynamic_symbol
+ PARAMS ((struct bfd_link_info *, struct elf_link_hash_entry *));
+static boolean elf_s390_size_dynamic_sections
+ PARAMS ((bfd *, struct bfd_link_info *));
+static boolean elf_s390_relocate_section
+ PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
+ Elf_Internal_Rela *, Elf_Internal_Sym *, asection **));
+static boolean elf_s390_finish_dynamic_symbol
+ PARAMS ((bfd *, struct bfd_link_info *, struct elf_link_hash_entry *,
+ Elf_Internal_Sym *));
+static boolean elf_s390_finish_dynamic_sections
+ PARAMS ((bfd *, struct bfd_link_info *));
+
+#define USE_RELA 1 /* We want RELA relocations, not REL. */
+
+#include "elf/s390.h"
+
+/* The relocation "howto" table. */
+
+static reloc_howto_type elf_howto_table[] =
+{
+ HOWTO (R_390_NONE, /* type */
+ 0, /* rightshift */
+ 0, /* size (0 = byte, 1 = short, 2 = long) */
+ 0, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_390_NONE", /* name */
+ false, /* partial_inplace */
+ 0, /* src_mask */
+ 0, /* dst_mask */
+ false), /* pcrel_offset */
+
+ HOWTO(R_390_8, 0, 0, 8, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_8", false, 0,0x000000ff, false),
+ HOWTO(R_390_12, 0, 1, 12, false, 0, complain_overflow_dont, bfd_elf_generic_reloc, "R_390_12", false, 0,0x00000fff, false),
+ HOWTO(R_390_16, 0, 1, 16, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_16", false, 0,0x0000ffff, false),
+ HOWTO(R_390_32, 0, 2, 32, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_32", false, 0,0xffffffff, false),
+ HOWTO(R_390_PC32, 0, 2, 32, true, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_PC32", false, 0,0xffffffff, true),
+ HOWTO(R_390_GOT12, 0, 1, 12, false, 0, complain_overflow_dont, bfd_elf_generic_reloc, "R_390_GOT12", false, 0,0x00000fff, false),
+ HOWTO(R_390_GOT32, 0, 2, 32, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_GOT32", false, 0,0xffffffff, false),
+ HOWTO(R_390_PLT32, 0, 2, 32, true, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_PLT32", false, 0,0xffffffff, true),
+ HOWTO(R_390_COPY, 0, 2, 32, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_COPY", false, 0,0xffffffff, false),
+ HOWTO(R_390_GLOB_DAT, 0, 2, 32, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_GLOB_DAT",false, 0,0xffffffff, false),
+ HOWTO(R_390_JMP_SLOT, 0, 2, 32, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_JMP_SLOT",false, 0,0xffffffff, false),
+ HOWTO(R_390_RELATIVE, 0, 2, 32, true, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_RELATIVE",false, 0,0xffffffff, false),
+ HOWTO(R_390_GOTOFF, 0, 2, 32, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_GOTOFF", false, 0,0xffffffff, false),
+ HOWTO(R_390_GOTPC, 0, 2, 32, true, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_GOTPC", false, 0,0xffffffff, true),
+ HOWTO(R_390_GOT16, 0, 1, 16, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_GOT16", false, 0,0x0000ffff, false),
+ HOWTO(R_390_PC16, 0, 1, 16, true, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_PC16", false, 0,0x0000ffff, true),
+ HOWTO(R_390_PC16DBL, 1, 1, 16, true, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_PC16DBL", false, 0,0x0000ffff, true),
+ HOWTO(R_390_PLT16DBL, 1, 1, 16, true, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_PLT16DBL", false, 0,0x0000ffff, true),
+};
+
+/* GNU extension to record C++ vtable hierarchy. */
+static reloc_howto_type elf32_s390_vtinherit_howto =
+ HOWTO (R_390_GNU_VTINHERIT, 0,2,0,false,0,complain_overflow_dont, NULL, "R_390_GNU_VTINHERIT", false,0, 0, false);
+static reloc_howto_type elf32_s390_vtentry_howto =
+ HOWTO (R_390_GNU_VTENTRY, 0,2,0,false,0,complain_overflow_dont, _bfd_elf_rel_vtable_reloc_fn,"R_390_GNU_VTENTRY", false,0,0, false);
+
+static reloc_howto_type *
+elf_s390_reloc_type_lookup (abfd, code)
+ bfd *abfd ATTRIBUTE_UNUSED;
+ bfd_reloc_code_real_type code;
+{
+ switch (code) {
+ case BFD_RELOC_NONE:
+ return &elf_howto_table[(int) R_390_NONE];
+ case BFD_RELOC_8:
+ return &elf_howto_table[(int) R_390_8];
+ case BFD_RELOC_390_12:
+ return &elf_howto_table[(int) R_390_12];
+ case BFD_RELOC_16:
+ return &elf_howto_table[(int) R_390_16];
+ case BFD_RELOC_32:
+ return &elf_howto_table[(int) R_390_32];
+ case BFD_RELOC_CTOR:
+ return &elf_howto_table[(int) R_390_32];
+ case BFD_RELOC_32_PCREL:
+ return &elf_howto_table[(int) R_390_PC32];
+ case BFD_RELOC_390_GOT12:
+ return &elf_howto_table[(int) R_390_GOT12];
+ case BFD_RELOC_32_GOT_PCREL:
+ return &elf_howto_table[(int) R_390_GOT32];
+ case BFD_RELOC_390_PLT32:
+ return &elf_howto_table[(int) R_390_PLT32];
+ case BFD_RELOC_390_COPY:
+ return &elf_howto_table[(int) R_390_COPY];
+ case BFD_RELOC_390_GLOB_DAT:
+ return &elf_howto_table[(int) R_390_GLOB_DAT];
+ case BFD_RELOC_390_JMP_SLOT:
+ return &elf_howto_table[(int) R_390_JMP_SLOT];
+ case BFD_RELOC_390_RELATIVE:
+ return &elf_howto_table[(int) R_390_RELATIVE];
+ case BFD_RELOC_32_GOTOFF:
+ return &elf_howto_table[(int) R_390_GOTOFF];
+ case BFD_RELOC_390_GOTPC:
+ return &elf_howto_table[(int) R_390_GOTPC];
+ case BFD_RELOC_390_GOT16:
+ return &elf_howto_table[(int) R_390_GOT16];
+ case BFD_RELOC_16_PCREL:
+ return &elf_howto_table[(int) R_390_PC16];
+ case BFD_RELOC_390_PC16DBL:
+ return &elf_howto_table[(int) R_390_PC16DBL];
+ case BFD_RELOC_390_PLT16DBL:
+ return &elf_howto_table[(int) R_390_PLT16DBL];
+ case BFD_RELOC_VTABLE_INHERIT:
+ return &elf32_s390_vtinherit_howto;
+ case BFD_RELOC_VTABLE_ENTRY:
+ return &elf32_s390_vtentry_howto;
+ default:
+ break;
+ }
+ return 0;
+}
+
+/* We need to use ELF32_R_TYPE so we have our own copy of this function,
+ and elf32-s390.c has its own copy. */
+
+static void
+elf_s390_info_to_howto (abfd, cache_ptr, dst)
+ bfd *abfd ATTRIBUTE_UNUSED;
+ arelent *cache_ptr;
+ Elf_Internal_Rela *dst;
+{
+ switch (ELF32_R_TYPE(dst->r_info))
+ {
+ case R_390_GNU_VTINHERIT:
+ cache_ptr->howto = &elf32_s390_vtinherit_howto;
+ break;
+
+ case R_390_GNU_VTENTRY:
+ cache_ptr->howto = &elf32_s390_vtentry_howto;
+ break;
+
+ default:
+ BFD_ASSERT (ELF32_R_TYPE(dst->r_info) < (unsigned int) R_390_max);
+ cache_ptr->howto = &elf_howto_table[ELF32_R_TYPE(dst->r_info)];
+ }
+}
+
+static boolean
+elf_s390_is_local_label_name (abfd, name)
+ bfd *abfd;
+ const char *name;
+{
+ if (name[0] == '.' && (name[1] == 'X' || name[1] == 'L'))
+ return true;
+
+ return _bfd_elf_is_local_label_name (abfd, name);
+}
+
+/* Functions for the 390 ELF linker. */
+
+/* The name of the dynamic interpreter. This is put in the .interp
+ section. */
+
+#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
+
+/* The nop opcode we use. */
+
+#define s390_NOP 0x07070707
+
+
+/* The size in bytes of the first entry in the procedure linkage table. */
+#define PLT_FIRST_ENTRY_SIZE 32
+/* The size in bytes of an entry in the procedure linkage table. */
+#define PLT_ENTRY_SIZE 32
+
+#define GOT_ENTRY_SIZE 4
+
+/* The first three entries in a procedure linkage table are reserved,
+ and the initial contents are unimportant (we zero them out).
+ Subsequent entries look like this. See the SVR4 ABI 386
+ supplement to see how this works. */
+
+/* For the s390, simple addr offset can only be 0 - 4096.
+ To use the full 2 GB address space, several instructions
+ are needed to load an address in a register and execute
+ a branch( or just saving the address)
+
+ Furthermore, only r 0 and 1 are free to use!!! */
+
+/* The first 3 words in the GOT are then reserved.
+ Word 0 is the address of the dynamic table.
+ Word 1 is a pointer to a structure describing the object
+ Word 2 is used to point to the loader entry address.
+
+ The code for position independand PLT entries looks like this:
+
+ r12 holds addr of the current GOT at entry to the PLT
+
+ The GOT holds the address in the PLT to be executed.
+ The loader then gets:
+ 24(15) = Pointer to the structure describing the object.
+ 28(15) = Offset in symbol table
+
+ The loader must then find the module where the function is
+ and insert the address in the GOT.
+
+ Note: 390 can only address +- 64 K relative.
+ We check if offset > 65536, then make a relative branch -64xxx
+ back to a previous defined branch
+
+PLT1: BASR 1,0 # 2 bytes
+ L 1,22(1) # 4 bytes Load offset in GOT in r 1
+ L 1,(1,12) # 4 bytes Load address from GOT in r1
+ BCR 15,1 # 2 bytes Jump to address
+RET1: BASR 1,0 # 2 bytes Return from GOT 1st time
+ L 1,14(1) # 4 bytes Load offset in symol table in r1
+ BRC 15,-x # 4 bytes Jump to start of PLT
+ .word 0 # 2 bytes filler
+ .long ? # 4 bytes offset in GOT
+ .long ? # 4 bytes offset into symbol table
+
+ This was the general case. There are two additional, optimizes PLT
+ definitions. One for GOT offsets < 4096 and one for GOT offsets < 32768.
+ First the one for GOT offsets < 4096:
+
+PLT1: L 1,<offset>(12) # 4 bytes Load address from GOT in R1
+ BCR 15,1 # 2 bytes Jump to address
+ .word 0,0,0 # 6 bytes filler
+RET1: BASR 1,0 # 2 bytes Return from GOT 1st time
+ L 1,14(1) # 4 bytes Load offset in symbol table in r1
+ BRC 15,-x # 4 bytes Jump to start of PLT
+ .word 0,0,0 # 6 bytes filler
+ .long ? # 4 bytes offset into symbol table
+
+ Second the one for GOT offsets < 32768:
+
+PLT1: LHI 1,<offset> # 4 bytes Load offset in GOT to r1
+ L 1,(1,12) # 4 bytes Load address from GOT to r1
+ BCR 15,1 # 2 bytes Jump to address
+ .word 0 # 2 bytes filler
+RET1: BASR 1,0 # 2 bytes Return from GOT 1st time
+ L 1,14(1) # 4 bytes Load offset in symbol table in r1
+ BRC 15,-x # 4 bytes Jump to start of PLT
+ .word 0,0,0 # 6 bytes filler
+ .long ? # 4 bytes offset into symbol table
+
+Total = 32 bytes per PLT entry
+
+ The code for static build PLT entries looks like this:
+
+PLT1: BASR 1,0 # 2 bytes
+ L 1,22(1) # 4 bytes Load address of GOT entry
+ L 1,0(0,1) # 4 bytes Load address from GOT in r1
+ BCR 15,1 # 2 bytes Jump to address
+RET1: BASR 1,0 # 2 bytes Return from GOT 1st time
+ L 1,14(1) # 4 bytes Load offset in symbol table in r1
+ BRC 15,-x # 4 bytes Jump to start of PLT
+ .word 0 # 2 bytes filler
+ .long ? # 4 bytes address of GOT entry
+ .long ? # 4 bytes offset into symbol table */
+
+#define PLT_PIC_ENTRY_WORD0 0x0d105810
+#define PLT_PIC_ENTRY_WORD1 0x10165811
+#define PLT_PIC_ENTRY_WORD2 0xc00007f1
+#define PLT_PIC_ENTRY_WORD3 0x0d105810
+#define PLT_PIC_ENTRY_WORD4 0x100ea7f4
+
+#define PLT_PIC12_ENTRY_WORD0 0x5810c000
+#define PLT_PIC12_ENTRY_WORD1 0x07f10000
+#define PLT_PIC12_ENTRY_WORD2 0x00000000
+#define PLT_PIC12_ENTRY_WORD3 0x0d105810
+#define PLT_PIC12_ENTRY_WORD4 0x100ea7f4
+
+#define PLT_PIC16_ENTRY_WORD0 0xa7180000
+#define PLT_PIC16_ENTRY_WORD1 0x5811c000
+#define PLT_PIC16_ENTRY_WORD2 0x07f10000
+#define PLT_PIC16_ENTRY_WORD3 0x0d105810
+#define PLT_PIC16_ENTRY_WORD4 0x100ea7f4
+
+#define PLT_ENTRY_WORD0 0x0d105810
+#define PLT_ENTRY_WORD1 0x10165810
+#define PLT_ENTRY_WORD2 0x100007f1
+#define PLT_ENTRY_WORD3 0x0d105810
+#define PLT_ENTRY_WORD4 0x100ea7f4
+
+/* The first PLT entry pushes the offset into the symbol table
+ from R1 onto the stack at 8(15) and the loader object info
+ at 12(15), loads the loader address in R1 and jumps to it. */
+
+/* The first entry in the PLT for PIC code:
+
+PLT0:
+ ST 1,28(15) # R1 has offset into symbol table
+ L 1,4(12) # Get loader ino(object struct address)
+ ST 1,24(15) # Store address
+ L 1,8(12) # Entry address of loader in R1
+ BR 1 # Jump to loader
+
+ The first entry in the PLT for static code:
+
+PLT0:
+ ST 1,28(15) # R1 has offset into symbol table
+ BASR 1,0
+ L 1,18(0,1) # Get address of GOT
+ MVC 24(4,15),4(1) # Move loader ino to stack
+ L 1,8(1) # Get address of loader
+ BR 1 # Jump to loader
+ .word 0 # filler
+ .long got # address of GOT */
+
+#define PLT_PIC_FIRST_ENTRY_WORD0 0x5010f01c
+#define PLT_PIC_FIRST_ENTRY_WORD1 0x5810c004
+#define PLT_PIC_FIRST_ENTRY_WORD2 0x5010f018
+#define PLT_PIC_FIRST_ENTRY_WORD3 0x5810c008
+#define PLT_PIC_FIRST_ENTRY_WORD4 0x07f10000
+
+#define PLT_FIRST_ENTRY_WORD0 0x5010f01c
+#define PLT_FIRST_ENTRY_WORD1 0x0d105810
+#define PLT_FIRST_ENTRY_WORD2 0x1012D203
+#define PLT_FIRST_ENTRY_WORD3 0xf0181004
+#define PLT_FIRST_ENTRY_WORD4 0x58101008
+#define PLT_FIRST_ENTRY_WORD5 0x07f10000
+
+/* The s390 linker needs to keep track of the number of relocs that it
+ decides to copy in check_relocs for each symbol. This is so that
+ it can discard PC relative relocs if it doesn't need them when
+ linking with -Bsymbolic. We store the information in a field
+ extending the regular ELF linker hash table. */
+
+/* This structure keeps track of the number of PC relative relocs we
+ have copied for a given symbol. */
+
+struct elf_s390_pcrel_relocs_copied
+{
+ /* Next section. */
+ struct elf_s390_pcrel_relocs_copied *next;
+ /* A section in dynobj. */
+ asection *section;
+ /* Number of relocs copied in this section. */
+ bfd_size_type count;
+};
+
+/* s390 ELF linker hash entry. */
+
+struct elf_s390_link_hash_entry
+{
+ struct elf_link_hash_entry root;
+
+ /* Number of PC relative relocs copied for this symbol. */
+ struct elf_s390_pcrel_relocs_copied *pcrel_relocs_copied;
+};
+
+/* s390 ELF linker hash table. */
+
+struct elf_s390_link_hash_table
+{
+ struct elf_link_hash_table root;
+};
+
+/* Declare this now that the above structures are defined. */
+
+static boolean elf_s390_discard_copies
+ PARAMS ((struct elf_s390_link_hash_entry *, PTR));
+
+/* Traverse an s390 ELF linker hash table. */
+
+#define elf_s390_link_hash_traverse(table, func, info) \
+ (elf_link_hash_traverse \
+ (&(table)->root, \
+ (boolean (*) PARAMS ((struct elf_link_hash_entry *, PTR))) (func), \
+ (info)))
+
+/* Get the s390 ELF linker hash table from a link_info structure. */
+
+#define elf_s390_hash_table(p) \
+ ((struct elf_s390_link_hash_table *) ((p)->hash))
+
+/* Create an entry in an s390 ELF linker hash table. */
+
+static struct bfd_hash_entry *
+elf_s390_link_hash_newfunc (entry, table, string)
+ struct bfd_hash_entry *entry;
+ struct bfd_hash_table *table;
+ const char *string;
+{
+ struct elf_s390_link_hash_entry *ret =
+ (struct elf_s390_link_hash_entry *) entry;
+
+ /* Allocate the structure if it has not already been allocated by a
+ subclass. */
+ if (ret == (struct elf_s390_link_hash_entry *) NULL)
+ ret = ((struct elf_s390_link_hash_entry *)
+ bfd_hash_allocate (table,
+ sizeof (struct elf_s390_link_hash_entry)));
+ if (ret == (struct elf_s390_link_hash_entry *) NULL)
+ return (struct bfd_hash_entry *) ret;
+
+ /* Call the allocation method of the superclass. */
+ ret = ((struct elf_s390_link_hash_entry *)
+ _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
+ table, string));
+ if (ret != (struct elf_s390_link_hash_entry *) NULL)
+ {
+ ret->pcrel_relocs_copied = NULL;
+ }
+
+ return (struct bfd_hash_entry *) ret;
+}
+
+/* Create an s390 ELF linker hash table. */
+
+static struct bfd_link_hash_table *
+elf_s390_link_hash_table_create (abfd)
+ bfd *abfd;
+{
+ struct elf_s390_link_hash_table *ret;
+
+ ret = ((struct elf_s390_link_hash_table *)
+ bfd_alloc (abfd, sizeof (struct elf_s390_link_hash_table)));
+ if (ret == (struct elf_s390_link_hash_table *) NULL)
+ return NULL;
+
+ if (! _bfd_elf_link_hash_table_init (&ret->root, abfd,
+ elf_s390_link_hash_newfunc))
+ {
+ bfd_release (abfd, ret);
+ return NULL;
+ }
+
+ return &ret->root.root;
+}
+
+
+/* Look through the relocs for a section during the first phase, and
+ allocate space in the global offset table or procedure linkage
+ table. */
+
+static boolean
+elf_s390_check_relocs (abfd, info, sec, relocs)
+ bfd *abfd;
+ struct bfd_link_info *info;
+ asection *sec;
+ const Elf_Internal_Rela *relocs;
+{
+ bfd *dynobj;
+ Elf_Internal_Shdr *symtab_hdr;
+ struct elf_link_hash_entry **sym_hashes;
+ bfd_signed_vma *local_got_refcounts;
+ const Elf_Internal_Rela *rel;
+ const Elf_Internal_Rela *rel_end;
+ asection *sgot;
+ asection *srelgot;
+ asection *sreloc;
+
+ if (info->relocateable)
+ return true;
+
+ dynobj = elf_hash_table (info)->dynobj;
+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
+ sym_hashes = elf_sym_hashes (abfd);
+ local_got_refcounts = elf_local_got_offsets (abfd);
+
+ sgot = NULL;
+ srelgot = NULL;
+ sreloc = NULL;
+
+ rel_end = relocs + sec->reloc_count;
+ for (rel = relocs; rel < rel_end; rel++)
+ {
+ unsigned long r_symndx;
+ struct elf_link_hash_entry *h;
+
+ r_symndx = ELF32_R_SYM (rel->r_info);
+
+ if (r_symndx < symtab_hdr->sh_info)
+ h = NULL;
+ else
+ h = sym_hashes[r_symndx - symtab_hdr->sh_info];
+
+ /* Some relocs require a global offset table. */
+ if (dynobj == NULL)
+ {
+ switch (ELF32_R_TYPE (rel->r_info))
+ {
+ case R_390_GOT12:
+ case R_390_GOT16:
+ case R_390_GOT32:
+ case R_390_GOTOFF:
+ case R_390_GOTPC:
+ elf_hash_table (info)->dynobj = dynobj = abfd;
+ if (! _bfd_elf_create_got_section (dynobj, info))
+ return false;
+ break;
+
+ default:
+ break;
+ }
+ }
+
+
+ switch (ELF32_R_TYPE (rel->r_info))
+ {
+ case R_390_GOT12:
+ case R_390_GOT16:
+ case R_390_GOT32:
+ /* This symbol requires a global offset table entry. */
+
+ if (sgot == NULL)
+ {
+ sgot = bfd_get_section_by_name (dynobj, ".got");
+ BFD_ASSERT (sgot != NULL);
+ }
+
+
+ if (srelgot == NULL
+ && (h != NULL || info->shared))
+ {
+ srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
+ if (srelgot == NULL)
+ {
+ srelgot = bfd_make_section (dynobj, ".rela.got");
+ if (srelgot == NULL
+ || ! bfd_set_section_flags (dynobj, srelgot,
+ (SEC_ALLOC
+ | SEC_LOAD
+ | SEC_HAS_CONTENTS
+ | SEC_IN_MEMORY
+ | SEC_LINKER_CREATED
+ | SEC_READONLY))
+ || ! bfd_set_section_alignment (dynobj, srelgot, 2))
+ return false;
+ }
+ }
+
+ if (h != NULL)
+ {
+ if (h->got.refcount == -1)
+ {
+ h->got.refcount = 1;
+
+ /* Make sure this symbol is output as a dynamic symbol. */
+ if (h->dynindx == -1)
+ {
+ if (! bfd_elf32_link_record_dynamic_symbol (info, h))
+ return false;
+ }
+
+ sgot->_raw_size += 4;
+ srelgot->_raw_size += sizeof (Elf32_External_Rela);
+ }
+ else
+ h->got.refcount += 1;
+ }
+ else
+ {
+ /* This is a global offset table entry for a local symbol. */
+ if (local_got_refcounts == NULL)
+ {
+ size_t size;
+
+ size = symtab_hdr->sh_info * sizeof (bfd_signed_vma);
+ local_got_refcounts = (bfd_signed_vma *)
+ bfd_alloc (abfd, size);
+ if (local_got_refcounts == NULL)
+ return false;
+ elf_local_got_refcounts (abfd) = local_got_refcounts;
+ memset (local_got_refcounts, -1, size);
+ }
+ if (local_got_refcounts[r_symndx] == -1)
+ {
+ local_got_refcounts[r_symndx] = 1;
+
+ sgot->_raw_size += 4;
+ if (info->shared)
+ {
+ /* If we are generating a shared object, we need to
+ output a R_390_RELATIVE reloc so that the dynamic
+ linker can adjust this GOT entry. */
+ srelgot->_raw_size += sizeof (Elf32_External_Rela);
+ }
+ }
+ else
+ local_got_refcounts[r_symndx] += 1;
+ }
+ break;
+
+ case R_390_PLT16DBL:
+ case R_390_PLT32:
+ /* This symbol requires a procedure linkage table entry. We
+ actually build the entry in adjust_dynamic_symbol,
+ because this might be a case of linking PIC code which is
+ never referenced by a dynamic object, in which case we
+ don't need to generate a procedure linkage table entry
+ after all. */
+
+ /* If this is a local symbol, we resolve it directly without
+ creating a procedure linkage table entry. */
+ if (h == NULL)
+ continue;
+
+ if (h->plt.refcount == -1)
+ {
+ h->plt.refcount = 1;
+ h->elf_link_hash_flags |= ELF_LINK_HASH_NEEDS_PLT;
+ }
+ else
+ h->plt.refcount += 1;
+ break;
+
+ case R_390_8:
+ case R_390_16:
+ case R_390_32:
+ case R_390_PC16:
+ case R_390_PC16DBL:
+ case R_390_PC32:
+ if (h != NULL)
+ h->elf_link_hash_flags |= ELF_LINK_NON_GOT_REF;
+
+ /* If we are creating a shared library, and this is a reloc
+ against a global symbol, or a non PC relative reloc
+ against a local symbol, then we need to copy the reloc
+ into the shared library. However, if we are linking with
+ -Bsymbolic, we do not need to copy a reloc against a
+ global symbol which is defined in an object we are
+ including in the link (i.e., DEF_REGULAR is set). At
+ this point we have not seen all the input files, so it is
+ possible that DEF_REGULAR is not set now but will be set
+ later (it is never cleared). We account for that
+ possibility below by storing information in the
+ pcrel_relocs_copied field of the hash table entry. */
+ if (info->shared
+ && (sec->flags & SEC_ALLOC) != 0
+ && ((ELF32_R_TYPE (rel->r_info) != R_390_PC16 &&
+ ELF32_R_TYPE (rel->r_info) != R_390_PC16DBL &&
+ ELF32_R_TYPE (rel->r_info) != R_390_PC32)
+ || (h != NULL
+ && (! info->symbolic
+ || (h->elf_link_hash_flags
+ & ELF_LINK_HASH_DEF_REGULAR) == 0))))
+ {
+ /* When creating a shared object, we must copy these
+ reloc types into the output file. We create a reloc
+ section in dynobj and make room for this reloc. */
+ if (sreloc == NULL)
+ {
+ const char *name;
+
+ name = (bfd_elf_string_from_elf_section
+ (abfd,
+ elf_elfheader (abfd)->e_shstrndx,
+ elf_section_data (sec)->rel_hdr.sh_name));
+ if (name == NULL)
+ return false;
+
+ BFD_ASSERT (strncmp (name, ".rela", 5) == 0
+ && strcmp (bfd_get_section_name (abfd, sec),
+ name + 5) == 0);
+
+ sreloc = bfd_get_section_by_name (dynobj, name);
+ if (sreloc == NULL)
+ {
+ flagword flags;
+
+ sreloc = bfd_make_section (dynobj, name);
+ flags = (SEC_HAS_CONTENTS | SEC_READONLY
+ | SEC_IN_MEMORY | SEC_LINKER_CREATED);
+ if ((sec->flags & SEC_ALLOC) != 0)
+ flags |= SEC_ALLOC | SEC_LOAD;
+ if (sreloc == NULL
+ || ! bfd_set_section_flags (dynobj, sreloc, flags)
+ || ! bfd_set_section_alignment (dynobj, sreloc, 2))
+ return false;
+ }
+ }
+
+ sreloc->_raw_size += sizeof (Elf32_External_Rela);
+
+ /* If we are linking with -Bsymbolic, and this is a
+ global symbol, we count the number of PC relative
+ relocations we have entered for this symbol, so that
+ we can discard them again if the symbol is later
+ defined by a regular object. Note that this function
+ is only called if we are using an elf_s390 linker
+ hash table, which means that h is really a pointer to
+ an elf_s390_link_hash_entry. */
+ if (h != NULL
+ && (ELF32_R_TYPE (rel->r_info) == R_390_PC16 ||
+ ELF32_R_TYPE (rel->r_info) == R_390_PC16DBL ||
+ ELF32_R_TYPE (rel->r_info) == R_390_PC32))
+ {
+ struct elf_s390_link_hash_entry *eh;
+ struct elf_s390_pcrel_relocs_copied *p;
+
+ eh = (struct elf_s390_link_hash_entry *) h;
+
+ for (p = eh->pcrel_relocs_copied; p != NULL; p = p->next)
+ if (p->section == sreloc)
+ break;
+
+ if (p == NULL)
+ {
+ p = ((struct elf_s390_pcrel_relocs_copied *)
+ bfd_alloc (dynobj, sizeof *p));
+ if (p == NULL)
+ return false;
+ p->next = eh->pcrel_relocs_copied;
+ eh->pcrel_relocs_copied = p;
+ p->section = sreloc;
+ p->count = 0;
+ }
+
+ ++p->count;
+ }
+ }
+
+ break;
+
+ /* This relocation describes the C++ object vtable hierarchy.
+ Reconstruct it for later use during GC. */
+ case R_390_GNU_VTINHERIT:
+ if (!_bfd_elf32_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
+ return false;
+ break;
+
+ /* This relocation describes which C++ vtable entries are actually
+ used. Record for later use during GC. */
+ case R_390_GNU_VTENTRY:
+ if (!_bfd_elf32_gc_record_vtentry (abfd, sec, h, rel->r_addend))
+ return false;
+ break;
+
+ default:
+ break;
+ }
+ }
+
+ return true;
+}
+
+/* Return the section that should be marked against GC for a given
+ relocation. */
+
+static asection *
+elf_s390_gc_mark_hook (abfd, info, rel, h, sym)
+ bfd *abfd;
+ struct bfd_link_info *info ATTRIBUTE_UNUSED;
+ Elf_Internal_Rela *rel;
+ struct elf_link_hash_entry *h;
+ Elf_Internal_Sym *sym;
+{
+ if (h != NULL)
+ {
+ switch (ELF32_R_TYPE (rel->r_info))
+ {
+ case R_390_GNU_VTINHERIT:
+ case R_390_GNU_VTENTRY:
+ break;
+
+ default:
+ switch (h->root.type)
+ {
+ case bfd_link_hash_defined:
+ case bfd_link_hash_defweak:
+ return h->root.u.def.section;
+
+ case bfd_link_hash_common:
+ return h->root.u.c.p->section;
+
+ default:
+ break;
+ }
+ }
+ }
+ else
+ {
+ if (!(elf_bad_symtab (abfd)
+ && ELF_ST_BIND (sym->st_info) != STB_LOCAL)
+ && ! ((sym->st_shndx <= 0 || sym->st_shndx >= SHN_LORESERVE)
+ && sym->st_shndx != SHN_COMMON))
+ {
+ return bfd_section_from_elf_index (abfd, sym->st_shndx);
+ }
+ }
+
+ return NULL;
+}
+
+/* Update the got entry reference counts for the section being removed. */
+
+static boolean
+elf_s390_gc_sweep_hook (abfd, info, sec, relocs)
+ bfd *abfd ATTRIBUTE_UNUSED;
+ struct bfd_link_info *info ATTRIBUTE_UNUSED;
+ asection *sec ATTRIBUTE_UNUSED;
+ const Elf_Internal_Rela *relocs ATTRIBUTE_UNUSED;
+{
+ Elf_Internal_Shdr *symtab_hdr;
+ struct elf_link_hash_entry **sym_hashes;
+ bfd_signed_vma *local_got_refcounts;
+ const Elf_Internal_Rela *rel, *relend;
+ unsigned long r_symndx;
+ struct elf_link_hash_entry *h;
+ bfd *dynobj;
+ asection *sgot;
+ asection *srelgot;
+
+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
+ sym_hashes = elf_sym_hashes (abfd);
+ local_got_refcounts = elf_local_got_refcounts (abfd);
+
+ dynobj = elf_hash_table (info)->dynobj;
+ if (dynobj == NULL)
+ return true;
+
+ sgot = bfd_get_section_by_name (dynobj, ".got");
+ srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
+
+ relend = relocs + sec->reloc_count;
+ for (rel = relocs; rel < relend; rel++)
+ switch (ELF32_R_TYPE (rel->r_info))
+ {
+ case R_390_GOT12:
+ case R_390_GOT16:
+ case R_390_GOT32:
+ case R_390_GOTOFF:
+ case R_390_GOTPC:
+ r_symndx = ELF32_R_SYM (rel->r_info);
+ if (r_symndx >= symtab_hdr->sh_info)
+ {
+ h = sym_hashes[r_symndx - symtab_hdr->sh_info];
+ if (h->got.refcount > 0)
+ {
+ h->got.refcount -= 1;
+ if (h->got.refcount == 0)
+ {
+ sgot->_raw_size -= 4;
+ srelgot->_raw_size -= sizeof (Elf32_External_Rela);
+ }
+ }
+ }
+ else if (local_got_refcounts != NULL)
+ {
+ if (local_got_refcounts[r_symndx] > 0)
+ {
+ local_got_refcounts[r_symndx] -= 1;
+ if (local_got_refcounts[r_symndx] == 0)
+ {
+ sgot->_raw_size -= 4;
+ if (info->shared)
+ srelgot->_raw_size -= sizeof (Elf32_External_Rela);
+ }
+ }
+ }
+ break;
+
+ case R_390_PLT16DBL:
+ case R_390_PLT32:
+ r_symndx = ELF32_R_SYM (rel->r_info);
+ if (r_symndx >= symtab_hdr->sh_info)
+ {
+ h = sym_hashes[r_symndx - symtab_hdr->sh_info];
+ if (h->plt.refcount > 0)
+ h->plt.refcount -= 1;
+ }
+ break;
+
+ default:
+ break;
+ }
+
+ return true;
+}
+
+/* Adjust a symbol defined by a dynamic object and referenced by a
+ regular object. The current definition is in some section of the
+ dynamic object, but we're not including those sections. We have to
+ change the definition to something the rest of the link can
+ understand. */
+
+static boolean
+elf_s390_adjust_dynamic_symbol (info, h)
+ struct bfd_link_info *info;
+ struct elf_link_hash_entry *h;
+{
+ bfd *dynobj;
+ asection *s;
+ unsigned int power_of_two;
+
+ dynobj = elf_hash_table (info)->dynobj;
+
+ /* Make sure we know what is going on here. */
+ BFD_ASSERT (dynobj != NULL
+ && ((h->elf_link_hash_flags & ELF_LINK_HASH_NEEDS_PLT)
+ || h->weakdef != NULL
+ || ((h->elf_link_hash_flags
+ & ELF_LINK_HASH_DEF_DYNAMIC) != 0
+ && (h->elf_link_hash_flags
+ & ELF_LINK_HASH_REF_REGULAR) != 0
+ && (h->elf_link_hash_flags
+ & ELF_LINK_HASH_DEF_REGULAR) == 0)));
+
+ /* If this is a function, put it in the procedure linkage table. We
+ will fill in the contents of the procedure linkage table later
+ (although we could actually do it here). */
+ if (h->type == STT_FUNC
+ || (h->elf_link_hash_flags & ELF_LINK_HASH_NEEDS_PLT) != 0)
+ {
+ if ((! info->shared
+ && (h->elf_link_hash_flags & ELF_LINK_HASH_DEF_DYNAMIC) == 0
+ && (h->elf_link_hash_flags & ELF_LINK_HASH_REF_DYNAMIC) == 0)
+ || (info->shared && h->plt.refcount <= 0))
+ {
+ /* This case can occur if we saw a PLT32 reloc in an input
+ file, but the symbol was never referred to by a dynamic
+ object, or if all references were garbage collected. In
+ such a case, we don't actually need to build a procedure
+ linkage table, and we can just do a PC32 reloc instead. */
+ h->plt.offset = (bfd_vma) -1;
+ h->elf_link_hash_flags &= ~ELF_LINK_HASH_NEEDS_PLT;
+ return true;
+ }
+
+ /* Make sure this symbol is output as a dynamic symbol. */
+ if (h->dynindx == -1)
+ {
+ if (! bfd_elf32_link_record_dynamic_symbol (info, h))
+ return false;
+ }
+
+ s = bfd_get_section_by_name (dynobj, ".plt");
+ BFD_ASSERT (s != NULL);
+
+ /* The first entry in .plt is reserved. */
+ if (s->_raw_size == 0)
+ s->_raw_size = PLT_FIRST_ENTRY_SIZE;
+
+ /* If this symbol is not defined in a regular file, and we are
+ not generating a shared library, then set the symbol to this
+ location in the .plt. This is required to make function
+ pointers compare as equal between the normal executable and
+ the shared library. */
+ if (! info->shared
+ && (h->elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR) == 0)
+ {
+ h->root.u.def.section = s;
+ h->root.u.def.value = s->_raw_size;
+ }
+
+ h->plt.offset = s->_raw_size;
+
+ /* Make room for this entry. */
+ s->_raw_size += PLT_ENTRY_SIZE;
+
+ /* We also need to make an entry in the .got.plt section, which
+ will be placed in the .got section by the linker script. */
+ s = bfd_get_section_by_name (dynobj, ".got.plt");
+ BFD_ASSERT (s != NULL);
+ s->_raw_size += GOT_ENTRY_SIZE;
+
+ /* We also need to make an entry in the .rela.plt section. */
+ s = bfd_get_section_by_name (dynobj, ".rela.plt");
+ BFD_ASSERT (s != NULL);
+ s->_raw_size += sizeof (Elf32_External_Rela);
+
+ return true;
+ }
+
+ /* If this is a weak symbol, and there is a real definition, the
+ processor independent code will have arranged for us to see the
+ real definition first, and we can just use the same value. */
+ if (h->weakdef != NULL)
+ {
+ BFD_ASSERT (h->weakdef->root.type == bfd_link_hash_defined
+ || h->weakdef->root.type == bfd_link_hash_defweak);
+ h->root.u.def.section = h->weakdef->root.u.def.section;
+ h->root.u.def.value = h->weakdef->root.u.def.value;
+ return true;
+ }
+
+ /* This is a reference to a symbol defined by a dynamic object which
+ is not a function. */
+
+ /* If we are creating a shared library, we must presume that the
+ only references to the symbol are via the global offset table.
+ For such cases we need not do anything here; the relocations will
+ be handled correctly by relocate_section. */
+ if (info->shared)
+ return true;
+
+ /* If there are no references to this symbol that do not use the
+ GOT, we don't need to generate a copy reloc. */
+ if ((h->elf_link_hash_flags & ELF_LINK_NON_GOT_REF) == 0)
+ return true;
+
+ /* We must allocate the symbol in our .dynbss section, which will
+ become part of the .bss section of the executable. There will be
+ an entry for this symbol in the .dynsym section. The dynamic
+ object will contain position independent code, so all references
+ from the dynamic object to this symbol will go through the global
+ offset table. The dynamic linker will use the .dynsym entry to
+ determine the address it must put in the global offset table, so
+ both the dynamic object and the regular object will refer to the
+ same memory location for the variable. */
+
+ s = bfd_get_section_by_name (dynobj, ".dynbss");
+ BFD_ASSERT (s != NULL);
+
+ /* We must generate a R_390_COPY reloc to tell the dynamic linker
+ to copy the initial value out of the dynamic object and into the
+ runtime process image. We need to remember the offset into the
+ .rel.bss section we are going to use. */
+ if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
+ {
+ asection *srel;
+
+ srel = bfd_get_section_by_name (dynobj, ".rela.bss");
+ BFD_ASSERT (srel != NULL);
+ srel->_raw_size += sizeof (Elf32_External_Rela);
+ h->elf_link_hash_flags |= ELF_LINK_HASH_NEEDS_COPY;
+ }
+
+ /* We need to figure out the alignment required for this symbol. I
+ have no idea how ELF linkers handle this. */
+ power_of_two = bfd_log2 (h->size);
+ if (power_of_two > 3)
+ power_of_two = 3;
+
+ /* Apply the required alignment. */
+ s->_raw_size = BFD_ALIGN (s->_raw_size,
+ (bfd_size_type) (1 << power_of_two));
+ if (power_of_two > bfd_get_section_alignment (dynobj, s))
+ {
+ if (! bfd_set_section_alignment (dynobj, s, power_of_two))
+ return false;
+ }
+
+ /* Define the symbol as being at this point in the section. */
+ h->root.u.def.section = s;
+ h->root.u.def.value = s->_raw_size;
+
+ /* Increment the section size to make room for the symbol. */
+ s->_raw_size += h->size;
+
+ return true;
+}
+
+/* Set the sizes of the dynamic sections. */
+
+static boolean
+elf_s390_size_dynamic_sections (output_bfd, info)
+ bfd *output_bfd;
+ struct bfd_link_info *info;
+{
+ bfd *dynobj;
+ asection *s;
+ boolean reltext;
+ boolean relocs;
+ boolean plt;
+
+ dynobj = elf_hash_table (info)->dynobj;
+ BFD_ASSERT (dynobj != NULL);
+
+ if (elf_hash_table (info)->dynamic_sections_created)
+ {
+ /* Set the contents of the .interp section to the interpreter. */
+ if (! info->shared)
+ {
+ s = bfd_get_section_by_name (dynobj, ".interp");
+ BFD_ASSERT (s != NULL);
+ s->_raw_size = sizeof ELF_DYNAMIC_INTERPRETER;
+ s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
+ }
+ }
+ else
+ {
+ /* We may have created entries in the .rela.got section.
+ However, if we are not creating the dynamic sections, we will
+ not actually use these entries. Reset the size of .rela.got,
+ which will cause it to get stripped from the output file
+ below. */
+ s = bfd_get_section_by_name (dynobj, ".rela.got");
+ if (s != NULL)
+ s->_raw_size = 0;
+ }
+
+ /* If this is a -Bsymbolic shared link, then we need to discard all
+ PC relative relocs against symbols defined in a regular object.
+ We allocated space for them in the check_relocs routine, but we
+ will not fill them in in the relocate_section routine. */
+ if (info->shared)
+ elf_s390_link_hash_traverse (elf_s390_hash_table (info),
+ elf_s390_discard_copies,
+ (PTR) info);
+
+ /* The check_relocs and adjust_dynamic_symbol entry points have
+ determined the sizes of the various dynamic sections. Allocate
+ memory for them. */
+ plt = false;
+ reltext = false;
+ relocs = false;
+ for (s = dynobj->sections; s != NULL; s = s->next)
+ {
+ const char *name;
+ boolean strip;
+
+ if ((s->flags & SEC_LINKER_CREATED) == 0)
+ continue;
+
+ /* It's OK to base decisions on the section name, because none
+ of the dynobj section names depend upon the input files. */
+ name = bfd_get_section_name (dynobj, s);
+
+ strip = false;
+
+ if (strcmp (name, ".plt") == 0)
+ {
+ if (s->_raw_size == 0)
+ {
+ /* Strip this section if we don't need it; see the
+ comment below. */
+ strip = true;
+ }
+ else
+ {
+ /* Remember whether there is a PLT. */
+ plt = true;
+ }
+ }
+ else if (strncmp (name, ".rela", 5) == 0)
+ {
+ if (s->_raw_size == 0)
+ {
+ /* If we don't need this section, strip it from the
+ output file. This is to handle .rela.bss and
+ .rel.plt. We must create it in
+ create_dynamic_sections, because it must be created
+ before the linker maps input sections to output
+ sections. The linker does that before
+ adjust_dynamic_symbol is called, and it is that
+ function which decides whether anything needs to go
+ into these sections. */
+ strip = true;
+ }
+ else
+ {
+ asection *target;
+
+ /* Remember whether there are any reloc sections other
+ than .rela.plt. */
+ if (strcmp (name, ".rela.plt") != 0)
+ {
+ const char *outname;
+
+ relocs = true;
+
+ /* If this relocation section applies to a read only
+ section, then we probably need a DT_TEXTREL
+ entry. The entries in the .rela.plt section
+ really apply to the .got section, which we
+ created ourselves and so know is not readonly. */
+ outname = bfd_get_section_name (output_bfd,
+ s->output_section);
+ target = bfd_get_section_by_name (output_bfd, outname + 5);
+ if (target != NULL
+ && (target->flags & SEC_READONLY) != 0
+ && (target->flags & SEC_ALLOC) != 0)
+ reltext = true;
+ }
+
+ /* We use the reloc_count field as a counter if we need
+ to copy relocs into the output file. */
+ s->reloc_count = 0;
+ }
+ }
+ else if (strncmp (name, ".got", 4) != 0)
+ {
+ /* It's not one of our sections, so don't allocate space. */
+ continue;
+ }
+
+ if (strip)
+ {
+ _bfd_strip_section_from_output (info, s);
+ continue;
+ }
+
+ /* Allocate memory for the section contents. */
+ s->contents = (bfd_byte *) bfd_alloc (dynobj, s->_raw_size);
+ if (s->contents == NULL && s->_raw_size != 0)
+ return false;
+ }
+
+ if (elf_hash_table (info)->dynamic_sections_created)
+ {
+ /* Add some entries to the .dynamic section. We fill in the
+ values later, in elf_s390_finish_dynamic_sections, but we
+ must add the entries now so that we get the correct size for
+ the .dynamic section. The DT_DEBUG entry is filled in by the
+ dynamic linker and used by the debugger. */
+ if (! info->shared)
+ {
+ if (! bfd_elf32_add_dynamic_entry (info, DT_DEBUG, 0))
+ return false;
+ }
+
+ if (plt)
+ {
+ if (! bfd_elf32_add_dynamic_entry (info, DT_PLTGOT, 0)
+ || ! bfd_elf32_add_dynamic_entry (info, DT_PLTRELSZ, 0)
+ || ! bfd_elf32_add_dynamic_entry (info, DT_PLTREL, DT_RELA)
+ || ! bfd_elf32_add_dynamic_entry (info, DT_JMPREL, 0))
+ return false;
+ }
+
+ if (relocs)
+ {
+ if (! bfd_elf32_add_dynamic_entry (info, DT_RELA, 0)
+ || ! bfd_elf32_add_dynamic_entry (info, DT_RELASZ, 0)
+ || ! bfd_elf32_add_dynamic_entry (info, DT_RELAENT,
+ sizeof (Elf32_External_Rela)))
+ return false;
+ }
+
+ if (reltext)
+ {
+ if (! bfd_elf32_add_dynamic_entry (info, DT_TEXTREL, 0))
+ return false;
+ info->flags |= DF_TEXTREL;
+ }
+ }
+
+ return true;
+}
+
+/* This function is called via elf_s390_link_hash_traverse if we are
+ creating a shared object with -Bsymbolic. It discards the space
+ allocated to copy PC relative relocs against symbols which are
+ defined in regular objects. We allocated space for them in the
+ check_relocs routine, but we won't fill them in in the
+ relocate_section routine. */
+
+/*ARGSUSED*/
+static boolean
+elf_s390_discard_copies (h, inf)
+ struct elf_s390_link_hash_entry *h;
+ PTR inf;
+{
+ struct elf_s390_pcrel_relocs_copied *s;
+ struct bfd_link_info *info = (struct bfd_link_info *) inf;
+
+ /* If a symbol has been forced local or we have found a regular
+ definition for the symbolic link case, then we won't be needing
+ any relocs. */
+ if ((h->root.elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR) != 0
+ && ((h->root.elf_link_hash_flags & ELF_LINK_FORCED_LOCAL) != 0
+ || info->symbolic))
+ {
+ for (s = h->pcrel_relocs_copied; s != NULL; s = s->next)
+ s->section->_raw_size -= s->count * sizeof (Elf32_External_Rela);
+ }
+ return true;
+}
+/* Relocate a 390 ELF section. */
+
+static boolean
+elf_s390_relocate_section (output_bfd, info, input_bfd, input_section,
+ contents, relocs, local_syms, local_sections)
+ bfd *output_bfd;
+ struct bfd_link_info *info;
+ bfd *input_bfd;
+ asection *input_section;
+ bfd_byte *contents;
+ Elf_Internal_Rela *relocs;
+ Elf_Internal_Sym *local_syms;
+ asection **local_sections;
+{
+ bfd *dynobj;
+ Elf_Internal_Shdr *symtab_hdr;
+ struct elf_link_hash_entry **sym_hashes;
+ bfd_vma *local_got_offsets;
+ asection *sgot;
+ asection *splt;
+ asection *sreloc;
+ Elf_Internal_Rela *rel;
+ Elf_Internal_Rela *relend;
+
+ dynobj = elf_hash_table (info)->dynobj;
+ symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
+ sym_hashes = elf_sym_hashes (input_bfd);
+ local_got_offsets = elf_local_got_offsets (input_bfd);
+
+ sgot = NULL;
+ splt = NULL;
+ sreloc = NULL;
+ if (dynobj != NULL)
+ {
+ splt = bfd_get_section_by_name (dynobj, ".plt");
+ sgot = bfd_get_section_by_name (dynobj, ".got");
+ }
+
+ rel = relocs;
+ relend = relocs + input_section->reloc_count;
+ for (; rel < relend; rel++)
+ {
+ int r_type;
+ reloc_howto_type *howto;
+ unsigned long r_symndx;
+ struct elf_link_hash_entry *h;
+ Elf_Internal_Sym *sym;
+ asection *sec;
+ bfd_vma relocation;
+ bfd_reloc_status_type r;
+
+ r_type = ELF32_R_TYPE (rel->r_info);
+ if (r_type == (int) R_390_GNU_VTINHERIT
+ || r_type == (int) R_390_GNU_VTENTRY)
+ continue;
+ if (r_type < 0 || r_type >= (int) R_390_max)
+ {
+ bfd_set_error (bfd_error_bad_value);
+ return false;
+ }
+ howto = elf_howto_table + r_type;
+
+ r_symndx = ELF32_R_SYM (rel->r_info);
+
+ if (info->relocateable)
+ {
+ /* This is a relocateable link. We don't have to change
+ anything, unless the reloc is against a section symbol,
+ in which case we have to adjust according to where the
+ section symbol winds up in the output section. */
+ if (r_symndx < symtab_hdr->sh_info)
+ {
+ sym = local_syms + r_symndx;
+ if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
+ {
+ sec = local_sections[r_symndx];
+ rel->r_addend += sec->output_offset + sym->st_value;
+ }
+ }
+
+ continue;
+ }
+
+ /* This is a final link. */
+ h = NULL;
+ sym = NULL;
+ sec = NULL;
+ if (r_symndx < symtab_hdr->sh_info)
+ {
+ sym = local_syms + r_symndx;
+ sec = local_sections[r_symndx];
+ relocation = (sec->output_section->vma
+ + sec->output_offset
+ + sym->st_value);
+ }
+ else
+ {
+ h = sym_hashes[r_symndx - symtab_hdr->sh_info];
+ while (h->root.type == bfd_link_hash_indirect
+ || h->root.type == bfd_link_hash_warning)
+ h = (struct elf_link_hash_entry *) h->root.u.i.link;
+ if (h->root.type == bfd_link_hash_defined
+ || h->root.type == bfd_link_hash_defweak)
+ {
+ sec = h->root.u.def.section;
+ if (r_type == R_390_GOTPC
+ || ((r_type == R_390_PLT16DBL ||
+ r_type == R_390_PLT32)
+ && splt != NULL
+ && h->plt.offset != (bfd_vma) -1)
+ || ((r_type == R_390_GOT12 ||
+ r_type == R_390_GOT16 ||
+ r_type == R_390_GOT32)
+ && elf_hash_table (info)->dynamic_sections_created
+ && (! info->shared
+ || (! info->symbolic && h->dynindx != -1)
+ || (h->elf_link_hash_flags
+ & ELF_LINK_HASH_DEF_REGULAR) == 0))
+ || (info->shared
+ && ((! info->symbolic && h->dynindx != -1)
+ || (h->elf_link_hash_flags
+ & ELF_LINK_HASH_DEF_REGULAR) == 0)
+ && ( r_type == R_390_8 ||
+ r_type == R_390_16 ||
+ r_type == R_390_32 ||
+ r_type == R_390_PC16 ||
+ r_type == R_390_PC16DBL ||
+ r_type == R_390_PC32)
+ && ((input_section->flags & SEC_ALLOC) != 0
+ /* DWARF will emit R_386_32 relocations in its
+ sections against symbols defined externally
+ in shared libraries. We can't do anything
+ with them here. */
+ || ((input_section->flags & SEC_DEBUGGING) != 0
+ && (h->elf_link_hash_flags
+ & ELF_LINK_HASH_DEF_DYNAMIC) != 0))))
+ {
+ /* In these cases, we don't need the relocation
+ value. We check specially because in some
+ obscure cases sec->output_section will be NULL. */
+ relocation = 0;
+ }
+ else if (sec->output_section == NULL)
+ {
+ (*_bfd_error_handler)
+ (_("%s: warning: unresolvable relocation against symbol `%s' from %s section"),
+ bfd_get_filename (input_bfd), h->root.root.string,
+ bfd_get_section_name (input_bfd, input_section));
+ relocation = 0;
+ }
+ else
+ relocation = (h->root.u.def.value
+ + sec->output_section->vma
+ + sec->output_offset);
+ }
+ else if (h->root.type == bfd_link_hash_undefweak)
+ relocation = 0;
+ else if (info->shared && !info->symbolic
+ && !info->no_undefined
+ && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
+ relocation = 0;
+ else
+ {
+ if (! ((*info->callbacks->undefined_symbol)
+ (info, h->root.root.string, input_bfd,
+ input_section, rel->r_offset,
+ (!info->shared || info->no_undefined
+ || ELF_ST_VISIBILITY (h->other)))))
+ return false;
+ relocation = 0;
+ }
+ }
+
+ switch (r_type)
+ {
+ case R_390_GOT12:
+ case R_390_GOT16:
+ case R_390_GOT32:
+ /* Relocation is to the entry for this symbol in the global
+ offset table. */
+ BFD_ASSERT (sgot != NULL);
+
+ if (h != NULL)
+ {
+ bfd_vma off;
+
+ off = h->got.offset;
+ BFD_ASSERT (off != (bfd_vma) -1);
+
+ if (! elf_hash_table (info)->dynamic_sections_created
+ || (info->shared
+ && (info->symbolic || h->dynindx == -1)
+ && (h->elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR)))
+ {
+ /* This is actually a static link, or it is a
+ -Bsymbolic link and the symbol is defined
+ locally, or the symbol was forced to be local
+ because of a version file. We must initialize
+ this entry in the global offset table. Since the
+ offset must always be a multiple of 2, we use the
+ least significant bit to record whether we have
+ initialized it already.
+
+ When doing a dynamic link, we create a .rel.got
+ relocation entry to initialize the value. This
+ is done in the finish_dynamic_symbol routine. */
+ if ((off & 1) != 0)
+ off &= ~1;
+ else
+ {
+ bfd_put_32 (output_bfd, relocation,
+ sgot->contents + off);
+ h->got.offset |= 1;
+ }
+ }
+ relocation = sgot->output_offset + off;
+ }
+ else
+ {
+ bfd_vma off;
+
+ BFD_ASSERT (local_got_offsets != NULL
+ && local_got_offsets[r_symndx] != (bfd_vma) -1);
+
+ off = local_got_offsets[r_symndx];
+
+ /* The offset must always be a multiple of 4. We use
+ the least significant bit to record whether we have
+ already generated the necessary reloc. */
+ if ((off & 1) != 0)
+ off &= ~1;
+ else
+ {
+ bfd_put_32 (output_bfd, relocation, sgot->contents + off);
+
+ if (info->shared)
+ {
+ asection *srelgot;
+ Elf_Internal_Rela outrel;
+
+ srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
+ BFD_ASSERT (srelgot != NULL);
+
+ outrel.r_offset = (sgot->output_section->vma
+ + sgot->output_offset
+ + off);
+ outrel.r_info = ELF32_R_INFO (0, R_390_RELATIVE);
+ outrel.r_addend = relocation;
+ bfd_elf32_swap_reloca_out (output_bfd, &outrel,
+ (((Elf32_External_Rela *)
+ srelgot->contents)
+ + srelgot->reloc_count));
+ ++srelgot->reloc_count;
+ }
+
+ local_got_offsets[r_symndx] |= 1;
+ }
+
+ relocation = sgot->output_offset + off;
+ }
+
+
+ break;
+
+ case R_390_GOTOFF:
+ /* Relocation is relative to the start of the global offset
+ table. */
+
+ if (sgot == NULL)
+ {
+ sgot = bfd_get_section_by_name (dynobj, ".got");
+ BFD_ASSERT (sgot != NULL);
+ }
+
+ /* Note that sgot->output_offset is not involved in this
+ calculation. We always want the start of .got. If we
+ defined _GLOBAL_OFFSET_TABLE in a different way, as is
+ permitted by the ABI, we might have to change this
+ calculation. */
+ relocation -= sgot->output_section->vma;
+
+ break;
+
+ case R_390_GOTPC:
+ /* Use global offset table as symbol value. */
+
+ if (sgot == NULL)
+ {
+ sgot = bfd_get_section_by_name (dynobj, ".got");
+ BFD_ASSERT (sgot != NULL);
+ }
+
+ relocation = sgot->output_section->vma;
+
+ break;
+
+ case R_390_PLT16DBL:
+ case R_390_PLT32:
+ /* Relocation is to the entry for this symbol in the
+ procedure linkage table. */
+
+ /* Resolve a PLT32 reloc against a local symbol directly,
+ without using the procedure linkage table. */
+ if (h == NULL)
+ break;
+
+ if (h->plt.offset == (bfd_vma) -1 || splt == NULL)
+ {
+ /* We didn't make a PLT entry for this symbol. This
+ happens when statically linking PIC code, or when
+ using -Bsymbolic. */
+ break;
+ }
+
+ relocation = (splt->output_section->vma
+ + splt->output_offset
+ + h->plt.offset);
+
+ break;
+
+ case R_390_8:
+ case R_390_16:
+ case R_390_32:
+ case R_390_PC16:
+ case R_390_PC16DBL:
+ case R_390_PC32:
+ if (info->shared
+ && (input_section->flags & SEC_ALLOC) != 0
+ && ((r_type != R_390_PC16 &&
+ r_type != R_390_PC16DBL &&
+ r_type != R_390_PC32)
+ || (h != NULL
+ && h->dynindx != -1
+ && (! info->symbolic
+ || (h->elf_link_hash_flags
+ & ELF_LINK_HASH_DEF_REGULAR) == 0))))
+ {
+ Elf_Internal_Rela outrel;
+ boolean skip, relocate;
+
+ /* When generating a shared object, these relocations
+ are copied into the output file to be resolved at run
+ time. */
+
+ if (sreloc == NULL)
+ {
+ const char *name;
+
+ name = (bfd_elf_string_from_elf_section
+ (input_bfd,
+ elf_elfheader (input_bfd)->e_shstrndx,
+ elf_section_data (input_section)->rel_hdr.sh_name));
+ if (name == NULL)
+ return false;
+
+ BFD_ASSERT (strncmp (name, ".rela", 5) == 0
+ && strcmp (bfd_get_section_name (input_bfd,
+ input_section),
+ name + 5) == 0);
+
+ sreloc = bfd_get_section_by_name (dynobj, name);
+ BFD_ASSERT (sreloc != NULL);
+ }
+
+ skip = false;
+
+ if (elf_section_data (input_section)->stab_info == NULL)
+ outrel.r_offset = rel->r_offset;
+ else
+ {
+ bfd_vma off;
+
+ off = (_bfd_stab_section_offset
+ (output_bfd, &elf_hash_table (info)->stab_info,
+ input_section,
+ &elf_section_data (input_section)->stab_info,
+ rel->r_offset));
+ if (off == (bfd_vma) -1)
+ skip = true;
+ outrel.r_offset = off;
+ }
+
+ outrel.r_offset += (input_section->output_section->vma
+ + input_section->output_offset);
+
+ if (skip)
+ {
+ memset (&outrel, 0, sizeof outrel);
+ relocate = false;
+ }
+ else if (r_type == R_390_PC16 ||
+ r_type == R_390_PC16DBL ||
+ r_type == R_390_PC32)
+ {
+ BFD_ASSERT (h != NULL && h->dynindx != -1);
+ relocate = false;
+ outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
+ outrel.r_addend = relocation + rel->r_addend;
+ }
+ else
+ {
+ /* h->dynindx may be -1 if this symbol was marked to
+ become local. */
+ if (h == NULL
+ || ((info->symbolic || h->dynindx == -1)
+ && (h->elf_link_hash_flags
+ & ELF_LINK_HASH_DEF_REGULAR) != 0))
+ {
+ relocate = true;
+ outrel.r_info = ELF32_R_INFO (0, R_390_RELATIVE);
+ outrel.r_addend = relocation + rel->r_addend;
+ }
+ else
+ {
+ BFD_ASSERT (h->dynindx != -1);
+ relocate = false;
+ outrel.r_info = ELF32_R_INFO (h->dynindx, R_390_32);
+ outrel.r_addend = relocation + rel->r_addend;
+ }
+ }
+
+ bfd_elf32_swap_reloca_out (output_bfd, &outrel,
+ (((Elf32_External_Rela *)
+ sreloc->contents)
+ + sreloc->reloc_count));
+ ++sreloc->reloc_count;
+
+ /* If this reloc is against an external symbol, we do
+ not want to fiddle with the addend. Otherwise, we
+ need to include the symbol value so that it becomes
+ an addend for the dynamic reloc. */
+ if (! relocate)
+ continue;
+ }
+
+ break;
+
+ default:
+ break;
+ }
+
+ r = _bfd_final_link_relocate (howto, input_bfd, input_section,
+ contents, rel->r_offset,
+ relocation, rel->r_addend);
+
+ if (r != bfd_reloc_ok)
+ {
+ switch (r)
+ {
+ default:
+ case bfd_reloc_outofrange:
+ abort ();
+ case bfd_reloc_overflow:
+ {
+ const char *name;
+
+ if (h != NULL)
+ name = h->root.root.string;
+ else
+ {
+ name = bfd_elf_string_from_elf_section (input_bfd,
+ symtab_hdr->sh_link,
+ sym->st_name);
+ if (name == NULL)
+ return false;
+ if (*name == '\0')
+ name = bfd_section_name (input_bfd, sec);
+ }
+ if (! ((*info->callbacks->reloc_overflow)
+ (info, name, howto->name, (bfd_vma) 0,
+ input_bfd, input_section, rel->r_offset)))
+ return false;
+ }
+ break;
+ }
+ }
+ }
+
+ return true;
+}
+
+/* Finish up dynamic symbol handling. We set the contents of various
+ dynamic sections here. */
+
+static boolean
+elf_s390_finish_dynamic_symbol (output_bfd, info, h, sym)
+ bfd *output_bfd;
+ struct bfd_link_info *info;
+ struct elf_link_hash_entry *h;
+ Elf_Internal_Sym *sym;
+{
+ bfd *dynobj;
+
+ dynobj = elf_hash_table (info)->dynobj;
+
+ if (h->plt.offset != (bfd_vma) -1)
+ {
+ asection *splt;
+ asection *srela;
+ Elf_Internal_Rela rela;
+ bfd_vma relative_offset;
+ bfd_vma got_offset;
+ bfd_vma plt_index;
+ asection *sgot;
+
+ /* This symbol has an entry in the procedure linkage table. Set
+ it up. */
+
+ BFD_ASSERT (h->dynindx != -1);
+
+ splt = bfd_get_section_by_name (dynobj, ".plt");
+ sgot = bfd_get_section_by_name (dynobj, ".got.plt");
+ srela = bfd_get_section_by_name (dynobj, ".rela.plt");
+ BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL);
+
+ /* Calc. index no.
+ Current offset - size first entry / entry size. */
+ plt_index = (h->plt.offset - PLT_FIRST_ENTRY_SIZE) / PLT_ENTRY_SIZE;
+
+ /* Offset in GOT is PLT index plus GOT headers(3) times 4,
+ addr & GOT addr. */
+ got_offset = (plt_index + 3) * GOT_ENTRY_SIZE;
+
+ /* S390 uses halfwords for relative branch calc! */
+ relative_offset = - ((PLT_FIRST_ENTRY_SIZE +
+ (PLT_ENTRY_SIZE * plt_index) + 18)/2);
+ /* If offset is > 32768, branch to a previous branch
+ 390 can only handle +-64 K jumps. */
+ if ( -32768 > (int)relative_offset )
+ relative_offset = -(((65536/PLT_ENTRY_SIZE-1)*PLT_ENTRY_SIZE)/2);
+
+ /* Fill in the entry in the procedure linkage table. */
+ if (!info->shared)
+ {
+ bfd_put_32 (output_bfd, PLT_ENTRY_WORD0,
+ splt->contents + h->plt.offset);
+ bfd_put_32 (output_bfd, PLT_ENTRY_WORD1,
+ splt->contents + h->plt.offset + 4);
+ bfd_put_32 (output_bfd, PLT_ENTRY_WORD2,
+ splt->contents + h->plt.offset + 8);
+ bfd_put_32 (output_bfd, PLT_ENTRY_WORD3,
+ splt->contents + h->plt.offset + 12);
+ bfd_put_32 (output_bfd, PLT_ENTRY_WORD4,
+ splt->contents + h->plt.offset + 16);
+ bfd_put_32 (output_bfd, 0+(relative_offset << 16),
+ splt->contents + h->plt.offset + 20);
+ bfd_put_32 (output_bfd,
+ (sgot->output_section->vma +
+ sgot->output_offset +
+ got_offset),
+ splt->contents + h->plt.offset + 24);
+ }
+ else if (got_offset < 4096)
+ {
+ bfd_put_32 (output_bfd, PLT_PIC12_ENTRY_WORD0 + got_offset,
+ splt->contents + h->plt.offset);
+ bfd_put_32 (output_bfd, PLT_PIC12_ENTRY_WORD1,
+ splt->contents + h->plt.offset + 4);
+ bfd_put_32 (output_bfd, PLT_PIC12_ENTRY_WORD2,
+ splt->contents + h->plt.offset + 8);
+ bfd_put_32 (output_bfd, PLT_PIC12_ENTRY_WORD3,
+ splt->contents + h->plt.offset + 12);
+ bfd_put_32 (output_bfd, PLT_PIC12_ENTRY_WORD4,
+ splt->contents + h->plt.offset + 16);
+ bfd_put_32 (output_bfd, 0+(relative_offset << 16),
+ splt->contents + h->plt.offset + 20);
+ bfd_put_32 (output_bfd, 0,
+ splt->contents + h->plt.offset + 24);
+ }
+ else if (got_offset < 32768)
+ {
+ bfd_put_32 (output_bfd, PLT_PIC16_ENTRY_WORD0 + got_offset,
+ splt->contents + h->plt.offset);
+ bfd_put_32 (output_bfd, PLT_PIC16_ENTRY_WORD1,
+ splt->contents + h->plt.offset + 4);
+ bfd_put_32 (output_bfd, PLT_PIC16_ENTRY_WORD2,
+ splt->contents + h->plt.offset + 8);
+ bfd_put_32 (output_bfd, PLT_PIC16_ENTRY_WORD3,
+ splt->contents + h->plt.offset + 12);
+ bfd_put_32 (output_bfd, PLT_PIC16_ENTRY_WORD4,
+ splt->contents + h->plt.offset + 16);
+ bfd_put_32 (output_bfd, 0+(relative_offset << 16),
+ splt->contents + h->plt.offset + 20);
+ bfd_put_32 (output_bfd, 0,
+ splt->contents + h->plt.offset + 24);
+ }
+ else
+ {
+ bfd_put_32 (output_bfd, PLT_PIC_ENTRY_WORD0,
+ splt->contents + h->plt.offset);
+ bfd_put_32 (output_bfd, PLT_PIC_ENTRY_WORD1,
+ splt->contents + h->plt.offset + 4);
+ bfd_put_32 (output_bfd, PLT_PIC_ENTRY_WORD2,
+ splt->contents + h->plt.offset + 8);
+ bfd_put_32 (output_bfd, PLT_PIC_ENTRY_WORD3,
+ splt->contents + h->plt.offset + 12);
+ bfd_put_32 (output_bfd, PLT_PIC_ENTRY_WORD4,
+ splt->contents + h->plt.offset + 16);
+ bfd_put_32 (output_bfd, 0+(relative_offset << 16),
+ splt->contents + h->plt.offset + 20);
+ bfd_put_32 (output_bfd, got_offset,
+ splt->contents + h->plt.offset + 24);
+ }
+ /* Insert offset into reloc. table here. */
+ bfd_put_32 (output_bfd, plt_index * sizeof (Elf32_External_Rela),
+ splt->contents + h->plt.offset + 28);
+ /* Fill in the entry in the .rela.plt section. */
+ rela.r_offset = (sgot->output_section->vma
+ + sgot->output_offset
+ + got_offset);
+ rela.r_info = ELF32_R_INFO (h->dynindx, R_390_JMP_SLOT);
+ rela.r_addend = 0;
+ bfd_elf32_swap_reloca_out (output_bfd, &rela,
+ ((Elf32_External_Rela *) srela->contents
+ + plt_index ));
+
+ /* Fill in the entry in the global offset table.
+ Points to instruction after GOT offset. */
+ bfd_put_32 (output_bfd,
+ (splt->output_section->vma
+ + splt->output_offset
+ + h->plt.offset
+ + 12),
+ sgot->contents + got_offset);
+
+
+ if ((h->elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR) == 0)
+ {
+ /* Mark the symbol as undefined, rather than as defined in
+ the .plt section. Leave the value alone. */
+ sym->st_shndx = SHN_UNDEF;
+ }
+ }
+
+ if (h->got.offset != (bfd_vma) -1)
+ {
+ asection *sgot;
+ asection *srela;
+ Elf_Internal_Rela rela;
+
+ /* This symbol has an entry in the global offset table. Set it
+ up. */
+
+ sgot = bfd_get_section_by_name (dynobj, ".got");
+ srela = bfd_get_section_by_name (dynobj, ".rela.got");
+ BFD_ASSERT (sgot != NULL && srela != NULL);
+
+ rela.r_offset = (sgot->output_section->vma
+ + sgot->output_offset
+ + (h->got.offset &~ 1));
+
+ /* If this is a static link, or it is a -Bsymbolic link and the
+ symbol is defined locally or was forced to be local because
+ of a version file, we just want to emit a RELATIVE reloc.
+ The entry in the global offset table will already have been
+ initialized in the relocate_section function. */
+ if (! elf_hash_table (info)->dynamic_sections_created
+ || (info->shared
+ && (info->symbolic || h->dynindx == -1)
+ && (h->elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR)))
+ {
+ rela.r_info = ELF32_R_INFO (0, R_390_RELATIVE);
+ rela.r_addend = (h->root.u.def.value
+ + h->root.u.def.section->output_section->vma
+ + h->root.u.def.section->output_offset);
+ }
+ else
+ {
+ BFD_ASSERT((h->got.offset & 1) == 0);
+ bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + h->got.offset);
+ rela.r_info = ELF32_R_INFO (h->dynindx, R_390_GLOB_DAT);
+ rela.r_addend = 0;
+ }
+
+ bfd_elf32_swap_reloca_out (output_bfd, &rela,
+ ((Elf32_External_Rela *) srela->contents
+ + srela->reloc_count));
+ ++srela->reloc_count;
+ }
+
+ if ((h->elf_link_hash_flags & ELF_LINK_HASH_NEEDS_COPY) != 0)
+ {
+ asection *s;
+ Elf_Internal_Rela rela;
+
+ /* This symbols needs a copy reloc. Set it up. */
+
+ BFD_ASSERT (h->dynindx != -1
+ && (h->root.type == bfd_link_hash_defined
+ || h->root.type == bfd_link_hash_defweak));
+
+
+ s = bfd_get_section_by_name (h->root.u.def.section->owner,
+ ".rela.bss");
+ BFD_ASSERT (s != NULL);
+
+ rela.r_offset = (h->root.u.def.value
+ + h->root.u.def.section->output_section->vma
+ + h->root.u.def.section->output_offset);
+ rela.r_info = ELF32_R_INFO (h->dynindx, R_390_COPY);
+ rela.r_addend = 0;
+ bfd_elf32_swap_reloca_out (output_bfd, &rela,
+ ((Elf32_External_Rela *) s->contents
+ + s->reloc_count));
+ ++s->reloc_count;
+ }
+
+ /* Mark some specially defined symbols as absolute. */
+ if (strcmp (h->root.root.string, "_DYNAMIC") == 0
+ || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0
+ || strcmp (h->root.root.string, "_PROCEDURE_LINKAGE_TABLE_") == 0)
+ sym->st_shndx = SHN_ABS;
+
+ return true;
+}
+
+/* Finish up the dynamic sections. */
+
+static boolean
+elf_s390_finish_dynamic_sections (output_bfd, info)
+ bfd *output_bfd;
+ struct bfd_link_info *info;
+{
+ bfd *dynobj;
+ asection *sdyn;
+ asection *sgot;
+
+ dynobj = elf_hash_table (info)->dynobj;
+
+ sgot = bfd_get_section_by_name (dynobj, ".got.plt");
+ BFD_ASSERT (sgot != NULL);
+ sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
+
+ if (elf_hash_table (info)->dynamic_sections_created)
+ {
+ asection *splt;
+ Elf32_External_Dyn *dyncon, *dynconend;
+
+ BFD_ASSERT (sdyn != NULL);
+
+ dyncon = (Elf32_External_Dyn *) sdyn->contents;
+ dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->_raw_size);
+ for (; dyncon < dynconend; dyncon++)
+ {
+ Elf_Internal_Dyn dyn;
+ const char *name;
+ asection *s;
+
+ bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
+
+ switch (dyn.d_tag)
+ {
+ default:
+ break;
+
+ case DT_PLTGOT:
+ name = ".got";
+ goto get_vma;
+ case DT_JMPREL:
+ name = ".rela.plt";
+ get_vma:
+ s = bfd_get_section_by_name(output_bfd, name);
+ BFD_ASSERT (s != NULL);
+ dyn.d_un.d_ptr = s->vma;
+ bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
+ break;
+
+ case DT_PLTRELSZ:
+ s = bfd_get_section_by_name (output_bfd, ".rela.plt");
+ BFD_ASSERT (s != NULL);
+ if (s->_cooked_size != 0)
+ dyn.d_un.d_val = s->_cooked_size;
+ else
+ dyn.d_un.d_val = s->_raw_size;
+ bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
+ break;
+ }
+ }
+
+ /* Fill in the special first entry in the procedure linkage table. */
+ splt = bfd_get_section_by_name (dynobj, ".plt");
+ if (splt && splt->_raw_size > 0)
+ {
+ memset (splt->contents, 0, PLT_FIRST_ENTRY_SIZE);
+ if (info->shared)
+ {
+ bfd_put_32 (output_bfd, PLT_PIC_FIRST_ENTRY_WORD0,
+ splt->contents );
+ bfd_put_32 (output_bfd, PLT_PIC_FIRST_ENTRY_WORD1,
+ splt->contents +4 );
+ bfd_put_32 (output_bfd, PLT_PIC_FIRST_ENTRY_WORD2,
+ splt->contents +8 );
+ bfd_put_32 (output_bfd, PLT_PIC_FIRST_ENTRY_WORD3,
+ splt->contents +12 );
+ bfd_put_32 (output_bfd, PLT_PIC_FIRST_ENTRY_WORD4,
+ splt->contents +16 );
+ }
+ else
+ {
+ bfd_put_32 (output_bfd, PLT_FIRST_ENTRY_WORD0,
+ splt->contents );
+ bfd_put_32 (output_bfd, PLT_FIRST_ENTRY_WORD1,
+ splt->contents +4 );
+ bfd_put_32 (output_bfd, PLT_FIRST_ENTRY_WORD2,
+ splt->contents +8 );
+ bfd_put_32 (output_bfd, PLT_FIRST_ENTRY_WORD3,
+ splt->contents +12 );
+ bfd_put_32 (output_bfd, PLT_FIRST_ENTRY_WORD4,
+ splt->contents +16 );
+ bfd_put_32 (output_bfd, PLT_FIRST_ENTRY_WORD5,
+ splt->contents +20 );
+ bfd_put_32 (output_bfd,
+ sgot->output_section->vma + sgot->output_offset,
+ splt->contents + 24);
+ }
+ elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
+ }
+
+ }
+
+ /* Set the first entry in the global offset table to the address of
+ the dynamic section. */
+ if (sgot->_raw_size > 0)
+ {
+ if (sdyn == NULL)
+ bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
+ else
+ bfd_put_32 (output_bfd,
+ sdyn->output_section->vma + sdyn->output_offset,
+ sgot->contents);
+
+ /* One entry for shared object struct ptr. */
+ bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
+ /* One entry for _dl_runtime_resolve. */
+ bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
+ }
+
+ elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
+
+ return true;
+}
+
+static boolean
+elf_s390_object_p (abfd)
+ bfd *abfd;
+{
+ return bfd_default_set_arch_mach (abfd, bfd_arch_s390, bfd_mach_s390_esa);
+}
+
+#define TARGET_BIG_SYM bfd_elf32_s390_vec
+#define TARGET_BIG_NAME "elf32-s390"
+#define ELF_ARCH bfd_arch_s390
+#define ELF_MACHINE_CODE EM_S390
+#define ELF_MACHINE_ALT1 EM_S390_OLD
+#define ELF_MAXPAGESIZE 0x1000
+
+#define elf_backend_can_gc_sections 1
+#define elf_backend_want_got_plt 1
+#define elf_backend_plt_readonly 1
+#define elf_backend_want_plt_sym 0
+#define elf_backend_got_header_size 12
+#define elf_backend_plt_header_size PLT_ENTRY_SIZE
+
+#define elf_info_to_howto elf_s390_info_to_howto
+
+#define bfd_elf32_bfd_final_link _bfd_elf32_gc_common_final_link
+#define bfd_elf32_bfd_is_local_label_name elf_s390_is_local_label_name
+#define bfd_elf32_bfd_link_hash_table_create elf_s390_link_hash_table_create
+#define bfd_elf32_bfd_reloc_type_lookup elf_s390_reloc_type_lookup
+
+#define elf_backend_adjust_dynamic_symbol elf_s390_adjust_dynamic_symbol
+#define elf_backend_check_relocs elf_s390_check_relocs
+#define elf_backend_create_dynamic_sections _bfd_elf_create_dynamic_sections
+#define elf_backend_finish_dynamic_sections elf_s390_finish_dynamic_sections
+#define elf_backend_finish_dynamic_symbol elf_s390_finish_dynamic_symbol
+#define elf_backend_gc_mark_hook elf_s390_gc_mark_hook
+#define elf_backend_gc_sweep_hook elf_s390_gc_sweep_hook
+#define elf_backend_relocate_section elf_s390_relocate_section
+#define elf_backend_size_dynamic_sections elf_s390_size_dynamic_sections
+
+#define elf_backend_object_p elf_s390_object_p
+
+#include "elf32-target.h"
diff --git a/bfd/elf64-s390.c b/bfd/elf64-s390.c
new file mode 100644
index 00000000000..9296a26976e
--- /dev/null
+++ b/bfd/elf64-s390.c
@@ -0,0 +1,2178 @@
+/* IBM S/390-specific support for 64-bit ELF
+ Copyright (C) 2000, 2001 Free Software Foundation, Inc.
+ Contributed Martin Schwidefsky (schwidefsky@de.ibm.com).
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ 02111-1307, USA. */
+
+#include "bfd.h"
+#include "sysdep.h"
+#include "bfdlink.h"
+#include "libbfd.h"
+#include "elf-bfd.h"
+
+static reloc_howto_type *elf_s390_reloc_type_lookup
+ PARAMS ((bfd *, bfd_reloc_code_real_type));
+static void elf_s390_info_to_howto
+ PARAMS ((bfd *, arelent *, Elf_Internal_Rela *));
+static boolean elf_s390_is_local_label_name PARAMS ((bfd *, const char *));
+static struct bfd_hash_entry *elf_s390_link_hash_newfunc
+ PARAMS ((struct bfd_hash_entry *, struct bfd_hash_table *, const char *));
+static struct bfd_link_hash_table *elf_s390_link_hash_table_create
+ PARAMS ((bfd *));
+static boolean elf_s390_check_relocs
+ PARAMS ((bfd *, struct bfd_link_info *, asection *,
+ const Elf_Internal_Rela *));
+static boolean elf_s390_adjust_dynamic_symbol
+ PARAMS ((struct bfd_link_info *, struct elf_link_hash_entry *));
+static boolean elf_s390_size_dynamic_sections
+ PARAMS ((bfd *, struct bfd_link_info *));
+static boolean elf_s390_relocate_section
+ PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
+ Elf_Internal_Rela *, Elf_Internal_Sym *, asection **));
+static boolean elf_s390_finish_dynamic_symbol
+ PARAMS ((bfd *, struct bfd_link_info *, struct elf_link_hash_entry *,
+ Elf_Internal_Sym *));
+static boolean elf_s390_finish_dynamic_sections
+ PARAMS ((bfd *, struct bfd_link_info *));
+
+#define USE_RELA 1 /* We want RELA relocations, not REL. */
+
+#include "elf/s390.h"
+
+/* In case we're on a 32-bit machine, construct a 64-bit "-1" value
+ from smaller values. Start with zero, widen, *then* decrement. */
+#define MINUS_ONE (((bfd_vma)0) - 1)
+
+/* The relocation "howto" table. */
+static reloc_howto_type elf_howto_table[] =
+{
+ HOWTO (R_390_NONE, /* type */
+ 0, /* rightshift */
+ 0, /* size (0 = byte, 1 = short, 2 = long) */
+ 0, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_390_NONE", /* name */
+ false, /* partial_inplace */
+ 0, /* src_mask */
+ 0, /* dst_mask */
+ false), /* pcrel_offset */
+
+ HOWTO(R_390_8, 0, 0, 8, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_8", false, 0,0x000000ff, false),
+ HOWTO(R_390_12, 0, 1, 12, false, 0, complain_overflow_dont, bfd_elf_generic_reloc, "R_390_12", false, 0,0x00000fff, false),
+ HOWTO(R_390_16, 0, 1, 16, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_16", false, 0,0x0000ffff, false),
+ HOWTO(R_390_32, 0, 2, 32, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_32", false, 0,0xffffffff, false),
+ HOWTO(R_390_PC32, 0, 2, 32, true, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_PC32", false, 0,0xffffffff, true),
+ HOWTO(R_390_GOT12, 0, 1, 12, false, 0, complain_overflow_dont, bfd_elf_generic_reloc, "R_390_GOT12", false, 0,0x00000fff, false),
+ HOWTO(R_390_GOT32, 0, 2, 32, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_GOT32", false, 0,0xffffffff, false),
+ HOWTO(R_390_PLT32, 0, 2, 32, true, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_PLT32", false, 0,0xffffffff, true),
+ HOWTO(R_390_COPY, 0, 4, 64, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_COPY", false, 0,MINUS_ONE, false),
+ HOWTO(R_390_GLOB_DAT, 0, 4, 64, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_GLOB_DAT",false, 0,MINUS_ONE, false),
+ HOWTO(R_390_JMP_SLOT, 0, 4, 64, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_JMP_SLOT",false, 0,MINUS_ONE, false),
+ HOWTO(R_390_RELATIVE, 0, 4, 64, true, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_RELATIVE",false, 0,MINUS_ONE, false),
+ HOWTO(R_390_GOTOFF, 0, 4, 64, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_GOTOFF", false, 0,MINUS_ONE, false),
+ HOWTO(R_390_GOTPC, 0, 4, 64, true, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_GOTPC", false, 0,MINUS_ONE, true),
+ HOWTO(R_390_GOT16, 0, 1, 16, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_GOT16", false, 0,0x0000ffff, false),
+ HOWTO(R_390_PC16, 0, 1, 16, true, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_PC16", false, 0,0x0000ffff, true),
+ HOWTO(R_390_PC16DBL, 1, 1, 16, true, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_PC16DBL", false, 0,0x0000ffff, true),
+ HOWTO(R_390_PLT16DBL, 1, 1, 16, true, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_PLT16DBL", false, 0,0x0000ffff, true),
+ HOWTO(R_390_PC32DBL, 1, 2, 32, true, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_PC32DBL", false, 0,0xffffffff, true),
+ HOWTO(R_390_PLT32DBL, 1, 2, 32, true, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_PLT32DBL", false, 0,0xffffffff, true),
+ HOWTO(R_390_GOTPCDBL, 1, 2, 32, true, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_GOTPCDBL", false, 0,MINUS_ONE, true),
+ HOWTO(R_390_64, 0, 4, 64, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_64", false, 0,MINUS_ONE, false),
+ HOWTO(R_390_PC64, 0, 4, 64, true, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_PC64", false, 0,MINUS_ONE, true),
+ HOWTO(R_390_GOT64, 0, 4, 64, false, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_GOT64", false, 0,MINUS_ONE, false),
+ HOWTO(R_390_PLT64, 0, 4, 64, true, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_PLT64", false, 0,MINUS_ONE, true),
+ HOWTO(R_390_GOTENT, 1, 2, 32, true, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_390_GOTENT", false, 0,MINUS_ONE, true),
+};
+
+/* GNU extension to record C++ vtable hierarchy. */
+static reloc_howto_type elf64_s390_vtinherit_howto =
+ HOWTO (R_390_GNU_VTINHERIT, 0,4,0,false,0,complain_overflow_dont, NULL, "R_390_GNU_VTINHERIT", false,0, 0, false);
+static reloc_howto_type elf64_s390_vtentry_howto =
+ HOWTO (R_390_GNU_VTENTRY, 0,4,0,false,0,complain_overflow_dont, _bfd_elf_rel_vtable_reloc_fn,"R_390_GNU_VTENTRY", false,0,0, false);
+
+static reloc_howto_type *
+elf_s390_reloc_type_lookup (abfd, code)
+ bfd *abfd ATTRIBUTE_UNUSED;
+ bfd_reloc_code_real_type code;
+{
+ switch (code) {
+ case BFD_RELOC_NONE:
+ return &elf_howto_table[(int) R_390_NONE];
+ case BFD_RELOC_8:
+ return &elf_howto_table[(int) R_390_8];
+ case BFD_RELOC_390_12:
+ return &elf_howto_table[(int) R_390_12];
+ case BFD_RELOC_16:
+ return &elf_howto_table[(int) R_390_16];
+ case BFD_RELOC_32:
+ return &elf_howto_table[(int) R_390_32];
+ case BFD_RELOC_CTOR:
+ return &elf_howto_table[(int) R_390_32];
+ case BFD_RELOC_32_PCREL:
+ return &elf_howto_table[(int) R_390_PC32];
+ case BFD_RELOC_390_GOT12:
+ return &elf_howto_table[(int) R_390_GOT12];
+ case BFD_RELOC_32_GOT_PCREL:
+ return &elf_howto_table[(int) R_390_GOT32];
+ case BFD_RELOC_390_PLT32:
+ return &elf_howto_table[(int) R_390_PLT32];
+ case BFD_RELOC_390_COPY:
+ return &elf_howto_table[(int) R_390_COPY];
+ case BFD_RELOC_390_GLOB_DAT:
+ return &elf_howto_table[(int) R_390_GLOB_DAT];
+ case BFD_RELOC_390_JMP_SLOT:
+ return &elf_howto_table[(int) R_390_JMP_SLOT];
+ case BFD_RELOC_390_RELATIVE:
+ return &elf_howto_table[(int) R_390_RELATIVE];
+ case BFD_RELOC_32_GOTOFF:
+ return &elf_howto_table[(int) R_390_GOTOFF];
+ case BFD_RELOC_390_GOTPC:
+ return &elf_howto_table[(int) R_390_GOTPC];
+ case BFD_RELOC_390_GOT16:
+ return &elf_howto_table[(int) R_390_GOT16];
+ case BFD_RELOC_16_PCREL:
+ return &elf_howto_table[(int) R_390_PC16];
+ case BFD_RELOC_390_PC16DBL:
+ return &elf_howto_table[(int) R_390_PC16DBL];
+ case BFD_RELOC_390_PLT16DBL:
+ return &elf_howto_table[(int) R_390_PLT16DBL];
+ case BFD_RELOC_VTABLE_INHERIT:
+ return &elf64_s390_vtinherit_howto;
+ case BFD_RELOC_VTABLE_ENTRY:
+ return &elf64_s390_vtentry_howto;
+ case BFD_RELOC_390_PC32DBL:
+ return &elf_howto_table[(int) R_390_PC32DBL];
+ case BFD_RELOC_390_PLT32DBL:
+ return &elf_howto_table[(int) R_390_PLT32DBL];
+ case BFD_RELOC_390_GOTPCDBL:
+ return &elf_howto_table[(int) R_390_GOTPCDBL];
+ case BFD_RELOC_64:
+ return &elf_howto_table[(int) R_390_64];
+ case BFD_RELOC_64_PCREL:
+ return &elf_howto_table[(int) R_390_PC64];
+ case BFD_RELOC_390_GOT64:
+ return &elf_howto_table[(int) R_390_GOT64];
+ case BFD_RELOC_390_PLT64:
+ return &elf_howto_table[(int) R_390_PLT64];
+ case BFD_RELOC_390_GOTENT:
+ return &elf_howto_table[(int) R_390_GOTENT];
+ default:
+ break;
+ }
+ return 0;
+}
+
+/* We need to use ELF64_R_TYPE so we have our own copy of this function,
+ and elf64-s390.c has its own copy. */
+
+static void
+elf_s390_info_to_howto (abfd, cache_ptr, dst)
+ bfd *abfd ATTRIBUTE_UNUSED;
+ arelent *cache_ptr;
+ Elf_Internal_Rela *dst;
+{
+ switch (ELF64_R_TYPE(dst->r_info))
+ {
+ case R_390_GNU_VTINHERIT:
+ cache_ptr->howto = &elf64_s390_vtinherit_howto;
+ break;
+
+ case R_390_GNU_VTENTRY:
+ cache_ptr->howto = &elf64_s390_vtentry_howto;
+ break;
+
+ default:
+ BFD_ASSERT (ELF64_R_TYPE(dst->r_info) < (unsigned int) R_390_max);
+ cache_ptr->howto = &elf_howto_table[ELF64_R_TYPE(dst->r_info)];
+ }
+}
+
+static boolean
+elf_s390_is_local_label_name (abfd, name)
+ bfd *abfd;
+ const char *name;
+{
+ if (name[0] == '.' && (name[1] == 'X' || name[1] == 'L'))
+ return true;
+
+ return _bfd_elf_is_local_label_name (abfd, name);
+}
+
+/* Functions for the 390 ELF linker. */
+
+/* The name of the dynamic interpreter. This is put in the .interp
+ section. */
+
+#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
+
+/* The nop opcode we use. */
+
+#define s390_NOP 0x07070707
+
+
+/* The size in bytes of the first entry in the procedure linkage table. */
+#define PLT_FIRST_ENTRY_SIZE 32
+/* The size in bytes of an entry in the procedure linkage table. */
+#define PLT_ENTRY_SIZE 32
+
+#define GOT_ENTRY_SIZE 8
+
+/* The first three entries in a procedure linkage table are reserved,
+ and the initial contents are unimportant (we zero them out).
+ Subsequent entries look like this. See the SVR4 ABI 386
+ supplement to see how this works. */
+
+/* For the s390, simple addr offset can only be 0 - 4096.
+ To use the full 16777216 TB address space, several instructions
+ are needed to load an address in a register and execute
+ a branch( or just saving the address)
+
+ Furthermore, only r 0 and 1 are free to use!!! */
+
+/* The first 3 words in the GOT are then reserved.
+ Word 0 is the address of the dynamic table.
+ Word 1 is a pointer to a structure describing the object
+ Word 2 is used to point to the loader entry address.
+
+ The code for PLT entries looks like this:
+
+ The GOT holds the address in the PLT to be executed.
+ The loader then gets:
+ 24(15) = Pointer to the structure describing the object.
+ 28(15) = Offset in symbol table
+ The loader must then find the module where the function is
+ and insert the address in the GOT.
+
+ PLT1: LARL 1,<fn>@GOTENT # 6 bytes Load address of GOT entry in r1
+ LG 1,0(1) # 6 bytes Load address from GOT in r1
+ BCR 15,1 # 2 bytes Jump to address
+ RET1: BASR 1,0 # 2 bytes Return from GOT 1st time
+ LGF 1,12(1) # 6 bytes Load offset in symbl table in r1
+ BRCL 15,-x # 6 bytes Jump to start of PLT
+ .long ? # 4 bytes offset into symbol table
+
+ Total = 32 bytes per PLT entry
+ Fixup at offset 2: relative address to GOT entry
+ Fixup at offset 22: relative branch to PLT0
+ Fixup at offset 28: 32 bit offset into symbol table
+
+ A 32 bit offset into the symbol table is enough. It allows for symbol
+ tables up to a size of 2 gigabyte. A single dynamic object (the main
+ program, any shared library) is limited to 4GB in size and I want to see
+ the program that manages to have a symbol table of more than 2 GB with a
+ total size of at max 4 GB. */
+
+#define PLT_ENTRY_WORD0 0xc0100000
+#define PLT_ENTRY_WORD1 0x0000e310
+#define PLT_ENTRY_WORD2 0x10000004
+#define PLT_ENTRY_WORD3 0x07f10d10
+#define PLT_ENTRY_WORD4 0xe310100c
+#define PLT_ENTRY_WORD5 0x0014c0f4
+#define PLT_ENTRY_WORD6 0x00000000
+#define PLT_ENTRY_WORD7 0x00000000
+
+/* The first PLT entry pushes the offset into the symbol table
+ from R1 onto the stack at 8(15) and the loader object info
+ at 12(15), loads the loader address in R1 and jumps to it. */
+
+/* The first entry in the PLT:
+
+ PLT0:
+ STG 1,56(15) # r1 contains the offset into the symbol table
+ LARL 1,_GLOBAL_OFFSET_TABLE # load address of global offset table
+ MVC 48(8,15),8(1) # move loader ino (object struct address) to stack
+ LG 1,16(1) # get entry address of loader
+ BCR 15,1 # jump to loader
+
+ Fixup at offset 8: relative address to start of GOT. */
+
+#define PLT_FIRST_ENTRY_WORD0 0xe310f038
+#define PLT_FIRST_ENTRY_WORD1 0x0024c010
+#define PLT_FIRST_ENTRY_WORD2 0x00000000
+#define PLT_FIRST_ENTRY_WORD3 0xd207f030
+#define PLT_FIRST_ENTRY_WORD4 0x1008e310
+#define PLT_FIRST_ENTRY_WORD5 0x10100004
+#define PLT_FIRST_ENTRY_WORD6 0x07f10700
+#define PLT_FIRST_ENTRY_WORD7 0x07000700
+
+/* The s390 linker needs to keep track of the number of relocs that it
+ decides to copy in check_relocs for each symbol. This is so that
+ it can discard PC relative relocs if it doesn't need them when
+ linking with -Bsymbolic. We store the information in a field
+ extending the regular ELF linker hash table. */
+
+/* This structure keeps track of the number of PC relative relocs we
+ have copied for a given symbol. */
+
+struct elf_s390_pcrel_relocs_copied
+{
+ /* Next section. */
+ struct elf_s390_pcrel_relocs_copied *next;
+ /* A section in dynobj. */
+ asection *section;
+ /* Number of relocs copied in this section. */
+ bfd_size_type count;
+};
+
+/* s390 ELF linker hash entry. */
+
+struct elf_s390_link_hash_entry
+{
+ struct elf_link_hash_entry root;
+
+ /* Number of PC relative relocs copied for this symbol. */
+ struct elf_s390_pcrel_relocs_copied *pcrel_relocs_copied;
+};
+
+/* s390 ELF linker hash table. */
+
+struct elf_s390_link_hash_table
+{
+ struct elf_link_hash_table root;
+};
+
+/* Declare this now that the above structures are defined. */
+
+static boolean elf_s390_discard_copies
+ PARAMS ((struct elf_s390_link_hash_entry *, PTR));
+
+/* Traverse an s390 ELF linker hash table. */
+
+#define elf_s390_link_hash_traverse(table, func, info) \
+ (elf_link_hash_traverse \
+ (&(table)->root, \
+ (boolean (*) PARAMS ((struct elf_link_hash_entry *, PTR))) (func), \
+ (info)))
+
+/* Get the s390 ELF linker hash table from a link_info structure. */
+
+#define elf_s390_hash_table(p) \
+ ((struct elf_s390_link_hash_table *) ((p)->hash))
+
+/* Create an entry in an s390 ELF linker hash table. */
+
+static struct bfd_hash_entry *
+elf_s390_link_hash_newfunc (entry, table, string)
+ struct bfd_hash_entry *entry;
+ struct bfd_hash_table *table;
+ const char *string;
+{
+ struct elf_s390_link_hash_entry *ret =
+ (struct elf_s390_link_hash_entry *) entry;
+
+ /* Allocate the structure if it has not already been allocated by a
+ subclass. */
+ if (ret == (struct elf_s390_link_hash_entry *) NULL)
+ ret = ((struct elf_s390_link_hash_entry *)
+ bfd_hash_allocate (table,
+ sizeof (struct elf_s390_link_hash_entry)));
+ if (ret == (struct elf_s390_link_hash_entry *) NULL)
+ return (struct bfd_hash_entry *) ret;
+
+ /* Call the allocation method of the superclass. */
+ ret = ((struct elf_s390_link_hash_entry *)
+ _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
+ table, string));
+ if (ret != (struct elf_s390_link_hash_entry *) NULL)
+ {
+ ret->pcrel_relocs_copied = NULL;
+ }
+
+ return (struct bfd_hash_entry *) ret;
+}
+
+/* Create an s390 ELF linker hash table. */
+
+static struct bfd_link_hash_table *
+elf_s390_link_hash_table_create (abfd)
+ bfd *abfd;
+{
+ struct elf_s390_link_hash_table *ret;
+
+ ret = ((struct elf_s390_link_hash_table *)
+ bfd_alloc (abfd, sizeof (struct elf_s390_link_hash_table)));
+ if (ret == (struct elf_s390_link_hash_table *) NULL)
+ return NULL;
+
+ if (! _bfd_elf_link_hash_table_init (&ret->root, abfd,
+ elf_s390_link_hash_newfunc))
+ {
+ bfd_release (abfd, ret);
+ return NULL;
+ }
+
+ return &ret->root.root;
+}
+
+
+/* Look through the relocs for a section during the first phase, and
+ allocate space in the global offset table or procedure linkage
+ table. */
+
+static boolean
+elf_s390_check_relocs (abfd, info, sec, relocs)
+ bfd *abfd;
+ struct bfd_link_info *info;
+ asection *sec;
+ const Elf_Internal_Rela *relocs;
+{
+ bfd *dynobj;
+ Elf_Internal_Shdr *symtab_hdr;
+ struct elf_link_hash_entry **sym_hashes;
+ bfd_signed_vma *local_got_refcounts;
+ const Elf_Internal_Rela *rel;
+ const Elf_Internal_Rela *rel_end;
+ asection *sgot;
+ asection *srelgot;
+ asection *sreloc;
+
+ if (info->relocateable)
+ return true;
+
+ dynobj = elf_hash_table (info)->dynobj;
+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
+ sym_hashes = elf_sym_hashes (abfd);
+ local_got_refcounts = elf_local_got_offsets (abfd);
+
+ sgot = NULL;
+ srelgot = NULL;
+ sreloc = NULL;
+
+ rel_end = relocs + sec->reloc_count;
+ for (rel = relocs; rel < rel_end; rel++)
+ {
+ unsigned long r_symndx;
+ struct elf_link_hash_entry *h;
+
+ r_symndx = ELF64_R_SYM (rel->r_info);
+
+ if (r_symndx < symtab_hdr->sh_info)
+ h = NULL;
+ else
+ h = sym_hashes[r_symndx - symtab_hdr->sh_info];
+
+ /* Some relocs require a global offset table. */
+ if (dynobj == NULL)
+ {
+ switch (ELF64_R_TYPE (rel->r_info))
+ {
+ case R_390_GOT12:
+ case R_390_GOT16:
+ case R_390_GOT32:
+ case R_390_GOT64:
+ case R_390_GOTOFF:
+ case R_390_GOTPC:
+ case R_390_GOTPCDBL:
+ case R_390_GOTENT:
+ elf_hash_table (info)->dynobj = dynobj = abfd;
+ if (! _bfd_elf_create_got_section (dynobj, info))
+ return false;
+ break;
+
+ default:
+ break;
+ }
+ }
+
+
+ switch (ELF64_R_TYPE (rel->r_info))
+ {
+ case R_390_GOT12:
+ case R_390_GOT16:
+ case R_390_GOT32:
+ case R_390_GOT64:
+ case R_390_GOTENT:
+ /* This symbol requires a global offset table entry. */
+
+ if (sgot == NULL)
+ {
+ sgot = bfd_get_section_by_name (dynobj, ".got");
+ BFD_ASSERT (sgot != NULL);
+ }
+
+
+ if (srelgot == NULL
+ && (h != NULL || info->shared))
+ {
+ srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
+ if (srelgot == NULL)
+ {
+ srelgot = bfd_make_section (dynobj, ".rela.got");
+ if (srelgot == NULL
+ || ! bfd_set_section_flags (dynobj, srelgot,
+ (SEC_ALLOC
+ | SEC_LOAD
+ | SEC_HAS_CONTENTS
+ | SEC_IN_MEMORY
+ | SEC_LINKER_CREATED
+ | SEC_READONLY))
+ || ! bfd_set_section_alignment (dynobj, srelgot, 2))
+ return false;
+ }
+ }
+
+ if (h != NULL)
+ {
+ if (h->got.refcount == -1)
+ {
+ h->got.refcount = 1;
+
+ /* Make sure this symbol is output as a dynamic symbol. */
+ if (h->dynindx == -1)
+ {
+ if (! bfd_elf64_link_record_dynamic_symbol (info, h))
+ return false;
+ }
+
+ sgot->_raw_size += 8;
+ srelgot->_raw_size += sizeof (Elf64_External_Rela);
+ }
+ else
+ h->got.refcount += 1;
+ }
+ else
+ {
+ /* This is a global offset table entry for a local symbol. */
+ if (local_got_refcounts == NULL)
+ {
+ size_t size;
+
+ size = symtab_hdr->sh_info * sizeof (bfd_vma);
+ local_got_refcounts = (bfd_signed_vma *)
+ bfd_alloc (abfd, size);
+ if (local_got_refcounts == NULL)
+ return false;
+ elf_local_got_refcounts (abfd) = local_got_refcounts;
+ memset (local_got_refcounts, -1, size);
+ }
+ if (local_got_refcounts[r_symndx] == -1)
+ {
+ local_got_refcounts[r_symndx] = 1;
+
+ sgot->_raw_size += 8;
+ if (info->shared)
+ {
+ /* If we are generating a shared object, we need to
+ output a R_390_RELATIVE reloc so that the dynamic
+ linker can adjust this GOT entry. */
+ srelgot->_raw_size += sizeof (Elf64_External_Rela);
+ }
+ }
+ else
+ local_got_refcounts[r_symndx] += 1;
+
+ }
+ break;
+
+ case R_390_PLT16DBL:
+ case R_390_PLT32:
+ case R_390_PLT32DBL:
+ case R_390_PLT64:
+ /* This symbol requires a procedure linkage table entry. We
+ actually build the entry in adjust_dynamic_symbol,
+ because this might be a case of linking PIC code which is
+ never referenced by a dynamic object, in which case we
+ don't need to generate a procedure linkage table entry
+ after all. */
+
+ /* If this is a local symbol, we resolve it directly without
+ creating a procedure linkage table entry. */
+ if (h == NULL)
+ continue;
+
+ if (h->plt.refcount == -1)
+ {
+ h->plt.refcount = 1;
+ h->elf_link_hash_flags |= ELF_LINK_HASH_NEEDS_PLT;
+ }
+ else
+ h->plt.refcount += 1;
+ break;
+
+ case R_390_8:
+ case R_390_16:
+ case R_390_32:
+ case R_390_64:
+ case R_390_PC16:
+ case R_390_PC16DBL:
+ case R_390_PC32:
+ case R_390_PC32DBL:
+ case R_390_PC64:
+ if (h != NULL)
+ h->elf_link_hash_flags |= ELF_LINK_NON_GOT_REF;
+
+ /* If we are creating a shared library, and this is a reloc
+ against a global symbol, or a non PC relative reloc
+ against a local symbol, then we need to copy the reloc
+ into the shared library. However, if we are linking with
+ -Bsymbolic, we do not need to copy a reloc against a
+ global symbol which is defined in an object we are
+ including in the link (i.e., DEF_REGULAR is set). At
+ this point we have not seen all the input files, so it is
+ possible that DEF_REGULAR is not set now but will be set
+ later (it is never cleared). We account for that
+ possibility below by storing information in the
+ pcrel_relocs_copied field of the hash table entry. */
+ if (info->shared
+ && (sec->flags & SEC_ALLOC) != 0
+ && (ELF64_R_TYPE (rel->r_info) == R_390_8
+ || ELF64_R_TYPE (rel->r_info) == R_390_16
+ || ELF64_R_TYPE (rel->r_info) == R_390_32
+ || ELF64_R_TYPE (rel->r_info) == R_390_64
+ || (h != NULL
+ && h->dynindx != -1
+ && (! info->symbolic
+ || (h->elf_link_hash_flags
+ & ELF_LINK_HASH_DEF_REGULAR) == 0))))
+ {
+ /* When creating a shared object, we must copy these
+ reloc types into the output file. We create a reloc
+ section in dynobj and make room for this reloc. */
+ if (sreloc == NULL)
+ {
+ const char *name;
+
+ name = (bfd_elf_string_from_elf_section
+ (abfd,
+ elf_elfheader (abfd)->e_shstrndx,
+ elf_section_data (sec)->rel_hdr.sh_name));
+ if (name == NULL)
+ return false;
+
+ BFD_ASSERT (strncmp (name, ".rela", 5) == 0
+ && strcmp (bfd_get_section_name (abfd, sec),
+ name + 5) == 0);
+
+ sreloc = bfd_get_section_by_name (dynobj, name);
+ if (sreloc == NULL)
+ {
+ flagword flags;
+
+ sreloc = bfd_make_section (dynobj, name);
+ flags = (SEC_HAS_CONTENTS | SEC_READONLY
+ | SEC_IN_MEMORY | SEC_LINKER_CREATED);
+ if ((sec->flags & SEC_ALLOC) != 0)
+ flags |= SEC_ALLOC | SEC_LOAD;
+ if (sreloc == NULL
+ || ! bfd_set_section_flags (dynobj, sreloc, flags)
+ || ! bfd_set_section_alignment (dynobj, sreloc, 2))
+ return false;
+ }
+ }
+
+ sreloc->_raw_size += sizeof (Elf64_External_Rela);
+
+ /* If we are linking with -Bsymbolic, and this is a
+ global symbol, we count the number of PC relative
+ relocations we have entered for this symbol, so that
+ we can discard them again if the symbol is later
+ defined by a regular object. Note that this function
+ is only called if we are using an elf64_s390 linker
+ hash table, which means that h is really a pointer to
+ an elf64_s390_link_hash_entry. */
+ if (h != NULL
+ && (ELF64_R_TYPE (rel->r_info) == R_390_PC16 ||
+ ELF64_R_TYPE (rel->r_info) == R_390_PC16DBL ||
+ ELF64_R_TYPE (rel->r_info) == R_390_PC32 ||
+ ELF64_R_TYPE (rel->r_info) == R_390_PC32DBL ||
+ ELF64_R_TYPE (rel->r_info) == R_390_PC64))
+ {
+ struct elf_s390_link_hash_entry *eh;
+ struct elf_s390_pcrel_relocs_copied *p;
+
+ eh = (struct elf_s390_link_hash_entry *) h;
+
+ for (p = eh->pcrel_relocs_copied; p != NULL; p = p->next)
+ if (p->section == sreloc)
+ break;
+
+ if (p == NULL)
+ {
+ p = ((struct elf_s390_pcrel_relocs_copied *)
+ bfd_alloc (dynobj, sizeof *p));
+ if (p == NULL)
+ return false;
+ p->next = eh->pcrel_relocs_copied;
+ eh->pcrel_relocs_copied = p;
+ p->section = sreloc;
+ p->count = 0;
+ }
+
+ ++p->count;
+ }
+ }
+
+ break;
+
+ /* This relocation describes the C++ object vtable hierarchy.
+ Reconstruct it for later use during GC. */
+ case R_390_GNU_VTINHERIT:
+ if (!_bfd_elf64_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
+ return false;
+ break;
+
+ /* This relocation describes which C++ vtable entries are actually
+ used. Record for later use during GC. */
+ case R_390_GNU_VTENTRY:
+ if (!_bfd_elf64_gc_record_vtentry (abfd, sec, h, rel->r_addend))
+ return false;
+ break;
+
+ default:
+ break;
+ }
+ }
+
+ return true;
+}
+
+/* Return the section that should be marked against GC for a given
+ relocation. */
+
+static asection *
+elf_s390_gc_mark_hook (abfd, info, rel, h, sym)
+ bfd *abfd;
+ struct bfd_link_info *info ATTRIBUTE_UNUSED;
+ Elf_Internal_Rela *rel;
+ struct elf_link_hash_entry *h;
+ Elf_Internal_Sym *sym;
+{
+ if (h != NULL)
+ {
+ switch (ELF64_R_TYPE (rel->r_info))
+ {
+ case R_390_GNU_VTINHERIT:
+ case R_390_GNU_VTENTRY:
+ break;
+
+ default:
+ switch (h->root.type)
+ {
+ case bfd_link_hash_defined:
+ case bfd_link_hash_defweak:
+ return h->root.u.def.section;
+
+ case bfd_link_hash_common:
+ return h->root.u.c.p->section;
+
+ default:
+ break;
+ }
+ }
+ }
+ else
+ {
+ if (!(elf_bad_symtab (abfd)
+ && ELF_ST_BIND (sym->st_info) != STB_LOCAL)
+ && ! ((sym->st_shndx <= 0 || sym->st_shndx >= SHN_LORESERVE)
+ && sym->st_shndx != SHN_COMMON))
+ {
+ return bfd_section_from_elf_index (abfd, sym->st_shndx);
+ }
+ }
+
+ return NULL;
+}
+
+/* Update the got entry reference counts for the section being removed. */
+
+static boolean
+elf_s390_gc_sweep_hook (abfd, info, sec, relocs)
+ bfd *abfd ATTRIBUTE_UNUSED;
+ struct bfd_link_info *info ATTRIBUTE_UNUSED;
+ asection *sec ATTRIBUTE_UNUSED;
+ const Elf_Internal_Rela *relocs ATTRIBUTE_UNUSED;
+{
+ Elf_Internal_Shdr *symtab_hdr;
+ struct elf_link_hash_entry **sym_hashes;
+ bfd_signed_vma *local_got_refcounts;
+ const Elf_Internal_Rela *rel, *relend;
+ unsigned long r_symndx;
+ struct elf_link_hash_entry *h;
+ bfd *dynobj;
+ asection *sgot;
+ asection *srelgot;
+
+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
+ sym_hashes = elf_sym_hashes (abfd);
+ local_got_refcounts = elf_local_got_refcounts (abfd);
+
+ dynobj = elf_hash_table (info)->dynobj;
+ if (dynobj == NULL)
+ return true;
+
+ sgot = bfd_get_section_by_name (dynobj, ".got");
+ srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
+
+ relend = relocs + sec->reloc_count;
+ for (rel = relocs; rel < relend; rel++)
+ switch (ELF64_R_TYPE (rel->r_info))
+ {
+ case R_390_GOT12:
+ case R_390_GOT16:
+ case R_390_GOT32:
+ case R_390_GOT64:
+ case R_390_GOTOFF:
+ case R_390_GOTPC:
+ case R_390_GOTPCDBL:
+ case R_390_GOTENT:
+ r_symndx = ELF64_R_SYM (rel->r_info);
+ if (r_symndx >= symtab_hdr->sh_info)
+ {
+ h = sym_hashes[r_symndx - symtab_hdr->sh_info];
+ if (h->got.refcount > 0)
+ {
+ h->got.refcount -= 1;
+ if (h->got.refcount == 0)
+ {
+ sgot->_raw_size -= 8;
+ srelgot->_raw_size -= sizeof (Elf64_External_Rela);
+ }
+ }
+ }
+ else if (local_got_refcounts != NULL)
+ {
+ if (local_got_refcounts[r_symndx] > 0)
+ {
+ local_got_refcounts[r_symndx] -= 1;
+ if (local_got_refcounts[r_symndx] == 0)
+ {
+ sgot->_raw_size -= 8;
+ if (info->shared)
+ srelgot->_raw_size -= sizeof (Elf64_External_Rela);
+ }
+ }
+ }
+ break;
+
+ case R_390_PLT16DBL:
+ case R_390_PLT32:
+ case R_390_PLT32DBL:
+ case R_390_PLT64:
+ r_symndx = ELF64_R_SYM (rel->r_info);
+ if (r_symndx >= symtab_hdr->sh_info)
+ {
+ h = sym_hashes[r_symndx - symtab_hdr->sh_info];
+ if (h->plt.refcount > 0)
+ h->plt.refcount -= 1;
+ }
+ break;
+
+ default:
+ break;
+ }
+
+ return true;
+}
+
+/* Adjust a symbol defined by a dynamic object and referenced by a
+ regular object. The current definition is in some section of the
+ dynamic object, but we're not including those sections. We have to
+ change the definition to something the rest of the link can
+ understand. */
+
+static boolean
+elf_s390_adjust_dynamic_symbol (info, h)
+ struct bfd_link_info *info;
+ struct elf_link_hash_entry *h;
+{
+ bfd *dynobj;
+ asection *s;
+ unsigned int power_of_two;
+
+ dynobj = elf_hash_table (info)->dynobj;
+
+ /* Make sure we know what is going on here. */
+ BFD_ASSERT (dynobj != NULL
+ && ((h->elf_link_hash_flags & ELF_LINK_HASH_NEEDS_PLT)
+ || h->weakdef != NULL
+ || ((h->elf_link_hash_flags
+ & ELF_LINK_HASH_DEF_DYNAMIC) != 0
+ && (h->elf_link_hash_flags
+ & ELF_LINK_HASH_REF_REGULAR) != 0
+ && (h->elf_link_hash_flags
+ & ELF_LINK_HASH_DEF_REGULAR) == 0)));
+
+ /* If this is a function, put it in the procedure linkage table. We
+ will fill in the contents of the procedure linkage table later
+ (although we could actually do it here). */
+ if (h->type == STT_FUNC
+ || (h->elf_link_hash_flags & ELF_LINK_HASH_NEEDS_PLT) != 0)
+ {
+ if ((! info->shared
+ && (h->elf_link_hash_flags & ELF_LINK_HASH_DEF_DYNAMIC) == 0
+ && (h->elf_link_hash_flags & ELF_LINK_HASH_REF_DYNAMIC) == 0)
+ || (info->shared && h->plt.refcount <= 0))
+ {
+ /* This case can occur if we saw a PLT32 reloc in an input
+ file, but the symbol was never referred to by a dynamic
+ object. In such a case, we don't actually need to build
+ a procedure linkage table, and we can just do a PC32
+ reloc instead. */
+ h->plt.offset = (bfd_vma) -1;
+ h->elf_link_hash_flags &= ~ELF_LINK_HASH_NEEDS_PLT;
+ return true;
+ }
+
+ /* Make sure this symbol is output as a dynamic symbol. */
+ if (h->dynindx == -1)
+ {
+ if (! bfd_elf64_link_record_dynamic_symbol (info, h))
+ return false;
+ }
+
+ s = bfd_get_section_by_name (dynobj, ".plt");
+ BFD_ASSERT (s != NULL);
+
+
+ /* The first entry in .plt is reserved. */
+ if (s->_raw_size == 0)
+ s->_raw_size = PLT_FIRST_ENTRY_SIZE;
+
+ /* If this symbol is not defined in a regular file, and we are
+ not generating a shared library, then set the symbol to this
+ location in the .plt. This is required to make function
+ pointers compare as equal between the normal executable and
+ the shared library. */
+ if (! info->shared
+ && (h->elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR) == 0)
+ {
+ h->root.u.def.section = s;
+ h->root.u.def.value = s->_raw_size;
+ }
+
+ h->plt.offset = s->_raw_size;
+
+ /* Make room for this entry. */
+ s->_raw_size += PLT_ENTRY_SIZE;
+
+ /* We also need to make an entry in the .got.plt section, which
+ will be placed in the .got section by the linker script. */
+ s = bfd_get_section_by_name (dynobj, ".got.plt");
+ BFD_ASSERT (s != NULL);
+ s->_raw_size += GOT_ENTRY_SIZE;
+
+ /* We also need to make an entry in the .rela.plt section. */
+ s = bfd_get_section_by_name (dynobj, ".rela.plt");
+ BFD_ASSERT (s != NULL);
+ s->_raw_size += sizeof (Elf64_External_Rela);
+
+ return true;
+ }
+
+ /* If this is a weak symbol, and there is a real definition, the
+ processor independent code will have arranged for us to see the
+ real definition first, and we can just use the same value. */
+ if (h->weakdef != NULL)
+ {
+ BFD_ASSERT (h->weakdef->root.type == bfd_link_hash_defined
+ || h->weakdef->root.type == bfd_link_hash_defweak);
+ h->root.u.def.section = h->weakdef->root.u.def.section;
+ h->root.u.def.value = h->weakdef->root.u.def.value;
+ return true;
+ }
+
+ /* This is a reference to a symbol defined by a dynamic object which
+ is not a function. */
+
+ /* If we are creating a shared library, we must presume that the
+ only references to the symbol are via the global offset table.
+ For such cases we need not do anything here; the relocations will
+ be handled correctly by relocate_section. */
+ if (info->shared)
+ return true;
+
+ /* If there are no references to this symbol that do not use the
+ GOT, we don't need to generate a copy reloc. */
+ if ((h->elf_link_hash_flags & ELF_LINK_NON_GOT_REF) == 0)
+ return true;
+
+ /* We must allocate the symbol in our .dynbss section, which will
+ become part of the .bss section of the executable. There will be
+ an entry for this symbol in the .dynsym section. The dynamic
+ object will contain position independent code, so all references
+ from the dynamic object to this symbol will go through the global
+ offset table. The dynamic linker will use the .dynsym entry to
+ determine the address it must put in the global offset table, so
+ both the dynamic object and the regular object will refer to the
+ same memory location for the variable. */
+
+ s = bfd_get_section_by_name (dynobj, ".dynbss");
+ BFD_ASSERT (s != NULL);
+
+ /* We must generate a R_390_COPY reloc to tell the dynamic linker
+ to copy the initial value out of the dynamic object and into the
+ runtime process image. We need to remember the offset into the
+ .rel.bss section we are going to use. */
+ if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
+ {
+ asection *srel;
+
+ srel = bfd_get_section_by_name (dynobj, ".rela.bss");
+ BFD_ASSERT (srel != NULL);
+ srel->_raw_size += sizeof (Elf64_External_Rela);
+ h->elf_link_hash_flags |= ELF_LINK_HASH_NEEDS_COPY;
+ }
+
+ /* We need to figure out the alignment required for this symbol. I
+ have no idea how ELF linkers handle this. */
+ power_of_two = bfd_log2 (h->size);
+ if (power_of_two > 3)
+ power_of_two = 3;
+
+ /* Apply the required alignment. */
+ s->_raw_size = BFD_ALIGN (s->_raw_size,
+ (bfd_size_type) (1 << power_of_two));
+ if (power_of_two > bfd_get_section_alignment (dynobj, s))
+ {
+ if (! bfd_set_section_alignment (dynobj, s, power_of_two))
+ return false;
+ }
+
+ /* Define the symbol as being at this point in the section. */
+ h->root.u.def.section = s;
+ h->root.u.def.value = s->_raw_size;
+
+ /* Increment the section size to make room for the symbol. */
+ s->_raw_size += h->size;
+
+ return true;
+}
+
+/* Set the sizes of the dynamic sections. */
+
+static boolean
+elf_s390_size_dynamic_sections (output_bfd, info)
+ bfd *output_bfd;
+ struct bfd_link_info *info;
+{
+ bfd *dynobj;
+ asection *s;
+ boolean reltext;
+ boolean relocs;
+ boolean plt;
+
+ dynobj = elf_hash_table (info)->dynobj;
+ BFD_ASSERT (dynobj != NULL);
+
+ if (elf_hash_table (info)->dynamic_sections_created)
+ {
+ /* Set the contents of the .interp section to the interpreter. */
+ if (! info->shared)
+ {
+ s = bfd_get_section_by_name (dynobj, ".interp");
+ BFD_ASSERT (s != NULL);
+ s->_raw_size = sizeof ELF_DYNAMIC_INTERPRETER;
+ s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
+ }
+ }
+ else
+ {
+ /* We may have created entries in the .rela.got section.
+ However, if we are not creating the dynamic sections, we will
+ not actually use these entries. Reset the size of .rela.got,
+ which will cause it to get stripped from the output file
+ below. */
+ s = bfd_get_section_by_name (dynobj, ".rela.got");
+ if (s != NULL)
+ s->_raw_size = 0;
+ }
+
+ /* If this is a -Bsymbolic shared link, then we need to discard all
+ PC relative relocs against symbols defined in a regular object.
+ We allocated space for them in the check_relocs routine, but we
+ will not fill them in in the relocate_section routine. */
+ if (info->shared)
+ elf_s390_link_hash_traverse (elf_s390_hash_table (info),
+ elf_s390_discard_copies,
+ (PTR) info);
+
+ /* The check_relocs and adjust_dynamic_symbol entry points have
+ determined the sizes of the various dynamic sections. Allocate
+ memory for them. */
+ plt = false;
+ reltext = false;
+ relocs = false;
+ for (s = dynobj->sections; s != NULL; s = s->next)
+ {
+ const char *name;
+ boolean strip;
+
+ if ((s->flags & SEC_LINKER_CREATED) == 0)
+ continue;
+
+ /* It's OK to base decisions on the section name, because none
+ of the dynobj section names depend upon the input files. */
+ name = bfd_get_section_name (dynobj, s);
+
+ strip = false;
+
+ if (strcmp (name, ".plt") == 0)
+ {
+ if (s->_raw_size == 0)
+ {
+ /* Strip this section if we don't need it; see the
+ comment below. */
+ strip = true;
+ }
+ else
+ {
+ /* Remember whether there is a PLT. */
+ plt = true;
+ }
+ }
+ else if (strncmp (name, ".rela", 5) == 0)
+ {
+ if (s->_raw_size == 0)
+ {
+ /* If we don't need this section, strip it from the
+ output file. This is to handle .rela.bss and
+ .rel.plt. We must create it in
+ create_dynamic_sections, because it must be created
+ before the linker maps input sections to output
+ sections. The linker does that before
+ adjust_dynamic_symbol is called, and it is that
+ function which decides whether anything needs to go
+ into these sections. */
+ strip = true;
+ }
+ else
+ {
+ asection *target;
+
+ /* Remember whether there are any reloc sections other
+ than .rela.plt. */
+ if (strcmp (name, ".rela.plt") != 0)
+ {
+ const char *outname;
+
+ relocs = true;
+
+ /* If this relocation section applies to a read only
+ section, then we probably need a DT_TEXTREL
+ entry. The entries in the .rela.plt section
+ really apply to the .got section, which we
+ created ourselves and so know is not readonly. */
+ outname = bfd_get_section_name (output_bfd,
+ s->output_section);
+ target = bfd_get_section_by_name (output_bfd, outname + 5);
+ if (target != NULL
+ && (target->flags & SEC_READONLY) != 0
+ && (target->flags & SEC_ALLOC) != 0)
+ reltext = true;
+ }
+
+ /* We use the reloc_count field as a counter if we need
+ to copy relocs into the output file. */
+ s->reloc_count = 0;
+ }
+ }
+ else if (strncmp (name, ".got", 4) != 0)
+ {
+ /* It's not one of our sections, so don't allocate space. */
+ continue;
+ }
+
+ if (strip)
+ {
+ _bfd_strip_section_from_output (info, s);
+ continue;
+ }
+
+ /* Allocate memory for the section contents. */
+ s->contents = (bfd_byte *) bfd_alloc (dynobj, s->_raw_size);
+ if (s->contents == NULL && s->_raw_size != 0)
+ return false;
+ }
+
+ if (elf_hash_table (info)->dynamic_sections_created)
+ {
+ /* Add some entries to the .dynamic section. We fill in the
+ values later, in elf_s390_finish_dynamic_sections, but we
+ must add the entries now so that we get the correct size for
+ the .dynamic section. The DT_DEBUG entry is filled in by the
+ dynamic linker and used by the debugger. */
+ if (! info->shared)
+ {
+ if (! bfd_elf64_add_dynamic_entry (info, DT_DEBUG, 0))
+ return false;
+ }
+
+ if (plt)
+ {
+ if (! bfd_elf64_add_dynamic_entry (info, DT_PLTGOT, 0)
+ || ! bfd_elf64_add_dynamic_entry (info, DT_PLTRELSZ, 0)
+ || ! bfd_elf64_add_dynamic_entry (info, DT_PLTREL, DT_RELA)
+ || ! bfd_elf64_add_dynamic_entry (info, DT_JMPREL, 0))
+ return false;
+ }
+
+ if (relocs)
+ {
+ if (! bfd_elf64_add_dynamic_entry (info, DT_RELA, 0)
+ || ! bfd_elf64_add_dynamic_entry (info, DT_RELASZ, 0)
+ || ! bfd_elf64_add_dynamic_entry (info, DT_RELAENT,
+ sizeof (Elf64_External_Rela)))
+ return false;
+ }
+
+ if (reltext)
+ {
+ if (! bfd_elf64_add_dynamic_entry (info, DT_TEXTREL, 0))
+ return false;
+ info->flags |= DF_TEXTREL;
+ }
+ }
+
+ return true;
+}
+
+/* This function is called via elf64_s390_link_hash_traverse if we are
+ creating a shared object with -Bsymbolic. It discards the space
+ allocated to copy PC relative relocs against symbols which are
+ defined in regular objects. We allocated space for them in the
+ check_relocs routine, but we won't fill them in in the
+ relocate_section routine. */
+
+/*ARGSUSED*/
+static boolean
+elf_s390_discard_copies (h, inf)
+ struct elf_s390_link_hash_entry *h;
+ PTR inf;
+{
+ struct elf_s390_pcrel_relocs_copied *s;
+ struct bfd_link_info *info = (struct bfd_link_info *) inf;
+
+ /* If a symbol has been forced local or we have found a regular
+ definition for the symbolic link case, then we won't be needing
+ any relocs. */
+ if ((h->root.elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR) != 0
+ && ((h->root.elf_link_hash_flags & ELF_LINK_FORCED_LOCAL) != 0
+ || info->symbolic))
+ {
+ for (s = h->pcrel_relocs_copied; s != NULL; s = s->next)
+ s->section->_raw_size -= s->count * sizeof (Elf64_External_Rela);
+ }
+
+ return true;
+}
+/* Relocate a 390 ELF section. */
+
+static boolean
+elf_s390_relocate_section (output_bfd, info, input_bfd, input_section,
+ contents, relocs, local_syms, local_sections)
+ bfd *output_bfd;
+ struct bfd_link_info *info;
+ bfd *input_bfd;
+ asection *input_section;
+ bfd_byte *contents;
+ Elf_Internal_Rela *relocs;
+ Elf_Internal_Sym *local_syms;
+ asection **local_sections;
+{
+ bfd *dynobj;
+ Elf_Internal_Shdr *symtab_hdr;
+ struct elf_link_hash_entry **sym_hashes;
+ bfd_vma *local_got_offsets;
+ asection *sgot;
+ asection *splt;
+ asection *sreloc;
+ Elf_Internal_Rela *rel;
+ Elf_Internal_Rela *relend;
+
+ dynobj = elf_hash_table (info)->dynobj;
+ symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
+ sym_hashes = elf_sym_hashes (input_bfd);
+ local_got_offsets = elf_local_got_offsets (input_bfd);
+
+ sgot = NULL;
+ splt = NULL;
+ sreloc = NULL;
+ if (dynobj != NULL)
+ {
+ splt = bfd_get_section_by_name (dynobj, ".plt");
+ sgot = bfd_get_section_by_name (dynobj, ".got");
+ }
+
+ rel = relocs;
+ relend = relocs + input_section->reloc_count;
+ for (; rel < relend; rel++)
+ {
+ int r_type;
+ reloc_howto_type *howto;
+ unsigned long r_symndx;
+ struct elf_link_hash_entry *h;
+ Elf_Internal_Sym *sym;
+ asection *sec;
+ bfd_vma relocation;
+ bfd_reloc_status_type r;
+
+ r_type = ELF64_R_TYPE (rel->r_info);
+ if (r_type == R_390_GNU_VTINHERIT
+ || r_type == R_390_GNU_VTENTRY)
+ continue;
+ if (r_type < 0 || r_type >= (int) R_390_max)
+ {
+ bfd_set_error (bfd_error_bad_value);
+ return false;
+ }
+ howto = elf_howto_table + r_type;
+
+ r_symndx = ELF64_R_SYM (rel->r_info);
+
+ if (info->relocateable)
+ {
+ /* This is a relocateable link. We don't have to change
+ anything, unless the reloc is against a section symbol,
+ in which case we have to adjust according to where the
+ section symbol winds up in the output section. */
+ if (r_symndx < symtab_hdr->sh_info)
+ {
+ sym = local_syms + r_symndx;
+ if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
+ {
+ sec = local_sections[r_symndx];
+ rel->r_addend += sec->output_offset + sym->st_value;
+ }
+ }
+
+ continue;
+ }
+
+ /* This is a final link. */
+ h = NULL;
+ sym = NULL;
+ sec = NULL;
+ if (r_symndx < symtab_hdr->sh_info)
+ {
+ sym = local_syms + r_symndx;
+ sec = local_sections[r_symndx];
+ relocation = (sec->output_section->vma
+ + sec->output_offset
+ + sym->st_value);
+ }
+ else
+ {
+ h = sym_hashes[r_symndx - symtab_hdr->sh_info];
+ while (h->root.type == bfd_link_hash_indirect
+ || h->root.type == bfd_link_hash_warning)
+ h = (struct elf_link_hash_entry *) h->root.u.i.link;
+ if (h->root.type == bfd_link_hash_defined
+ || h->root.type == bfd_link_hash_defweak)
+ {
+ sec = h->root.u.def.section;
+ if ((r_type == R_390_GOTPC
+ || r_type == R_390_GOTPCDBL)
+ || ((r_type == R_390_PLT16DBL ||
+ r_type == R_390_PLT32 ||
+ r_type == R_390_PLT32DBL ||
+ r_type == R_390_PLT64)
+ && splt != NULL
+ && h->plt.offset != (bfd_vma) -1)
+ || ((r_type == R_390_GOT12 ||
+ r_type == R_390_GOT16 ||
+ r_type == R_390_GOT32 ||
+ r_type == R_390_GOT64 ||
+ r_type == R_390_GOTENT)
+ && elf_hash_table (info)->dynamic_sections_created
+ && (! info->shared
+ || (! info->symbolic && h->dynindx != -1)
+ || (h->elf_link_hash_flags
+ & ELF_LINK_HASH_DEF_REGULAR) == 0))
+ || (info->shared
+ && ((! info->symbolic && h->dynindx != -1)
+ || (h->elf_link_hash_flags
+ & ELF_LINK_HASH_DEF_REGULAR) == 0)
+ && ( r_type == R_390_8 ||
+ r_type == R_390_16 ||
+ r_type == R_390_32 ||
+ r_type == R_390_64 ||
+ r_type == R_390_PC16 ||
+ r_type == R_390_PC16DBL ||
+ r_type == R_390_PC32 ||
+ r_type == R_390_PC32DBL ||
+ r_type == R_390_PC64)
+ && ((input_section->flags & SEC_ALLOC) != 0
+ /* DWARF will emit R_386_32 relocations in its
+ sections against symbols defined externally
+ in shared libraries. We can't do anything
+ with them here. */
+ || ((input_section->flags & SEC_DEBUGGING) != 0
+ && (h->elf_link_hash_flags
+ & ELF_LINK_HASH_DEF_DYNAMIC) != 0))))
+ {
+ /* In these cases, we don't need the relocation
+ value. We check specially because in some
+ obscure cases sec->output_section will be NULL. */
+ relocation = 0;
+ }
+ else if (sec->output_section == NULL)
+ {
+ (*_bfd_error_handler)
+ (_("%s: warning: unresolvable relocation against symbol `%s' from %s section"),
+ bfd_get_filename (input_bfd), h->root.root.string,
+ bfd_get_section_name (input_bfd, input_section));
+ relocation = 0;
+ }
+ else
+ relocation = (h->root.u.def.value
+ + sec->output_section->vma
+ + sec->output_offset);
+ }
+ else if (h->root.type == bfd_link_hash_undefweak)
+ relocation = 0;
+ else if (info->shared && !info->symbolic
+ && !info->no_undefined
+ && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
+ relocation = 0;
+ else
+ {
+ if (! ((*info->callbacks->undefined_symbol)
+ (info, h->root.root.string, input_bfd,
+ input_section, rel->r_offset,
+ (!info->shared || info->no_undefined
+ || ELF_ST_VISIBILITY (h->other)))))
+ return false;
+ relocation = 0;
+ }
+ }
+
+ switch (r_type)
+ {
+ case R_390_GOT12:
+ case R_390_GOT16:
+ case R_390_GOT32:
+ case R_390_GOT64:
+ case R_390_GOTENT:
+ /* Relocation is to the entry for this symbol in the global
+ offset table. */
+ BFD_ASSERT (sgot != NULL);
+
+ if (h != NULL)
+ {
+ bfd_vma off;
+
+ off = h->got.offset;
+ BFD_ASSERT (off != (bfd_vma) -1);
+
+ if (! elf_hash_table (info)->dynamic_sections_created
+ || (info->shared
+ && (info->symbolic || h->dynindx == -1)
+ && (h->elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR)))
+ {
+ /* This is actually a static link, or it is a
+ -Bsymbolic link and the symbol is defined
+ locally, or the symbol was forced to be local
+ because of a version file. We must initialize
+ this entry in the global offset table. Since the
+ offset must always be a multiple of 2, we use the
+ least significant bit to record whether we have
+ initialized it already.
+
+ When doing a dynamic link, we create a .rel.got
+ relocation entry to initialize the value. This
+ is done in the finish_dynamic_symbol routine. */
+ if ((off & 1) != 0)
+ off &= ~1;
+ else
+ {
+ bfd_put_64 (output_bfd, relocation,
+ sgot->contents + off);
+ h->got.offset |= 1;
+ }
+ }
+ relocation = sgot->output_offset + off;
+ }
+ else
+ {
+ bfd_vma off;
+
+ BFD_ASSERT (local_got_offsets != NULL
+ && local_got_offsets[r_symndx] != (bfd_vma) -1);
+
+ off = local_got_offsets[r_symndx];
+
+ /* The offset must always be a multiple of 8. We use
+ the least significant bit to record whether we have
+ already generated the necessary reloc. */
+ if ((off & 1) != 0)
+ off &= ~1;
+ else
+ {
+ bfd_put_64 (output_bfd, relocation, sgot->contents + off);
+
+ if (info->shared)
+ {
+ asection *srelgot;
+ Elf_Internal_Rela outrel;
+
+ srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
+ BFD_ASSERT (srelgot != NULL);
+
+ outrel.r_offset = (sgot->output_section->vma
+ + sgot->output_offset
+ + off);
+ outrel.r_info = ELF64_R_INFO (0, R_390_RELATIVE);
+ outrel.r_addend = relocation;
+ bfd_elf64_swap_reloca_out (output_bfd, &outrel,
+ (((Elf64_External_Rela *)
+ srelgot->contents)
+ + srelgot->reloc_count));
+ ++srelgot->reloc_count;
+ }
+
+ local_got_offsets[r_symndx] |= 1;
+ }
+
+ relocation = sgot->output_offset + off;
+ }
+
+ /*
+ * For @GOTENT the relocation is against the offset between
+ * the instruction and the symbols entry in the GOT and not
+ * between the start of the GOT and the symbols entry. We
+ * add the vma of the GOT to get the correct value.
+ */
+ if (r_type == R_390_GOTENT)
+ relocation += sgot->output_section->vma;
+
+ break;
+
+ case R_390_GOTOFF:
+ /* Relocation is relative to the start of the global offset
+ table. */
+
+ if (sgot == NULL)
+ {
+ sgot = bfd_get_section_by_name (dynobj, ".got");
+ BFD_ASSERT (sgot != NULL);
+ }
+
+ /* Note that sgot->output_offset is not involved in this
+ calculation. We always want the start of .got. If we
+ defined _GLOBAL_OFFSET_TABLE in a different way, as is
+ permitted by the ABI, we might have to change this
+ calculation. */
+ relocation -= sgot->output_section->vma;
+
+ break;
+
+ case R_390_GOTPC:
+ case R_390_GOTPCDBL:
+ /* Use global offset table as symbol value. */
+
+ if (sgot == NULL)
+ {
+ sgot = bfd_get_section_by_name (dynobj, ".got");
+ BFD_ASSERT (sgot != NULL);
+ }
+
+ relocation = sgot->output_section->vma;
+
+ break;
+
+ case R_390_PLT16DBL:
+ case R_390_PLT32:
+ case R_390_PLT32DBL:
+ case R_390_PLT64:
+ /* Relocation is to the entry for this symbol in the
+ procedure linkage table. */
+
+ /* Resolve a PLT32 reloc against a local symbol directly,
+ without using the procedure linkage table. */
+ if (h == NULL)
+ break;
+
+ if (h->plt.offset == (bfd_vma) -1 || splt == NULL)
+ {
+ /* We didn't make a PLT entry for this symbol. This
+ happens when statically linking PIC code, or when
+ using -Bsymbolic. */
+ break;
+ }
+
+ relocation = (splt->output_section->vma
+ + splt->output_offset
+ + h->plt.offset);
+
+ break;
+
+ case R_390_8:
+ case R_390_16:
+ case R_390_32:
+ case R_390_64:
+ case R_390_PC16:
+ case R_390_PC16DBL:
+ case R_390_PC32:
+ case R_390_PC32DBL:
+ case R_390_PC64:
+ if (info->shared
+ && (input_section->flags & SEC_ALLOC) != 0
+ && (r_type == R_390_8
+ || r_type == R_390_16
+ || r_type == R_390_32
+ || r_type == R_390_64
+ || (h != NULL
+ && h->dynindx != -1
+ && (! info->symbolic
+ || (h->elf_link_hash_flags
+ & ELF_LINK_HASH_DEF_REGULAR) == 0))))
+ {
+ Elf_Internal_Rela outrel;
+ boolean skip, relocate;
+
+ /* When generating a shared object, these relocations
+ are copied into the output file to be resolved at run
+ time. */
+
+ if (sreloc == NULL)
+ {
+ const char *name;
+
+ name = (bfd_elf_string_from_elf_section
+ (input_bfd,
+ elf_elfheader (input_bfd)->e_shstrndx,
+ elf_section_data (input_section)->rel_hdr.sh_name));
+ if (name == NULL)
+ return false;
+
+ BFD_ASSERT (strncmp (name, ".rela", 5) == 0
+ && strcmp (bfd_get_section_name (input_bfd,
+ input_section),
+ name + 5) == 0);
+
+ sreloc = bfd_get_section_by_name (dynobj, name);
+ BFD_ASSERT (sreloc != NULL);
+ }
+
+ skip = false;
+
+ if (elf_section_data (input_section)->stab_info == NULL)
+ outrel.r_offset = rel->r_offset;
+ else
+ {
+ bfd_vma off;
+
+ off = (_bfd_stab_section_offset
+ (output_bfd, &elf_hash_table (info)->stab_info,
+ input_section,
+ &elf_section_data (input_section)->stab_info,
+ rel->r_offset));
+ if (off == (bfd_vma) -1)
+ skip = true;
+ outrel.r_offset = off;
+ }
+
+ outrel.r_offset += (input_section->output_section->vma
+ + input_section->output_offset);
+
+ if (skip)
+ {
+ memset (&outrel, 0, sizeof outrel);
+ relocate = false;
+ }
+ else if (r_type == R_390_PC16 ||
+ r_type == R_390_PC16DBL ||
+ r_type == R_390_PC32 ||
+ r_type == R_390_PC32DBL ||
+ r_type == R_390_PC64)
+ {
+ BFD_ASSERT (h != NULL && h->dynindx != -1);
+ relocate = false;
+ outrel.r_info = ELF64_R_INFO (h->dynindx, r_type);
+ outrel.r_addend = relocation + rel->r_addend;
+ }
+ else
+ {
+ /* h->dynindx may be -1 if this symbol was marked to
+ become local. */
+ if (h == NULL
+ || ((info->symbolic || h->dynindx == -1)
+ && (h->elf_link_hash_flags
+ & ELF_LINK_HASH_DEF_REGULAR) != 0))
+ {
+ relocate = true;
+ outrel.r_info = ELF64_R_INFO (0, R_390_RELATIVE);
+ outrel.r_addend = relocation + rel->r_addend;
+ }
+ else
+ {
+ BFD_ASSERT (h->dynindx != -1);
+ relocate = false;
+ outrel.r_info = ELF64_R_INFO (h->dynindx, R_390_64);
+ outrel.r_addend = relocation + rel->r_addend;
+ }
+ }
+
+ bfd_elf64_swap_reloca_out (output_bfd, &outrel,
+ (((Elf64_External_Rela *)
+ sreloc->contents)
+ + sreloc->reloc_count));
+ ++sreloc->reloc_count;
+
+ /* If this reloc is against an external symbol, we do
+ not want to fiddle with the addend. Otherwise, we
+ need to include the symbol value so that it becomes
+ an addend for the dynamic reloc. */
+ if (! relocate)
+ continue;
+ }
+
+ break;
+
+ default:
+ break;
+ }
+
+ r = _bfd_final_link_relocate (howto, input_bfd, input_section,
+ contents, rel->r_offset,
+ relocation, rel->r_addend);
+
+ if (r != bfd_reloc_ok)
+ {
+ switch (r)
+ {
+ default:
+ case bfd_reloc_outofrange:
+ abort ();
+ case bfd_reloc_overflow:
+ {
+ const char *name;
+
+ if (h != NULL)
+ name = h->root.root.string;
+ else
+ {
+ name = bfd_elf_string_from_elf_section (input_bfd,
+ symtab_hdr->sh_link,
+ sym->st_name);
+ if (name == NULL)
+ return false;
+ if (*name == '\0')
+ name = bfd_section_name (input_bfd, sec);
+ }
+ if (! ((*info->callbacks->reloc_overflow)
+ (info, name, howto->name, (bfd_vma) 0,
+ input_bfd, input_section, rel->r_offset)))
+ return false;
+ }
+ break;
+ }
+ }
+ }
+
+ return true;
+}
+
+/* Finish up dynamic symbol handling. We set the contents of various
+ dynamic sections here. */
+
+static boolean
+elf_s390_finish_dynamic_symbol (output_bfd, info, h, sym)
+ bfd *output_bfd;
+ struct bfd_link_info *info;
+ struct elf_link_hash_entry *h;
+ Elf_Internal_Sym *sym;
+{
+ bfd *dynobj;
+
+ dynobj = elf_hash_table (info)->dynobj;
+
+ if (h->plt.offset != (bfd_vma) -1)
+ {
+ asection *splt;
+ asection *srela;
+ Elf_Internal_Rela rela;
+ bfd_vma got_offset;
+ bfd_vma plt_index;
+ asection *sgot;
+
+ /* This symbol has an entry in the procedure linkage table. Set
+ it up. */
+
+ BFD_ASSERT (h->dynindx != -1);
+
+ splt = bfd_get_section_by_name (dynobj, ".plt");
+ sgot = bfd_get_section_by_name (dynobj, ".got.plt");
+ srela = bfd_get_section_by_name (dynobj, ".rela.plt");
+ BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL);
+
+ /* Calc. index no.
+ Current offset - size first entry / entry size. */
+ plt_index = (h->plt.offset - PLT_FIRST_ENTRY_SIZE) / PLT_ENTRY_SIZE;
+
+ /* Offset in GOT is PLT index plus GOT headers(3) times 8,
+ addr & GOT addr. */
+ got_offset = (plt_index + 3) * GOT_ENTRY_SIZE;
+
+ /* Fill in the blueprint of a PLT. */
+ bfd_put_32 (output_bfd, PLT_ENTRY_WORD0,
+ splt->contents + h->plt.offset);
+ bfd_put_32 (output_bfd, PLT_ENTRY_WORD1,
+ splt->contents + h->plt.offset + 4);
+ bfd_put_32 (output_bfd, PLT_ENTRY_WORD2,
+ splt->contents + h->plt.offset + 8);
+ bfd_put_32 (output_bfd, PLT_ENTRY_WORD3,
+ splt->contents + h->plt.offset + 12);
+ bfd_put_32 (output_bfd, PLT_ENTRY_WORD4,
+ splt->contents + h->plt.offset + 16);
+ bfd_put_32 (output_bfd, PLT_ENTRY_WORD5,
+ splt->contents + h->plt.offset + 20);
+ bfd_put_32 (output_bfd, PLT_ENTRY_WORD6,
+ splt->contents + h->plt.offset + 24);
+ bfd_put_32 (output_bfd, PLT_ENTRY_WORD7,
+ splt->contents + h->plt.offset + 28);
+ /* Fixup the relative address to the GOT entry */
+ bfd_put_32 (output_bfd,
+ (sgot->output_section->vma + sgot->output_offset + got_offset
+ - (splt->output_section->vma + h->plt.offset))/2,
+ splt->contents + h->plt.offset + 2);
+ /* Fixup the relative branch to PLT 0 */
+ bfd_put_32 (output_bfd, - (PLT_FIRST_ENTRY_SIZE +
+ (PLT_ENTRY_SIZE * plt_index) + 22)/2,
+ splt->contents + h->plt.offset + 24);
+ /* Fixup offset into symbol table */
+ bfd_put_32 (output_bfd, plt_index * sizeof (Elf64_External_Rela),
+ splt->contents + h->plt.offset + 28);
+
+ /* Fill in the entry in the .rela.plt section. */
+ rela.r_offset = (sgot->output_section->vma
+ + sgot->output_offset
+ + got_offset);
+ rela.r_info = ELF64_R_INFO (h->dynindx, R_390_JMP_SLOT);
+ rela.r_addend = 0;
+ bfd_elf64_swap_reloca_out (output_bfd, &rela,
+ ((Elf64_External_Rela *) srela->contents
+ + plt_index ));
+
+ /* Fill in the entry in the global offset table.
+ Points to instruction after GOT offset. */
+ bfd_put_64 (output_bfd,
+ (splt->output_section->vma
+ + splt->output_offset
+ + h->plt.offset
+ + 14),
+ sgot->contents + got_offset);
+
+
+ if ((h->elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR) == 0)
+ {
+ /* Mark the symbol as undefined, rather than as defined in
+ the .plt section. Leave the value alone. */
+ sym->st_shndx = SHN_UNDEF;
+ }
+ }
+
+ if (h->got.offset != (bfd_vma) -1)
+ {
+ asection *sgot;
+ asection *srela;
+ Elf_Internal_Rela rela;
+
+ /* This symbol has an entry in the global offset table. Set it
+ up. */
+
+ sgot = bfd_get_section_by_name (dynobj, ".got");
+ srela = bfd_get_section_by_name (dynobj, ".rela.got");
+ BFD_ASSERT (sgot != NULL && srela != NULL);
+
+ rela.r_offset = (sgot->output_section->vma
+ + sgot->output_offset
+ + (h->got.offset &~ 1));
+
+ /* If this is a static link, or it is a -Bsymbolic link and the
+ symbol is defined locally or was forced to be local because
+ of a version file, we just want to emit a RELATIVE reloc.
+ The entry in the global offset table will already have been
+ initialized in the relocate_section function. */
+ if (! elf_hash_table (info)->dynamic_sections_created
+ || (info->shared
+ && (info->symbolic || h->dynindx == -1)
+ && (h->elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR)))
+ {
+ rela.r_info = ELF64_R_INFO (0, R_390_RELATIVE);
+ rela.r_addend = (h->root.u.def.value
+ + h->root.u.def.section->output_section->vma
+ + h->root.u.def.section->output_offset);
+ }
+ else
+ {
+ BFD_ASSERT((h->got.offset & 1) == 0);
+ bfd_put_64 (output_bfd, (bfd_vma) 0, sgot->contents + h->got.offset);
+ rela.r_info = ELF64_R_INFO (h->dynindx, R_390_GLOB_DAT);
+ rela.r_addend = 0;
+ }
+
+ bfd_elf64_swap_reloca_out (output_bfd, &rela,
+ ((Elf64_External_Rela *) srela->contents
+ + srela->reloc_count));
+ ++srela->reloc_count;
+ }
+
+ if ((h->elf_link_hash_flags & ELF_LINK_HASH_NEEDS_COPY) != 0)
+ {
+ asection *s;
+ Elf_Internal_Rela rela;
+
+ /* This symbols needs a copy reloc. Set it up. */
+
+ BFD_ASSERT (h->dynindx != -1
+ && (h->root.type == bfd_link_hash_defined
+ || h->root.type == bfd_link_hash_defweak));
+
+
+ s = bfd_get_section_by_name (h->root.u.def.section->owner,
+ ".rela.bss");
+ BFD_ASSERT (s != NULL);
+
+ rela.r_offset = (h->root.u.def.value
+ + h->root.u.def.section->output_section->vma
+ + h->root.u.def.section->output_offset);
+ rela.r_info = ELF64_R_INFO (h->dynindx, R_390_COPY);
+ rela.r_addend = 0;
+ bfd_elf64_swap_reloca_out (output_bfd, &rela,
+ ((Elf64_External_Rela *) s->contents
+ + s->reloc_count));
+ ++s->reloc_count;
+ }
+
+ /* Mark some specially defined symbols as absolute. */
+ if (strcmp (h->root.root.string, "_DYNAMIC") == 0
+ || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0
+ || strcmp (h->root.root.string, "_PROCEDURE_LINKAGE_TABLE_") == 0)
+ sym->st_shndx = SHN_ABS;
+
+ return true;
+}
+
+/* Finish up the dynamic sections. */
+
+static boolean
+elf_s390_finish_dynamic_sections (output_bfd, info)
+ bfd *output_bfd;
+ struct bfd_link_info *info;
+{
+ bfd *dynobj;
+ asection *sdyn;
+ asection *sgot;
+
+ dynobj = elf_hash_table (info)->dynobj;
+
+ sgot = bfd_get_section_by_name (dynobj, ".got.plt");
+ BFD_ASSERT (sgot != NULL);
+ sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
+
+ if (elf_hash_table (info)->dynamic_sections_created)
+ {
+ asection *splt;
+ Elf64_External_Dyn *dyncon, *dynconend;
+
+ BFD_ASSERT (sdyn != NULL);
+
+ dyncon = (Elf64_External_Dyn *) sdyn->contents;
+ dynconend = (Elf64_External_Dyn *) (sdyn->contents + sdyn->_raw_size);
+ for (; dyncon < dynconend; dyncon++)
+ {
+ Elf_Internal_Dyn dyn;
+ const char *name;
+ asection *s;
+
+ bfd_elf64_swap_dyn_in (dynobj, dyncon, &dyn);
+
+ switch (dyn.d_tag)
+ {
+ default:
+ break;
+
+ case DT_PLTGOT:
+ name = ".got";
+ goto get_vma;
+ case DT_JMPREL:
+ name = ".rela.plt";
+ get_vma:
+ s = bfd_get_section_by_name(output_bfd, name);
+ BFD_ASSERT (s != NULL);
+ dyn.d_un.d_ptr = s->vma;
+ bfd_elf64_swap_dyn_out (output_bfd, &dyn, dyncon);
+ break;
+
+ case DT_PLTRELSZ:
+ s = bfd_get_section_by_name (output_bfd, ".rela.plt");
+ BFD_ASSERT (s != NULL);
+ if (s->_cooked_size != 0)
+ dyn.d_un.d_val = s->_cooked_size;
+ else
+ dyn.d_un.d_val = s->_raw_size;
+ bfd_elf64_swap_dyn_out (output_bfd, &dyn, dyncon);
+ break;
+
+ case DT_RELASZ:
+ /* The procedure linkage table relocs (DT_JMPREL) should
+ not be included in the overall relocs (DT_RELA).
+ Therefore, we override the DT_RELASZ entry here to
+ make it not include the JMPREL relocs. Since the
+ linker script arranges for .rela.plt to follow all
+ other relocation sections, we don't have to worry
+ about changing the DT_RELA entry. */
+ s = bfd_get_section_by_name (output_bfd, ".rela.plt");
+ if (s != NULL)
+ {
+ if (s->_cooked_size != 0)
+ dyn.d_un.d_val -= s->_cooked_size;
+ else
+ dyn.d_un.d_val -= s->_raw_size;
+ }
+ bfd_elf64_swap_dyn_out (output_bfd, &dyn, dyncon);
+ break;
+ }
+ }
+
+ /* Fill in the special first entry in the procedure linkage table. */
+ splt = bfd_get_section_by_name (dynobj, ".plt");
+ if (splt && splt->_raw_size > 0)
+ {
+ /* fill in blueprint for plt 0 entry */
+ bfd_put_32 (output_bfd, PLT_FIRST_ENTRY_WORD0,
+ splt->contents );
+ bfd_put_32 (output_bfd, PLT_FIRST_ENTRY_WORD1,
+ splt->contents +4 );
+ bfd_put_32 (output_bfd, PLT_FIRST_ENTRY_WORD3,
+ splt->contents +12 );
+ bfd_put_32 (output_bfd, PLT_FIRST_ENTRY_WORD4,
+ splt->contents +16 );
+ bfd_put_32 (output_bfd, PLT_FIRST_ENTRY_WORD5,
+ splt->contents +20 );
+ bfd_put_32 (output_bfd, PLT_FIRST_ENTRY_WORD6,
+ splt->contents + 24);
+ bfd_put_32 (output_bfd, PLT_FIRST_ENTRY_WORD7,
+ splt->contents + 28 );
+ /* Fixup relative address to start of GOT */
+ bfd_put_32 (output_bfd,
+ (sgot->output_section->vma + sgot->output_offset
+ - splt->output_section->vma - 6)/2,
+ splt->contents + 8);
+ }
+
+ elf_section_data (splt->output_section)->this_hdr.sh_entsize =
+ PLT_ENTRY_SIZE;
+ }
+
+ /* Set the first entry in the global offset table to the address of
+ the dynamic section. */
+ if (sgot->_raw_size > 0)
+ {
+ if (sdyn == NULL)
+ bfd_put_64 (output_bfd, (bfd_vma) 0, sgot->contents);
+ else
+ bfd_put_64 (output_bfd,
+ sdyn->output_section->vma + sdyn->output_offset,
+ sgot->contents);
+
+ /* One entry for shared object struct ptr. */
+ bfd_put_64 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
+ /* One entry for _dl_runtime_resolve. */
+ bfd_put_64 (output_bfd, (bfd_vma) 0, sgot->contents + 12);
+ }
+
+ elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 8;
+
+ return true;
+}
+
+static boolean
+elf_s390_object_p (abfd)
+ bfd *abfd;
+{
+ return bfd_default_set_arch_mach (abfd, bfd_arch_s390, bfd_mach_s390_esame);
+}
+
+/*
+ * Why was the hash table entry size definition changed from
+ * ARCH_SIZE/8 to 4? This breaks the 64 bit dynamic linker and
+ * this is the only reason for the s390_elf64_size_info structure.
+ */
+
+const struct elf_size_info s390_elf64_size_info =
+{
+ sizeof (Elf64_External_Ehdr),
+ sizeof (Elf64_External_Phdr),
+ sizeof (Elf64_External_Shdr),
+ sizeof (Elf64_External_Rel),
+ sizeof (Elf64_External_Rela),
+ sizeof (Elf64_External_Sym),
+ sizeof (Elf64_External_Dyn),
+ sizeof (Elf_External_Note),
+ 8, /* hash-table entry size */
+ 1, /* internal relocations per external relocations */
+ 64, /* arch_size */
+ 8, /* file_align */
+ ELFCLASS64, EV_CURRENT,
+ bfd_elf64_write_out_phdrs,
+ bfd_elf64_write_shdrs_and_ehdr,
+ bfd_elf64_write_relocs,
+ bfd_elf64_swap_symbol_out,
+ bfd_elf64_slurp_reloc_table,
+ bfd_elf64_slurp_symbol_table,
+ bfd_elf64_swap_dyn_in,
+ bfd_elf64_swap_dyn_out,
+ NULL,
+ NULL,
+ NULL,
+ NULL
+};
+
+#define TARGET_BIG_SYM bfd_elf64_s390_vec
+#define TARGET_BIG_NAME "elf64-s390"
+#define ELF_ARCH bfd_arch_s390
+#define ELF_MACHINE_CODE EM_S390
+#define ELF_MACHINE_ALT1 EM_S390_OLD
+#define ELF_MAXPAGESIZE 0x1000
+
+#define elf_backend_size_info s390_elf64_size_info
+
+#define elf_backend_can_gc_sections 1
+#define elf_backend_want_got_plt 1
+#define elf_backend_plt_readonly 1
+#define elf_backend_want_plt_sym 0
+#define elf_backend_got_header_size 24
+#define elf_backend_plt_header_size PLT_ENTRY_SIZE
+
+#define elf_info_to_howto elf_s390_info_to_howto
+
+#define bfd_elf64_bfd_final_link _bfd_elf64_gc_common_final_link
+#define bfd_elf64_bfd_is_local_label_name elf_s390_is_local_label_name
+#define bfd_elf64_bfd_link_hash_table_create elf_s390_link_hash_table_create
+#define bfd_elf64_bfd_reloc_type_lookup elf_s390_reloc_type_lookup
+
+#define elf_backend_adjust_dynamic_symbol elf_s390_adjust_dynamic_symbol
+#define elf_backend_check_relocs elf_s390_check_relocs
+#define elf_backend_create_dynamic_sections _bfd_elf_create_dynamic_sections
+#define elf_backend_finish_dynamic_sections elf_s390_finish_dynamic_sections
+#define elf_backend_finish_dynamic_symbol elf_s390_finish_dynamic_symbol
+#define elf_backend_gc_mark_hook elf_s390_gc_mark_hook
+#define elf_backend_gc_sweep_hook elf_s390_gc_sweep_hook
+#define elf_backend_relocate_section elf_s390_relocate_section
+#define elf_backend_size_dynamic_sections elf_s390_size_dynamic_sections
+
+#define elf_backend_object_p elf_s390_object_p
+
+#include "elf64-target.h"
diff --git a/bfd/libbfd.h b/bfd/libbfd.h
index 68f931626df..7fee07940d8 100644
--- a/bfd/libbfd.h
+++ b/bfd/libbfd.h
@@ -910,6 +910,23 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_AVR_HI8_LDI_PM_NEG",
"BFD_RELOC_AVR_HH8_LDI_PM_NEG",
"BFD_RELOC_AVR_CALL",
+ "BFD_RELOC_390_12",
+ "BFD_RELOC_390_GOT12",
+ "BFD_RELOC_390_PLT32",
+ "BFD_RELOC_390_COPY",
+ "BFD_RELOC_390_GLOB_DAT",
+ "BFD_RELOC_390_JMP_SLOT",
+ "BFD_RELOC_390_RELATIVE",
+ "BFD_RELOC_390_GOTPC",
+ "BFD_RELOC_390_GOT16",
+ "BFD_RELOC_390_PC16DBL",
+ "BFD_RELOC_390_PLT16DBL",
+ "BFD_RELOC_390_PC32DBL",
+ "BFD_RELOC_390_PLT32DBL",
+ "BFD_RELOC_390_GOTPCDBL",
+ "BFD_RELOC_390_GOT64",
+ "BFD_RELOC_390_PLT64",
+ "BFD_RELOC_390_GOTENT",
"BFD_RELOC_VTABLE_INHERIT",
"BFD_RELOC_VTABLE_ENTRY",
"BFD_RELOC_IA64_IMM14",
diff --git a/bfd/po/POTFILES.in b/bfd/po/POTFILES.in
index f75b4caec89..1ac5d8e44ea 100644
--- a/bfd/po/POTFILES.in
+++ b/bfd/po/POTFILES.in
@@ -85,6 +85,7 @@ cpu-ns32k.c
cpu-pj.c
cpu-powerpc.c
cpu-rs6000.c
+cpu-s390.c
cpu-sh.c
cpu-sparc.c
cpu-tic30.c
@@ -127,6 +128,7 @@ elf32-mcore.c
elf32-mips.c
elf32-pj.c
elf32-ppc.c
+elf32-s390.c
elf32-sh.c
elf32-sh-lin.c
elf32-sparc.c
@@ -137,6 +139,7 @@ elf64-gen.c
elf64-hppa.c
elf64-hppa.h
elf64-mips.c
+elf64-s390.c
elf64-sparc.c
elf64-x86-64.c
elfarm-nabi.c
diff --git a/bfd/po/bfd.pot b/bfd/po/bfd.pot
index 40cba075c61..38af0b5baa5 100644
--- a/bfd/po/bfd.pot
+++ b/bfd/po/bfd.pot
@@ -6,7 +6,7 @@
msgid ""
msgstr ""
"Project-Id-Version: PACKAGE VERSION\n"
-"POT-Creation-Date: 2001-02-07 15:02-0800\n"
+"POT-Creation-Date: 2001-02-09 16:27-0800\n"
"PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n"
"Last-Translator: FULL NAME <EMAIL@ADDRESS>\n"
"Language-Team: LANGUAGE <LL@li.org>\n"
@@ -191,7 +191,7 @@ msgstr ""
msgid "GP relative relocation used when GP not defined"
msgstr ""
-#: coff-alpha.c:1486 elf64-alpha.c:4037
+#: coff-alpha.c:1486 elf64-alpha.c:4044
msgid "using multiple gp values"
msgstr ""
@@ -375,7 +375,7 @@ msgstr ""
msgid "uncertain calling convention for non-COFF symbol"
msgstr ""
-#: cofflink.c:526 elflink.h:1647
+#: cofflink.c:526 elflink.h:1651
#, c-format
msgid "Warning: type of symbol `%s' changed from %d to %d in %s"
msgstr ""
@@ -549,8 +549,9 @@ msgstr ""
msgid "%s: Warning: Thumb BLX instruction targets thumb function '%s'."
msgstr ""
-#: elf-hppa.h:1369 elf-hppa.h:1402 elf32-arm.h:1853 elf32-i386.c:1439
-#: elf32-ppc.c:3092 elf32-sh.c:2996 elf64-x86-64.c:1182
+#: elf-hppa.h:1369 elf-hppa.h:1402 elf32-arm.h:1853 elf32-i386.c:1442
+#: elf32-ppc.c:3092 elf32-s390.c:1442 elf32-sh.c:2996 elf64-s390.c:1431
+#: elf64-x86-64.c:1182
#, c-format
msgid ""
"%s: warning: unresolvable relocation against symbol `%s' from %s section"
@@ -799,12 +800,12 @@ msgstr ""
msgid "%s: invalid relocation type %d"
msgstr ""
-#: elf32-i386.c:678 elf32-i386.c:1646
+#: elf32-i386.c:681 elf32-i386.c:1649
#, c-format
msgid "%s(%s): bad relocation section name `%s'"
msgstr ""
-#: elf32-i386.c:683 elf32-i386.c:1651
+#: elf32-i386.c:686 elf32-i386.c:1654
#, c-format
msgid "%s: bad relocation section name `%s'"
msgstr ""
@@ -889,7 +890,7 @@ msgstr ""
msgid "%s: ABI mismatch: linking %s module with previous %s modules"
msgstr ""
-#: elf32-mips.c:2667 elf32-ppc.c:1477 elf64-sparc.c:2969
+#: elf32-mips.c:2667 elf32-ppc.c:1477 elf64-sparc.c:2991
#, c-format
msgid "%s: uses different e_flags (0x%lx) fields than previous modules (0x%lx)"
msgstr ""
@@ -970,7 +971,7 @@ msgstr ""
msgid "static procedure (no name)"
msgstr ""
-#: elf32-mips.c:5005 elf64-alpha.c:4410
+#: elf32-mips.c:5005 elf64-alpha.c:4417
#, c-format
msgid "%s: illegal section name `%s'"
msgstr ""
@@ -1072,7 +1073,7 @@ msgstr ""
msgid "%s: 0x%lx: fatal: reloc overflow while relaxing"
msgstr ""
-#: elf32-sparc.c:1512 elf64-sparc.c:2260
+#: elf32-sparc.c:1512 elf64-sparc.c:2264
#, c-format
msgid "%s: probably compiled without -fPIC?"
msgstr ""
@@ -1154,11 +1155,11 @@ msgstr ""
msgid "v850ea architecture"
msgstr ""
-#: elf64-alpha.c:978
+#: elf64-alpha.c:985
msgid "GPDISP relocation did not find ldah and lda instructions"
msgstr ""
-#: elf64-alpha.c:3047
+#: elf64-alpha.c:3054
#, c-format
msgid "%s: .got subsegment exceeds 64K (size %d)"
msgstr ""
@@ -1168,32 +1169,32 @@ msgstr ""
msgid "stub entry for %s cannot load .plt, dp offset = %ld"
msgstr ""
-#: elf64-sparc.c:1246
+#: elf64-sparc.c:1249
#, c-format
msgid "%s: check_relocs: unhandled reloc type %d"
msgstr ""
-#: elf64-sparc.c:1283
+#: elf64-sparc.c:1286
msgid "%s: Only registers %%g[2367] can be declared using STT_REGISTER"
msgstr ""
-#: elf64-sparc.c:1303
+#: elf64-sparc.c:1306
msgid ""
"Register %%g%d used incompatibly: previously declared in %s to %s, in %s "
"redefined to %s"
msgstr ""
-#: elf64-sparc.c:1326
+#: elf64-sparc.c:1329
#, c-format
msgid "Symbol `%s' has differing types: previously %s, REGISTER in %s"
msgstr ""
-#: elf64-sparc.c:1372
+#: elf64-sparc.c:1375
#, c-format
msgid "Symbol `%s' has differing types: REGISTER in %s, %s in %s"
msgstr ""
-#: elf64-sparc.c:2950
+#: elf64-sparc.c:2972
#, c-format
msgid "%s: linking UltraSPARC specific with HAL specific code"
msgstr ""
@@ -1269,24 +1270,24 @@ msgstr ""
msgid "%s: warning: allocated section `%s' not in segment"
msgstr ""
-#: elf.c:3616
+#: elf.c:3619
#, c-format
msgid "%s: symbol `%s' required but not present"
msgstr ""
-#: elf.c:3625
+#: elf.c:3628
#, c-format
msgid ""
"elf_symbol_from_bfd_symbol 0x%.8lx, name = %s, sym num = %d, flags = "
"0x%.8lx%s\n"
msgstr ""
-#: elf.c:3866
+#: elf.c:3869
#, c-format
msgid "%s: warning: Empty loadable segment detected\n"
msgstr ""
-#: elf.c:5213
+#: elf.c:5216
#, c-format
msgid "%s: unsupported relocation type %s"
msgstr ""
@@ -1301,37 +1302,37 @@ msgstr ""
msgid "%s: Section %s is already to large to put hole of %ld bytes in"
msgstr ""
-#: elflink.h:1464
+#: elflink.h:1468
#, c-format
msgid "%s: %s: invalid version %u (max %d)"
msgstr ""
-#: elflink.h:1505
+#: elflink.h:1509
#, c-format
msgid "%s: %s: invalid needed version %d"
msgstr ""
-#: elflink.h:1625
+#: elflink.h:1629
#, c-format
msgid "Warning: size of symbol `%s' changed from %lu to %lu in %s"
msgstr ""
-#: elflink.h:1871
+#: elflink.h:1875
#, c-format
msgid "%s: warning: unexpected redefinition of `%s'"
msgstr ""
-#: elflink.h:3656
+#: elflink.h:3660
#, c-format
msgid "warning: type and size of dynamic symbol `%s' are not defined"
msgstr ""
-#: elflink.h:3928
+#: elflink.h:3932
#, c-format
msgid "%s: undefined versioned symbol name %s"
msgstr ""
-#: elflink.h:5177
+#: elflink.h:5181
#, c-format
msgid "%s: could not find output section %s for input section %s"
msgstr ""
diff --git a/bfd/reloc.c b/bfd/reloc.c
index f37a6a96aff..9d4516302d3 100644
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -2736,6 +2736,75 @@ ENUMDOC
into 22 bits.
ENUM
+ BFD_RELOC_390_12
+ENUMDOC
+ Direct 12 bit.
+ENUM
+ BFD_RELOC_390_GOT12
+ENUMDOC
+ 12 bit GOT offset.
+ENUM
+ BFD_RELOC_390_PLT32
+ENUMDOC
+ 32 bit PC relative PLT address.
+ENUM
+ BFD_RELOC_390_COPY
+ENUMDOC
+ Copy symbol at runtime.
+ENUM
+ BFD_RELOC_390_GLOB_DAT
+ENUMDOC
+ Create GOT entry.
+ENUM
+ BFD_RELOC_390_JMP_SLOT
+ENUMDOC
+ Create PLT entry.
+ENUM
+ BFD_RELOC_390_RELATIVE
+ENUMDOC
+ Adjust by program base.
+ENUM
+ BFD_RELOC_390_GOTPC
+ENUMDOC
+ 32 bit PC relative offset to GOT.
+ENUM
+ BFD_RELOC_390_GOT16
+ENUMDOC
+ 16 bit GOT offset.
+ENUM
+ BFD_RELOC_390_PC16DBL
+ENUMDOC
+ PC relative 16 bit shifted by 1.
+ENUM
+ BFD_RELOC_390_PLT16DBL
+ENUMDOC
+ 16 bit PC rel. PLT shifted by 1.
+ENUM
+ BFD_RELOC_390_PC32DBL
+ENUMDOC
+ PC relative 32 bit shifted by 1.
+ENUM
+ BFD_RELOC_390_PLT32DBL
+ENUMDOC
+ 32 bit PC rel. PLT shifted by 1.
+ENUM
+ BFD_RELOC_390_GOTPCDBL
+ENUMDOC
+ 32 bit PC rel. GOT shifted by 1.
+ENUM
+ BFD_RELOC_390_GOT64
+ENUMDOC
+ 64 bit GOT offset.
+ENUM
+ BFD_RELOC_390_PLT64
+ENUMDOC
+ 64 bit PC relative PLT address.
+ENUM
+ BFD_RELOC_390_GOTENT
+ENUMDOC
+ 32 bit rel. offset to GOT entry.
+
+ENUM
BFD_RELOC_VTABLE_INHERIT
ENUMX
BFD_RELOC_VTABLE_ENTRY
diff --git a/bfd/targets.c b/bfd/targets.c
index 0211ec89261..70b262db743 100644
--- a/bfd/targets.c
+++ b/bfd/targets.c
@@ -542,6 +542,7 @@ extern const bfd_target bfd_elf32_pj_vec;
extern const bfd_target bfd_elf32_pjl_vec;
extern const bfd_target bfd_elf32_powerpc_vec;
extern const bfd_target bfd_elf32_powerpcle_vec;
+extern const bfd_target bfd_elf32_s390_vec;
extern const bfd_target bfd_elf32_sh_vec;
extern const bfd_target bfd_elf32_shblin_vec;
extern const bfd_target bfd_elf32_shl_vec;
@@ -560,6 +561,7 @@ extern const bfd_target bfd_elf64_ia64_big_vec;
extern const bfd_target bfd_elf64_ia64_little_vec;
extern const bfd_target bfd_elf64_little_generic_vec;
extern const bfd_target bfd_elf64_littlemips_vec;
+extern const bfd_target bfd_elf64_s390_vec;
extern const bfd_target bfd_elf64_sparc_vec;
extern const bfd_target bfd_elf64_x86_64_vec;
extern const bfd_target bfd_powerpc_pe_vec;
@@ -925,7 +927,10 @@ static const bfd_target * const _bfd_target_vector[] = {
&vms_vax_vec,
&we32kcoff_vec,
&z8kcoff_vec,
-
+ &bfd_elf32_s390_vec,
+#ifdef BFD64
+ &bfd_elf64_s390_vec,
+#endif
#endif /* not SELECT_VECS */
/* Always support S-records, for convenience. */
diff --git a/config.guess b/config.guess
index b60b5a0756f..3b3df454ebb 100755
--- a/config.guess
+++ b/config.guess
@@ -927,6 +927,8 @@ EOF
rm -f $dummy.c $dummy
elif test "${UNAME_MACHINE}" = "s390"; then
echo s390-ibm-linux && exit 0
+ elif test "${UNAME_MACHINE}" = "s390x"; then
+ echo s390x-ibm-linux && exit 0
elif test "${UNAME_MACHINE}" = "x86_64"; then
echo x86_64-unknown-linux-gnu && exit 0
elif test "${UNAME_MACHINE}" = "parisc64" -o "${UNAME_MACHINE}" = "hppa64"; then
diff --git a/config.sub b/config.sub
index fe8d4aca1ac..e1afb5df353 100755
--- a/config.sub
+++ b/config.sub
@@ -274,7 +274,7 @@ case $basic_machine in
| mips64el-* | mips64orion-* | mips64orionel-* \
| mips64vr4100-* | mips64vr4100el-* | mips64vr4300-* | mips64vr4300el-* \
| mipstx39-* | mipstx39el-* | mcore-* \
- | f30[01]-* | f700-* | s390-* | sv1-* | t3e-* \
+ | f30[01]-* | f700-* | s390-* | s390x-* | sv1-* | t3e-* \
| m88110-* | m680[01234]0-* | m683?2-* | m68360-* | z8k-* | d10v-* \
| thumb-* | v850-* | d30v-* | tic30-* | c30-* | fr30-* \
| bs2000-* | tic54x-* | c54x-* | x86_64-*)
diff --git a/config/ChangeLog b/config/ChangeLog
index 920ab3226a8..5a398ecc16c 100644
--- a/config/ChangeLog
+++ b/config/ChangeLog
@@ -1,4 +1,9 @@
-Fri Jul 14 18:13:23 2000 Mark P Mitchell <mark@codesourcery.com>
+2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
+
+ * mh-s390pic: New file.
+ * mt-s390pic: New file.
+
+2000-07-14 Mark P Mitchell <mark@codesourcery.com>
* mh-irix6 (CC): Don't set it.
diff --git a/config/mh-s390pic b/config/mh-s390pic
new file mode 100644
index 00000000000..92e48d90fbd
--- /dev/null
+++ b/config/mh-s390pic
@@ -0,0 +1 @@
+PICFLAG=-fpic
diff --git a/config/mt-s390pic b/config/mt-s390pic
new file mode 100644
index 00000000000..ff987275575
--- /dev/null
+++ b/config/mt-s390pic
@@ -0,0 +1 @@
+PICFLAG_FOR_TARGET=-fpic
diff --git a/configure.in b/configure.in
index 1284aa6533c..6fc1a9ec536 100644
--- a/configure.in
+++ b/configure.in
@@ -321,6 +321,9 @@ if [ x${shared} = xyes ]; then
powerpc*-*-*)
host_makefile_frag="${host_makefile_frag} config/mh-ppcpic"
;;
+ s390-* | s390x-*)
+ host_makefile_frag="${host_makefile_frag} config/mh-s390pic"
+ ;;
*-*-*)
if test -f ${srcdir}/config/mh-${host_cpu}pic; then
host_makefile_frag="${host_makefile_frag} config/mh-${host_cpu}pic"
diff --git a/include/ChangeLog b/include/ChangeLog
index 39085a1ac1a..fa7af4b5c7c 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,7 @@
+2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
+
+ * dis-asm.h: Add linux target for S/390.
+
2001-01-11 Peter Targett <peter.targett@arccores.com>
* dis-asm.h (arc_get_disassembler): Correct declaration.
diff --git a/include/dis-asm.h b/include/dis-asm.h
index 5c9d8d8d149..6e3e3b5cd6d 100644
--- a/include/dis-asm.h
+++ b/include/dis-asm.h
@@ -206,6 +206,7 @@ extern int print_insn_tic54x PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_tic80 PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_pj PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_avr PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_s390 PARAMS ((bfd_vma, disassemble_info*));
extern void print_arm_disassembler_options PARAMS ((FILE *));
extern void parse_arm_disassembler_option PARAMS ((char *));
diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog
index 05e73b80d48..ec399f18f8d 100644
--- a/include/elf/ChangeLog
+++ b/include/elf/ChangeLog
@@ -1,3 +1,8 @@
+2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
+
+ * common.h: Add linux target for S/390.
+ * s390.h: New file.
+
2001-01-11 Peter Targett <peter.targett@arccores.com>
* arc.h (E_ARC_MACH_ARC5, E_ARC_MACH_ARC6, E_ARC_MACH_ARC7,
diff --git a/include/elf/common.h b/include/elf/common.h
index d127b9c1c08..991e57ecdbb 100644
--- a/include/elf/common.h
+++ b/include/elf/common.h
@@ -114,6 +114,7 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#define EM_960 19 /* Intel 80960 */
#define EM_PPC 20 /* PowerPC */
#define EM_PPC64 21 /* 64-bit PowerPC */
+#define EM_S390 22 /* IBM S/390 */
#define EM_V800 36 /* NEC V800 series */
#define EM_FR20 37 /* Fujitsu FR20 */
@@ -195,6 +196,9 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
/* Alpha backend magic number. Written in the absence of an ABI. */
#define EM_ALPHA 0x9026
+/* old S/390 backend magic number. Written in the absence of an ABI. */
+#define EM_S390_OLD 0xa390
+
/* D10V backend magic number. Written in the absence of an ABI. */
#define EM_CYGNUS_D10V 0x7650
diff --git a/include/elf/s390.h b/include/elf/s390.h
new file mode 100644
index 00000000000..3cd99762517
--- /dev/null
+++ b/include/elf/s390.h
@@ -0,0 +1,73 @@
+/* 390 ELF support for BFD.
+ Copyright (C) 2000, 2001 Free Software Foundation, Inc.
+ Contributed by Carl B. Pedersen and Martin Schwidefsky.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ 02111-1307, USA. */
+
+#ifndef _ELF_390_H
+#define _ELF_390_H
+
+/* Processor specific flags for the ELF header e_flags field. */
+
+/* Symbol types. */
+
+#define STACK_REG 15 /* Global Stack reg */
+#define BACKL_REG 14 /* Global Backlink reg */
+#define BASE_REG 13 /* Global Base reg */
+#define GOT_REG 12 /* Holds addr of GOT */
+
+#include "elf/reloc-macros.h"
+
+/* Relocation types. */
+
+START_RELOC_NUMBERS (elf_s390_reloc_type)
+ RELOC_NUMBER (R_390_NONE, 0) /* No reloc. */
+ RELOC_NUMBER (R_390_8, 1) /* Direct 8 bit. */
+ RELOC_NUMBER (R_390_12, 2) /* Direct 12 bit. */
+ RELOC_NUMBER (R_390_16, 3) /* Direct 16 bit. */
+ RELOC_NUMBER (R_390_32, 4) /* Direct 32 bit. */
+ RELOC_NUMBER (R_390_PC32, 5) /* PC relative 32 bit. */
+ RELOC_NUMBER (R_390_GOT12, 6) /* 12 bit GOT offset. */
+ RELOC_NUMBER (R_390_GOT32, 7) /* 32 bit GOT offset. */
+ RELOC_NUMBER (R_390_PLT32, 8) /* 32 bit PC relative PLT address. */
+ RELOC_NUMBER (R_390_COPY, 9) /* Copy symbol at runtime. */
+ RELOC_NUMBER (R_390_GLOB_DAT, 10) /* Create GOT entry. */
+ RELOC_NUMBER (R_390_JMP_SLOT, 11) /* Create PLT entry. */
+ RELOC_NUMBER (R_390_RELATIVE, 12) /* Adjust by program base. */
+ RELOC_NUMBER (R_390_GOTOFF, 13) /* 32 bit offset to GOT. */
+ RELOC_NUMBER (R_390_GOTPC, 14) /* 32 bit PC relative offset to GOT. */
+ RELOC_NUMBER (R_390_GOT16, 15) /* 16 bit GOT offset. */
+ RELOC_NUMBER (R_390_PC16, 16) /* PC relative 16 bit. */
+ RELOC_NUMBER (R_390_PC16DBL, 17) /* PC relative 16 bit shifted by 1. */
+ RELOC_NUMBER (R_390_PLT16DBL, 18) /* 16 bit PC rel. PLT shifted by 1. */
+ RELOC_NUMBER (R_390_PC32DBL, 19) /* PC relative 32 bit shifted by 1. */
+ RELOC_NUMBER (R_390_PLT32DBL, 20) /* 32 bit PC rel. PLT shifted by 1. */
+ RELOC_NUMBER (R_390_GOTPCDBL, 21) /* 32 bit PC rel. GOT shifted by 1. */
+ RELOC_NUMBER (R_390_64, 22) /* Direct 64 bit. */
+ RELOC_NUMBER (R_390_PC64, 23) /* PC relative 64 bit. */
+ RELOC_NUMBER (R_390_GOT64, 24) /* 64 bit GOT offset. */
+ RELOC_NUMBER (R_390_PLT64, 25) /* 64 bit PC relative PLT address. */
+ RELOC_NUMBER (R_390_GOTENT, 26) /* 32 bit PC rel. to GOT entry >> 1. */
+ /* These are GNU extensions to enable C++ vtable garbage collection. */
+ RELOC_NUMBER (R_390_GNU_VTINHERIT, 250)
+ RELOC_NUMBER (R_390_GNU_VTENTRY, 251)
+END_RELOC_NUMBERS (R_390_max)
+
+#endif /* _ELF_390_H */
+
+
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 9dfdcd34388..6e3d09f073f 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,7 @@
+2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
+
+ * s390.h: New file.
+
2001-02-02 Patrick Macdonald <patrickm@redhat.com>
* cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
diff --git a/include/opcode/s390.h b/include/opcode/s390.h
new file mode 100644
index 00000000000..8a7c00eff04
--- /dev/null
+++ b/include/opcode/s390.h
@@ -0,0 +1,130 @@
+/* s390.h -- Header file for S390 opcode table
+ Copyright (C) 2000, 2001 Free Software Foundation, Inc.
+ Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com).
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ 02111-1307, USA. */
+
+#ifndef S390_H
+#define S390_H
+
+/* List of instruction sets variations. */
+
+enum s390_opcode_arch_val
+ {
+ S390_OPCODE_ESA = 0,
+ S390_OPCODE_ESAME
+ };
+
+/* The opcode table is an array of struct s390_opcode. */
+
+struct s390_opcode
+ {
+ /* The opcode name. */
+ const char * name;
+
+ /* The opcode itself. Those bits which will be filled in with
+ operands are zeroes. */
+ unsigned char opcode[6];
+
+ /* The opcode mask. This is used by the disassembler. This is a
+ mask containing ones indicating those bits which must match the
+ opcode field, and zeroes indicating those bits which need not
+ match (and are presumably filled in by operands). */
+ unsigned char mask[6];
+
+ /* The opcode length in bytes. */
+ int oplen;
+
+ /* An array of operand codes. Each code is an index into the
+ operand table. They appear in the order which the operands must
+ appear in assembly code, and are terminated by a zero. */
+ unsigned char operands[6];
+
+ /* Bitmask of architectures this opcode is available for. */
+ unsigned int architecture;
+ };
+
+/* The table itself is sorted by major opcode number, and is otherwise
+ in the order in which the disassembler should consider
+ instructions. */
+extern const struct s390_opcode s390_opcodes[];
+extern const int s390_num_opcodes;
+
+/* A opcode format table for the .insn pseudo mnemonic. */
+extern const struct s390_opcode s390_opformats[];
+extern const int s390_num_opformats;
+
+/* Values defined for the flags field of a struct powerpc_opcode. */
+
+/* The operands table is an array of struct s390_operand. */
+
+struct s390_operand
+ {
+ /* The number of bits in the operand. */
+ int bits;
+
+ /* How far the operand is left shifted in the instruction. */
+ int shift;
+
+ /* One bit syntax flags. */
+ unsigned long flags;
+ };
+
+/* Elements in the table are retrieved by indexing with values from
+ the operands field of the powerpc_opcodes table. */
+
+extern const struct s390_operand s390_operands[];
+
+/* Values defined for the flags field of a struct s390_operand. */
+
+/* This operand names a register. The disassembler uses this to print
+ register names with a leading 'r'. */
+#define S390_OPERAND_GPR 0x1
+
+/* This operand names a floating point register. The disassembler
+ prints these with a leading 'f'. */
+#define S390_OPERAND_FPR 0x2
+
+/* This operand names an access register. The disassembler
+ prints these with a leading 'a'. */
+#define S390_OPERAND_AR 0x4
+
+/* This operand names a control register. The disassembler
+ prints these with a leading 'c'. */
+#define S390_OPERAND_CR 0x8
+
+/* This operand is a displacement. */
+#define S390_OPERAND_DISP 0x10
+
+/* This operand names a base register. */
+#define S390_OPERAND_BASE 0x20
+
+/* This operand names an index register, it can be skipped. */
+#define S390_OPERAND_INDEX 0x40
+
+/* This operand is a relative branch displacement. The disassembler
+ prints these symbolically if possible. */
+#define S390_OPERAND_PCREL 0x80
+
+/* This operand takes signed values. */
+#define S390_OPERAND_SIGNED 0x100
+
+/* This operand is a length. */
+#define S390_OPERAND_LENGTH 0x200
+
+#endif /* S390_H */
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index fac33a6519b..4194447b1a1 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,14 @@
+2001-02-09 Schwidefsky <schwidefsky@de.ibm.com>
+
+ * Makefile.am: Add linux target for S/390.
+ * Makefile.in: Likewise.
+ * configure.in: Likewise.
+ * disassemble.c: Likewise.
+ * s390-dis.c: New file.
+ * s390-mkopc.c: New file.
+ * s390-opc.c: New file.
+ * s390-opc.txt: New file.
+
2001-02-05 Jim Wilson <wilson@redhat.com>
* ia64-asmtab.c: Revert 2000-12-16 change.
diff --git a/opcodes/Makefile.am b/opcodes/Makefile.am
index e31d9c1dae5..b1cbabfb274 100644
--- a/opcodes/Makefile.am
+++ b/opcodes/Makefile.am
@@ -101,6 +101,8 @@ CFILES = \
pj-opc.c \
ppc-dis.c \
ppc-opc.c \
+ s390-opc.c \
+ s390-dis.c \
sh-dis.c \
sparc-dis.c \
sparc-opc.c \
@@ -173,6 +175,8 @@ ALL_MACHINES = \
ppc-dis.lo \
ppc-opc.lo \
ns32k-dis.lo \
+ s390-dis.lo \
+ s390-opc.lo \
sh-dis.lo \
sparc-dis.lo \
sparc-opc.lo \
@@ -489,6 +493,10 @@ ppc-dis.lo: ppc-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/opcode/ppc.h
ppc-opc.lo: ppc-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/ppc.h opintl.h
+s390-dis.lo: s390-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/opcode/s390.h
+s390-opc.lo: s390-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(INCDIR)/opcode/s390.h opintl.h
sh-dis.lo: sh-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
sh-opc.h $(INCDIR)/dis-asm.h $(BFD_H)
sparc-dis.lo: sparc-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
diff --git a/opcodes/Makefile.in b/opcodes/Makefile.in
index e40602745bf..cd166b050cc 100644
--- a/opcodes/Makefile.in
+++ b/opcodes/Makefile.in
@@ -212,6 +212,8 @@ CFILES = \
pj-opc.c \
ppc-dis.c \
ppc-opc.c \
+ s390-opc.c \
+ s390-dis.c \
sh-dis.c \
sparc-dis.c \
sparc-opc.c \
@@ -285,6 +287,8 @@ ALL_MACHINES = \
ppc-dis.lo \
ppc-opc.lo \
ns32k-dis.lo \
+ s390-dis.lo \
+ s390-opc.lo \
sh-dis.lo \
sparc-dis.lo \
sparc-opc.lo \
@@ -999,6 +1003,10 @@ ppc-dis.lo: ppc-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/opcode/ppc.h
ppc-opc.lo: ppc-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/ppc.h opintl.h
+s390-dis.lo: s390-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/opcode/s390.h
+s390-opc.lo: s390-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(INCDIR)/opcode/s390.h opintl.h
sh-dis.lo: sh-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
sh-opc.h $(INCDIR)/dis-asm.h $(BFD_H)
sparc-dis.lo: sparc-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
diff --git a/opcodes/configure b/opcodes/configure
index 426a70e81f2..7d63895bf2b 100755
--- a/opcodes/configure
+++ b/opcodes/configure
@@ -4545,9 +4545,10 @@ if test x${all_targets} = xfalse ; then
bfd_pj_arch) ta="$ta pj-dis.lo pj-opc.lo" ;;
bfd_powerpc_arch) ta="$ta ppc-dis.lo ppc-opc.lo" ;;
bfd_pyramid_arch) ;;
+ bfd_powerpc_64_arch) ta="$ta ppc-dis.lo ppc-opc.lo" ;;
bfd_romp_arch) ;;
bfd_rs6000_arch) ta="$ta ppc-dis.lo ppc-opc.lo" ;;
- bfd_powerpc_64_arch) ta="$ta ppc-dis.lo ppc-opc.lo" ;;
+ bfd_s390_arch) ta="$ta s390-dis.lo s390-opc.lo" ;;
bfd_sh_arch)
ta="$ta sh-dis.lo" ;;
bfd_sparc_arch) ta="$ta sparc-dis.lo sparc-opc.lo" ;;
diff --git a/opcodes/configure.in b/opcodes/configure.in
index b0d4288bf42..34b947ae618 100644
--- a/opcodes/configure.in
+++ b/opcodes/configure.in
@@ -199,9 +199,10 @@ if test x${all_targets} = xfalse ; then
bfd_pj_arch) ta="$ta pj-dis.lo pj-opc.lo" ;;
bfd_powerpc_arch) ta="$ta ppc-dis.lo ppc-opc.lo" ;;
bfd_pyramid_arch) ;;
+ bfd_powerpc_64_arch) ta="$ta ppc-dis.lo ppc-opc.lo" ;;
bfd_romp_arch) ;;
bfd_rs6000_arch) ta="$ta ppc-dis.lo ppc-opc.lo" ;;
- bfd_powerpc_64_arch) ta="$ta ppc-dis.lo ppc-opc.lo" ;;
+ bfd_s390_arch) ta="$ta s390-dis.lo s390-opc.lo" ;;
bfd_sh_arch)
ta="$ta sh-dis.lo" ;;
bfd_sparc_arch) ta="$ta sparc-dis.lo sparc-opc.lo" ;;
diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c
index d031840243c..ce3b6ad89d0 100644
--- a/opcodes/disassemble.c
+++ b/opcodes/disassemble.c
@@ -50,6 +50,7 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#define ARCH_pj
#define ARCH_powerpc
#define ARCH_rs6000
+#define ARCH_s390
#define ARCH_sh
#define ARCH_sparc
#define ARCH_tic30
@@ -245,6 +246,11 @@ disassembler (abfd)
disassemble = print_insn_rs6000;
break;
#endif
+#ifdef ARCH_s390
+ case bfd_arch_s390:
+ disassemble = print_insn_s390;
+ break;
+#endif
#ifdef ARCH_sh
case bfd_arch_sh:
if (bfd_big_endian (abfd))
diff --git a/opcodes/po/POTFILES.in b/opcodes/po/POTFILES.in
index b30cbd53ab9..2beea2a7611 100644
--- a/opcodes/po/POTFILES.in
+++ b/opcodes/po/POTFILES.in
@@ -73,6 +73,8 @@ pj-dis.c
pj-opc.c
ppc-dis.c
ppc-opc.c
+s390-dis.c
+s390-opc.c
sh-dis.c
sh-opc.h
sparc-dis.c
diff --git a/opcodes/po/opcodes.pot b/opcodes/po/opcodes.pot
index 3336bbd29da..944647a6092 100644
--- a/opcodes/po/opcodes.pot
+++ b/opcodes/po/opcodes.pot
@@ -6,7 +6,7 @@
msgid ""
msgstr ""
"Project-Id-Version: PACKAGE VERSION\n"
-"POT-Creation-Date: 2001-01-11 12:44-0800\n"
+"POT-Creation-Date: 2001-02-09 16:04-0800\n"
"PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n"
"Last-Translator: FULL NAME <EMAIL@ADDRESS>\n"
"Language-Team: LANGUAGE <LL@li.org>\n"
@@ -186,7 +186,7 @@ msgstr ""
msgid "%02x\t\t*unknown*"
msgstr ""
-#: i386-dis.c:2740
+#: i386-dis.c:2741
msgid "<internal disassembler error>"
msgstr ""
diff --git a/opcodes/s390-dis.c b/opcodes/s390-dis.c
new file mode 100644
index 00000000000..6409d5fcfef
--- /dev/null
+++ b/opcodes/s390-dis.c
@@ -0,0 +1,231 @@
+/* s390-dis.c -- Disassemble S390 instructions
+ Copyright (C) 2000, 2001 Free Software Foundation, Inc.
+ Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com).
+
+ This file is part of GDB, GAS and the GNU binutils.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ 02111-1307, USA. */
+
+#include <stdio.h>
+#include "ansidecl.h"
+#include "sysdep.h"
+#include "dis-asm.h"
+#include "opcode/s390.h"
+
+static int init_flag = 0;
+static int opc_index[256];
+static int current_arch_mask = 0;
+
+/* Set up index table for first opcode byte */
+static void
+init_disasm(info)
+ struct disassemble_info *info ATTRIBUTE_UNUSED;
+{
+ const struct s390_opcode *opcode;
+ const struct s390_opcode *opcode_end;
+
+ memset(opc_index, 0, sizeof(opc_index));
+ opcode_end = s390_opcodes + s390_num_opcodes;
+ for (opcode = s390_opcodes; opcode < opcode_end; opcode++) {
+ opc_index[(int) opcode->opcode[0]] = opcode - s390_opcodes;
+ while ((opcode < opcode_end) &&
+ (opcode[1].opcode[0] == opcode->opcode[0]))
+ opcode++;
+ }
+ switch (info->mach) {
+ case bfd_mach_s390_esa:
+ current_arch_mask = 1 << S390_OPCODE_ESA;
+ break;
+ case bfd_mach_s390_esame:
+ current_arch_mask = 1 << S390_OPCODE_ESAME;
+ break;
+ default:
+ abort();
+ }
+ init_flag = 1;
+}
+
+/* Extracts an operand value from an instruction. */
+
+static inline unsigned int
+s390_extract_operand (insn, operand)
+ unsigned char *insn;
+ const struct s390_operand *operand;
+{
+ unsigned int val;
+ int bits;
+
+ /* extract fragments of the operand byte for byte */
+ insn += operand->shift/8;
+ bits = (operand->shift & 7) + operand->bits;
+ val = 0;
+ do {
+ val <<= 8;
+ val |= (unsigned int) *insn++;
+ bits -= 8;
+ } while (bits > 0);
+ val >>= -bits;
+ val &= ((1U << (operand->bits-1))<<1) - 1;
+
+ /* sign extend value if the operand is signed or pc relative */
+ if ((operand->flags & (S390_OPERAND_SIGNED|S390_OPERAND_PCREL)) &&
+ (val & (1U << (operand->bits-1))))
+ val |= (-1U << (operand->bits-1))<<1;
+
+ /* double value if the operand is pc relative */
+ if (operand->flags & S390_OPERAND_PCREL)
+ val <<= 1;
+
+ /* length x in an instructions has real length x+1 */
+ if (operand->flags & S390_OPERAND_LENGTH)
+ val++;
+ return val;
+}
+
+/* Print a S390 instruction. */
+
+int
+print_insn_s390 (memaddr, info)
+ bfd_vma memaddr;
+ struct disassemble_info *info;
+{
+ bfd_byte buffer[6];
+ const struct s390_opcode *opcode;
+ const struct s390_opcode *opcode_end;
+ unsigned int value;
+ int status, opsize, bufsize;
+ char separator;
+
+ if (init_flag == 0)
+ init_disasm(info);
+
+ /* The output looks better if we put 6 bytes on a line. */
+ info->bytes_per_line = 6;
+
+ /* Every S390 instruction is max 6 bytes long. */
+ memset(buffer, 0, 6);
+ status = (*info->read_memory_func) (memaddr, buffer, 6, info);
+ if (status != 0) {
+ for (bufsize = 0; bufsize < 6; bufsize++)
+ if ((*info->read_memory_func) (memaddr, buffer, bufsize+1, info) != 0)
+ break;
+ if (bufsize <= 0) {
+ (*info->memory_error_func) (status, memaddr, info);
+ return -1;
+ }
+ /* Opsize calculation looks strange but it works
+ 00xxxxxx -> 2 bytes, 01xxxxxx/10xxxxxx -> 4 bytes,
+ 11xxxxxx -> 6 bytes. */
+ opsize = ((((buffer[0]>>6)+1)>>1)+1)<<1;
+ status = opsize > bufsize;
+ } else {
+ bufsize = 6;
+ opsize = ((((buffer[0]>>6)+1)>>1)+1)<<1;
+ }
+
+ if (status == 0) {
+ /* Find the first match in the opcode table. */
+ opcode_end = s390_opcodes + s390_num_opcodes;
+ for (opcode = s390_opcodes + opc_index[(int) buffer[0]];
+ (opcode < opcode_end) && (buffer[0] == opcode->opcode[0]);
+ opcode++) {
+ const struct s390_operand *operand;
+ const unsigned char *opindex;
+
+ /* check architecture */
+ if (!(opcode->architecture & current_arch_mask))
+ continue;
+ /* check signature of the opcode */
+ if ((buffer[1] & opcode->mask[1]) != opcode->opcode[1] ||
+ (buffer[2] & opcode->mask[2]) != opcode->opcode[2] ||
+ (buffer[3] & opcode->mask[3]) != opcode->opcode[3] ||
+ (buffer[4] & opcode->mask[4]) != opcode->opcode[4] ||
+ (buffer[5] & opcode->mask[5]) != opcode->opcode[5])
+ continue;
+
+ /* the instruction is valid */
+ if (opcode->operands[0] != 0)
+ (*info->fprintf_func) (info->stream, "%s\t", opcode->name);
+ else
+ (*info->fprintf_func) (info->stream, "%s", opcode->name);
+
+ /* Extract the operands. */
+ separator = 0;
+ for (opindex = opcode->operands; *opindex != 0; opindex++) {
+ unsigned int value;
+
+ operand = s390_operands + *opindex;
+ value = s390_extract_operand(buffer, operand);
+
+ if ((operand->flags & S390_OPERAND_INDEX) && value == 0)
+ continue;
+ if ((operand->flags & S390_OPERAND_BASE) &&
+ value == 0 && separator == '(') {
+ separator = ',';
+ continue;
+ }
+
+ if (separator)
+ (*info->fprintf_func) (info->stream, "%c", separator);
+
+ if (operand->flags & S390_OPERAND_GPR)
+ (*info->fprintf_func) (info->stream, "%%r%i", value);
+ else if (operand->flags & S390_OPERAND_FPR)
+ (*info->fprintf_func) (info->stream, "%%f%i", value);
+ else if (operand->flags & S390_OPERAND_AR)
+ (*info->fprintf_func) (info->stream, "%%a%i", value);
+ else if (operand->flags & S390_OPERAND_CR)
+ (*info->fprintf_func) (info->stream, "%%c%i", value);
+ else if (operand->flags & S390_OPERAND_PCREL)
+ (*info->print_address_func) (memaddr + (int) value, info);
+ else if (operand->flags & S390_OPERAND_SIGNED)
+ (*info->fprintf_func) (info->stream, "%i", (int) value);
+ else
+ (*info->fprintf_func) (info->stream, "%i", value);
+
+ if (operand->flags & S390_OPERAND_DISP) {
+ separator = '(';
+ } else if (operand->flags & S390_OPERAND_BASE) {
+ (*info->fprintf_func) (info->stream, ")");
+ separator = ',';
+ } else
+ separator = ',';
+ }
+
+ /* found instruction, printed it, return its size */
+ return opsize;
+ }
+ /* no matching instruction found, fall through to hex print */
+ }
+
+ if (bufsize >= 4) {
+ value = (unsigned int) buffer[0];
+ value = (value << 8) + (unsigned int) buffer[1];
+ value = (value << 8) + (unsigned int) buffer[2];
+ value = (value << 8) + (unsigned int) buffer[3];
+ (*info->fprintf_func) (info->stream,".long\t0x%08x", value);
+ return 4;
+ } else if (bufsize >= 2) {
+ value = (unsigned int) buffer[0];
+ value = (value << 8) + (unsigned int) buffer[1];
+ (*info->fprintf_func) (info->stream,".short\t0x%04x", value);
+ return 2;
+ } else {
+ value = (unsigned int) buffer[0];
+ (*info->fprintf_func) (info->stream,".byte\t0x%02x", value);
+ return 1;
+ }
+}
diff --git a/opcodes/s390-mkopc.c b/opcodes/s390-mkopc.c
new file mode 100644
index 00000000000..c290decac36
--- /dev/null
+++ b/opcodes/s390-mkopc.c
@@ -0,0 +1,172 @@
+/* s390-mkopc.c -- Generates opcode table out of s390-opc.txt
+ Copyright (C) 2000, 2001 Free Software Foundation, Inc.
+ Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com).
+
+ This file is part of GDB, GAS, and the GNU binutils.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ 02111-1307, USA. */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+/* ARCHBITS_ESA and ARCH_ESAME correspond to the bit numbers defined
+ by s390_opcode_arch_val in include/opcode/s390.h:
+ ARCHBITS_ESAONLY = (1<<S390_OPCODE_ESA)
+ ARCHBITS_ESA = (1<<S390_OPCODE_ESA) + (1<<S390_OPCODE_ESAME)
+ ARCHBITS_ESA = (1<<S390_OPCODE_ESAME). */
+#define ARCHBITS_ESAONLY 1
+#define ARCHBITS_ESA 3
+#define ARCHBITS_ESAME 2
+
+struct op_struct {
+ char opcode[16];
+ char mnemonic[16];
+ char format[16];
+ int archbits;
+ unsigned long long sort_value;
+ int no_nibbles;
+};
+
+struct op_struct *op_array;
+int max_ops;
+int no_ops;
+
+static void
+createTable(void)
+{
+ max_ops = 256;
+ op_array = malloc(max_ops*sizeof(struct op_struct));
+ no_ops = 0;
+}
+
+/*
+ * `insertOpcode': insert an op_struct into sorted opcode array
+ */
+static void
+insertOpcode(char *opcode, char *mnemonic, char *format, int archbits)
+{
+ char *str;
+ unsigned long long sort_value;
+ int no_nibbles;
+ int ix, k;
+
+ while (no_ops >= max_ops) {
+ max_ops = max_ops*2;
+ op_array = realloc(op_array, max_ops*sizeof(struct op_struct));
+ }
+ sort_value = 0;
+ str = opcode;
+ for (ix = 0; ix < 16; ix++) {
+ if (*str >= '0' && *str <= '9')
+ sort_value = (sort_value << 4) + (*str - '0');
+ else if (*str >= 'a' && *str <= 'f')
+ sort_value = (sort_value << 4) + (*str - 'a' + 10);
+ else if (*str >= 'A' && *str <= 'F')
+ sort_value = (sort_value << 4) + (*str - 'A' + 10);
+ else if (*str == '?')
+ sort_value <<= 4;
+ else
+ break;
+ str++;
+ }
+ sort_value <<= 4*(16 - ix);
+ no_nibbles = ix;
+ for (ix = 0; ix < no_ops; ix++)
+ if (sort_value > op_array[ix].sort_value)
+ break;
+ for (k = no_ops; k > ix; k--)
+ op_array[k] = op_array[k-1];
+ strcpy(op_array[ix].opcode, opcode);
+ strcpy(op_array[ix].mnemonic, mnemonic);
+ strcpy(op_array[ix].format, format);
+ op_array[ix].sort_value = sort_value;
+ op_array[ix].no_nibbles = no_nibbles;
+ op_array[ix].archbits = archbits;
+ no_ops++;
+}
+
+
+/*
+ * `dumpTable': write opcode table
+ */
+static void
+dumpTable(void)
+{
+ char *str;
+ int ix;
+
+ /* Write hash table entries (slots). */
+ printf("const struct s390_opcode s390_opcodes[] = {\n");
+ for (ix = 0; ix < no_ops; ix++) {
+ printf(" { \"%s\", ", op_array[ix].mnemonic);
+ for (str = op_array[ix].opcode; *str != 0; str++)
+ if (*str == '?')
+ *str = '0';
+ printf("OP%i(0x%sLL), ",
+ op_array[ix].no_nibbles*4, op_array[ix].opcode);
+ printf("MASK_%s, INSTR_%s, ",
+ op_array[ix].format, op_array[ix].format);
+ printf("%i}", op_array[ix].archbits);
+ if (ix < no_ops-1)
+ printf(",\n");
+ else
+ printf("\n");
+ }
+ printf("};\n\n");
+ printf("const int s390_num_opcodes =\n");
+ printf(" sizeof (s390_opcodes) / sizeof (s390_opcodes[0]);\n\n");
+}
+
+
+int
+main(void)
+{
+ char currentLine[256];
+
+ createTable();
+ /* Read opcode descriptions from `stdin'. For each mnemonic,
+ * make an entry into the opcode table.
+ */
+ while (fgets(currentLine, sizeof(currentLine), stdin) != NULL) {
+ char opcode[16];
+ char mnemonic[16];
+ char format[16];
+ char description[64];
+ char archtag[16];
+ int archbits;
+
+ if (currentLine[0] == '#')
+ continue;
+ memset(opcode, 0, 8);
+ if (sscanf(currentLine, "%15s %15s %15s \"%[^\"]\" %15s",
+ opcode, mnemonic, format, description, archtag) == 5) {
+ if (strcmp(archtag, "esaonly") == 0)
+ archbits = ARCHBITS_ESAONLY;
+ else if (strcmp(archtag, "esa") == 0)
+ archbits = ARCHBITS_ESA;
+ else if (strcmp(archtag, "esame") == 0)
+ archbits = ARCHBITS_ESAME;
+ else
+ archbits = 0;
+ insertOpcode(opcode, mnemonic, format, archbits);
+ } else
+ fprintf(stderr, "Couldn't scan line %s\n", currentLine);
+ }
+
+ dumpTable();
+ return 0;
+}
diff --git a/opcodes/s390-opc.c b/opcodes/s390-opc.c
new file mode 100644
index 00000000000..90fc2f70a11
--- /dev/null
+++ b/opcodes/s390-opc.c
@@ -0,0 +1,969 @@
+/* s390-opc.c -- S390 opcode list
+ Copyright (C) 2000, 2001 Free Software Foundation, Inc.
+ Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com).
+
+ This file is part of GDB, GAS, and the GNU binutils.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ 02111-1307, USA. */
+
+#include <stdio.h>
+#include "ansidecl.h"
+#include "opcode/s390.h"
+
+/* This file holds the S390 opcode table. The opcode table
+ includes almost all of the extended instruction mnemonics. This
+ permits the disassembler to use them, and simplifies the assembler
+ logic, at the cost of increasing the table size. The table is
+ strictly constant data, so the compiler should be able to put it in
+ the .text section.
+
+ This file also holds the operand table. All knowledge about
+ inserting operands into instructions and vice-versa is kept in this
+ file. */
+
+/* The operands table.
+ The fields are bits, shift, insert, extract, flags. */
+
+const struct s390_operand s390_operands[] =
+{
+#define UNUSED 0
+ { 0, 0, 0 }, /* Indicates the end of the operand list */
+
+#define R_8 1 /* GPR starting at position 8 */
+ { 4, 8, S390_OPERAND_GPR },
+#define R_12 2 /* GPR starting at position 12 */
+ { 4, 12, S390_OPERAND_GPR },
+#define R_16 3 /* GPR starting at position 16 */
+ { 4, 16, S390_OPERAND_GPR },
+#define R_20 4 /* GPR starting at position 20 */
+ { 4, 20, S390_OPERAND_GPR },
+#define R_24 5 /* GPR starting at position 24 */
+ { 4, 24, S390_OPERAND_GPR },
+#define R_28 6 /* GPR starting at position 28 */
+ { 4, 28, S390_OPERAND_GPR },
+#define R_32 7 /* GPR starting at position 32 */
+ { 4, 32, S390_OPERAND_GPR },
+
+#define F_8 8 /* FPR starting at position 8 */
+ { 4, 8, S390_OPERAND_FPR },
+#define F_12 9 /* FPR starting at position 12 */
+ { 4, 12, S390_OPERAND_FPR },
+#define F_16 10 /* FPR starting at position 16 */
+ { 4, 16, S390_OPERAND_FPR },
+#define F_20 11 /* FPR starting at position 16 */
+ { 4, 16, S390_OPERAND_FPR },
+#define F_24 12 /* FPR starting at position 24 */
+ { 4, 24, S390_OPERAND_FPR },
+#define F_28 13 /* FPR starting at position 28 */
+ { 4, 28, S390_OPERAND_FPR },
+#define F_32 14 /* FPR starting at position 32 */
+ { 4, 32, S390_OPERAND_FPR },
+
+#define A_8 15 /* Access reg. starting at position 8 */
+ { 4, 8, S390_OPERAND_AR },
+#define A_12 16 /* Access reg. starting at position 12 */
+ { 4, 12, S390_OPERAND_AR },
+#define A_24 17 /* Access reg. starting at position 24 */
+ { 4, 24, S390_OPERAND_AR },
+#define A_28 18 /* Access reg. starting at position 28 */
+ { 4, 28, S390_OPERAND_AR },
+
+#define C_8 19 /* Control reg. starting at position 8 */
+ { 4, 8, S390_OPERAND_CR },
+#define C_12 20 /* Control reg. starting at position 12 */
+ { 4, 12, S390_OPERAND_CR },
+
+#define B_16 21 /* Base register starting at position 16 */
+ { 4, 16, S390_OPERAND_BASE|S390_OPERAND_GPR },
+#define B_32 22 /* Base register starting at position 32 */
+ { 4, 32, S390_OPERAND_BASE|S390_OPERAND_GPR },
+
+#define X_12 23 /* Index register starting at position 12 */
+ { 4, 12, S390_OPERAND_INDEX|S390_OPERAND_GPR },
+
+#define D_20 24 /* Displacement starting at position 20 */
+ { 12, 20, S390_OPERAND_DISP },
+#define D_36 25 /* Displacement starting at position 36 */
+ { 12, 36, S390_OPERAND_DISP },
+
+#define L4_8 26 /* 4 bit length starting at position 8 */
+ { 4, 8, S390_OPERAND_LENGTH },
+#define L4_12 27 /* 4 bit length starting at position 12 */
+ { 4, 12, S390_OPERAND_LENGTH },
+#define L8_8 28 /* 8 bit length starting at position 8 */
+ { 8, 8, S390_OPERAND_LENGTH },
+
+#define U4_8 29 /* 4 bit unsigned value starting at 8 */
+ { 4, 8, 0 },
+#define U4_12 30 /* 4 bit unsigned value starting at 12 */
+ { 4, 12, 0 },
+#define U4_16 31 /* 4 bit unsigned value starting at 16 */
+ { 4, 16, 0 },
+#define U4_20 32 /* 4 bit unsigned value starting at 20 */
+ { 4, 20, 0 },
+#define U8_8 33 /* 8 bit unsigned value starting at 8 */
+ { 8, 8, 0 },
+#define U8_16 34 /* 8 bit unsigned value starting at 16 */
+ { 8, 16, 0 },
+#define I16_16 35 /* 16 bit signed value starting at 16 */
+ { 16, 16, S390_OPERAND_SIGNED },
+#define U16_16 36 /* 16 bit unsigned value starting at 16 */
+ { 16, 16, 0 },
+#define J16_16 37 /* PC relative jump offset at 16 */
+ { 16, 16, S390_OPERAND_PCREL },
+#define J32_16 38 /* PC relative long offset at 16 */
+ { 32, 16, S390_OPERAND_PCREL }
+};
+
+
+/* Macros used to form opcodes. */
+
+/* 8/16/48 bit opcodes */
+#define OP8(x) { x, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define OP16(x) { x>>8, x&255, 0x00, 0x00, 0x00, 0x00 }
+#define OP48(x) { x>>40, (x>>32)&255, (x>>24)&255, \
+ (x>>16)&255, (x>>8)&255, x&255}
+
+#define INSTR_E 2, { 0,0,0,0,0,0 } /* e.g. pr */
+#define INSTR_RR 2, { R_8,R_12,0,0,0,0 } /* e.g. lr */
+#define INSTR_RR_M 2, { U4_8,R_12,0,0,0,0 } /* e.g. bcr */
+#define INSTR_RR_B 2, { R_12, 0,0,0,0,0 } /* e.g. br */
+#define INSTR_RR_I 2, { U8_8, 0,0,0,0,0 } /* e.g. svc */
+#define INSTR_RR_R 2, { R_8, 0,0,0,0,0 } /* e.g. spm */
+#define INSTR_RR_E 2, { R_8,R_12,0,0,0,0 } /* e.g. aer */
+#define INSTR_RR_D 2, { F_8,F_12,0,0,0,0 } /* e.g. adr */
+#define INSTR_RR_X 2, { R_8,R_12,0,0,0,0 } /* e.g. mxr */
+#define INSTR_RR_ED 2, { F_8,F_12,0,0,0,0 } /* e.g. mer */
+#define INSTR_RR_DE 2, { F_8,F_12,0,0,0,0 } /* e.g. lrer */
+#define INSTR_RR_DX 2, { F_8,F_12,0,0,0,0 } /* e.g. mxdr */
+#define INSTR_RR_XD 2, { F_8,F_12,0,0,0,0 } /* e.g. lrdr */
+#define INSTR_RRE 4, { R_24,R_28,0,0,0,0 } /* e.g. lura */
+#define INSTR_RRE_A 4, { A_24,A_28,0,0,0,0 } /* e.g. cpya */
+#define INSTR_RRE_F 4, { F_24,F_28,0,0,0,0 } /* e.g. debr */
+#define INSTR_RRE_O 4, { 0,0,0,0,0,0 } /* e.g. palb */
+#define INSTR_RRE_R 4, { R_24,0,0,0,0,0 } /* e.g. ipm */
+#define INSTR_RRE_R2 4, { R_28,0,0,0,0,0 } /* e.g. tb */
+#define INSTR_RRE_E 4, { F_24,0,0,0,0,0 } /* e.g. sqer */
+#define INSTR_RRE_D 4, { F_24,0,0,0,0,0 } /* e.g. sqdr */
+#define INSTR_RRE_X 4, { F_24,0,0,0,0,0 } /* e.g. dxr */
+#define INSTR_RRE_AR 4, { A_24,R_28,0,0,0,0 } /* e.g. sar */
+#define INSTR_RRE_RA 4, { R_24,A_28,0,0,0,0 } /* e.g. ear */
+#define INSTR_RRF_M 4, { R_24,U4_16,R_28,0,0,0 } /* e.g. cfxbr*/
+#define INSTR_RRF_RM 4, { R_24,R_16,R_28,U4_20,0,0 } /* e.g. didbr*/
+#define INSTR_RRF_R 4, { R_16,R_24,R_28,0,0,0 } /* e.g. madbr*/
+#define INSTR_RRF_F 4, { F_16,F_24,F_28,0,0,0 } /* e.g. madbr*/
+#define INSTR_RS 4, { R_8,R_12,D_20,B_16,0,0 } /* e.g. cs */
+#define INSTR_RS_A 4, { A_8,A_12,D_20,B_16,0,0 } /* e.g. lam */
+#define INSTR_RS_C 4, { C_8,C_12,D_20,B_16,0,0 } /* e.g. lctl */
+#define INSTR_RS_M 4, { R_8,U4_12,D_20,B_16,0,0 } /* e.g. icm */
+#define INSTR_RS_S 4, { R_8,D_20,B_16,0,0,0 } /* e.g. sll */
+#define INSTR_RS_D 4, { R_8,D_20,B_16,0,0,0 } /* e.g. sldl */
+#define INSTR_RX 4, { R_8,D_20,X_12,B_16,0,0 } /* e.g. l */
+#define INSTR_RX_M 4, { U4_8,D_20,X_12,B_16,0,0 } /* e.g. bc */
+#define INSTR_RX_B 4, { D_20,X_12,B_16,0,0,0 } /* e.g. b */
+#define INSTR_RX_E 4, { F_8,D_20,X_12,B_16,0,0 } /* e.g. ae */
+#define INSTR_RX_D 4, { F_8,D_20,X_12,B_16,0,0 } /* e.g. ad */
+#define INSTR_RX_ED 4, { F_8,D_20,X_12,B_16,0,0 } /* e.g. me */
+#define INSTR_RX_DX 4, { F_8,D_20,X_12,B_16,0,0 } /* e.g. mxd */
+#define INSTR_RXE 6, { R_8,D_20,X_12,B_16,0,0 } /* e.g. agr */
+#define INSTR_RXE_F 6, { F_8,D_20,X_12,B_16,0,0 } /* e.g. axbr */
+#define INSTR_RXF 6, { F_32,D_20,X_12,B_16,F_8,0 } /* e.g. madb */
+#define INSTR_S 4, { D_20,B_16,0,0,0,0 } /* e.g. lpsw */
+#define INSTR_S_O 4, { 0,0,0,0,0,0 } /* e.g. hsch */
+#define INSTR_SI 4, { D_20,B_16,U8_8,0,0,0 } /* e.g. cli */
+#define INSTR_SS_RR 6, { D_20,R_8,B_16,D_36,B_32,R_12 } /* e.g. mvck */
+#define INSTR_SS_LL 6, { D_20,L4_8,B_16,D_36,L4_12,B_32 } /* e.g. pack */
+#define INSTR_SS_LI 6, { D_20,L4_8,B_16,D_36,B_32,U4_12 } /* e.g. srp */
+#define INSTR_SS_L 6, { D_20,L8_8,B_16,D_36,B_32,0 } /* e.g. mvc */
+#define INSTR_SS_LMD 6, { R_8,R_12,D_20,B_16,D_36,B_32 } /* e.g. lmd */
+#define INSTR_SS_PLO 6, { R_8,D_20,B_16,R_12,D_36,B_32 } /* e.g. plo */
+#define INSTR_SSE 6, { D_20,B_16,D_36,B_32,0,0 } /* e.g. mvsdk */
+#define INSTR_RI 4, { R_8,I16_16,0,0,0,0 } /* e.g. ahi */
+#define INSTR_RI_U 4, { R_8,U16_16,0,0,0,0 } /* e.g. tml */
+#define INSTR_RI_A 4, { R_8,J16_16,0,0,0,0 } /* e.g. brct */
+#define INSTR_RI_MA 4, { U4_8,J16_16,0,0,0 } /* e.g. brc */
+#define INSTR_RI_B 4, { J16_16,0,0,0,0 } /* e.g. j */
+#define INSTR_RSI_A 4, { R_8,R_12,J16_16,0,0,0 } /* e.g. brxh */
+#define INSTR_RSE 6, { R_8,D_20,B_16,R_12,0,0 } /* e.g. lmg */
+#define INSTR_RSE_M 6, { R_8,U4_12,D_20,B_16,0,0 } /* e.g. icmh */
+#define INSTR_RSE_R 6, { R_8,R_12,D_20,B_16,0,0 } /* e.g. lmh */
+#define INSTR_RIE_A 6, { R_8,J16_16,R_12,0,0,0 } /* e.g. brxhg */
+#define INSTR_RIL_A 6, { R_8,J32_16,0,0,0,0 } /* e.g. brasl */
+#define INSTR_RIL_B 6, { J32_16,0,0,0,0,0 } /* e.g. jg */
+#define INSTR_RIL_MA 6, { R_8,J32_16,0,0,0,0 } /* e.g. brcl */
+
+#define MASK_E { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RR { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RR_M { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RR_B { 0xff, 0xf0, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RR_I { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RR_R { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RR_E { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RR_D { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RR_X { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RR_ED { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RR_DE { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RR_DX { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RR_XD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RRE { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
+#define MASK_RRE_A { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
+#define MASK_RRE_F { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
+#define MASK_RRE_O { 0xff, 0xff, 0xff, 0xff, 0x00, 0x00 }
+#define MASK_RRE_R { 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00 }
+#define MASK_RRE_R2 { 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00 }
+#define MASK_RRE_E { 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00 }
+#define MASK_RRE_D { 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00 }
+#define MASK_RRE_X { 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00 }
+#define MASK_RRE_AR { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
+#define MASK_RRE_RA { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
+#define MASK_RRF_M { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RRF_RM { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RRF_R { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RRF_F { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RS { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RS_A { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RS_C { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RS_M { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RS_S { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RS_D { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RX { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RX_M { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RX_B { 0xff, 0xf0, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RX_E { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RX_D { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RX_ED { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RX_DX { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RXE { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
+#define MASK_RXE_F { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
+#define MASK_RXF { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
+#define MASK_S { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_S_O { 0xff, 0xff, 0xff, 0xff, 0x00, 0x00 }
+#define MASK_SI { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_SS_RR { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_SS_LL { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_SS_LI { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_SS_L { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_SS_LMD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_SS_PLO { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_SSE { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RI { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RI_U { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RI_A { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RI_MA { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RI_B { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RSI_A { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RSE { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
+#define MASK_RSE_M { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
+#define MASK_RSE_R { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
+#define MASK_RIE_A { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
+#define MASK_RIL_A { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RIL_B { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RIL_M { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RIL_MA { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
+
+/* The opcode formats table (blueprints for .insn pseudo mnemonic). */
+
+const struct s390_opcode s390_opformats[] = {
+ { "e", OP8(0x00LL), MASK_E, INSTR_E, 3 },
+ { "ri", OP8(0x00LL), MASK_RI, INSTR_RI, 3 },
+ { "ri_a", OP8(0x00LL), MASK_RI_A, INSTR_RI_A, 3 },
+ { "ri_b", OP8(0x00LL), MASK_RI_B, INSTR_RI_B, 3 },
+ { "ri_ma", OP8(0x00LL), MASK_RI_MA, INSTR_RI_MA, 3 },
+ { "ri_u", OP8(0x00LL), MASK_RI_U, INSTR_RI_U, 3 },
+ { "rie_a", OP8(0x00LL), MASK_RIE_A, INSTR_RIE_A, 3 },
+ { "ril_a", OP8(0x00LL), MASK_RIL_A, INSTR_RIL_A, 3 },
+ { "ril_b", OP8(0x00LL), MASK_RIL_B, INSTR_RIL_B, 3 },
+ { "ril_ma", OP8(0x00LL), MASK_RIL_MA, INSTR_RIL_MA, 3 },
+ { "rr", OP8(0x00LL), MASK_RR, INSTR_RR, 3 },
+ { "rr_b", OP8(0x00LL), MASK_RR_B, INSTR_RR_B, 3 },
+ { "rr_d", OP8(0x00LL), MASK_RR_D, INSTR_RR_D, 3 },
+ { "rr_de", OP8(0x00LL), MASK_RR_DE, INSTR_RR_DE, 3 },
+ { "rr_dx", OP8(0x00LL), MASK_RR_DX, INSTR_RR_DX, 3 },
+ { "rr_e", OP8(0x00LL), MASK_RR_E, INSTR_RR_E, 3 },
+ { "rr_ed", OP8(0x00LL), MASK_RR_ED, INSTR_RR_ED, 3 },
+ { "rr_i", OP8(0x00LL), MASK_RR_I, INSTR_RR_I, 3 },
+ { "rr_m", OP8(0x00LL), MASK_RR_M, INSTR_RR_M, 3 },
+ { "rr_r", OP8(0x00LL), MASK_RR_R, INSTR_RR_R, 3 },
+ { "rr_x", OP8(0x00LL), MASK_RR_X, INSTR_RR_X, 3 },
+ { "rr_xd", OP8(0x00LL), MASK_RR_XD, INSTR_RR_XD, 3 },
+ { "rre", OP8(0x00LL), MASK_RRE, INSTR_RRE, 3 },
+ { "rre_a", OP8(0x00LL), MASK_RRE_A, INSTR_RRE_A, 3 },
+ { "rre_ar", OP8(0x00LL), MASK_RRE_AR, INSTR_RRE_AR, 3 },
+ { "rre_d", OP8(0x00LL), MASK_RRE_D, INSTR_RRE_D, 3 },
+ { "rre_e", OP8(0x00LL), MASK_RRE_E, INSTR_RRE_E, 3 },
+ { "rre_f", OP8(0x00LL), MASK_RRE_F, INSTR_RRE_F, 3 },
+ { "rre_o", OP8(0x00LL), MASK_RRE_O, INSTR_RRE_O, 3 },
+ { "rre_r", OP8(0x00LL), MASK_RRE_R, INSTR_RRE_R, 3 },
+ { "rre_r2", OP8(0x00LL), MASK_RRE_R2, INSTR_RRE_R2, 3 },
+ { "rre_ra", OP8(0x00LL), MASK_RRE_RA, INSTR_RRE_RA, 3 },
+ { "rre_x", OP8(0x00LL), MASK_RRE_X, INSTR_RRE_X, 3 },
+ { "rrf_f", OP8(0x00LL), MASK_RRF_F, INSTR_RRF_F, 3 },
+ { "rrf_m", OP8(0x00LL), MASK_RRF_M, INSTR_RRF_M, 3 },
+ { "rrf_r", OP8(0x00LL), MASK_RRF_R, INSTR_RRF_R, 3 },
+ { "rrf_rm", OP8(0x00LL), MASK_RRF_RM, INSTR_RRF_RM, 3 },
+ { "rs", OP8(0x00LL), MASK_RS, INSTR_RS, 3 },
+ { "rs_a", OP8(0x00LL), MASK_RS_A, INSTR_RS_A, 3 },
+ { "rs_c", OP8(0x00LL), MASK_RS_C, INSTR_RS_C, 3 },
+ { "rs_d", OP8(0x00LL), MASK_RS_D, INSTR_RS_D, 3 },
+ { "rs_m", OP8(0x00LL), MASK_RS_M, INSTR_RS_M, 3 },
+ { "rs_s", OP8(0x00LL), MASK_RS_S, INSTR_RS_S, 3 },
+ { "rse", OP8(0x00LL), MASK_RSE, INSTR_RSE, 3 },
+ { "rse_m", OP8(0x00LL), MASK_RSE_M, INSTR_RSE_M, 3 },
+ { "rse_r", OP8(0x00LL), MASK_RSE_R, INSTR_RSE_R, 3 },
+ { "rsi_a", OP8(0x00LL), MASK_RSI_A, INSTR_RSI_A, 3 },
+ { "rx", OP8(0x00LL), MASK_RX, INSTR_RX, 3 },
+ { "rx_b", OP8(0x00LL), MASK_RX_B, INSTR_RX_B, 3 },
+ { "rx_d", OP8(0x00LL), MASK_RX_D, INSTR_RX_D, 3 },
+ { "rx_dx", OP8(0x00LL), MASK_RX_DX, INSTR_RX_DX, 3 },
+ { "rx_e", OP8(0x00LL), MASK_RX_E, INSTR_RX_E, 3 },
+ { "rx_ed", OP8(0x00LL), MASK_RX_ED, INSTR_RX_ED, 3 },
+ { "rx_m", OP8(0x00LL), MASK_RX_M, INSTR_RX_M, 3 },
+ { "rxe", OP8(0x00LL), MASK_RXE, INSTR_RXE, 3 },
+ { "rxe_f", OP8(0x00LL), MASK_RXE_F, INSTR_RXE_F, 3 },
+ { "rxf", OP8(0x00LL), MASK_RXF, INSTR_RXF, 3 },
+ { "s", OP8(0x00LL), MASK_S, INSTR_S, 3 },
+ { "si", OP8(0x00LL), MASK_SI, INSTR_SI, 3 },
+ { "ss_l", OP8(0x00LL), MASK_SS_L, INSTR_SS_L, 3 },
+ { "ss_li", OP8(0x00LL), MASK_SS_LI, INSTR_SS_LI, 3 },
+ { "ss_ll", OP8(0x00LL), MASK_SS_LL, INSTR_SS_LL, 3 },
+ { "ss_lmd", OP8(0x00LL), MASK_SS_LMD, INSTR_SS_LMD, 3 },
+ { "ss_plo", OP8(0x00LL), MASK_SS_PLO, INSTR_SS_PLO, 3 },
+ { "ss_rr", OP8(0x00LL), MASK_SS_RR, INSTR_SS_RR, 3 },
+ { "sse", OP8(0x00LL), MASK_SSE, INSTR_SSE, 3 },
+};
+
+const int s390_num_opformats =
+ sizeof (s390_opformats) / sizeof (s390_opformats[0]);
+
+/* The opcode table.
+
+ The format of the opcode table is:
+
+ NAME OPCODE MASK OPERANDS
+
+ NAME is the name of the instruction.
+ OPCODE is the instruction opcode.
+ MASK is the opcode mask; this is used to tell the disassembler
+ which bits in the actual opcode must match OPCODE.
+ OPERANDS is the list of operands.
+
+ The disassembler reads the table in order and prints the first
+ instruction which matches. */
+
+const struct s390_opcode s390_opcodes[] = {
+ { "dp", OP8(0xfdLL), MASK_SS_LL, INSTR_SS_LL, 3},
+ { "mp", OP8(0xfcLL), MASK_SS_LL, INSTR_SS_LL, 3},
+ { "sp", OP8(0xfbLL), MASK_SS_LL, INSTR_SS_LL, 3},
+ { "ap", OP8(0xfaLL), MASK_SS_LL, INSTR_SS_LL, 3},
+ { "cp", OP8(0xf9LL), MASK_SS_LL, INSTR_SS_LL, 3},
+ { "zap", OP8(0xf8LL), MASK_SS_LL, INSTR_SS_LL, 3},
+ { "unpk", OP8(0xf3LL), MASK_SS_LL, INSTR_SS_LL, 3},
+ { "pack", OP8(0xf2LL), MASK_SS_LL, INSTR_SS_LL, 3},
+ { "mvo", OP8(0xf1LL), MASK_SS_LL, INSTR_SS_LL, 3},
+ { "srp", OP8(0xf0LL), MASK_SS_LI, INSTR_SS_LI, 3},
+ { "lmd", OP8(0xefLL), MASK_SS_LMD, INSTR_SS_LMD, 2},
+ { "plo", OP8(0xeeLL), MASK_SS_PLO, INSTR_SS_PLO, 3},
+ { "msdb", OP48(0xed000000001fLL), MASK_RXF, INSTR_RXF, 3},
+ { "madb", OP48(0xed000000001eLL), MASK_RXF, INSTR_RXF, 3},
+ { "ddb", OP48(0xed000000001dLL), MASK_RXE_F, INSTR_RXE_F, 3},
+ { "mdb", OP48(0xed000000001cLL), MASK_RXE_F, INSTR_RXE_F, 3},
+ { "sdb", OP48(0xed000000001bLL), MASK_RXE_F, INSTR_RXE_F, 3},
+ { "adb", OP48(0xed000000001aLL), MASK_RXE_F, INSTR_RXE_F, 3},
+ { "cdb", OP48(0xed0000000019LL), MASK_RXE_F, INSTR_RXE_F, 3},
+ { "kdb", OP48(0xed0000000018LL), MASK_RXE_F, INSTR_RXE_F, 3},
+ { "meeb", OP48(0xed0000000017LL), MASK_RXE_F, INSTR_RXE_F, 3},
+ { "sqdb", OP48(0xed0000000015LL), MASK_RXE_F, INSTR_RXE_F, 3},
+ { "sqeb", OP48(0xed0000000014LL), MASK_RXE_F, INSTR_RXE_F, 3},
+ { "tcxb", OP48(0xed0000000012LL), MASK_RXE_F, INSTR_RXE_F, 3},
+ { "tcdb", OP48(0xed0000000011LL), MASK_RXE_F, INSTR_RXE_F, 3},
+ { "tceb", OP48(0xed0000000010LL), MASK_RXE_F, INSTR_RXE_F, 3},
+ { "mseb", OP48(0xed000000000fLL), MASK_RXF, INSTR_RXF, 3},
+ { "maeb", OP48(0xed000000000eLL), MASK_RXF, INSTR_RXF, 3},
+ { "deb", OP48(0xed000000000dLL), MASK_RXE_F, INSTR_RXE_F, 3},
+ { "mdeb", OP48(0xed000000000cLL), MASK_RXE_F, INSTR_RXE_F, 3},
+ { "seb", OP48(0xed000000000bLL), MASK_RXE_F, INSTR_RXE_F, 3},
+ { "aeb", OP48(0xed000000000aLL), MASK_RXE_F, INSTR_RXE_F, 3},
+ { "ceb", OP48(0xed0000000009LL), MASK_RXE_F, INSTR_RXE_F, 3},
+ { "keb", OP48(0xed0000000008LL), MASK_RXE_F, INSTR_RXE_F, 3},
+ { "mxdb", OP48(0xed0000000007LL), MASK_RXE_F, INSTR_RXE_F, 3},
+ { "lxeb", OP48(0xed0000000006LL), MASK_RXE_F, INSTR_RXE_F, 3},
+ { "lxdb", OP48(0xed0000000005LL), MASK_RXE_F, INSTR_RXE_F, 3},
+ { "ldeb", OP48(0xed0000000004LL), MASK_RXE_F, INSTR_RXE_F, 3},
+ { "brxlg", OP48(0xec0000000045LL), MASK_RIE_A, INSTR_RIE_A, 2},
+ { "brxhg", OP48(0xec0000000044LL), MASK_RIE_A, INSTR_RIE_A, 2},
+ { "lmh", OP48(0xeb0000000096LL), MASK_RSE_R, INSTR_RSE_R, 2},
+ { "icmh", OP48(0xeb0000000080LL), MASK_RSE_M, INSTR_RSE_M, 2},
+ { "bxleg", OP48(0xeb0000000045LL), MASK_RSE_R, INSTR_RSE_R, 2},
+ { "bxhg", OP48(0xeb0000000044LL), MASK_RSE_R, INSTR_RSE_R, 2},
+ { "cdsg", OP48(0xeb000000003eLL), MASK_RSE_R, INSTR_RSE_R, 2},
+ { "csg", OP48(0xeb0000000030LL), MASK_RSE_R, INSTR_RSE_R, 2},
+ { "lctlg", OP48(0xeb000000002fLL), MASK_RSE_R, INSTR_RSE_R, 2},
+ { "stcmh", OP48(0xeb000000002cLL), MASK_RSE_M, INSTR_RSE_M, 2},
+ { "stmh", OP48(0xeb0000000026LL), MASK_RSE_R, INSTR_RSE_R, 2},
+ { "stctg", OP48(0xeb0000000025LL), MASK_RSE_R, INSTR_RSE_R, 2},
+ { "stmg", OP48(0xeb0000000024LL), MASK_RSE_R, INSTR_RSE_R, 2},
+ { "clmh", OP48(0xeb0000000020LL), MASK_RSE_M, INSTR_RSE_M, 2},
+ { "rll", OP48(0xeb000000001dLL), MASK_RSE_R, INSTR_RSE_R, 2},
+ { "rllg", OP48(0xeb000000001cLL), MASK_RSE_R, INSTR_RSE_R, 2},
+ { "tracg", OP48(0xeb000000000fLL), MASK_RSE_R, INSTR_RSE_R, 2},
+ { "sllg", OP48(0xeb000000000dLL), MASK_RSE_R, INSTR_RSE_R, 2},
+ { "srlg", OP48(0xeb000000000cLL), MASK_RSE_R, INSTR_RSE_R, 2},
+ { "slag", OP48(0xeb000000000bLL), MASK_RSE_R, INSTR_RSE_R, 2},
+ { "srag", OP48(0xeb000000000aLL), MASK_RSE_R, INSTR_RSE_R, 2},
+ { "lmg", OP48(0xeb0000000004LL), MASK_RSE_R, INSTR_RSE_R, 2},
+ { "mvcin", OP8(0xe8LL), MASK_SS_L, INSTR_SS_L, 3},
+ { "mvcdk", OP16(0xe50fLL), MASK_SSE, INSTR_SSE, 3},
+ { "mvcsk", OP16(0xe50eLL), MASK_SSE, INSTR_SSE, 3},
+ { "tprot", OP16(0xe501LL), MASK_SSE, INSTR_SSE, 3},
+ { "strag", OP48(0xe50000000002LL), MASK_SSE, INSTR_SSE, 2},
+ { "lasp", OP16(0xe500LL), MASK_SSE, INSTR_SSE, 3},
+ { "slb", OP48(0xe30000000099LL), MASK_RXE, INSTR_RXE, 2},
+ { "alc", OP48(0xe30000000098LL), MASK_RXE, INSTR_RXE, 2},
+ { "dl", OP48(0xe30000000097LL), MASK_RXE, INSTR_RXE, 2},
+ { "ml", OP48(0xe30000000096LL), MASK_RXE, INSTR_RXE, 2},
+ { "llgh", OP48(0xe30000000091LL), MASK_RXE, INSTR_RXE, 2},
+ { "llgc", OP48(0xe30000000090LL), MASK_RXE, INSTR_RXE, 2},
+ { "lpq", OP48(0xe3000000008fLL), MASK_RXE, INSTR_RXE, 2},
+ { "stpq", OP48(0xe3000000008eLL), MASK_RXE, INSTR_RXE, 2},
+ { "slbg", OP48(0xe30000000089LL), MASK_RXE, INSTR_RXE, 2},
+ { "alcg", OP48(0xe30000000088LL), MASK_RXE, INSTR_RXE, 2},
+ { "dlg", OP48(0xe30000000087LL), MASK_RXE, INSTR_RXE, 2},
+ { "mlg", OP48(0xe30000000086LL), MASK_RXE, INSTR_RXE, 2},
+ { "xg", OP48(0xe30000000082LL), MASK_RXE, INSTR_RXE, 2},
+ { "og", OP48(0xe30000000081LL), MASK_RXE, INSTR_RXE, 2},
+ { "ng", OP48(0xe30000000080LL), MASK_RXE, INSTR_RXE, 2},
+ { "bctg", OP48(0xe30000000046LL), MASK_RXE, INSTR_RXE, 2},
+ { "strvh", OP48(0xe3000000003fLL), MASK_RXE, INSTR_RXE, 2},
+ { "strv", OP48(0xe3000000003eLL), MASK_RXE, INSTR_RXE, 2},
+ { "clgf", OP48(0xe30000000031LL), MASK_RXE, INSTR_RXE, 2},
+ { "cgf", OP48(0xe30000000030LL), MASK_RXE, INSTR_RXE, 2},
+ { "strvg", OP48(0xe3000000002fLL), MASK_RXE, INSTR_RXE, 2},
+ { "cvdg", OP48(0xe3000000002eLL), MASK_RXE, INSTR_RXE, 2},
+ { "stg", OP48(0xe30000000024LL), MASK_RXE, INSTR_RXE, 2},
+ { "clg", OP48(0xe30000000021LL), MASK_RXE, INSTR_RXE, 2},
+ { "cg", OP48(0xe30000000020LL), MASK_RXE, INSTR_RXE, 2},
+ { "lrvh", OP48(0xe3000000001fLL), MASK_RXE, INSTR_RXE, 2},
+ { "lrv", OP48(0xe3000000001eLL), MASK_RXE, INSTR_RXE, 2},
+ { "dsgf", OP48(0xe3000000001dLL), MASK_RXE, INSTR_RXE, 2},
+ { "msgf", OP48(0xe3000000001cLL), MASK_RXE, INSTR_RXE, 2},
+ { "slgf", OP48(0xe3000000001bLL), MASK_RXE, INSTR_RXE, 2},
+ { "algf", OP48(0xe3000000001aLL), MASK_RXE, INSTR_RXE, 2},
+ { "sgf", OP48(0xe30000000019LL), MASK_RXE, INSTR_RXE, 2},
+ { "agf", OP48(0xe30000000018LL), MASK_RXE, INSTR_RXE, 2},
+ { "llgt", OP48(0xe30000000017LL), MASK_RXE, INSTR_RXE, 2},
+ { "llgf", OP48(0xe30000000016LL), MASK_RXE, INSTR_RXE, 2},
+ { "lgf", OP48(0xe30000000014LL), MASK_RXE, INSTR_RXE, 2},
+ { "lrvg", OP48(0xe3000000000fLL), MASK_RXE, INSTR_RXE, 2},
+ { "cvbg", OP48(0xe3000000000eLL), MASK_RXE, INSTR_RXE, 2},
+ { "dsg", OP48(0xe3000000000dLL), MASK_RXE, INSTR_RXE, 2},
+ { "msg", OP48(0xe3000000000cLL), MASK_RXE, INSTR_RXE, 2},
+ { "slg", OP48(0xe3000000000bLL), MASK_RXE, INSTR_RXE, 2},
+ { "alg", OP48(0xe3000000000aLL), MASK_RXE, INSTR_RXE, 2},
+ { "sg", OP48(0xe30000000009LL), MASK_RXE, INSTR_RXE, 2},
+ { "ag", OP48(0xe30000000008LL), MASK_RXE, INSTR_RXE, 2},
+ { "lg", OP48(0xe30000000004LL), MASK_RXE, INSTR_RXE, 2},
+ { "lrag", OP48(0xe30000000003LL), MASK_RXE, INSTR_RXE, 2},
+ { "edmk", OP8(0xdfLL), MASK_SS_L, INSTR_SS_L, 3},
+ { "ed", OP8(0xdeLL), MASK_SS_L, INSTR_SS_L, 3},
+ { "trt", OP8(0xddLL), MASK_SS_L, INSTR_SS_L, 3},
+ { "tr", OP8(0xdcLL), MASK_SS_L, INSTR_SS_L, 3},
+ { "mvcs", OP8(0xdbLL), MASK_SS_RR, INSTR_SS_RR, 3},
+ { "mvcp", OP8(0xdaLL), MASK_SS_RR, INSTR_SS_RR, 3},
+ { "mvck", OP8(0xd9LL), MASK_SS_RR, INSTR_SS_RR, 3},
+ { "xc", OP8(0xd7LL), MASK_SS_L, INSTR_SS_L, 3},
+ { "oc", OP8(0xd6LL), MASK_SS_L, INSTR_SS_L, 3},
+ { "clc", OP8(0xd5LL), MASK_SS_L, INSTR_SS_L, 3},
+ { "nc", OP8(0xd4LL), MASK_SS_L, INSTR_SS_L, 3},
+ { "mvz", OP8(0xd3LL), MASK_SS_L, INSTR_SS_L, 3},
+ { "mvc", OP8(0xd2LL), MASK_SS_L, INSTR_SS_L, 3},
+ { "mvn", OP8(0xd1LL), MASK_SS_L, INSTR_SS_L, 3},
+ { "jg", OP16(0xc0f4LL), MASK_RIL_B, INSTR_RIL_B, 2},
+ { "jgno", OP16(0xc0e4LL), MASK_RIL_B, INSTR_RIL_B, 2},
+ { "jgnh", OP16(0xc0d4LL), MASK_RIL_B, INSTR_RIL_B, 2},
+ { "jgnp", OP16(0xc0d4LL), MASK_RIL_B, INSTR_RIL_B, 2},
+ { "jgle", OP16(0xc0c4LL), MASK_RIL_B, INSTR_RIL_B, 2},
+ { "jgnl", OP16(0xc0b4LL), MASK_RIL_B, INSTR_RIL_B, 2},
+ { "jgnm", OP16(0xc0b4LL), MASK_RIL_B, INSTR_RIL_B, 2},
+ { "jghe", OP16(0xc0a4LL), MASK_RIL_B, INSTR_RIL_B, 2},
+ { "jge", OP16(0xc084LL), MASK_RIL_B, INSTR_RIL_B, 2},
+ { "jgz", OP16(0xc084LL), MASK_RIL_B, INSTR_RIL_B, 2},
+ { "jgne", OP16(0xc074LL), MASK_RIL_B, INSTR_RIL_B, 2},
+ { "jgnz", OP16(0xc074LL), MASK_RIL_B, INSTR_RIL_B, 2},
+ { "jgnhe", OP16(0xc054LL), MASK_RIL_B, INSTR_RIL_B, 2},
+ { "jgl", OP16(0xc044LL), MASK_RIL_B, INSTR_RIL_B, 2},
+ { "jgm", OP16(0xc044LL), MASK_RIL_B, INSTR_RIL_B, 2},
+ { "jgnle", OP16(0xc034LL), MASK_RIL_B, INSTR_RIL_B, 2},
+ { "jgh", OP16(0xc024LL), MASK_RIL_B, INSTR_RIL_B, 2},
+ { "jgp", OP16(0xc024LL), MASK_RIL_B, INSTR_RIL_B, 2},
+ { "jgo", OP16(0xc014LL), MASK_RIL_B, INSTR_RIL_B, 2},
+ { "brasl", OP16(0xc005LL), MASK_RIL_A, INSTR_RIL_A, 2},
+ { "brcl", OP16(0xc004LL), MASK_RIL_MA, INSTR_RIL_MA, 2},
+ { "larl", OP16(0xc000LL), MASK_RIL_A, INSTR_RIL_A, 2},
+ { "icm", OP8(0xbfLL), MASK_RS_M, INSTR_RS_M, 3},
+ { "stcm", OP8(0xbeLL), MASK_RS_M, INSTR_RS_M, 3},
+ { "clm", OP8(0xbdLL), MASK_RS_M, INSTR_RS_M, 3},
+ { "cds", OP8(0xbbLL), MASK_RS, INSTR_RS, 3},
+ { "cs", OP8(0xbaLL), MASK_RS, INSTR_RS, 3},
+ { "esea", OP16(0xb99dLL), MASK_RRE_R, INSTR_RRE_R, 2},
+ { "slbr", OP16(0xb999LL), MASK_RRE, INSTR_RRE, 2},
+ { "alcr", OP16(0xb998LL), MASK_RRE, INSTR_RRE, 2},
+ { "dlr", OP16(0xb997LL), MASK_RRE, INSTR_RRE, 2},
+ { "mlr", OP16(0xb996LL), MASK_RRE, INSTR_RRE, 2},
+ { "epsw", OP16(0xb98dLL), MASK_RRE, INSTR_RRE, 2},
+ { "slbgr", OP16(0xb989LL), MASK_RRE, INSTR_RRE, 2},
+ { "alcgr", OP16(0xb988LL), MASK_RRE, INSTR_RRE, 2},
+ { "dlgr", OP16(0xb987LL), MASK_RRE, INSTR_RRE, 2},
+ { "mlgr", OP16(0xb986LL), MASK_RRE, INSTR_RRE, 2},
+ { "xgr", OP16(0xb982LL), MASK_RRE, INSTR_RRE, 2},
+ { "ogr", OP16(0xb981LL), MASK_RRE, INSTR_RRE, 2},
+ { "ngr", OP16(0xb980LL), MASK_RRE, INSTR_RRE, 2},
+ { "bctgr", OP16(0xb946LL), MASK_RRE, INSTR_RRE, 2},
+ { "clgfr", OP16(0xb931LL), MASK_RRE, INSTR_RRE, 2},
+ { "cgfr", OP16(0xb930LL), MASK_RRE, INSTR_RRE, 2},
+ { "sturg", OP16(0xb925LL), MASK_RRE, INSTR_RRE, 2},
+ { "clgr", OP16(0xb921LL), MASK_RRE, INSTR_RRE, 2},
+ { "cgr", OP16(0xb920LL), MASK_RRE, INSTR_RRE, 2},
+ { "lrvr", OP16(0xb91fLL), MASK_RRE, INSTR_RRE, 2},
+ { "dsgfr", OP16(0xb91dLL), MASK_RRE, INSTR_RRE, 2},
+ { "msgfr", OP16(0xb91cLL), MASK_RRE, INSTR_RRE, 2},
+ { "slgfr", OP16(0xb91bLL), MASK_RRE, INSTR_RRE, 2},
+ { "algfr", OP16(0xb91aLL), MASK_RRE, INSTR_RRE, 2},
+ { "sgfr", OP16(0xb919LL), MASK_RRE, INSTR_RRE, 2},
+ { "agfr", OP16(0xb918LL), MASK_RRE, INSTR_RRE, 2},
+ { "llgtr", OP16(0xb917LL), MASK_RRE, INSTR_RRE, 2},
+ { "llgfr", OP16(0xb916LL), MASK_RRE, INSTR_RRE, 2},
+ { "lgfr", OP16(0xb914LL), MASK_RRE, INSTR_RRE, 2},
+ { "lcgfr", OP16(0xb913LL), MASK_RRE, INSTR_RRE, 2},
+ { "ltgfr", OP16(0xb912LL), MASK_RRE, INSTR_RRE, 2},
+ { "lngfr", OP16(0xb911LL), MASK_RRE, INSTR_RRE, 2},
+ { "lpgfr", OP16(0xb910LL), MASK_RRE, INSTR_RRE, 2},
+ { "lrvgr", OP16(0xb90fLL), MASK_RRE, INSTR_RRE, 2},
+ { "eregg", OP16(0xb90eLL), MASK_RRE, INSTR_RRE, 2},
+ { "dsgr", OP16(0xb90dLL), MASK_RRE, INSTR_RRE, 2},
+ { "msgr", OP16(0xb90cLL), MASK_RRE, INSTR_RRE, 2},
+ { "slgr", OP16(0xb90bLL), MASK_RRE, INSTR_RRE, 2},
+ { "algr", OP16(0xb90aLL), MASK_RRE, INSTR_RRE, 2},
+ { "sgr", OP16(0xb909LL), MASK_RRE, INSTR_RRE, 2},
+ { "agr", OP16(0xb908LL), MASK_RRE, INSTR_RRE, 2},
+ { "lurag", OP16(0xb905LL), MASK_RRE, INSTR_RRE, 2},
+ { "lgr", OP16(0xb904LL), MASK_RRE, INSTR_RRE, 2},
+ { "lcgr", OP16(0xb903LL), MASK_RRE, INSTR_RRE, 2},
+ { "ltgr", OP16(0xb902LL), MASK_RRE, INSTR_RRE, 2},
+ { "lngr", OP16(0xb901LL), MASK_RRE, INSTR_RRE, 2},
+ { "lpgr", OP16(0xb900LL), MASK_RRE, INSTR_RRE, 2},
+ { "lctl", OP8(0xb7LL), MASK_RS_C, INSTR_RS_C, 3},
+ { "stctl", OP8(0xb6LL), MASK_RS_C, INSTR_RS_C, 3},
+ { "cgxr", OP16(0xb3caLL), MASK_RRF_F, INSTR_RRF_F, 2},
+ { "cgdr", OP16(0xb3c9LL), MASK_RRF_F, INSTR_RRF_F, 2},
+ { "cger", OP16(0xb3c8LL), MASK_RRF_F, INSTR_RRF_F, 2},
+ { "cxgr", OP16(0xb3c6LL), MASK_RRE, INSTR_RRE, 2},
+ { "cdgr", OP16(0xb3c5LL), MASK_RRE, INSTR_RRE, 2},
+ { "cegr", OP16(0xb3c4LL), MASK_RRE, INSTR_RRE, 2},
+ { "cgxbr", OP16(0xb3aaLL), MASK_RRF_M, INSTR_RRF_M, 2},
+ { "cgdbr", OP16(0xb3a9LL), MASK_RRF_M, INSTR_RRF_M, 2},
+ { "cgebr", OP16(0xb3a8LL), MASK_RRF_M, INSTR_RRF_M, 2},
+ { "cxgbr", OP16(0xb3a6LL), MASK_RRE, INSTR_RRE, 2},
+ { "cdgbr", OP16(0xb3a5LL), MASK_RRE, INSTR_RRE, 2},
+ { "cegbr", OP16(0xb3a4LL), MASK_RRE, INSTR_RRE, 2},
+ { "cfxbr", OP16(0xb39aLL), MASK_RRF_M, INSTR_RRF_M, 3},
+ { "cfdbr", OP16(0xb399LL), MASK_RRF_M, INSTR_RRF_M, 3},
+ { "cfebr", OP16(0xb398LL), MASK_RRF_M, INSTR_RRF_M, 3},
+ { "cxfbr", OP16(0xb396LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "cdfbr", OP16(0xb395LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "cefbr", OP16(0xb394LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "efpc", OP16(0xb38cLL), MASK_RRE, INSTR_RRE, 3},
+ { "sfpc", OP16(0xb384LL), MASK_RRE, INSTR_RRE, 3},
+ { "fidbr", OP16(0xb35fLL), MASK_RRF_M, INSTR_RRF_M, 3},
+ { "didbr", OP16(0xb35bLL), MASK_RRF_RM, INSTR_RRF_RM, 3},
+ { "fiebr", OP16(0xb357LL), MASK_RRF_M, INSTR_RRF_M, 3},
+ { "diebr", OP16(0xb353LL), MASK_RRF_RM, INSTR_RRF_RM, 3},
+ { "dxbr", OP16(0xb34dLL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "mxbr", OP16(0xb34cLL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "sxbr", OP16(0xb34bLL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "axbr", OP16(0xb34aLL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "cxbr", OP16(0xb349LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "kxbr", OP16(0xb348LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "fixbr", OP16(0xb347LL), MASK_RRF_M, INSTR_RRF_M, 3},
+ { "lexbr", OP16(0xb346LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "ldxbr", OP16(0xb345LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "ledbr", OP16(0xb344LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "lcxbr", OP16(0xb343LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "ltxbr", OP16(0xb342LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "lnxbr", OP16(0xb341LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "lpxbr", OP16(0xb340LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "msdbr", OP16(0xb31fLL), MASK_RRF_R, INSTR_RRF_R, 3},
+ { "madbr", OP16(0xb31eLL), MASK_RRF_R, INSTR_RRF_R, 3},
+ { "ddbr", OP16(0xb31dLL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "mdbr", OP16(0xb31cLL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "sdbr", OP16(0xb31bLL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "adbr", OP16(0xb31aLL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "cdbr", OP16(0xb319LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "kdbr", OP16(0xb318LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "meebr", OP16(0xb317LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "sqxbr", OP16(0xb316LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "sqdbr", OP16(0xb315LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "sqebr", OP16(0xb314LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "lcdbr", OP16(0xb313LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "ltdbr", OP16(0xb312LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "lndbr", OP16(0xb311LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "lpdbr", OP16(0xb310LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "msebr", OP16(0xb30fLL), MASK_RRF_R, INSTR_RRF_R, 3},
+ { "maebr", OP16(0xb30eLL), MASK_RRF_R, INSTR_RRF_R, 3},
+ { "debr", OP16(0xb30dLL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "mdebr", OP16(0xb30cLL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "sebr", OP16(0xb30bLL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "aebr", OP16(0xb30aLL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "cebr", OP16(0xb309LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "kebr", OP16(0xb308LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "mxdbr", OP16(0xb307LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "lxebr", OP16(0xb306LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "lxdbr", OP16(0xb305LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "ldebr", OP16(0xb304LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "lcebr", OP16(0xb303LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "ltebr", OP16(0xb302LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "lnebr", OP16(0xb301LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "lpebr", OP16(0xb300LL), MASK_RRE_F, INSTR_RRE_F, 3},
+ { "trap4", OP16(0xb2ffLL), MASK_S, INSTR_S, 3},
+ { "lpswe", OP16(0xb2b2LL), MASK_S, INSTR_S, 2},
+ { "stfl", OP16(0xb2b1LL), MASK_S, INSTR_S, 2},
+ { "cutfu", OP16(0xb2a7LL), MASK_RRE, INSTR_RRE, 3},
+ { "cuutf", OP16(0xb2a6LL), MASK_RRE, INSTR_RRE, 3},
+ { "tre", OP16(0xb2a5LL), MASK_RRE, INSTR_RRE, 2},
+ { "lfpc", OP16(0xb29dLL), MASK_S, INSTR_S, 3},
+ { "stfpc", OP16(0xb29cLL), MASK_S, INSTR_S, 3},
+ { "srnm", OP16(0xb299LL), MASK_S, INSTR_S, 3},
+ { "stsi", OP16(0xb27dLL), MASK_S, INSTR_S, 3},
+ { "sacf", OP16(0xb279LL), MASK_S, INSTR_S, 3},
+ { "stcke", OP16(0xb278LL), MASK_S, INSTR_S, 2},
+ { "rp", OP16(0xb277LL), MASK_S, INSTR_S, 3},
+ { "siga", OP16(0xb274LL), MASK_S, INSTR_S, 3},
+ { "cmpsc", OP16(0xb263LL), MASK_RRE, INSTR_RRE, 3},
+ { "srst", OP16(0xb25eLL), MASK_RRE, INSTR_RRE, 3},
+ { "clst", OP16(0xb25dLL), MASK_RRE, INSTR_RRE, 3},
+ { "bsa", OP16(0xb25aLL), MASK_RRE, INSTR_RRE, 3},
+ { "bsg", OP16(0xb258LL), MASK_RRE, INSTR_RRE, 3},
+ { "cuse", OP16(0xb257LL), MASK_RRE, INSTR_RRE, 3},
+ { "mvst", OP16(0xb255LL), MASK_RRE, INSTR_RRE, 3},
+ { "mvpg", OP16(0xb254LL), MASK_RRE, INSTR_RRE, 3},
+ { "msr", OP16(0xb252LL), MASK_RRE, INSTR_RRE, 3},
+ { "csp", OP16(0xb250LL), MASK_RRE, INSTR_RRE, 3},
+ { "ear", OP16(0xb24fLL), MASK_RRE_RA, INSTR_RRE_RA, 3},
+ { "sar", OP16(0xb24eLL), MASK_RRE_AR, INSTR_RRE_AR, 3},
+ { "cpya", OP16(0xb24dLL), MASK_RRE_A, INSTR_RRE_A, 3},
+ { "tar", OP16(0xb24cLL), MASK_RRE_AR, INSTR_RRE_AR, 3},
+ { "lura", OP16(0xb24bLL), MASK_RRE, INSTR_RRE, 3},
+ { "esta", OP16(0xb24aLL), MASK_RRE, INSTR_RRE, 3},
+ { "ereg", OP16(0xb249LL), MASK_RRE, INSTR_RRE, 3},
+ { "palb", OP16(0xb248LL), MASK_RRE_O, INSTR_RRE_O, 3},
+ { "msta", OP16(0xb247LL), MASK_RRE_R, INSTR_RRE_R, 3},
+ { "stura", OP16(0xb246LL), MASK_RRE, INSTR_RRE, 3},
+ { "sqer", OP16(0xb245LL), MASK_RRE_E, INSTR_RRE_E, 3},
+ { "sqdr", OP16(0xb244LL), MASK_RRE_D, INSTR_RRE_D, 3},
+ { "cksm", OP16(0xb241LL), MASK_RRE, INSTR_RRE, 3},
+ { "bakr", OP16(0xb240LL), MASK_RRE, INSTR_RRE, 3},
+ { "schm", OP16(0xb23cLL), MASK_S_O, INSTR_S_O, 3},
+ { "rchp", OP16(0xb23bLL), MASK_S_O, INSTR_S_O, 3},
+ { "stcps", OP16(0xb23aLL), MASK_S, INSTR_S, 3},
+ { "stcrw", OP16(0xb239LL), MASK_S, INSTR_S, 3},
+ { "rsch", OP16(0xb238LL), MASK_S_O, INSTR_S_O, 3},
+ { "sal", OP16(0xb237LL), MASK_S_O, INSTR_S_O, 3},
+ { "tpi", OP16(0xb236LL), MASK_S, INSTR_S, 3},
+ { "tsch", OP16(0xb235LL), MASK_S, INSTR_S, 3},
+ { "stsch", OP16(0xb234LL), MASK_S, INSTR_S, 3},
+ { "ssch", OP16(0xb233LL), MASK_S, INSTR_S, 3},
+ { "msch", OP16(0xb232LL), MASK_S, INSTR_S, 3},
+ { "hsch", OP16(0xb231LL), MASK_S_O, INSTR_S_O, 3},
+ { "csch", OP16(0xb230LL), MASK_S_O, INSTR_S_O, 3},
+ { "dxr", OP16(0xb22dLL), MASK_RRE_X, INSTR_RRE_X, 3},
+ { "tb", OP16(0xb22cLL), MASK_RRE_R2, INSTR_RRE_R2, 3},
+ { "sske", OP16(0xb22bLL), MASK_RRE, INSTR_RRE, 3},
+ { "rrbe", OP16(0xb22aLL), MASK_RRE, INSTR_RRE, 3},
+ { "iske", OP16(0xb229LL), MASK_RRE, INSTR_RRE, 3},
+ { "pt", OP16(0xb228LL), MASK_RRE, INSTR_RRE, 3},
+ { "esar", OP16(0xb227LL), MASK_RRE_R, INSTR_RRE_R, 3},
+ { "epar", OP16(0xb226LL), MASK_RRE_R, INSTR_RRE_R, 3},
+ { "ssar", OP16(0xb225LL), MASK_RRE_R, INSTR_RRE_R, 3},
+ { "iac", OP16(0xb224LL), MASK_RRE_R, INSTR_RRE_R, 3},
+ { "ivsk", OP16(0xb223LL), MASK_RRE, INSTR_RRE, 3},
+ { "ipm", OP16(0xb222LL), MASK_RRE_R, INSTR_RRE_R, 3},
+ { "ipte", OP16(0xb221LL), MASK_RRE, INSTR_RRE, 3},
+ { "cfc", OP16(0xb21aLL), MASK_S, INSTR_S, 3},
+ { "sac", OP16(0xb219LL), MASK_S, INSTR_S, 3},
+ { "pc", OP16(0xb218LL), MASK_S, INSTR_S, 3},
+ { "sie", OP16(0xb214LL), MASK_S, INSTR_S, 3},
+ { "stap", OP16(0xb212LL), MASK_S, INSTR_S, 3},
+ { "stpx", OP16(0xb211LL), MASK_S, INSTR_S, 3},
+ { "spx", OP16(0xb210LL), MASK_S, INSTR_S, 3},
+ { "ptlb", OP16(0xb20dLL), MASK_S_O, INSTR_S_O, 3},
+ { "ipk", OP16(0xb20bLL), MASK_S_O, INSTR_S_O, 3},
+ { "spka", OP16(0xb20aLL), MASK_S, INSTR_S, 3},
+ { "stpt", OP16(0xb209LL), MASK_S, INSTR_S, 3},
+ { "spt", OP16(0xb208LL), MASK_S, INSTR_S, 3},
+ { "stckc", OP16(0xb207LL), MASK_S, INSTR_S, 3},
+ { "sckc", OP16(0xb206LL), MASK_S, INSTR_S, 3},
+ { "stck", OP16(0xb205LL), MASK_S, INSTR_S, 3},
+ { "sck", OP16(0xb204LL), MASK_S, INSTR_S, 3},
+ { "stidp", OP16(0xb202LL), MASK_S, INSTR_S, 3},
+ { "lra", OP8(0xb1LL), MASK_RX, INSTR_RX, 3},
+ { "mc", OP8(0xafLL), MASK_SI, INSTR_SI, 3},
+ { "sigp", OP8(0xaeLL), MASK_RS, INSTR_RS, 3},
+ { "stosm", OP8(0xadLL), MASK_SI, INSTR_SI, 3},
+ { "stnsm", OP8(0xacLL), MASK_SI, INSTR_SI, 3},
+ { "clcle", OP8(0xa9LL), MASK_RS, INSTR_RS, 3},
+ { "mvcle", OP8(0xa8LL), MASK_RS, INSTR_RS, 3},
+ { "j", OP16(0xa7f4LL), MASK_RI_B, INSTR_RI_B, 3},
+ { "jno", OP16(0xa7e4LL), MASK_RI_B, INSTR_RI_B, 3},
+ { "jnh", OP16(0xa7d4LL), MASK_RI_B, INSTR_RI_B, 3},
+ { "jnp", OP16(0xa7d4LL), MASK_RI_B, INSTR_RI_B, 3},
+ { "jle", OP16(0xa7c4LL), MASK_RI_B, INSTR_RI_B, 3},
+ { "jnl", OP16(0xa7b4LL), MASK_RI_B, INSTR_RI_B, 3},
+ { "jnm", OP16(0xa7b4LL), MASK_RI_B, INSTR_RI_B, 3},
+ { "jhe", OP16(0xa7a4LL), MASK_RI_B, INSTR_RI_B, 3},
+ { "je", OP16(0xa784LL), MASK_RI_B, INSTR_RI_B, 3},
+ { "jz", OP16(0xa784LL), MASK_RI_B, INSTR_RI_B, 3},
+ { "jne", OP16(0xa774LL), MASK_RI_B, INSTR_RI_B, 3},
+ { "jnz", OP16(0xa774LL), MASK_RI_B, INSTR_RI_B, 3},
+ { "jnhe", OP16(0xa754LL), MASK_RI_B, INSTR_RI_B, 3},
+ { "jl", OP16(0xa744LL), MASK_RI_B, INSTR_RI_B, 3},
+ { "jm", OP16(0xa744LL), MASK_RI_B, INSTR_RI_B, 3},
+ { "jnle", OP16(0xa734LL), MASK_RI_B, INSTR_RI_B, 3},
+ { "jh", OP16(0xa724LL), MASK_RI_B, INSTR_RI_B, 3},
+ { "jp", OP16(0xa724LL), MASK_RI_B, INSTR_RI_B, 3},
+ { "jo", OP16(0xa714LL), MASK_RI_B, INSTR_RI_B, 3},
+ { "cghi", OP16(0xa70fLL), MASK_RI, INSTR_RI, 2},
+ { "chi", OP16(0xa70eLL), MASK_RI, INSTR_RI, 3},
+ { "mghi", OP16(0xa70dLL), MASK_RI, INSTR_RI, 2},
+ { "mhi", OP16(0xa70cLL), MASK_RI, INSTR_RI, 3},
+ { "aghi", OP16(0xa70bLL), MASK_RI, INSTR_RI, 2},
+ { "ahi", OP16(0xa70aLL), MASK_RI, INSTR_RI, 3},
+ { "lghi", OP16(0xa709LL), MASK_RI, INSTR_RI, 2},
+ { "lhi", OP16(0xa708LL), MASK_RI, INSTR_RI, 3},
+ { "brctg", OP16(0xa707LL), MASK_RI_A, INSTR_RI_A, 2},
+ { "brct", OP16(0xa706LL), MASK_RI_A, INSTR_RI_A, 3},
+ { "bras", OP16(0xa705LL), MASK_RI_A, INSTR_RI_A, 3},
+ { "brc", OP16(0xa704LL), MASK_RI_MA, INSTR_RI_MA, 3},
+ { "tmhl", OP16(0xa703LL), MASK_RI_U, INSTR_RI_U, 2},
+ { "tmhh", OP16(0xa702LL), MASK_RI_U, INSTR_RI_U, 2},
+ { "tml", OP16(0xa701LL), MASK_RI_U, INSTR_RI_U, 3},
+ { "tmll", OP16(0xa701LL), MASK_RI_U, INSTR_RI_U, 2},
+ { "tmh", OP16(0xa700LL), MASK_RI_U, INSTR_RI_U, 3},
+ { "tmlh", OP16(0xa700LL), MASK_RI_U, INSTR_RI_U, 2},
+ { "llill", OP16(0xa50fLL), MASK_RI_U, INSTR_RI_U, 2},
+ { "llilh", OP16(0xa50eLL), MASK_RI_U, INSTR_RI_U, 2},
+ { "llihl", OP16(0xa50dLL), MASK_RI_U, INSTR_RI_U, 2},
+ { "llihh", OP16(0xa50cLL), MASK_RI_U, INSTR_RI_U, 2},
+ { "oill", OP16(0xa50bLL), MASK_RI_U, INSTR_RI_U, 2},
+ { "oilh", OP16(0xa50aLL), MASK_RI_U, INSTR_RI_U, 2},
+ { "oihl", OP16(0xa509LL), MASK_RI_U, INSTR_RI_U, 2},
+ { "oihh", OP16(0xa508LL), MASK_RI_U, INSTR_RI_U, 2},
+ { "nill", OP16(0xa507LL), MASK_RI_U, INSTR_RI_U, 2},
+ { "nilh", OP16(0xa506LL), MASK_RI_U, INSTR_RI_U, 2},
+ { "nihl", OP16(0xa505LL), MASK_RI_U, INSTR_RI_U, 2},
+ { "nihh", OP16(0xa504LL), MASK_RI_U, INSTR_RI_U, 2},
+ { "iill", OP16(0xa503LL), MASK_RI_U, INSTR_RI_U, 2},
+ { "iilh", OP16(0xa502LL), MASK_RI_U, INSTR_RI_U, 2},
+ { "iihl", OP16(0xa501LL), MASK_RI_U, INSTR_RI_U, 2},
+ { "iihh", OP16(0xa500LL), MASK_RI_U, INSTR_RI_U, 2},
+ { "stam", OP8(0x9bLL), MASK_RS_A, INSTR_RS_A, 3},
+ { "lam", OP8(0x9aLL), MASK_RS_A, INSTR_RS_A, 3},
+ { "trace", OP8(0x99LL), MASK_RS, INSTR_RS, 3},
+ { "lm", OP8(0x98LL), MASK_RS, INSTR_RS, 3},
+ { "xi", OP8(0x97LL), MASK_SI, INSTR_SI, 3},
+ { "oi", OP8(0x96LL), MASK_SI, INSTR_SI, 3},
+ { "cli", OP8(0x95LL), MASK_SI, INSTR_SI, 3},
+ { "ni", OP8(0x94LL), MASK_SI, INSTR_SI, 3},
+ { "ts", OP8(0x93LL), MASK_S, INSTR_S, 3},
+ { "mvi", OP8(0x92LL), MASK_SI, INSTR_SI, 3},
+ { "tm", OP8(0x91LL), MASK_SI, INSTR_SI, 3},
+ { "stm", OP8(0x90LL), MASK_RS, INSTR_RS, 3},
+ { "slda", OP8(0x8fLL), MASK_RS_D, INSTR_RS_D, 3},
+ { "srda", OP8(0x8eLL), MASK_RS_D, INSTR_RS_D, 3},
+ { "sldl", OP8(0x8dLL), MASK_RS_D, INSTR_RS_D, 3},
+ { "srdl", OP8(0x8cLL), MASK_RS_D, INSTR_RS_D, 3},
+ { "sla", OP8(0x8bLL), MASK_RS_S, INSTR_RS_S, 3},
+ { "sra", OP8(0x8aLL), MASK_RS_S, INSTR_RS_S, 3},
+ { "sll", OP8(0x89LL), MASK_RS_S, INSTR_RS_S, 3},
+ { "srl", OP8(0x88LL), MASK_RS_S, INSTR_RS_S, 3},
+ { "bxle", OP8(0x87LL), MASK_RS, INSTR_RS, 3},
+ { "bxh", OP8(0x86LL), MASK_RS, INSTR_RS, 3},
+ { "brxle", OP8(0x85LL), MASK_RSI_A, INSTR_RSI_A, 3},
+ { "brxh", OP8(0x84LL), MASK_RSI_A, INSTR_RSI_A, 3},
+ { "diag", OP8(0x83LL), MASK_RS, INSTR_RS, 3},
+ { "lpsw", OP8(0x82LL), MASK_S, INSTR_S, 3},
+ { "ssm", OP8(0x80LL), MASK_S, INSTR_S, 3},
+ { "su", OP8(0x7fLL), MASK_RX_E, INSTR_RX_E, 3},
+ { "au", OP8(0x7eLL), MASK_RX_E, INSTR_RX_E, 3},
+ { "de", OP8(0x7dLL), MASK_RX_E, INSTR_RX_E, 3},
+ { "me", OP8(0x7cLL), MASK_RX_ED, INSTR_RX_ED, 3},
+ { "se", OP8(0x7bLL), MASK_RX_E, INSTR_RX_E, 3},
+ { "ae", OP8(0x7aLL), MASK_RX_E, INSTR_RX_E, 3},
+ { "ce", OP8(0x79LL), MASK_RX_E, INSTR_RX_E, 3},
+ { "le", OP8(0x78LL), MASK_RX_E, INSTR_RX_E, 3},
+ { "ms", OP8(0x71LL), MASK_RX, INSTR_RX, 3},
+ { "ste", OP8(0x70LL), MASK_RX_E, INSTR_RX_E, 3},
+ { "sw", OP8(0x6fLL), MASK_RX_D, INSTR_RX_D, 3},
+ { "aw", OP8(0x6eLL), MASK_RX_D, INSTR_RX_D, 3},
+ { "dd", OP8(0x6dLL), MASK_RX_D, INSTR_RX_D, 3},
+ { "md", OP8(0x6cLL), MASK_RX_D, INSTR_RX_D, 3},
+ { "sd", OP8(0x6bLL), MASK_RX_D, INSTR_RX_D, 3},
+ { "ad", OP8(0x6aLL), MASK_RX_D, INSTR_RX_D, 3},
+ { "cd", OP8(0x69LL), MASK_RX_D, INSTR_RX_D, 3},
+ { "ld", OP8(0x68LL), MASK_RX_D, INSTR_RX_D, 3},
+ { "mxd", OP8(0x67LL), MASK_RX_DX, INSTR_RX_DX, 3},
+ { "std", OP8(0x60LL), MASK_RX_D, INSTR_RX_D, 3},
+ { "sl", OP8(0x5fLL), MASK_RX, INSTR_RX, 3},
+ { "al", OP8(0x5eLL), MASK_RX, INSTR_RX, 3},
+ { "d", OP8(0x5dLL), MASK_RX, INSTR_RX, 3},
+ { "m", OP8(0x5cLL), MASK_RX, INSTR_RX, 3},
+ { "s", OP8(0x5bLL), MASK_RX, INSTR_RX, 3},
+ { "a", OP8(0x5aLL), MASK_RX, INSTR_RX, 3},
+ { "c", OP8(0x59LL), MASK_RX, INSTR_RX, 3},
+ { "l", OP8(0x58LL), MASK_RX, INSTR_RX, 3},
+ { "x", OP8(0x57LL), MASK_RX, INSTR_RX, 3},
+ { "o", OP8(0x56LL), MASK_RX, INSTR_RX, 3},
+ { "cl", OP8(0x55LL), MASK_RX, INSTR_RX, 3},
+ { "n", OP8(0x54LL), MASK_RX, INSTR_RX, 3},
+ { "lae", OP8(0x51LL), MASK_RX, INSTR_RX, 3},
+ { "st", OP8(0x50LL), MASK_RX, INSTR_RX, 3},
+ { "cvb", OP8(0x4fLL), MASK_RX, INSTR_RX, 3},
+ { "cvd", OP8(0x4eLL), MASK_RX, INSTR_RX, 3},
+ { "bas", OP8(0x4dLL), MASK_RX, INSTR_RX, 3},
+ { "mh", OP8(0x4cLL), MASK_RX, INSTR_RX, 3},
+ { "sh", OP8(0x4bLL), MASK_RX, INSTR_RX, 3},
+ { "ah", OP8(0x4aLL), MASK_RX, INSTR_RX, 3},
+ { "ch", OP8(0x49LL), MASK_RX, INSTR_RX, 3},
+ { "lh", OP8(0x48LL), MASK_RX, INSTR_RX, 3},
+ { "b", OP16(0x47f0LL), MASK_RX_B, INSTR_RX_B, 3},
+ { "bno", OP16(0x47e0LL), MASK_RX_B, INSTR_RX_B, 3},
+ { "bnh", OP16(0x47d0LL), MASK_RX_B, INSTR_RX_B, 3},
+ { "bnp", OP16(0x47d0LL), MASK_RX_B, INSTR_RX_B, 3},
+ { "ble", OP16(0x47c0LL), MASK_RX_B, INSTR_RX_B, 3},
+ { "bnl", OP16(0x47b0LL), MASK_RX_B, INSTR_RX_B, 3},
+ { "bnm", OP16(0x47b0LL), MASK_RX_B, INSTR_RX_B, 3},
+ { "bhe", OP16(0x47a0LL), MASK_RX_B, INSTR_RX_B, 3},
+ { "be", OP16(0x4780LL), MASK_RX_B, INSTR_RX_B, 3},
+ { "bz", OP16(0x4780LL), MASK_RX_B, INSTR_RX_B, 3},
+ { "bne", OP16(0x4770LL), MASK_RX_B, INSTR_RX_B, 3},
+ { "bnz", OP16(0x4770LL), MASK_RX_B, INSTR_RX_B, 3},
+ { "bnhe", OP16(0x4750LL), MASK_RX_B, INSTR_RX_B, 3},
+ { "bl", OP16(0x4740LL), MASK_RX_B, INSTR_RX_B, 3},
+ { "bm", OP16(0x4740LL), MASK_RX_B, INSTR_RX_B, 3},
+ { "bnle", OP16(0x4730LL), MASK_RX_B, INSTR_RX_B, 3},
+ { "bh", OP16(0x4720LL), MASK_RX_B, INSTR_RX_B, 3},
+ { "bp", OP16(0x4720LL), MASK_RX_B, INSTR_RX_B, 3},
+ { "bo", OP16(0x4710LL), MASK_RX_B, INSTR_RX_B, 3},
+ { "bc", OP8(0x47LL), MASK_RX_M, INSTR_RX_M, 3},
+ { "nop", OP16(0x4700LL), MASK_RX_B, INSTR_RX_B, 3},
+ { "bct", OP8(0x46LL), MASK_RX, INSTR_RX, 3},
+ { "bal", OP8(0x45LL), MASK_RX, INSTR_RX, 3},
+ { "ex", OP8(0x44LL), MASK_RX, INSTR_RX, 3},
+ { "ic", OP8(0x43LL), MASK_RX, INSTR_RX, 3},
+ { "stc", OP8(0x42LL), MASK_RX, INSTR_RX, 3},
+ { "la", OP8(0x41LL), MASK_RX, INSTR_RX, 3},
+ { "sth", OP8(0x40LL), MASK_RX, INSTR_RX, 3},
+ { "sur", OP8(0x3fLL), MASK_RR_E, INSTR_RR_E, 3},
+ { "aur", OP8(0x3eLL), MASK_RR_E, INSTR_RR_E, 3},
+ { "der", OP8(0x3dLL), MASK_RR_E, INSTR_RR_E, 3},
+ { "mer", OP8(0x3cLL), MASK_RR_ED, INSTR_RR_ED, 3},
+ { "ser", OP8(0x3bLL), MASK_RR_E, INSTR_RR_E, 3},
+ { "aer", OP8(0x3aLL), MASK_RR_E, INSTR_RR_E, 3},
+ { "cer", OP8(0x39LL), MASK_RR_E, INSTR_RR_E, 3},
+ { "ler", OP8(0x38LL), MASK_RR_E, INSTR_RR_E, 3},
+ { "sxr", OP8(0x37LL), MASK_RR_X, INSTR_RR_X, 3},
+ { "axr", OP8(0x36LL), MASK_RR, INSTR_RR, 3},
+ { "lrer", OP8(0x35LL), MASK_RR_DE, INSTR_RR_DE, 3},
+ { "her", OP8(0x34LL), MASK_RR_E, INSTR_RR_E, 3},
+ { "lcer", OP8(0x33LL), MASK_RR_E, INSTR_RR_E, 3},
+ { "lter", OP8(0x32LL), MASK_RR_E, INSTR_RR_E, 3},
+ { "lner", OP8(0x31LL), MASK_RR_E, INSTR_RR_E, 3},
+ { "lper", OP8(0x30LL), MASK_RR_E, INSTR_RR_E, 3},
+ { "swr", OP8(0x2fLL), MASK_RR_D, INSTR_RR_D, 3},
+ { "awr", OP8(0x2eLL), MASK_RR_D, INSTR_RR_D, 3},
+ { "ddr", OP8(0x2dLL), MASK_RR_D, INSTR_RR_D, 3},
+ { "mdr", OP8(0x2cLL), MASK_RR_D, INSTR_RR_D, 3},
+ { "sdr", OP8(0x2bLL), MASK_RR_D, INSTR_RR_D, 3},
+ { "adr", OP8(0x2aLL), MASK_RR_D, INSTR_RR_D, 3},
+ { "cdr", OP8(0x29LL), MASK_RR_D, INSTR_RR_D, 3},
+ { "ldr", OP8(0x28LL), MASK_RR_D, INSTR_RR_D, 3},
+ { "mxdr", OP8(0x27LL), MASK_RR_DX, INSTR_RR_DX, 3},
+ { "mxr", OP8(0x26LL), MASK_RR_X, INSTR_RR_X, 3},
+ { "lrdr", OP8(0x25LL), MASK_RR_XD, INSTR_RR_XD, 3},
+ { "hdr", OP8(0x24LL), MASK_RR_D, INSTR_RR_D, 3},
+ { "lcdr", OP8(0x23LL), MASK_RR_D, INSTR_RR_D, 3},
+ { "ltdr", OP8(0x22LL), MASK_RR_D, INSTR_RR_D, 3},
+ { "lndr", OP8(0x21LL), MASK_RR_D, INSTR_RR_D, 3},
+ { "lpdr", OP8(0x20LL), MASK_RR_D, INSTR_RR_D, 3},
+ { "slr", OP8(0x1fLL), MASK_RR, INSTR_RR, 3},
+ { "alr", OP8(0x1eLL), MASK_RR, INSTR_RR, 3},
+ { "dr", OP8(0x1dLL), MASK_RR, INSTR_RR, 3},
+ { "mr", OP8(0x1cLL), MASK_RR, INSTR_RR, 3},
+ { "sr", OP8(0x1bLL), MASK_RR, INSTR_RR, 3},
+ { "ar", OP8(0x1aLL), MASK_RR, INSTR_RR, 3},
+ { "cr", OP8(0x19LL), MASK_RR, INSTR_RR, 3},
+ { "lr", OP8(0x18LL), MASK_RR, INSTR_RR, 3},
+ { "xr", OP8(0x17LL), MASK_RR, INSTR_RR, 3},
+ { "or", OP8(0x16LL), MASK_RR, INSTR_RR, 3},
+ { "clr", OP8(0x15LL), MASK_RR, INSTR_RR, 3},
+ { "nr", OP8(0x14LL), MASK_RR, INSTR_RR, 3},
+ { "lcr", OP8(0x13LL), MASK_RR, INSTR_RR, 3},
+ { "ltr", OP8(0x12LL), MASK_RR, INSTR_RR, 3},
+ { "lnr", OP8(0x11LL), MASK_RR, INSTR_RR, 3},
+ { "lpr", OP8(0x10LL), MASK_RR, INSTR_RR, 3},
+ { "clcl", OP8(0x0fLL), MASK_RR, INSTR_RR, 3},
+ { "mvcl", OP8(0x0eLL), MASK_RR, INSTR_RR, 3},
+ { "basr", OP8(0x0dLL), MASK_RR, INSTR_RR, 3},
+ { "bassm", OP8(0x0cLL), MASK_RR, INSTR_RR, 3},
+ { "bsm", OP8(0x0bLL), MASK_RR, INSTR_RR, 3},
+ { "svc", OP8(0x0aLL), MASK_RR_I, INSTR_RR_I, 3},
+ { "br", OP16(0x07f0LL), MASK_RR_B, INSTR_RR_B, 3},
+ { "bnor", OP16(0x07e0LL), MASK_RR_B, INSTR_RR_B, 3},
+ { "bnhr", OP16(0x07d0LL), MASK_RR_B, INSTR_RR_B, 3},
+ { "bnpr", OP16(0x07d0LL), MASK_RR_B, INSTR_RR_B, 3},
+ { "bler", OP16(0x07c0LL), MASK_RR_B, INSTR_RR_B, 3},
+ { "bnlr", OP16(0x07b0LL), MASK_RR_B, INSTR_RR_B, 3},
+ { "bnmr", OP16(0x07b0LL), MASK_RR_B, INSTR_RR_B, 3},
+ { "bher", OP16(0x07a0LL), MASK_RR_B, INSTR_RR_B, 3},
+ { "ber", OP16(0x0780LL), MASK_RR_B, INSTR_RR_B, 3},
+ { "bzr", OP16(0x0780LL), MASK_RR_B, INSTR_RR_B, 3},
+ { "bner", OP16(0x0770LL), MASK_RR_B, INSTR_RR_B, 3},
+ { "bnzr", OP16(0x0770LL), MASK_RR_B, INSTR_RR_B, 3},
+ { "bnher", OP16(0x0750LL), MASK_RR_B, INSTR_RR_B, 3},
+ { "blr", OP16(0x0740LL), MASK_RR_B, INSTR_RR_B, 3},
+ { "bmr", OP16(0x0740LL), MASK_RR_B, INSTR_RR_B, 3},
+ { "bnler", OP16(0x0730LL), MASK_RR_B, INSTR_RR_B, 3},
+ { "bhr", OP16(0x0720LL), MASK_RR_B, INSTR_RR_B, 3},
+ { "bpr", OP16(0x0720LL), MASK_RR_B, INSTR_RR_B, 3},
+ { "bor", OP16(0x0710LL), MASK_RR_B, INSTR_RR_B, 3},
+ { "bcr", OP8(0x07LL), MASK_RR_M, INSTR_RR_M, 3},
+ { "nopr", OP16(0x0700LL), MASK_RR_B, INSTR_RR_B, 3},
+ { "bctr", OP8(0x06LL), MASK_RR, INSTR_RR, 3},
+ { "balr", OP8(0x05LL), MASK_RR, INSTR_RR, 3},
+ { "spm", OP8(0x04LL), MASK_RR_R, INSTR_RR_R, 3},
+ { "trap2", OP16(0x01ffLL), MASK_E, INSTR_E, 3},
+ { "sam64", OP16(0x010eLL), MASK_E, INSTR_E, 2},
+ { "sam31", OP16(0x010dLL), MASK_E, INSTR_E, 2},
+ { "sam24", OP16(0x010cLL), MASK_E, INSTR_E, 2},
+ { "tam", OP16(0x010bLL), MASK_E, INSTR_E, 2},
+ { "sckpf", OP16(0x0107LL), MASK_E, INSTR_E, 3},
+ { "upt", OP16(0x0102LL), MASK_E, INSTR_E, 3},
+ { "pr", OP16(0x0101LL), MASK_E, INSTR_E, 3}
+};
+
+const int s390_num_opcodes =
+ sizeof (s390_opcodes) / sizeof (s390_opcodes[0]);
+
+
+
diff --git a/opcodes/s390-opc.txt b/opcodes/s390-opc.txt
new file mode 100644
index 00000000000..fecb3089108
--- /dev/null
+++ b/opcodes/s390-opc.txt
@@ -0,0 +1,601 @@
+# S/390 opcodes list. Use s390-mkopc to convert it into the opcode table.
+# Copyright (C) 2000, 2001 Free Software Foundation, Inc.
+# Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com).
+5a a RX "add" esa
+6a ad RX_D "add normalized (long)" esa
+2a adr RR_D "add normalized (long)" esa
+7a ae RX_E "add normalized (short)" esa
+3a aer RR_E "add normalized (short)" esa
+4a ah RX "add halfword" esa
+5e al RX "add logical" esa
+1e alr RR "add logical" esa
+fa ap SS_LL "add decimal" esa
+1a ar RR "add" esa
+7e au RX_E "add unnormalized (short)" esa
+3e aur RR_E "add unnormalized (short)" esa
+6e aw RX_D "add unnormalized (long)" esa
+2e awr RR_D "add unnormalized (long)" esa
+36 axr RR "add normalized" esa
+b240 bakr RRE "branch and stack" esa
+45 bal RX "branch and link" esa
+05 balr RR "branch and link" esa
+4d bas RX "branch and save" esa
+0d basr RR "branch and save" esa
+0c bassm RR "branch and save and set mode" esa
+47 bc RX_M "branch on condition" esa
+07 bcr RR_M "branch on condition" esa
+46 bct RX "branch on count" esa
+06 bctr RR "branch on count" esa
+b258 bsg RRE "branch in subspace group" esa
+0b bsm RR "branch and set mode" esa
+86 bxh RS "branch on index high" esa
+87 bxle RS "branch on index low or equal" esa
+59 c RX "compare" esa
+69 cd RX_D "compare (long)" esa
+29 cdr RR_D "compare (long)" esa
+bb cds RS "compare double and swap" esa
+79 ce RX_E "compare (short)" esa
+39 cer RR_E "compare (short)" esa
+b21a cfc S "compare and form codeword" esa
+49 ch RX "compare halfword" esa
+55 cl RX "compare logical" esa
+d5 clc SS_L "compare logical" esa
+0f clcl RR "compare logical long" esa
+95 cli SI "compare logical" esa
+bd clm RS_M "compare logical characters under mask" esa
+15 clr RR "compare logical" esa
+b25d clst RRE "compare logical string" esa
+b263 cmpsc RRE "compression call" esa
+f9 cp SS_LL "compare decimal" esa
+b24d cpya RRE_A "copy access" esa
+19 cr RR "compare" esa
+ba cs RS "compare and swap" esa
+b230 csch S_O "clear subchannel" esa
+b257 cuse RRE "compare until substring equal" esa
+b250 csp RRE "compare and swap and purge" esa
+4f cvb RX "convert to binary" esa
+4e cvd RX "convert to decimal" esa
+5d d RX "divide" esa
+6d dd RX_D "divide (long)" esa
+2d ddr RR_D "divide (long)" esa
+7d de RX_E "divide (short)" esa
+3d der RR_E "divide (short)" esa
+83 diag RS "diagnose" esa
+fd dp SS_LL "divide decimal" esa
+1d dr RR "divide" esa
+b22d dxr RRE_X "divide (ext.)" esa
+b24f ear RRE_RA "extract access" esa
+de ed SS_L "edit" esa
+df edmk SS_L "edit and mark" esa
+b226 epar RRE_R "extract primary ASN" esa
+b249 ereg RRE "extract stacked registers" esa
+b227 esar RRE_R "extract secondary ASN" esa
+b24a esta RRE "extract stacked state" esa
+44 ex RX "execute" esa
+24 hdr RR_D "halve (long)" esa
+34 her RR_E "halve (short)" esa
+b231 hsch S_O "halt subchannel" esa
+b224 iac RRE_R "insert address space control" esa
+43 ic RX "insert character" esa
+bf icm RS_M "insert characters under mask" esa
+b20b ipk S_O "insert PSW key" esa
+b222 ipm RRE_R "insert program mask" esa
+b221 ipte RRE "invalidate page table entry" esa
+b229 iske RRE "insert storage key extended" esa
+b223 ivsk RRE "insert virtual storage key" esa
+58 l RX "load" esa
+41 la RX "load address" esa
+51 lae RX "load address extended" esa
+9a lam RS_A "load access multiple" esa
+e500 lasp SSE "load address space parameters" esa
+23 lcdr RR_D "load complement (long)" esa
+33 lcer RR_E "load complement (short)" esa
+13 lcr RR "load complement" esa
+b7 lctl RS_C "load control" esa
+68 ld RX_D "load (long)" esa
+28 ldr RR_D "load (long)" esa
+78 le RX_E "load (short)" esa
+38 ler RR_E "load (short)" esa
+48 lh RX "load halfword" esa
+98 lm RS "load multiple" esa
+21 lndr RR_D "load negative (long)" esa
+31 lner RR_E "load negative (short)" esa
+11 lnr RR "load negative" esa
+20 lpdr RR_D "load positive (long)" esa
+30 lper RR_E "load positive (short)" esa
+10 lpr RR "load positive" esa
+82 lpsw S "load PSW" esa
+18 lr RR "load" esa
+b1 lra RX "load real address" esa
+25 lrdr RR_XD "load rounded (ext. to long)" esa
+35 lrer RR_DE "load rounded (long to short)" esa
+22 ltdr RR_D "load and test (long)" esa
+32 lter RR_E "load and test (short)" esa
+12 ltr RR "load and test" esa
+b24b lura RRE "load using real address" esa
+5c m RX "multiply" esa
+af mc SI "monitor call" esa
+6c md RX_D "multiply (long)" esa
+2c mdr RR_D "multiply (long)" esa
+7c me RX_ED "multiply (short to long)" esa
+3c mer RR_ED "multiply (short to long)" esa
+4c mh RX "multiply halfword" esa
+fc mp SS_LL "multiply decimal" esa
+1c mr RR "multiply" esa
+b232 msch S "modify subchannel" esa
+b247 msta RRE_R "modify stacked state" esa
+d2 mvc SS_L "move" esa
+e50f mvcdk SSE "move with destination key" esa
+e8 mvcin SS_L "move inverse" esa
+d9 mvck SS_RR "move with key" esa
+0e mvcl RR "move long" esa
+da mvcp SS_RR "move to primary" esa
+db mvcs SS_RR "move to secondary" esa
+e50e mvcsk SSE "move with source key" esa
+92 mvi SI "move" esa
+d1 mvn SS_L "move numerics" esa
+f1 mvo SS_LL "move with offset" esa
+b254 mvpg RRE "move page" esa
+b255 mvst RRE "move string" esa
+d3 mvz SS_L "move zones" esa
+67 mxd RX_DX "multiply (long to ext.)" esa
+27 mxdr RR_DX "multiply (long to ext.)" esa
+26 mxr RR_X "multiply (ext.)" esa
+54 n RX "AND" esa
+d4 nc SS_L "AND" esa
+94 ni SI "AND" esa
+14 nr RR "AND" esa
+56 o RX "OR" esa
+d6 oc SS_L "OR" esa
+96 oi SI "OR" esa
+16 or RR "OR" esa
+f2 pack SS_LL "pack" esa
+b248 palb RRE_O "purge ALB" esa
+b218 pc S "program call" esa
+0101 pr E "program return" esa
+b228 pt RRE "program transfer" esa
+b20d ptlb S_O "purge TLB" esa
+b23b rchp S_O "reset channel path" esa
+b22a rrbe RRE "reset reference bit extended" esa
+b238 rsch S_O "resume subchannel" esa
+5b s RX "subtract" esa
+b219 sac S "set address space control" esa
+b279 sacf S "set address space control fast" esa
+b237 sal S_O "set address limit" esa
+b24e sar RRE_AR "set access" esa
+b23c schm S_O "set channel monitor" esa
+b204 sck S "set clock" esa
+b206 sckc S "set clock comparator" esa
+6b sd RX_D "subtract normalized (long)" esa
+2b sdr RR_D "subtract normalized (long)" esa
+7b se RX_E "subtract normalized (short)" esa
+3b ser RR_E "subtract normalized (short)" esa
+4b sh RX "subtract halfword" esa
+b214 sie S "start interpretive execution" esa
+ae sigp RS "signal processor" esa
+5f sl RX "subtract logical" esa
+8b sla RS_S "shift left single" esa
+8f slda RS_D "shift left double (long)" esa
+8d sldl RS_D "shift left double logical (long)" esa
+89 sll RS_S "shift left single logical" esa
+1f slr RR "subtract logical" esa
+fb sp SS_LL "subtract decimal" esa
+b20a spka S "set PSW key from address" esa
+04 spm RR_R "set program mask" esa
+b208 spt S "set CPU timer" esa
+b210 spx S "set prefix" esa
+b244 sqdr RRE_D "square root (long)" esa
+b245 sqer RRE_E "square root (short)" esa
+1b sr RR "subtract" esa
+8a sra RS_S "shift right single" esa
+8e srda RS_D "shift right double (long)" esa
+8c srdl RS_D "shift right double logical (long)" esa
+88 srl RS_S "shift right single logical" esa
+f0 srp SS_LI "shift and round decimal" esa
+b25e srst RRE "search string" esa
+b225 ssar RRE_R "set secondary ASN" esa
+b233 ssch S "start subchannel" esa
+b22b sske RRE "set storage key extended" esa
+80 ssm S "set system mask" esa
+50 st RX "store" esa
+9b stam RS_A "store access multiple" esa
+b212 stap S "store CPU address" esa
+42 stc RX "store character" esa
+b205 stck S "store clock" esa
+b207 stckc S "store clock comparator" esa
+be stcm RS_M "store characters under mask" esa
+b23a stcps S "store channel path status" esa
+b239 stcrw S "store channel report word" esa
+b6 stctl RS_C "store control" esa
+60 std RX_D "store (long)" esa
+70 ste RX_E "store (short)" esa
+40 sth RX "store halfword" esa
+b202 stidp S "store CPU id" esa
+90 stm RS "store multiple" esa
+ac stnsm SI "store then AND system mask" esa
+ad stosm SI "store then OR system mask" esa
+b209 stpt S "store CPU timer" esa
+b211 stpx S "store prefix" esa
+b234 stsch S "store subchannel" esa
+b246 stura RRE "store using real address" esa
+7f su RX_E "subtract unnormalized (short)" esa
+3f sur RR_E "subtract unnormalized (short)" esa
+0a svc RR_I "supervisor call" esa
+6f sw RX_D "subtract unnormalized (long)" esa
+2f swr RR_D "subtract unnormalized (long)" esa
+37 sxr RR_X "subtract normalized (ext.)" esa
+b24c tar RRE_AR "test access" esa
+b22c tb RRE_R2 "test block" esa
+91 tm SI "test under mask" esa
+b236 tpi S "test pending interruption" esa
+e501 tprot SSE "test protection" esa
+dc tr SS_L "translate" esa
+99 trace RS "trace" esa
+dd trt SS_L "translate and test" esa
+93 ts S "test and set" esa
+b235 tsch S "test subchannel" esa
+f3 unpk SS_LL "unpack" esa
+0102 upt E "update tree" esa
+57 x RX "exclusive OR" esa
+d7 xc SS_L "exclusive OR" esa
+97 xi SI "exclusive OR" esa
+17 xr RR "exclusive OR" esa
+f8 zap SS_LL "zero and add" esa
+a70a ahi RI "add halfword immediate" esa
+84 brxh RSI_A "branch relative on index high" esa
+85 brxle RSI_A "branch relative on index low or equal" esa
+a705 bras RI_A "branch relative and save" esa
+a704 brc RI_MA "branch relative on condition" esa
+a706 brct RI_A "branch relative on count" esa
+b241 cksm RRE "checksum" esa
+a70e chi RI "compare halfword immediate" esa
+a9 clcle RS "compare logical long extended" esa
+a708 lhi RI "load halfword immediate" esa
+a8 mvcle RS "move long extended" esa
+a70c mhi RI "multiply halfword immediate" esa
+b252 msr RRE "multiply single" esa
+71 ms RX "multiply single" esa
+a700 tmh RI_U "test under mask high" esa
+a701 tml RI_U "test under mask low" esa
+0700 nopr RR_B "no operation" esa
+0710 bor RR_B "branch on overflow / if ones" esa
+0720 bhr RR_B "branch on high" esa
+0720 bpr RR_B "branch on plus" esa
+0730 bnler RR_B "branch on not low or equal" esa
+0740 blr RR_B "branch on low" esa
+0740 bmr RR_B "branch on minus / if mixed" esa
+0750 bnher RR_B "branch on not high or equal" esa
+0770 bner RR_B "branch on not equal" esa
+0770 bnzr RR_B "branch on not zero / if not zeros" esa
+0780 ber RR_B "branch on equal" esa
+0780 bzr RR_B "branch on zero / if zeros" esa
+07a0 bher RR_B "branch on high or equal" esa
+07b0 bnlr RR_B "branch on not low" esa
+07b0 bnmr RR_B "branch on not minus / if not mixed" esa
+07c0 bler RR_B "brach on low or equal" esa
+07d0 bnhr RR_B "branch on not high" esa
+07d0 bnpr RR_B "branch on not plus" esa
+07e0 bnor RR_B "branch on not overflow / if not ones" esa
+07f0 br RR_B "unconditional branch" esa
+4700 nop RX_B "no operation" esa
+4710 bo RX_B "branch on overflow / if ones" esa
+4720 bh RX_B "branch on high" esa
+4720 bp RX_B "branch on plus" esa
+4730 bnle RX_B "branch on not low or equal" esa
+4740 bl RX_B "branch on low" esa
+4740 bm RX_B "branch on minus / if mixed" esa
+4750 bnhe RX_B "branch on not high or equal" esa
+4770 bne RX_B "branch on not equal" esa
+4770 bnz RX_B "branch on not zero / if not zeros" esa
+4780 be RX_B "branch on equal" esa
+4780 bz RX_B "branch on zero / if zeros" esa
+47a0 bhe RX_B "branch on high or equal" esa
+47b0 bnl RX_B "branch on not low" esa
+47b0 bnm RX_B "branch on not minus / if not mixed" esa
+47c0 ble RX_B "branch on low or equal" esa
+47d0 bnh RX_B "branch on not high" esa
+47d0 bnp RX_B "branch on not plus" esa
+47e0 bno RX_B "branch on not overflow / if not ones" esa
+47f0 b RX_B "unconditional branch" esa
+a714 jo RI_B "jump on overflow / if ones" esa
+a724 jh RI_B "jump on A high" esa
+a724 jp RI_B "jump on plus" esa
+a734 jnle RI_B "jump on not low or equal" esa
+a744 jl RI_B "jump on A low" esa
+a744 jm RI_B "jump on minus / if mixed" esa
+a754 jnhe RI_B "jump on not high or equal" esa
+a774 jne RI_B "jump on A not equal B" esa
+a774 jnz RI_B "jump on not zero / if not zeros" esa
+a784 je RI_B "jump on A equal B" esa
+a784 jz RI_B "jump on zero / if zeros" esa
+a7a4 jhe RI_B "jump on high or equal" esa
+a7b4 jnl RI_B "jump on A not low" esa
+a7b4 jnm RI_B "jump on not minus / if not mixed" esa
+a7c4 jle RI_B "jump on low or equal" esa
+a7d4 jnh RI_B "jump on A not high" esa
+a7d4 jnp RI_B "jump on not plus" esa
+a7e4 jno RI_B "jump on not overflow / if not ones" esa
+a7f4 j RI_B "jump" esa
+b34a axbr RRE_F "add extended bfp" esa
+b31a adbr RRE_F "add long bfp" esa
+ed000000001a adb RXE_F "add long bfp" esa
+b30a aebr RRE_F "add short bfp" esa
+ed000000000a aeb RXE_F "add short bfp" esa
+b349 cxbr RRE_F "compare extended bfp" esa
+b319 cdbr RRE_F "compare long bfp" esa
+ed0000000019 cdb RXE_F "compare long bfp" esa
+b309 cebr RRE_F "compare short bfp" esa
+ed0000000009 ceb RXE_F "compare short bfp" esa
+b348 kxbr RRE_F "compare and signal extended bfp" esa
+b318 kdbr RRE_F "compare and signal long bfp" esa
+ed0000000018 kdb RXE_F "compare and signal long bfp" esa
+b308 kebr RRE_F "compare and signal short bfp" esa
+ed0000000008 keb RXE_F "compare and signal short bfp" esa
+b396 cxfbr RRE_F "convert from fixed 32 to extended bfp" esa
+b395 cdfbr RRE_F "convert from fixed 32 to long bfp" esa
+b394 cefbr RRE_F "convert from fixed 32 to short bfp" esa
+b39a cfxbr RRF_M "convert to fixed extended bfp to 32" esa
+b399 cfdbr RRF_M "convert to fixed long bfp to 32" esa
+b398 cfebr RRF_M "convert to fixed short bfp to 32" esa
+b34d dxbr RRE_F "divide extended bfp" esa
+b31d ddbr RRE_F "divide long bfp" esa
+ed000000001d ddb RXE_F "divide long bfp" esa
+b30d debr RRE_F "divide short bfp" esa
+ed000000000d deb RXE_F "divide short bfp" esa
+b35b didbr RRF_RM "divide to integer long bfp" esa
+b353 diebr RRF_RM "divide to integer short bfp" esa
+b38c efpc RRE "extract fpc" esa
+b342 ltxbr RRE_F "load and test extended bfp" esa
+b312 ltdbr RRE_F "load and test long bfp" esa
+b302 ltebr RRE_F "load and test short bfp" esa
+b343 lcxbr RRE_F "load complement extended bfp" esa
+b313 lcdbr RRE_F "load complement long bfp" esa
+b303 lcebr RRE_F "load complement short bfp" esa
+b347 fixbr RRF_M "load fp integer extended bfp" esa
+b35f fidbr RRF_M "load fp integer long bfp" esa
+b357 fiebr RRF_M "load fp integer short bfp" esa
+b29d lfpc S "load fpc" esa
+b305 lxdbr RRE_F "load lengthened long to extended bfp" esa
+ed0000000005 lxdb RXE_F "load lengthened long to extended bfp" esa
+b306 lxebr RRE_F "load lengthened short to extended bfp" esa
+ed0000000006 lxeb RXE_F "load lengthened short to extended bfp" esa
+b304 ldebr RRE_F "load lengthened short to long bfp" esa
+ed0000000004 ldeb RXE_F "load lengthened short to long bfp" esa
+b341 lnxbr RRE_F "load negative extended bfp" esa
+b311 lndbr RRE_F "load negative long bfp" esa
+b301 lnebr RRE_F "load negative short bfp" esa
+b340 lpxbr RRE_F "load positive extended bfp" esa
+b310 lpdbr RRE_F "load positive long bfp" esa
+b300 lpebr RRE_F "load positive short bfp" esa
+b345 ldxbr RRE_F "load rounded extended to long bfp" esa
+b346 lexbr RRE_F "load rounded extended to short bfp" esa
+b344 ledbr RRE_F "load rounded long to short bfp" esa
+b34c mxbr RRE_F "multiply extended bfp" esa
+b31c mdbr RRE_F "multiply long bfp" esa
+ed000000001c mdb RXE_F "multiply long bfp" esa
+b307 mxdbr RRE_F "multiply long to extended bfp" esa
+ed0000000007 mxdb RXE_F "multiply long to extended bfp" esa
+b317 meebr RRE_F "multiply short bfp" esa
+ed0000000017 meeb RXE_F "multiply short bfp" esa
+b30c mdebr RRE_F "multiply short to long bfp" esa
+ed000000000c mdeb RXE_F "multiply short to long bfp" esa
+b31e madbr RRF_R "multiply and add long bfp" esa
+ed000000001e madb RXF "multiply and add long bfp" esa
+b30e maebr RRF_R "multiply and add short bfp" esa
+ed000000000e maeb RXF "multiply and add short bfp" esa
+b31f msdbr RRF_R "multiply and subtract long bfp" esa
+ed000000001f msdb RXF "multiply and subtract long bfp" esa
+b30f msebr RRF_R "multiply and subtract short bfp" esa
+ed000000000f mseb RXF "multiply and subtract short bfp" esa
+b384 sfpc RRE "set fpc" esa
+b299 srnm S "set rounding mode" esa
+b316 sqxbr RRE_F "square root extended bfp" esa
+b315 sqdbr RRE_F "square root long bfp" esa
+ed0000000015 sqdb RXE_F "square root long bfp" esa
+b314 sqebr RRE_F "square root short bfp" esa
+ed0000000014 sqeb RXE_F "square root short bfp" esa
+b29c stfpc S "store fpc" esa
+b34b sxbr RRE_F "subtract extended bfp" esa
+b31b sdbr RRE_F "subtract long bfp" esa
+ed000000001b sdb RXE_F "subtract long bfp" esa
+b30b sebr RRE_F "subtract short bfp" esa
+ed000000000b seb RXE_F "subtract short bfp" esa
+ed0000000012 tcxb RXE_F "test data class extended bfp" esa
+ed0000000011 tcdb RXE_F "test data class long bfp" esa
+ed0000000010 tceb RXE_F "test data class short bfp" esa
+b274 siga S "signal adapter" esa
+# are the following instructions confidential ??
+b2a6 cuutf RRE "convert unicode to utf-8" esa
+b2a7 cutfu RRE "convert utf-8 to unicode" esa
+ee plo SS_PLO "perform locked operation" esa
+b25a bsa RRE "branch and set authority" esa
+b277 rp S "resume program" esa
+0107 sckpf E "set clock programmable field" esa
+b27d stsi S "store system information" esa
+01ff trap2 E "trap" esa
+b2ff trap4 S "trap4" esa
+# Here are the new esame instructions:
+b946 bctgr RRE "branch on count 64" esame
+b900 lpgr RRE "load positive 64" esame
+b910 lpgfr RRE "load positive 64<32" esame
+b901 lngr RRE "load negative 64" esame
+b911 lngfr RRE "load negative 64<32" esame
+b902 ltgr RRE "load and test 64" esame
+b912 ltgfr RRE "load and test 64<32" esame
+b903 lcgr RRE "load complement 64" esame
+b913 lcgfr RRE "load complement 64<32" esame
+b980 ngr RRE "and 64" esame
+b921 clgr RRE "compare logical 64" esame
+b931 clgfr RRE "compare logical 64<32" esame
+b981 ogr RRE "or 64" esame
+b982 xgr RRE "exclusive or 64" esame
+b904 lgr RRE "load 64" esame
+b914 lgfr RRE "load 64<32" esame
+b920 cgr RRE "compare 64" esame
+b930 cgfr RRE "compare 64<32" esame
+b908 agr RRE "add 64" esame
+b918 agfr RRE "add 64<32" esame
+b909 sgr RRE "subtract 64" esame
+b919 sgfr RRE "subtract 64<32" esame
+b90a algr RRE "add logical 64" esame
+b91a algfr RRE "add logical 64<32" esame
+b90b slgr RRE "subtract logical 64" esame
+b91b slgfr RRE "subtract logical 64<32" esame
+e30000000046 bctg RXE "branch on count 64" esame
+e3000000002e cvdg RXE "convert to decimal 64" esame
+e3000000000e cvbg RXE "convert to binary 64" esame
+e30000000024 stg RXE "store 64" esame
+e30000000080 ng RXE "and 64" esame
+e30000000021 clg RXE "compare logical 64" esame
+e30000000031 clgf RXE "comparee logical 64<32" esame
+e30000000081 og RXE "or 64" esame
+e30000000082 xg RXE "exclusive or 64" esame
+e30000000004 lg RXE "load 64" esame
+e30000000014 lgf RXE "load 64<32" esame
+e30000000020 cg RXE "compare 64" esame
+e30000000030 cgf RXE "compare 64<32" esame
+e30000000008 ag RXE "add 64" esame
+e30000000018 agf RXE "add 64<32" esame
+e30000000009 sg RXE "subtract 64" esame
+e30000000019 sgf RXE "subtract 64<32" esame
+e3000000000a alg RXE "add logical 64" esame
+e3000000001a algf RXE "add logical 64<32" esame
+e3000000000b slg RXE "subtract logical 64" esame
+e3000000001b slgf RXE "subtract logical 64<32" esame
+e3000000000c msg RXE "multiply single 64" esame
+e3000000001c msgf RXE "multiply single 64<32" esame
+ec0000000044 brxhg RIE_A "branch relative on index high 64" esame
+ec0000000045 brxlg RIE_A "branch relative on index low or equal 64" esame
+eb0000000044 bxhg RSE_R "branch on index high 64" esame
+eb0000000045 bxleg RSE_R "branch on index low or equal 64" esame
+eb000000000c srlg RSE_R "shift right single logical 64" esame
+eb000000000d sllg RSE_R "shift left single logical 64" esame
+eb000000000a srag RSE_R "shift right single 64" esame
+eb000000000b slag RSE_R "shift left single 64" esame
+eb0000000024 stmg RSE_R "store multiple 64" esame
+eb0000000026 stmh RSE_R "store multiple high" esame
+eb0000000004 lmg RSE_R "load multiple 64" esame
+eb0000000096 lmh RSE_R "load multiple high" esame
+ef lmd SS_LMD "load multiple disjoint" esame
+eb000000000f tracg RSE_R "trace 64" esame
+e30000000003 lrag RXE "load real address 64" esame
+e50000000002 strag SSE "store read address" esame
+eb0000000025 stctg RSE_R "store control 64" esame
+eb000000002f lctlg RSE_R "load control 64" esame
+eb0000000030 csg RSE_R "compare and swap 64" esame
+eb000000003e cdsg RSE_R "compare double and swap 64" esame
+eb0000000020 clmh RSE_M "compare logical characters under mask high" esame
+eb000000002c stcmh RSE_M "store characters under mask high" esame
+eb0000000080 icmh RSE_M "insert characters under mask high" esame
+a700 tmlh RI_U "test under mask low high" esame
+a702 tmhh RI_U "test under mask high high" esame
+a701 tmll RI_U "test under mask low low" esame
+a703 tmhl RI_U "test under mask high low" esame
+c004 brcl RIL_MA "branch relative on condition long" esame
+c014 jgo RIL_B "jump long on overflow / if ones" esame
+c024 jgh RIL_B "jump long on high" esame
+c024 jgp RIL_B "jump long on plus" esame
+c034 jgnle RIL_B "jump long on not low or equal" esame
+c044 jgl RIL_B "jump long on low" esame
+c044 jgm RIL_B "jump long on minus / if mixed" esame
+c054 jgnhe RIL_B "jump long on not high or equal" esame
+c074 jgne RIL_B "jump long on not equal" esame
+c074 jgnz RIL_B "jump long on not zero / if not zeros" esame
+c084 jge RIL_B "jump long on equal" esame
+c084 jgz RIL_B "jump long on zero / if zeros" esame
+c0a4 jghe RIL_B "jump long on high or equal" esame
+c0b4 jgnl RIL_B "jump long on not low" esame
+c0b4 jgnm RIL_B "jump long on not minus / if not mixed" esame
+c0c4 jgle RIL_B "jump long on low or equal" esame
+c0d4 jgnh RIL_B "jump long on not high" esame
+c0d4 jgnp RIL_B "jump long on not plus" esame
+c0e4 jgno RIL_B "jump long on not overflow / if not ones" esame
+c0f4 jg RIL_B "jump long" esame
+c005 brasl RIL_A "branch relative and save long" esame
+a707 brctg RI_A "branch relative on count 64" esame
+a709 lghi RI "load halfword immediate 64" esame
+a70b aghi RI "add halfword immediate 64" esame
+a70d mghi RI "multiply halfword immediate 64" esame
+a70f cghi RI "compare halfword immediate 64" esame
+b925 sturg RRE "store using real address 64" esame
+b90e eregg RRE "extract stacked registers 64" esame
+b905 lurag RRE "load using real address 64" esame
+b90c msgr RRE "multiply single 64" esame
+b91c msgfr RRE "multiply single 64<32" esame
+b3a4 cegbr RRE "convert from fixed 64 to short bfp" esame
+b3a5 cdgbr RRE "convert from fixed 64 to long bfp" esame
+b3a6 cxgbr RRE "convert from fixed 64 to extended bfp" esame
+b3a8 cgebr RRF_M "convert to fixed short bfd to 64" esame
+b3a9 cgdbr RRF_M "convert to fixed long bfp to 64" esame
+b3aa cgxbr RRF_M "convert to fixed extended bfp to 64" esame
+b3c4 cegr RRE "convert from fixed 64 to short hfp" esame
+b3c5 cdgr RRE "convert from fixed 64 to long hfp" esame
+b3c6 cxgr RRE "convert from fixed 64 to extended hfp" esame
+b3c8 cger RRF_F "convert to fixed short hfp to 64" esame
+b3c9 cgdr RRF_F "convert to fixed long hfp to 64" esame
+b3ca cgxr RRF_F "convert to fixed extended hfp to 64" esame
+010b tam E "test addressing mode" esame
+010c sam24 E "set addressing mode 24" esame
+010d sam31 E "set addressing mode 31" esame
+010e sam64 E "set addressing mode 64" esame
+a500 iihh RI_U "insert immediate high high" esame
+a501 iihl RI_U "insert immediate high low" esame
+a502 iilh RI_U "insert immediate low high" esame
+a503 iill RI_U "insert immediate low low" esame
+a504 nihh RI_U "and immediate high high" esame
+a505 nihl RI_U "and immediate high low" esame
+a506 nilh RI_U "and immediate low high" esame
+a507 nill RI_U "and immediate low low" esame
+a508 oihh RI_U "or immediate high high" esame
+a509 oihl RI_U "or immediate high low" esame
+a50a oilh RI_U "or immediate low high" esame
+a50b oill RI_U "or immediate low low" esame
+a50c llihh RI_U "load logical immediate high high" esame
+a50d llihl RI_U "load logical immediate high low" esame
+a50e llilh RI_U "load logical immediate low high" esame
+a50f llill RI_U "load logical immediate low low" esame
+b2b1 stfl S "store facility list" esame
+b2b2 lpswe S "load psw extended" esame
+b90d dsgr RRE "divide single 64" esame
+b90f lrvgr RRE "load reversed 64" esame
+b916 llgfr RRE "load logical 64<32" esame
+b917 llgtr RRE "load logical thirty one bits" esame
+b91d dsgfr RRE "divide single 64<32" esame
+b91f lrvr RRE "load reversed 32" esame
+b986 mlgr RRE "multiply logical 64" esame
+b987 dlgr RRE "divide logical 64" esame
+b988 alcgr RRE "add logical with carry 64" esame
+b989 slbgr RRE "subtract logical with borrow 64" esame
+b98d epsw RRE "extract psw" esame
+b996 mlr RRE "multiply logical 32" esame
+b997 dlr RRE "divide logical 32" esame
+b998 alcr RRE "add logical with carry 32" esame
+b999 slbr RRE "subtract logical with borrow 32" esame
+b99d esea RRE_R "extract and set extended authority" esame
+c000 larl RIL_A "load address relative long" esame
+e3000000000d dsg RXE "divide single 64" esame
+e3000000000f lrvg RXE "load reversed 64" esame
+e30000000016 llgf RXE "load logical 64<32" esame
+e30000000017 llgt RXE "load logical thirty one bits" esame
+e3000000001d dsgf RXE "divide single 64<32" esame
+e3000000001e lrv RXE "load reversed 32" esame
+e3000000001f lrvh RXE "load reversed 16" esame
+e3000000002f strvg RXE "store reversed 64" esame
+e3000000003e strv RXE "store reversed 32" esame
+e3000000003f strvh RXE "store reversed 64" esame
+e30000000086 mlg RXE "multiply logical 64" esame
+e30000000087 dlg RXE "divide logical 64" esame
+e30000000088 alcg RXE "add logical with carry 64" esame
+e30000000089 slbg RXE "subtract logical with borrow 64" esame
+e3000000008e stpq RXE "store pair to quadword" esame
+e3000000008f lpq RXE "load pair from quadword" esame
+e30000000096 ml RXE "multiply logical 32" esame
+e30000000097 dl RXE "divide logical 32" esame
+e30000000098 alc RXE "add logical with carry 32" esame
+e30000000099 slb RXE "subtract logical with borrow 32" esame
+e30000000090 llgc RXE "load logical character" esame
+e30000000091 llgh RXE "load logical halfword" esame
+eb000000001c rllg RSE_R "rotate left single logical 64" esame
+eb000000001d rll RSE_R "rotate left single logical 32" esame
+b278 stcke S "store clock extended" esame
+b2a5 tre RRE "translate extended" esame