Integrate SPARC and UltraSPARC targets.

* sparc-tdep.h (struct sparc32_frame_cache): Add pc_regnum and
npc_regnum members.
* sparc-tdep.c (sparc_unwind_pc): Rename from sparc32_unwind_pc.
Get register numbers for %pc from `struct gdbarch_tdep' instead of
using 32-bit specific constants.
(sparc_software_single_step): Get register numbers from %pc and
%npc from `struct gdbarch_tdep'.
(sparc_write_pc): Rename from sparc32_write_pc.  Get register
numbers from %pc and %npc from `struct gdbarch_tdep'.
(sparc32_gdbarch_init): Initialize TDEP->pc_regnum,
TDEP->npc_regnum and TDEP->plt_entry_size.  Set write_pc to
sparc_write_pc, set unwind_pc to sparc_unwind_pc.
* sparc64-tdep.h: Fix typo in multiple inclusion guard.  Include
"sparc-tdep.h".
(enum sparc_regnum): Remove.
(sparc_supply_rwindow, sparc_fill_rwindow): Remove prototypes.
(sparc64_init_abi): New prototype.
* sparc64-tdep.c: Include "inferior.h" and "sparc-tdep.h".
(struct gdbarch_tdep): Remove definition.
(SPARC64_NUM_REGS, SPARC64_NUM_PSEUDO_REGS): Use ARRAY_SIZE.
(sparc_breakpoint_from_pc, sparc64_unwind_pc,
sparc_unwind_dummy_id, sparc_extract_struct_value_address,
sparc_analyze_control_transfer, sparc_software_single_step,
sparc64_gdbarch_init, sparc_supply_rwindow, sparc_fill_rwindow,
_initialize_sparc64_tdep): Remove functions.
(sparc64_init_abi): New function.
* sparc64fbsd-tdep.c (sparc64fbsd_supply_reg): Call
sparc_supply_rwindow with correct number of arguments.
(sparc64fbsd_init_abi): Call sparc64_init_abi.
* sparcbsd-nat.c (store_inferior_registers): Call
sparc_collect_rwindow instead sparc_fill_rwindow.
* config/sparc/fbsd.mt (TDEPFILES): Add sparc-tdep.o and corelow.o.
* config/sparc/fbsd.mh (NATDEPFILES): Remove corelow.o.
* Makefile.in (sparc64_tdep_h): Add dependency on sparc-tdep.h.
(sparc64-tdep.o): Update dependencies.

10 files changed, 116 insertions, 383 deletions

diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index b97b3ac5018..d328a59a74a 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,42 @@
+2003-10-18  Mark Kettenis  <kettenis@gnu.org>
+
+	Integrate SPARC and UltraSPARC targets.
+	* sparc-tdep.h (struct sparc32_frame_cache): Add pc_regnum and
+	npc_regnum members.
+	* sparc-tdep.c (sparc_unwind_pc): Rename from sparc32_unwind_pc.
+	Get register numbers for %pc from `struct gdbarch_tdep' instead of
+	using 32-bit specific constants.
+	(sparc_software_single_step): Get register numbers from %pc and
+	%npc from `struct gdbarch_tdep'.
+	(sparc_write_pc): Rename from sparc32_write_pc.  Get register
+	numbers from %pc and %npc from `struct gdbarch_tdep'.
+	(sparc32_gdbarch_init): Initialize TDEP->pc_regnum,
+	TDEP->npc_regnum and TDEP->plt_entry_size.  Set write_pc to
+	sparc_write_pc, set unwind_pc to sparc_unwind_pc.
+	* sparc64-tdep.h: Fix typo in multiple inclusion guard.  Include
+	"sparc-tdep.h".
+	(enum sparc_regnum): Remove.
+	(sparc_supply_rwindow, sparc_fill_rwindow): Remove prototypes.
+	(sparc64_init_abi): New prototype.
+	* sparc64-tdep.c: Include "inferior.h" and "sparc-tdep.h".
+	(struct gdbarch_tdep): Remove definition.
+	(SPARC64_NUM_REGS, SPARC64_NUM_PSEUDO_REGS): Use ARRAY_SIZE.
+	(sparc_breakpoint_from_pc, sparc64_unwind_pc,
+	sparc_unwind_dummy_id, sparc_extract_struct_value_address,
+	sparc_analyze_control_transfer, sparc_software_single_step,
+	sparc64_gdbarch_init, sparc_supply_rwindow, sparc_fill_rwindow,
+	_initialize_sparc64_tdep): Remove functions.
+	(sparc64_init_abi): New function.
+	* sparc64fbsd-tdep.c (sparc64fbsd_supply_reg): Call
+	sparc_supply_rwindow with correct number of arguments.
+	(sparc64fbsd_init_abi): Call sparc64_init_abi.
+	* sparcbsd-nat.c (store_inferior_registers): Call
+	sparc_collect_rwindow instead sparc_fill_rwindow.
+	* config/sparc/fbsd.mt (TDEPFILES): Add sparc-tdep.o and corelow.o.
+	* config/sparc/fbsd.mh (NATDEPFILES): Remove corelow.o.
+	* Makefile.in (sparc64_tdep_h): Add dependency on sparc-tdep.h.
+	(sparc64-tdep.o): Update dependencies.
+
 2003-10-15  Mark Kettenis  <kettenis@gnu.org>
 
 	* infrun.c (handle_inferior_event): Allow for breakpoint
diff --git a/gdb/Makefile.in b/gdb/Makefile.in
index 8d3f9f48577..ee1ff70f847 100644
--- a/gdb/Makefile.in
+++ b/gdb/Makefile.in
@@ -747,7 +747,7 @@ solist_h = solist.h
 somsolib_h = somsolib.h
 source_h = source.h
 sparc_tdep_h = sparc-tdep.h
-sparc64_tdep_h = sparc64-tdep.h
+sparc64_tdep_h = sparc64-tdep.h $(sparc_tdep_h)
 srec_h = srec.h
 stabsread_h = stabsread.h
 stack_h = stack.h
@@ -2317,8 +2317,9 @@ sparcbsd-nat.o: sparcbsd-nat.c $(defs_h) $(inferior_h) $(regcache_h) \
 	$(sparc64_tdep_h) $(sparcbsd_nat_h)
 sparc64-tdep.o: sparc64-tdep.c $(defs_h) $(arch_utils_h) $(floatformat_h) \
 	$(frame_h) $(frame_base_h) $(frame_unwind_h) $(gdbcore_h) \
-	$(gdbtypes_h) $(osabi_h) $(regcache_h) $(target_h) $(value_h) \
-	$(gdb_assert_h) $(gdb_string_h) $(sparc64_tdep_h)
+	$(gdbtypes_h) $(inferior_h) $(osabi_h) $(regcache_h) $(target_h) \
+	$(value_h) $(gdb_assert_h) $(gdb_string_h) $(sparc_tdep_h) \
+	$(sparc64_tdep_h)
 sparc64fbsd-tdep.o: sparc64fbsd-tdep.c $(defs_h) $(gdbcore_h) $(osabi_h) \
 	$(regcache_h) $(target_h) $(gdb_string_h) $(sparc64_tdep_h)
 sparc64fbsd-nat.o: sparc64fbsd-nat.c $(defs_h) $(sparc64_tdep_h) \
diff --git a/gdb/config/sparc/fbsd.mh b/gdb/config/sparc/fbsd.mh
index 27942f86e6a..599e2eb1973 100644
--- a/gdb/config/sparc/fbsd.mh
+++ b/gdb/config/sparc/fbsd.mh
@@ -1,5 +1,5 @@
 # Host: FreeBSD/sparc64
 NATDEPFILES= sparc64fbsd-nat.o sparcbsd-nat.o \
-	corelow.o fork-child.o infptrace.o inftarg.o \
+	fork-child.o infptrace.o inftarg.o \
 	solib.o solib-svr4.o solib-legacy.o
 NAT_FILE= nm-fbsd.h
diff --git a/gdb/config/sparc/fbsd.mt b/gdb/config/sparc/fbsd.mt
index 20c7f1ce27a..8e4dead7add 100644
--- a/gdb/config/sparc/fbsd.mt
+++ b/gdb/config/sparc/fbsd.mt
@@ -1,3 +1,3 @@
 # Target: FreeBSD/sparc64
-TDEPFILES= sparc64-tdep.o sparc64fbsd-tdep.o
+TDEPFILES= sparc-tdep.o sparc64-tdep.o sparc64fbsd-tdep.o corelow.o
 TM_FILE= tm-fbsd.h
diff --git a/gdb/sparc-tdep.c b/gdb/sparc-tdep.c
index e9ec8c799e5..291217af439 100644
--- a/gdb/sparc-tdep.c
+++ b/gdb/sparc-tdep.c
@@ -470,9 +470,10 @@ sparc32_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc,
 }
 
 static CORE_ADDR
-sparc32_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
+sparc_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
 {
-  return frame_unwind_register_unsigned (next_frame, SPARC32_PC_REGNUM);
+  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+  return frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
 }
 
 /* Return PC of first real instruction of the function starting at
@@ -863,6 +864,7 @@ sparc_analyze_control_transfer (CORE_ADDR pc, CORE_ADDR *npc)
 void
 sparc_software_single_step (enum target_signal sig, int insert_breakpoints_p)
 {
+  struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
   static CORE_ADDR npc, nnpc;
   static char npc_save[4], nnpc_save[4];
 
@@ -873,8 +875,8 @@ sparc_software_single_step (enum target_signal sig, int insert_breakpoints_p)
       gdb_assert (npc == 0);
       gdb_assert (nnpc == 0);
 
-      pc = sparc_address_from_register (SPARC32_PC_REGNUM);
-      npc = sparc_address_from_register (SPARC32_NPC_REGNUM);
+      pc = sparc_address_from_register (tdep->pc_regnum);
+      npc = sparc_address_from_register (tdep->npc_regnum);
 
       /* Analyze the instruction at PC.  */
       nnpc = sparc_analyze_control_transfer (pc, &npc);
@@ -899,10 +901,12 @@ sparc_software_single_step (enum target_signal sig, int insert_breakpoints_p)
 }
 
 static void
-sparc32_write_pc (CORE_ADDR pc, ptid_t ptid)
+sparc_write_pc (CORE_ADDR pc, ptid_t ptid)
 {
-  write_register_pid (SPARC32_PC_REGNUM, pc, ptid);
-  write_register_pid (SPARC32_NPC_REGNUM, pc + 4, ptid);
+  struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
+
+  write_register_pid (tdep->pc_regnum, pc, ptid);
+  write_register_pid (tdep->npc_regnum, pc + 4, ptid);
 }
 
 
@@ -921,6 +925,10 @@ sparc32_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
   tdep = XMALLOC (struct gdbarch_tdep);
   gdbarch = gdbarch_alloc (&info, tdep);
 
+  tdep->pc_regnum = SPARC32_PC_REGNUM;
+  tdep->npc_regnum = SPARC32_NPC_REGNUM;
+  tdep->plt_entry_size = 0;
+
   set_gdbarch_long_double_bit (gdbarch, 128);
 
   set_gdbarch_num_regs (gdbarch, SPARC32_NUM_REGS);
@@ -960,12 +968,11 @@ sparc32_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
   set_gdbarch_print_insn (gdbarch, print_insn_sparc);
 
   set_gdbarch_software_single_step (gdbarch, sparc_software_single_step);
-
-  set_gdbarch_write_pc (gdbarch, sparc32_write_pc);
+  set_gdbarch_write_pc (gdbarch, sparc_write_pc);
 
   set_gdbarch_unwind_dummy_id (gdbarch, sparc_unwind_dummy_id);
 
-  set_gdbarch_unwind_pc (gdbarch, sparc32_unwind_pc);
+  set_gdbarch_unwind_pc (gdbarch, sparc_unwind_pc);
 
   frame_base_set_default (gdbarch, &sparc32_frame_base);
 
diff --git a/gdb/sparc-tdep.h b/gdb/sparc-tdep.h
index c7fd544006d..c82099ff167 100644
--- a/gdb/sparc-tdep.h
+++ b/gdb/sparc-tdep.h
@@ -30,12 +30,18 @@ struct trad_frame_saved_reg;
 
 struct gdbarch_tdep
 {
-  /* Size of an Procude Linkage Table (PLT) entry, 0 if we shouldn't
-     treat the PLT special when doing prologue analysis.  */
-  size_t plt_entry_size;
+  /* Register numbers for the PN and nPC registers.  The definitions
+     for (64-bit) UltraSPARC differ from the (32-bit) SPARC
+     definitions.  */
+  int pc_regnum;
+  int npc_regnum;
 
   /* Offset of saved PC in jmp_buf.  */
   int jb_pc_offset;
+
+  /* Size of an Procedure Linkage Table (PLT) entry, 0 if we shouldn't
+     treat the PLT special when doing prologue analysis.  */
+  size_t plt_entry_size;
 };
 
 /* Register numbers of various important registers.  */
diff --git a/gdb/sparc64-tdep.c b/gdb/sparc64-tdep.c
index b605a1d1862..08ea7d740ab 100644
--- a/gdb/sparc64-tdep.c
+++ b/gdb/sparc64-tdep.c
@@ -27,6 +27,7 @@
 #include "frame-unwind.h"
 #include "gdbcore.h"
 #include "gdbtypes.h"
+#include "inferior.h"
 #include "osabi.h"
 #include "regcache.h"
 #include "target.h"
@@ -35,6 +36,7 @@
 #include "gdb_assert.h"
 #include "gdb_string.h"
 
+#include "sparc-tdep.h"
 #include "sparc64-tdep.h"
 
 /* This file implements the The SPARC 64-bit ABI as defined by the
@@ -163,14 +165,6 @@ sparc64_structure_or_union_p (const struct type *type)
   return 0;
 }
 
-/* UltraSPARC architecture specific information.  */
-
-struct gdbarch_tdep
-{
-  /* Offset of saved PC in jmp_buf.  */
-  int jb_pc_offset;
-};
-
 /* Register information.  */
 
 struct sparc64_register_info
@@ -283,8 +277,7 @@ static struct sparc64_register_info sparc64_register_info[] =
 };
 
 /* Total number of registers.  */
-#define SPARC64_NUM_REGS \
-  (sizeof (sparc64_register_info) / sizeof (sparc64_register_info[0]))
+#define SPARC64_NUM_REGS ARRAY_SIZE (sparc64_register_info)
 
 /* We provide the aliases %d0..%d62 and %q0..%q60 for the floating
    registers as "psuedo" registers.  */
@@ -348,9 +341,7 @@ static struct sparc64_register_info sparc64_pseudo_register_info[] =
 };
 
 /* Total number of pseudo registers.  */
-#define SPARC64_NUM_PSEUDO_REGS \
-  (sizeof (sparc64_pseudo_register_info) \
-   / sizeof (sparc64_pseudo_register_info[0]))
+#define SPARC64_NUM_PSEUDO_REGS ARRAY_SIZE (sparc64_pseudo_register_info)
 
 /* Return the name of register REGNUM.  */
 
@@ -499,21 +490,6 @@ sparc64_pseudo_register_write (struct gdbarch *gdbarch,
       regcache_raw_write_unsigned (regcache, SPARC64_STATE_REGNUM, state);
     }
 }
-
-/* Use the program counter to determine the contents and size of a
-   breakpoint instruction.  Return a pointer to a string of bytes that
-   encode a breakpoint instruction, store the length of the string in
-   *LEN and optionally adjust *PC to point to the correct memory
-   location for inserting the breakpoint.  */
-   
-static const unsigned char *
-sparc_breakpoint_from_pc (CORE_ADDR *pc, int *len)
-{
-  static unsigned char break_insn[] = { 0x91, 0xd0, 0x20, 0x01 };
-
-  *len = sizeof (break_insn);
-  return break_insn;
-}
 
 
 struct sparc64_frame_cache
@@ -566,12 +542,6 @@ sparc64_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc,
   return pc;
 }
 
-static CORE_ADDR
-sparc64_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
-{
-  return frame_unwind_register_unsigned (next_frame, SPARC64_PC_REGNUM);
-}
-
 /* Return PC of first real instruction of the function starting at
    START_PC.  */
 
@@ -732,15 +702,6 @@ static const struct frame_base sparc64_frame_base =
   sparc64_frame_base_address,
   sparc64_frame_base_address
 };
-
-static struct frame_id
-sparc_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
-{
-  CORE_ADDR sp;
-
-  sp = frame_unwind_register_unsigned (next_frame, SPARC_SP_REGNUM);
-  return frame_id_build (sp, frame_pc_unwind (next_frame));
-}
 
 /* Check whether TYPE must be 16-byte aligned.  */
 
@@ -1193,19 +1154,6 @@ sparc64_store_return_value (struct type *type, struct regcache *regcache,
     }
 }
 
-/* Extract from REGCACHE, which contains the (raw) register state, the
-   address in which a function should return its structure value, as a
-   CORE_ADDR.  */
-
-static CORE_ADDR
-sparc_extract_struct_value_address (struct regcache *regcache)
-{
-  ULONGEST addr;
-
-  regcache_cooked_read_unsigned (regcache, SPARC_O0_REGNUM, &addr);
-  return addr;
-}
-
 static int
 sparc64_use_struct_convention (int gcc_p, struct type *type)
 {
@@ -1213,138 +1161,20 @@ sparc64_use_struct_convention (int gcc_p, struct type *type)
      registers.  */
   return (TYPE_LENGTH (type) > 32);
 }
-
 
-/* The SPARC Architecture doesn't have hardware single-step support,
-   and most operating systems don't implement it either, so we provide
-   software single-step mechanism.  */
-
-static CORE_ADDR
-sparc_analyze_control_transfer (CORE_ADDR pc, CORE_ADDR *npc)
-{
-  unsigned long insn = sparc_fetch_instruction (pc);
-  int conditional_p = X_COND (insn) & 0x7;
-  int branch_p = 0;
-  long offset = 0;			/* Must be signed for sign-extend.  */
-
-  if (X_OP (insn) == 0 && X_OP2 (insn) == 3 && (insn & 0x1000000) == 0)
-    {
-      /* Branch on Integer Register with Prediction (BPr).  */
-      branch_p = 1;
-      conditional_p = 1;
-    }
-  else if (X_OP (insn) == 0 && X_OP2 (insn) == 6)
-    {
-      /* Branch on Floating-Point Condition Codes (FBfcc).  */
-      branch_p = 1;
-      offset = 4 * X_DISP22 (insn);
-    }
-  else if (X_OP (insn) == 0 && X_OP2 (insn) == 5)
-    {
-      /* Branch on Floating-Point Condition Codes with Prediction
-         (FBPfcc).  */
-      branch_p = 1;
-      offset = 4 * X_DISP19 (insn);
-    }
-  else if (X_OP (insn) == 0 && X_OP2 (insn) == 2)
-    {
-      /* Branch on Integer Condition Codes (Bicc).  */
-      branch_p = 1;
-      offset = 4 * X_DISP22 (insn);
-    }
-  else if (X_OP (insn) == 0 && X_OP2 (insn) == 1)
-    {
-      /* Branch on Integer Condition Codes with Prediction (BPcc).  */
-      branch_p = 1;
-      offset = 4 * X_DISP19 (insn);
-    }
-
-  /* FIXME: Handle DONE and RETRY instructions.  */
-
-  /* FIXME: Handle the Trap instruction.  */
-
-  if (branch_p)
-    {
-      if (conditional_p)
-	{
-	  /* For conditional branches, return nPC + 4 iff the annul
-	     bit is 1.  */
-	  return (X_A (insn) ? *npc + 4 : 0);
-	}
-      else
-	{
-	  /* For unconditional branches, return the target if its
-	     specified condition is "always" and return nPC + 4 if the
-	     condition is "never".  If the annul bit is 1, set *NPC to
-	     zero.  */
-	  if (X_COND (insn) == 0x0)
-	    pc = *npc, offset = 4;
-	  if (X_A (insn))
-	    *npc = 0;
-
-	  gdb_assert (offset != 0);
-	  return pc + offset;
-	}
-    }
-
-  return 0;
-}
 
 void
-sparc_software_single_step (enum target_signal sig, int insert_breakpoints_p)
-{
-  static CORE_ADDR npc, nnpc;
-  static char npc_save[4], nnpc_save[4];
-
-  if (insert_breakpoints_p)
-    {
-      CORE_ADDR pc;
-
-      pc = sparc_address_from_register (SPARC64_PC_REGNUM);
-      npc = sparc_address_from_register (SPARC64_NPC_REGNUM);
-
-      /* Analyze the instruction at PC.  */
-      nnpc = sparc_analyze_control_transfer (pc, &npc);
-      if (npc != 0)
-	target_insert_breakpoint (npc, npc_save);
-      if (nnpc != 0)
-	target_insert_breakpoint (nnpc, nnpc_save);
-
-      /* Assert that we have set at least one breakpoint.  */
-      gdb_assert (npc != 0 || nnpc != 0);
-    }
-  else
-    {
-      if (npc != 0)
-	target_remove_breakpoint (npc, npc_save);
-      if (nnpc != 0)
-	target_remove_breakpoint (nnpc, nnpc_save);
-
-      npc = 0;
-      nnpc = 0;
-    }
-}
-
-
-static struct gdbarch *
-sparc64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+sparc64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
 {
-  struct gdbarch_tdep *tdep;
-  struct gdbarch *gdbarch;
+  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 
-  /* If there is already a candidate, use it.  */
-  arches = gdbarch_list_lookup_by_info (arches, &info);
-  if (arches != NULL)
-    return arches->gdbarch;
-
-  /* Allocate space for the new architecture.  */
-  tdep = XMALLOC (struct gdbarch_tdep);
-  gdbarch = gdbarch_alloc (&info, tdep);
+  tdep->pc_regnum = SPARC64_PC_REGNUM;
+  tdep->npc_regnum = SPARC64_NPC_REGNUM;
 
+  /* This is what all the fuss is about.  */
   set_gdbarch_long_bit (gdbarch, 64);
   set_gdbarch_long_long_bit (gdbarch, 64);
   set_gdbarch_ptr_bit (gdbarch, 64);
-  set_gdbarch_long_double_bit (gdbarch, 128);
 
   set_gdbarch_num_regs (gdbarch, SPARC64_NUM_REGS);
   set_gdbarch_register_name (gdbarch, sparc64_register_name);
@@ -1354,147 +1184,23 @@ sparc64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
   set_gdbarch_pseudo_register_write (gdbarch, sparc64_pseudo_register_write);
 
   /* Register numbers of various important registers.  */
-  set_gdbarch_sp_regnum (gdbarch, SPARC_SP_REGNUM); /* %sp */
   set_gdbarch_pc_regnum (gdbarch, SPARC64_PC_REGNUM); /* %pc */
-  set_gdbarch_deprecated_npc_regnum (gdbarch, SPARC64_NPC_REGNUM);
-  set_gdbarch_fp0_regnum (gdbarch, SPARC_F0_REGNUM); /* %f0 */
 
   /* Call dummy code.  */
+  set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
+  set_gdbarch_push_dummy_code (gdbarch, NULL);
   set_gdbarch_push_dummy_call (gdbarch, sparc64_push_dummy_call);
 
   set_gdbarch_extract_return_value (gdbarch, sparc64_extract_return_value);
   set_gdbarch_store_return_value (gdbarch, sparc64_store_return_value);
-  set_gdbarch_extract_struct_value_address
-    (gdbarch, sparc_extract_struct_value_address);
   set_gdbarch_use_struct_convention (gdbarch, sparc64_use_struct_convention);
+  set_gdbarch_return_value_on_stack
+    (gdbarch, generic_return_value_on_stack_not);
+  set_gdbarch_stabs_argument_has_addr
+    (gdbarch, default_stabs_argument_has_addr);
 
   set_gdbarch_skip_prologue (gdbarch, sparc64_skip_prologue);
 
-  /* Stack grows downward.  */
-  set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
-
-  set_gdbarch_breakpoint_from_pc (gdbarch, sparc_breakpoint_from_pc);
-  set_gdbarch_decr_pc_after_break (gdbarch, 0);
-  set_gdbarch_function_start_offset (gdbarch, 0);
-
-  set_gdbarch_frame_args_skip (gdbarch, 8);
-
-  set_gdbarch_print_insn (gdbarch, print_insn_sparc);
-
-  set_gdbarch_software_single_step (gdbarch, sparc_software_single_step);
-
-  set_gdbarch_unwind_dummy_id (gdbarch, sparc_unwind_dummy_id);
-
-  set_gdbarch_unwind_pc (gdbarch, sparc64_unwind_pc);
-
-  frame_base_set_default (gdbarch, &sparc64_frame_base);
-
-  /* Hook in ABI-specific overrides, if they have been registered.  */
-  gdbarch_init_osabi (info, gdbarch);
-
   frame_unwind_append_sniffer (gdbarch, sparc64_frame_sniffer);
-
-  return gdbarch;
-}
-
-/* Helper functions for dealing with register windows.  */
-
-void
-sparc_supply_rwindow (CORE_ADDR sp, int regnum)
-{
-  int offset = 0;
-  char buf[8];
-  int i;
-
-  if (sp & 1)
-    {
-      /* Registers are 64-bit.  */
-      sp += BIAS;
-
-      for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
-	{
-	  if (regnum == i || regnum == -1)
-	    {
-	      target_read_memory (sp + ((i - SPARC_L0_REGNUM) * 8), buf, 8);
-	      supply_register (i, buf);
-	    }
-	}
-    }
-  else
-    {
-      /* Registers are 32-bit.  Toss any sign-extension of the stack
-	 pointer.  */
-      sp &= 0xffffffffUL;
-
-      /* Clear out the top half of the temporary buffer, and put the
-	 register value in the bottom half if we're in 64-bit mode.  */
-      if (gdbarch_ptr_bit (current_gdbarch) == 64)
-	{
-	  memset (buf, 0, 4);
-	  offset = 4;
-	}
-
-      for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
-	{
-	  if (regnum == i || regnum == -1)
-	    {
-	      target_read_memory (sp + ((i - SPARC_L0_REGNUM) * 4),
-				  buf + offset, 4);
-	      supply_register (i, buf);
-	    }
-	}
-    }
-}
-
-void
-sparc_fill_rwindow (CORE_ADDR sp, int regnum)
-{
-  int offset = 0;
-  char buf[8];
-  int i;
-
-  if (sp & 1)
-    {
-      /* Registers are 64-bit.  */
-      sp += BIAS;
-
-      for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
-	{
-	  if (regnum == -1 || regnum == SPARC_SP_REGNUM || regnum == i)
-	    {
-	      regcache_collect (i, buf);
-	      target_write_memory (sp + ((i - SPARC_L0_REGNUM) * 8), buf, 8);
-	    }
-	}
-    }
-  else
-    {
-      /* Registers are 32-bit.  Toss any sign-extension of the stack
-	 pointer.  */
-      sp &= 0xffffffffUL;
-
-      /* Only use the bottom half if we're in 64-bit mode.  */
-      if (gdbarch_ptr_bit (current_gdbarch) == 64)
-	offset = 4;
-
-      for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
-	{
-	  if (regnum == -1 || regnum == SPARC_SP_REGNUM || regnum == i)
-	    {
-	      regcache_collect (i, buf);
-	      target_write_memory (sp + ((i - SPARC_L0_REGNUM) * 4),
-				   buf + offset, 4);
-	    }
-	}
-    }
-}
-
-
-/* Provide a prototype to silence -Wmissing-prototypes.  */
-void _initialize_sparc64_tdep (void);
-
-void
-_initialize_sparc64_tdep (void)
-{
-  register_gdbarch_init (bfd_arch_sparc, sparc64_gdbarch_init);
+  frame_base_set_default (gdbarch, &sparc64_frame_base);
 }
diff --git a/gdb/sparc64-tdep.h b/gdb/sparc64-tdep.h
index e7b910d55fe..4320a68af3d 100644
--- a/gdb/sparc64-tdep.h
+++ b/gdb/sparc64-tdep.h
@@ -20,78 +20,52 @@
    Boston, MA 02111-1307, USA.  */
 
 #ifndef SPARC64_TDEP_H
-#define SPARC62_TDEP_H 1
+#define SPARC64_TDEP_H 1
 
-/* Register numbers of various important registers.  */
+#include "sparc-tdep.h"
 
-enum sparc_regnum
-{
-  SPARC_G0_REGNUM,		/* %g0 */
-  SPARC_G1_REGNUM,
-  SPARC_G2_REGNUM,
-  SPARC_G3_REGNUM,
-  SPARC_G4_REGNUM,
-  SPARC_G5_REGNUM,
-  SPARC_G6_REGNUM,
-  SPARC_G7_REGNUM,		/* %g7 */
-  SPARC_O0_REGNUM,		/* %o0 */
-  SPARC_O1_REGNUM,
-  SPARC_O2_REGNUM,
-  SPARC_O3_REGNUM,
-  SPARC_O4_REGNUM,
-  SPARC_O5_REGNUM,
-  SPARC_SP_REGNUM,		/* %sp (%o6) */
-  SPARC_O7_REGNUM,		/* %o7 */
-  SPARC_L0_REGNUM,		/* %l0 */
-  SPARC_L1_REGNUM,
-  SPARC_L2_REGNUM,
-  SPARC_L3_REGNUM,
-  SPARC_L4_REGNUM,
-  SPARC_L5_REGNUM,
-  SPARC_L6_REGNUM,
-  SPARC_L7_REGNUM,		/* %l7 */
-  SPARC_I0_REGNUM,		/* %i0 */
-  SPARC_I1_REGNUM,
-  SPARC_I2_REGNUM,
-  SPARC_I3_REGNUM,
-  SPARC_I4_REGNUM,
-  SPARC_I5_REGNUM,
-  SPARC_FP_REGNUM,		/* %fp (%i6) */
-  SPARC_I7_REGNUM,		/* %i7 */
-  SPARC_F0_REGNUM,		/* %f0 */
-  SPARC_F31_REGNUM = SPARC_F0_REGNUM + 31 /* %f31 */
-};
+/* Register numbers of various important registers.  */
 
 enum sparc64_regnum
 {
-  SPARC64_F32_REGNUM = SPARC_F0_REGNUM + 32,	/* %f32 */
-  SPARC64_F62_REGNUM = SPARC64_F32_REGNUM + 15,	/* %f62 */
+  SPARC64_F32_REGNUM		/* %f32 */
+  = SPARC_F0_REGNUM + 32,
+  SPARC64_F62_REGNUM		/* %f62 */
+  = SPARC64_F32_REGNUM + 15,
   SPARC64_PC_REGNUM,		/* %pc */
   SPARC64_NPC_REGNUM,		/* %npc */
   SPARC64_STATE_REGNUM,
   SPARC64_FSR_REGNUM,		/* %fsr */
   SPARC64_FPRS_REGNUM,		/* %fprs */
   SPARC64_Y_REGNUM,		/* %y */
-  
+
   /* Pseudo registers.  */
   SPARC64_CWP_REGNUM,		/* %cwp */
   SPARC64_PSTATE_REGNUM,	/* %pstate */
   SPARC64_ASI_REGNUM,		/* %asi */
   SPARC64_CCR_REGNUM,		/* %ccr */
   SPARC64_D0_REGNUM,		/* %d0 */
-  SPARC64_D10_REGNUM = SPARC64_D0_REGNUM + 5, /* %d10 */
-  SPARC64_D30_REGNUM = SPARC64_D0_REGNUM + 15, /* %d30 */
-  SPARC64_D32_REGNUM = SPARC64_D0_REGNUM + 16, /* %d32 */
-  SPARC64_D62_REGNUM = SPARC64_D0_REGNUM + 31, /* %d62 */
+  SPARC64_D10_REGNUM		/* %d10 */
+  = SPARC64_D0_REGNUM + 5,
+  SPARC64_D30_REGNUM		/* %d30 */
+  = SPARC64_D0_REGNUM + 15,
+  SPARC64_D32_REGNUM		/* %d32 */
+  = SPARC64_D0_REGNUM + 16,
+  SPARC64_D62_REGNUM		/* %d62 */
+  = SPARC64_D0_REGNUM + 31,
   SPARC64_Q0_REGNUM,		/* %q0 */
-  SPARC64_Q8_REGNUM = SPARC64_Q0_REGNUM + 2, /* %q8 */
-  SPARC64_Q28_REGNUM = SPARC64_Q0_REGNUM + 7, /* %q28 */
-  SPARC64_Q32_REGNUM = SPARC64_Q0_REGNUM + 8, /* %q32 */
-  SPARC64_Q60_REGNUM = SPARC64_Q0_REGNUM + 15 /* %q60 */
+  SPARC64_Q8_REGNUM		/* %q8 */
+  = SPARC64_Q0_REGNUM + 2,
+  SPARC64_Q28_REGNUM		/* %q28 */
+  = SPARC64_Q0_REGNUM + 7,
+  SPARC64_Q32_REGNUM		/* %q32 */
+  = SPARC64_Q0_REGNUM + 8,
+  SPARC64_Q60_REGNUM		/* %q60 */
+  = SPARC64_Q0_REGNUM + 15
 };
 
-extern void sparc_supply_rwindow (CORE_ADDR sp, int regnum);
-extern void sparc_fill_rwindow (CORE_ADDR sp, int regnum);
+extern void sparc64_init_abi (struct gdbarch_info info,
+			      struct gdbarch *gdbarch);
 
 /* Functions exported from sparc64fbsd-tdep.c.  */
 
diff --git a/gdb/sparc64fbsd-tdep.c b/gdb/sparc64fbsd-tdep.c
index 2b910c1b33d..cf419826d3a 100644
--- a/gdb/sparc64fbsd-tdep.c
+++ b/gdb/sparc64fbsd-tdep.c
@@ -93,7 +93,7 @@ sparc64fbsd_supply_reg (const char *regs, int regnum)
       ULONGEST sp;
 
       regcache_cooked_read_unsigned (current_regcache, SPARC_SP_REGNUM, &sp);
-      sparc_supply_rwindow (sp, regnum);
+      sparc_supply_rwindow (current_regcache, sp, regnum);
     }
 }
 
@@ -221,7 +221,7 @@ static struct core_fns sparc64fbsd_core_fns =
 static void
 sparc64fbsd_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
 {
-  /* Nothing yet.  */
+  sparc64_init_abi (info, gdbarch);
 }
 
 /* Provide a prototype to silence -Wmissing-prototypes.  */
diff --git a/gdb/sparcbsd-nat.c b/gdb/sparcbsd-nat.c
index 8ab95375d08..a1ada8261b9 100644
--- a/gdb/sparcbsd-nat.c
+++ b/gdb/sparcbsd-nat.c
@@ -99,7 +99,7 @@ store_inferior_registers (int regnum)
 
 	  regcache_cooked_read_unsigned (current_regcache,
 					 SPARC_SP_REGNUM, &sp);
-	  sparc_fill_rwindow (sp, regnum);
+	  sparc_collect_rwindow (current_regcache, sp, regnum);
 	}
 
       if (regnum != -1)