binutils/sid-snapshot-20080801

2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>

	* dwarf.c (dwarf_regnames_i386): Remove AVX registers.
	(dwarf_regnames_x86_64): Likewise.

gas/testsuite/

2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/cfi/cfi-i386.s: Remove tests for AVX register maps.
	* gas/cfi/cfi-x86_64.s: Likewise.

	* gas/cfi/cfi-i386.d: Updated.
	* gas/cfi/cfi-x86_64.d: Likewise.

opcodes/

2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-reg.tbl: Use Dw2Inval on AVX registers.
	* i386-tbl.h: Regenerated.

10 files changed, 810 insertions, 42 deletions

diff --git a/binutils/ChangeLog b/binutils/ChangeLog
index d4e71ae3e52..fd4ac1362c4 100644
--- a/binutils/ChangeLog
+++ b/binutils/ChangeLog
@@ -1,3 +1,8 @@
+2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* dwarf.c (dwarf_regnames_i386): Remove AVX registers.
+	(dwarf_regnames_x86_64): Likewise.
+
 2008-07-30  Alan Modra  <amodra@bigpond.net.au>
 
 	* dlltool.c, dwarf.c, objdump.c, readelf.c, resrc.c, resres.c,
diff --git a/binutils/dwarf.c b/binutils/dwarf.c
index 26ab941eceb..3a5ef0ff3e9 100644
--- a/binutils/dwarf.c
+++ b/binutils/dwarf.c
@@ -3616,10 +3616,7 @@ static const char *const dwarf_regnames_i386[] =
   "mm4", "mm5", "mm6", "mm7",
   "fcw", "fsw", "mxcsr",
   "es", "cs", "ss", "ds", "fs", "gs", NULL, NULL,
-  "tr", "ldtr",
-  NULL, NULL, NULL,
-  "ymm0", "ymm1", "ymm2", "ymm3",
-  "ymm4", "ymm5", "ymm6", "ymm7"
+  "tr", "ldtr"
 };
 
 static const char *const dwarf_regnames_x86_64[] =
@@ -3641,12 +3638,7 @@ static const char *const dwarf_regnames_x86_64[] =
   "es", "cs", "ss", "ds", "fs", "gs", NULL, NULL,
   "fs.base", "gs.base", NULL, NULL,
   "tr", "ldtr",
-  "mxcsr", "fcw", "fsw",
-  NULL, NULL, NULL,
-  "ymm0", "ymm1", "ymm2", "ymm3",
-  "ymm4", "ymm5", "ymm6", "ymm7",
-  "ymm8", "ymm9", "ymm10", "ymm11",
-  "ymm12", "ymm13", "ymm14", "ymm15"
+  "mxcsr", "fcw", "fsw"
 };
 
 static const char *const *dwarf_regnames;
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 7c433707e5e..1ea3df5f79f 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/cfi/cfi-i386.s: Remove tests for AVX register maps.
+	* gas/cfi/cfi-x86_64.s: Likewise.
+
+	* gas/cfi/cfi-i386.d: Updated.
+	* gas/cfi/cfi-x86_64.d: Likewise.
+
 2008-07-31  Peter Bergner  <bergner@vnet.ibm.com>
 
 	* gas/ppc/cell.s: Add altivec instructions.
diff --git a/gas/testsuite/gas/cfi/cfi-i386.d b/gas/testsuite/gas/cfi/cfi-i386.d
new file mode 100644
index 00000000000..ef477d32be5
--- /dev/null
+++ b/gas/testsuite/gas/cfi/cfi-i386.d
@@ -0,0 +1,152 @@
+#readelf: -wf
+#name: CFI on i386
+The section .eh_frame contains:
+
+00000000 00000014 00000000 CIE
+  Version:               1
+  Augmentation:          "zR"
+  Code alignment factor: 1
+  Data alignment factor: -4
+  Return address column: 8
+  Augmentation data:     1b
+
+  DW_CFA_def_cfa: r4 \(esp\) ofs 4
+  DW_CFA_offset: r8 \(eip\) at cfa-4
+  DW_CFA_nop
+  DW_CFA_nop
+
+00000018 00000014 0000001c FDE cie=00000000 pc=00000000..00000012
+  DW_CFA_advance_loc: 6 to 00000006
+  DW_CFA_def_cfa_offset: 4664
+  DW_CFA_advance_loc: 11 to 00000011
+  DW_CFA_def_cfa_offset: 4
+
+00000030 00000018 00000034 FDE cie=00000000 pc=00000012..0000001f
+  DW_CFA_advance_loc: 1 to 00000013
+  DW_CFA_def_cfa_offset: 8
+  DW_CFA_offset: r5 \(ebp\) at cfa-8
+  DW_CFA_advance_loc: 2 to 00000015
+  DW_CFA_def_cfa_register: r5 \(ebp\)
+  DW_CFA_advance_loc: 9 to 0000001e
+  DW_CFA_def_cfa_register: r4 \(esp\)
+
+0000004c 00000014 00000050 FDE cie=00000000 pc=0000001f..0000002f
+  DW_CFA_advance_loc: 2 to 00000021
+  DW_CFA_def_cfa_register: r3 \(ebx\)
+  DW_CFA_advance_loc: 13 to 0000002e
+  DW_CFA_def_cfa: r4 \(esp\) ofs 4
+
+00000064 00000010 00000068 FDE cie=00000000 pc=0000002f..00000035
+  DW_CFA_nop
+  DW_CFA_nop
+  DW_CFA_nop
+
+00000078 00000010 0000007c FDE cie=00000000 pc=00000035..00000044
+  DW_CFA_nop
+  DW_CFA_nop
+  DW_CFA_nop
+
+0000008c 00000010 00000000 CIE
+  Version:               1
+  Augmentation:          "zR"
+  Code alignment factor: 1
+  Data alignment factor: -4
+  Return address column: 8
+  Augmentation data:     1b
+
+  DW_CFA_undefined: r8 \(eip\)
+  DW_CFA_nop
+
+000000a0 00000094 00000018 FDE cie=0000008c pc=00000044..00000071
+  DW_CFA_advance_loc: 1 to 00000045
+  DW_CFA_undefined: r0 \(eax\)
+  DW_CFA_advance_loc: 1 to 00000046
+  DW_CFA_undefined: r1 \(ecx\)
+  DW_CFA_advance_loc: 1 to 00000047
+  DW_CFA_undefined: r2 \(edx\)
+  DW_CFA_advance_loc: 1 to 00000048
+  DW_CFA_undefined: r3 \(ebx\)
+  DW_CFA_advance_loc: 1 to 00000049
+  DW_CFA_undefined: r4 \(esp\)
+  DW_CFA_advance_loc: 1 to 0000004a
+  DW_CFA_undefined: r5 \(ebp\)
+  DW_CFA_advance_loc: 1 to 0000004b
+  DW_CFA_undefined: r6 \(esi\)
+  DW_CFA_advance_loc: 1 to 0000004c
+  DW_CFA_undefined: r7 \(edi\)
+  DW_CFA_advance_loc: 1 to 0000004d
+  DW_CFA_undefined: r9 \(eflags\)
+  DW_CFA_advance_loc: 1 to 0000004e
+  DW_CFA_undefined: r40 \(es\)
+  DW_CFA_advance_loc: 1 to 0000004f
+  DW_CFA_undefined: r41 \(cs\)
+  DW_CFA_advance_loc: 1 to 00000050
+  DW_CFA_undefined: r43 \(ds\)
+  DW_CFA_advance_loc: 1 to 00000051
+  DW_CFA_undefined: r42 \(ss\)
+  DW_CFA_advance_loc: 1 to 00000052
+  DW_CFA_undefined: r44 \(fs\)
+  DW_CFA_advance_loc: 1 to 00000053
+  DW_CFA_undefined: r45 \(gs\)
+  DW_CFA_advance_loc: 1 to 00000054
+  DW_CFA_undefined: r48 \(tr\)
+  DW_CFA_advance_loc: 1 to 00000055
+  DW_CFA_undefined: r49 \(ldtr\)
+  DW_CFA_advance_loc: 1 to 00000056
+  DW_CFA_undefined: r39 \(mxcsr\)
+  DW_CFA_advance_loc: 1 to 00000057
+  DW_CFA_undefined: r21 \(xmm0\)
+  DW_CFA_advance_loc: 1 to 00000058
+  DW_CFA_undefined: r22 \(xmm1\)
+  DW_CFA_advance_loc: 1 to 00000059
+  DW_CFA_undefined: r23 \(xmm2\)
+  DW_CFA_advance_loc: 1 to 0000005a
+  DW_CFA_undefined: r24 \(xmm3\)
+  DW_CFA_advance_loc: 1 to 0000005b
+  DW_CFA_undefined: r25 \(xmm4\)
+  DW_CFA_advance_loc: 1 to 0000005c
+  DW_CFA_undefined: r26 \(xmm5\)
+  DW_CFA_advance_loc: 1 to 0000005d
+  DW_CFA_undefined: r27 \(xmm6\)
+  DW_CFA_advance_loc: 1 to 0000005e
+  DW_CFA_undefined: r28 \(xmm7\)
+  DW_CFA_advance_loc: 1 to 0000005f
+  DW_CFA_undefined: r37 \(fcw\)
+  DW_CFA_advance_loc: 1 to 00000060
+  DW_CFA_undefined: r38 \(fsw\)
+  DW_CFA_advance_loc: 1 to 00000061
+  DW_CFA_undefined: r11 \(st\(?0?\)?\)
+  DW_CFA_advance_loc: 1 to 00000062
+  DW_CFA_undefined: r12 \(st\(?1\)?\)
+  DW_CFA_advance_loc: 1 to 00000063
+  DW_CFA_undefined: r13 \(st\(?2\)?\)
+  DW_CFA_advance_loc: 1 to 00000064
+  DW_CFA_undefined: r14 \(st\(?3\)?\)
+  DW_CFA_advance_loc: 1 to 00000065
+  DW_CFA_undefined: r15 \(st\(?4\)?\)
+  DW_CFA_advance_loc: 1 to 00000066
+  DW_CFA_undefined: r16 \(st\(?5\)?\)
+  DW_CFA_advance_loc: 1 to 00000067
+  DW_CFA_undefined: r17 \(st\(?6\)?\)
+  DW_CFA_advance_loc: 1 to 00000068
+  DW_CFA_undefined: r18 \(st\(?7\)?\)
+  DW_CFA_advance_loc: 1 to 00000069
+  DW_CFA_undefined: r29 \(mm0\)
+  DW_CFA_advance_loc: 1 to 0000006a
+  DW_CFA_undefined: r30 \(mm1\)
+  DW_CFA_advance_loc: 1 to 0000006b
+  DW_CFA_undefined: r31 \(mm2\)
+  DW_CFA_advance_loc: 1 to 0000006c
+  DW_CFA_undefined: r32 \(mm3\)
+  DW_CFA_advance_loc: 1 to 0000006d
+  DW_CFA_undefined: r33 \(mm4\)
+  DW_CFA_advance_loc: 1 to 0000006e
+  DW_CFA_undefined: r34 \(mm5\)
+  DW_CFA_advance_loc: 1 to 0000006f
+  DW_CFA_undefined: r35 \(mm6\)
+  DW_CFA_advance_loc: 1 to 00000070
+  DW_CFA_undefined: r36 \(mm7\)
+  DW_CFA_nop
+  DW_CFA_nop
+  DW_CFA_nop
+
diff --git a/gas/testsuite/gas/cfi/cfi-i386.s b/gas/testsuite/gas/cfi/cfi-i386.s
new file mode 100644
index 00000000000..9da0db122db
--- /dev/null
+++ b/gas/testsuite/gas/cfi/cfi-i386.s
@@ -0,0 +1,165 @@
+	.text
+
+#; func_locvars
+#; - function with a space on the stack 
+#;   allocated for local variables
+
+	.type	func_locvars,@function
+func_locvars:
+	.cfi_startproc
+	
+	#; alocate space for local vars
+	sub	$0x1234,%esp
+	.cfi_adjust_cfa_offset	0x1234
+	
+	#; dummy body
+	movl	$1,%eax
+	
+	#; release space of local vars and return
+	add	$0x1234,%esp
+	.cfi_adjust_cfa_offset	-0x1234
+	ret
+	.cfi_endproc
+
+#; func_prologue
+#; - functions that begins with standard
+#;   prologue: "pushq %rbp; movq %rsp,%rbp"
+
+	.type	func_prologue,@function
+func_prologue:
+	.cfi_startproc
+	
+	#; prologue, CFI is valid after 
+	#; each instruction.
+	pushl	%ebp
+	.cfi_def_cfa_offset	8
+	.cfi_offset		ebp,-8
+	movl	%esp, %ebp
+	.cfi_def_cfa_register	ebp
+
+	#; function body
+	call	func_locvars
+	addl	$3, %eax
+
+	#; epilogue with valid CFI
+	#; (we're better than gcc :-)
+	leave
+	.cfi_def_cfa_register	esp
+	ret
+	.cfi_endproc
+
+#; func_otherreg
+#; - function that moves frame pointer to 
+#;   another register (ebx) and then allocates 
+#;   a space for local variables
+
+	.type	func_otherreg,@function
+func_otherreg:
+	.cfi_startproc
+
+	#; save frame pointer to ebx
+	mov	%esp,%ebx
+	.cfi_def_cfa_register	ebx
+
+	#; alocate space for local vars
+	#;  (no .cfi_{def,adjust}_cfa_offset here,
+	#;   because CFA is computed from ebx!)
+	sub	$100,%esp
+
+	#; function body
+	call	func_prologue
+	add	$2, %eax
+	
+	#; restore frame pointer from ebx
+	mov	%ebx,%esp
+	.cfi_def_cfa		esp,4
+	ret
+	.cfi_endproc
+
+#; main
+#; - typical function
+	.type	main,@function
+main:
+	.cfi_startproc
+	
+	#; only function body that doesn't
+	#; touch the stack at all.
+	call	func_otherreg
+	
+	#; return
+	ret
+	.cfi_endproc
+
+#; _start
+#; - standard entry point
+
+	.type	_start,@function
+	.globl	_start
+_start:
+	.cfi_startproc
+	call	main
+	movl	%eax,%edi
+	movl	$0x1,%eax
+	int	$0x80
+	hlt
+	.cfi_endproc
+
+#; func_all_registers
+#; - test for all .cfi register numbers. 
+#;   This function is never called and the CFI info doesn't make sense.
+
+	.type	func_all_registers,@function
+func_all_registers:
+	.cfi_startproc simple
+
+	.cfi_undefined eip	; nop
+	.cfi_undefined eax	; nop
+	.cfi_undefined ecx	; nop
+	.cfi_undefined edx	; nop
+	.cfi_undefined ebx	; nop
+	.cfi_undefined esp	; nop
+	.cfi_undefined ebp	; nop
+	.cfi_undefined esi	; nop
+	.cfi_undefined edi	; nop
+	.cfi_undefined eflags	; nop
+
+	.cfi_undefined es	; nop
+	.cfi_undefined cs	; nop
+	.cfi_undefined ds	; nop
+	.cfi_undefined ss	; nop
+	.cfi_undefined fs	; nop
+	.cfi_undefined gs	; nop
+	.cfi_undefined tr	; nop
+	.cfi_undefined ldtr	; nop
+
+	.cfi_undefined mxcsr	; nop
+	.cfi_undefined xmm0	; nop
+	.cfi_undefined xmm1	; nop
+	.cfi_undefined xmm2	; nop
+	.cfi_undefined xmm3	; nop
+	.cfi_undefined xmm4	; nop
+	.cfi_undefined xmm5	; nop
+	.cfi_undefined xmm6	; nop
+	.cfi_undefined xmm7	; nop
+
+	.cfi_undefined fcw	; nop
+	.cfi_undefined fsw	; nop
+	.cfi_undefined st	; nop
+	.cfi_undefined st(1)	; nop
+	.cfi_undefined st(2)	; nop
+	.cfi_undefined st(3)	; nop
+	.cfi_undefined st(4)	; nop
+	.cfi_undefined st(5)	; nop
+	.cfi_undefined st(6)	; nop
+	.cfi_undefined st(7)	; nop
+
+	.cfi_undefined mm0	; nop
+	.cfi_undefined mm1	; nop
+	.cfi_undefined mm2	; nop
+	.cfi_undefined mm3	; nop
+	.cfi_undefined mm4	; nop
+	.cfi_undefined mm5	; nop
+	.cfi_undefined mm6	; nop
+	.cfi_undefined mm7	; nop
+
+	.cfi_endproc
diff --git a/gas/testsuite/gas/cfi/cfi-x86_64.d b/gas/testsuite/gas/cfi/cfi-x86_64.d
new file mode 100644
index 00000000000..3fc7d530f84
--- /dev/null
+++ b/gas/testsuite/gas/cfi/cfi-x86_64.d
@@ -0,0 +1,227 @@
+#readelf: -wf
+#name: CFI on x86-64
+The section .eh_frame contains:
+
+00000000 00000014 00000000 CIE
+  Version:               1
+  Augmentation:          "zR"
+  Code alignment factor: 1
+  Data alignment factor: -8
+  Return address column: 16
+  Augmentation data:     1b
+
+  DW_CFA_def_cfa: r7 \(rsp\) ofs 8
+  DW_CFA_offset: r16 \(rip\) at cfa-8
+  DW_CFA_nop
+  DW_CFA_nop
+
+00000018 00000014 0000001c FDE cie=00000000 pc=00000000..00000014
+  DW_CFA_advance_loc: 7 to 00000007
+  DW_CFA_def_cfa_offset: 4668
+  DW_CFA_advance_loc: 12 to 00000013
+  DW_CFA_def_cfa_offset: 8
+
+00000030 0000001c 00000034 FDE cie=00000000 pc=00000014..00000022
+  DW_CFA_advance_loc: 1 to 00000015
+  DW_CFA_def_cfa_offset: 16
+  DW_CFA_offset: r6 \(rbp\) at cfa-16
+  DW_CFA_advance_loc: 3 to 00000018
+  DW_CFA_def_cfa_register: r6 \(rbp\)
+  DW_CFA_advance_loc: 9 to 00000021
+  DW_CFA_def_cfa: r7 \(rsp\) ofs 8
+  DW_CFA_nop
+  DW_CFA_nop
+  DW_CFA_nop
+
+00000050 00000014 00000054 FDE cie=00000000 pc=00000022..00000035
+  DW_CFA_advance_loc: 3 to 00000025
+  DW_CFA_def_cfa_register: r8 \(r8\)
+  DW_CFA_advance_loc: 15 to 00000034
+  DW_CFA_def_cfa_register: r7 \(rsp\)
+  DW_CFA_nop
+
+00000068 00000010 0000006c FDE cie=00000000 pc=00000035..0000003b
+  DW_CFA_nop
+  DW_CFA_nop
+  DW_CFA_nop
+
+0000007c 00000010 00000080 FDE cie=00000000 pc=0000003b..0000004d
+  DW_CFA_nop
+  DW_CFA_nop
+  DW_CFA_nop
+
+00000090 00000010 00000000 CIE
+  Version:               1
+  Augmentation:          "zR"
+  Code alignment factor: 1
+  Data alignment factor: -8
+  Return address column: 16
+  Augmentation data:     1b
+
+  DW_CFA_def_cfa: r7 \(rsp\) ofs 8
+
+000000a4 0000002c 00000018 FDE cie=00000090 pc=0000004d..00000058
+  DW_CFA_advance_loc: 1 to 0000004e
+  DW_CFA_def_cfa_offset: 16
+  DW_CFA_advance_loc: 1 to 0000004f
+  DW_CFA_def_cfa_register: r8 \(r8\)
+  DW_CFA_advance_loc: 1 to 00000050
+  DW_CFA_def_cfa_offset: 4676
+  DW_CFA_advance_loc: 1 to 00000051
+  DW_CFA_offset_extended_sf: r4 \(rsi\) at cfa\+16
+  DW_CFA_advance_loc: 1 to 00000052
+  DW_CFA_register: r8 \(r8\) in r9 \(r9\)
+  DW_CFA_advance_loc: 1 to 00000053
+  DW_CFA_remember_state
+  DW_CFA_advance_loc: 1 to 00000054
+  DW_CFA_restore: r6 \(rbp\)
+  DW_CFA_advance_loc: 1 to 00000055
+  DW_CFA_undefined: r16 \(rip\)
+  DW_CFA_advance_loc: 1 to 00000056
+  DW_CFA_same_value: r3 \(rbx\)
+  DW_CFA_advance_loc: 1 to 00000057
+  DW_CFA_restore_state
+  DW_CFA_nop
+
+000000d4 00000010 00000000 CIE
+  Version:               1
+  Augmentation:          "zR"
+  Code alignment factor: 1
+  Data alignment factor: -8
+  Return address column: 16
+  Augmentation data:     1b
+
+  DW_CFA_undefined: r16 \(rip\)
+  DW_CFA_nop
+
+000000e8 000000cc 00000018 FDE cie=000000d4 pc=00000058..00000097
+  DW_CFA_advance_loc: 1 to 00000059
+  DW_CFA_undefined: r0 \(rax\)
+  DW_CFA_advance_loc: 1 to 0000005a
+  DW_CFA_undefined: r2 \(rcx\)
+  DW_CFA_advance_loc: 1 to 0000005b
+  DW_CFA_undefined: r1 \(rdx\)
+  DW_CFA_advance_loc: 1 to 0000005c
+  DW_CFA_undefined: r3 \(rbx\)
+  DW_CFA_advance_loc: 1 to 0000005d
+  DW_CFA_undefined: r7 \(rsp\)
+  DW_CFA_advance_loc: 1 to 0000005e
+  DW_CFA_undefined: r6 \(rbp\)
+  DW_CFA_advance_loc: 1 to 0000005f
+  DW_CFA_undefined: r4 \(rsi\)
+  DW_CFA_advance_loc: 1 to 00000060
+  DW_CFA_undefined: r5 \(rdi\)
+  DW_CFA_advance_loc: 1 to 00000061
+  DW_CFA_undefined: r8 \(r8\)
+  DW_CFA_advance_loc: 1 to 00000062
+  DW_CFA_undefined: r9 \(r9\)
+  DW_CFA_advance_loc: 1 to 00000063
+  DW_CFA_undefined: r10 \(r10\)
+  DW_CFA_advance_loc: 1 to 00000064
+  DW_CFA_undefined: r11 \(r11\)
+  DW_CFA_advance_loc: 1 to 00000065
+  DW_CFA_undefined: r12 \(r12\)
+  DW_CFA_advance_loc: 1 to 00000066
+  DW_CFA_undefined: r13 \(r13\)
+  DW_CFA_advance_loc: 1 to 00000067
+  DW_CFA_undefined: r14 \(r14\)
+  DW_CFA_advance_loc: 1 to 00000068
+  DW_CFA_undefined: r15 \(r15\)
+  DW_CFA_advance_loc: 1 to 00000069
+  DW_CFA_undefined: r49 \([er]flags\)
+  DW_CFA_advance_loc: 1 to 0000006a
+  DW_CFA_undefined: r50 \(es\)
+  DW_CFA_advance_loc: 1 to 0000006b
+  DW_CFA_undefined: r51 \(cs\)
+  DW_CFA_advance_loc: 1 to 0000006c
+  DW_CFA_undefined: r53 \(ds\)
+  DW_CFA_advance_loc: 1 to 0000006d
+  DW_CFA_undefined: r52 \(ss\)
+  DW_CFA_advance_loc: 1 to 0000006e
+  DW_CFA_undefined: r54 \(fs\)
+  DW_CFA_advance_loc: 1 to 0000006f
+  DW_CFA_undefined: r55 \(gs\)
+  DW_CFA_advance_loc: 1 to 00000070
+  DW_CFA_undefined: r62 \(tr\)
+  DW_CFA_advance_loc: 1 to 00000071
+  DW_CFA_undefined: r63 \(ldtr\)
+  DW_CFA_advance_loc: 1 to 00000072
+  DW_CFA_undefined: r58 \(fs\.base\)
+  DW_CFA_advance_loc: 1 to 00000073
+  DW_CFA_undefined: r59 \(gs\.base\)
+  DW_CFA_advance_loc: 1 to 00000074
+  DW_CFA_undefined: r64 \(mxcsr\)
+  DW_CFA_advance_loc: 1 to 00000075
+  DW_CFA_undefined: r17 \(xmm0\)
+  DW_CFA_advance_loc: 1 to 00000076
+  DW_CFA_undefined: r18 \(xmm1\)
+  DW_CFA_advance_loc: 1 to 00000077
+  DW_CFA_undefined: r19 \(xmm2\)
+  DW_CFA_advance_loc: 1 to 00000078
+  DW_CFA_undefined: r20 \(xmm3\)
+  DW_CFA_advance_loc: 1 to 00000079
+  DW_CFA_undefined: r21 \(xmm4\)
+  DW_CFA_advance_loc: 1 to 0000007a
+  DW_CFA_undefined: r22 \(xmm5\)
+  DW_CFA_advance_loc: 1 to 0000007b
+  DW_CFA_undefined: r23 \(xmm6\)
+  DW_CFA_advance_loc: 1 to 0000007c
+  DW_CFA_undefined: r24 \(xmm7\)
+  DW_CFA_advance_loc: 1 to 0000007d
+  DW_CFA_undefined: r25 \(xmm8\)
+  DW_CFA_advance_loc: 1 to 0000007e
+  DW_CFA_undefined: r26 \(xmm9\)
+  DW_CFA_advance_loc: 1 to 0000007f
+  DW_CFA_undefined: r27 \(xmm10\)
+  DW_CFA_advance_loc: 1 to 00000080
+  DW_CFA_undefined: r28 \(xmm11\)
+  DW_CFA_advance_loc: 1 to 00000081
+  DW_CFA_undefined: r29 \(xmm12\)
+  DW_CFA_advance_loc: 1 to 00000082
+  DW_CFA_undefined: r30 \(xmm13\)
+  DW_CFA_advance_loc: 1 to 00000083
+  DW_CFA_undefined: r31 \(xmm14\)
+  DW_CFA_advance_loc: 1 to 00000084
+  DW_CFA_undefined: r32 \(xmm15\)
+  DW_CFA_advance_loc: 1 to 00000085
+  DW_CFA_undefined: r65 \(fcw\)
+  DW_CFA_advance_loc: 1 to 00000086
+  DW_CFA_undefined: r66 \(fsw\)
+  DW_CFA_advance_loc: 1 to 00000087
+  DW_CFA_undefined: r33 \(st\(?0?\)?\)
+  DW_CFA_advance_loc: 1 to 00000088
+  DW_CFA_undefined: r34 \(st\(?1\)?\)
+  DW_CFA_advance_loc: 1 to 00000089
+  DW_CFA_undefined: r35 \(st\(?2\)?\)
+  DW_CFA_advance_loc: 1 to 0000008a
+  DW_CFA_undefined: r36 \(st\(?3\)?\)
+  DW_CFA_advance_loc: 1 to 0000008b
+  DW_CFA_undefined: r37 \(st\(?4\)?\)
+  DW_CFA_advance_loc: 1 to 0000008c
+  DW_CFA_undefined: r38 \(st\(?5\)?\)
+  DW_CFA_advance_loc: 1 to 0000008d
+  DW_CFA_undefined: r39 \(st\(?6\)?\)
+  DW_CFA_advance_loc: 1 to 0000008e
+  DW_CFA_undefined: r40 \(st\(?7\)?\)
+  DW_CFA_advance_loc: 1 to 0000008f
+  DW_CFA_undefined: r41 \(mm0\)
+  DW_CFA_advance_loc: 1 to 00000090
+  DW_CFA_undefined: r42 \(mm1\)
+  DW_CFA_advance_loc: 1 to 00000091
+  DW_CFA_undefined: r43 \(mm2\)
+  DW_CFA_advance_loc: 1 to 00000092
+  DW_CFA_undefined: r44 \(mm3\)
+  DW_CFA_advance_loc: 1 to 00000093
+  DW_CFA_undefined: r45 \(mm4\)
+  DW_CFA_advance_loc: 1 to 00000094
+  DW_CFA_undefined: r46 \(mm5\)
+  DW_CFA_advance_loc: 1 to 00000095
+  DW_CFA_undefined: r47 \(mm6\)
+  DW_CFA_advance_loc: 1 to 00000096
+  DW_CFA_undefined: r48 \(mm7\)
+  DW_CFA_nop
+  DW_CFA_nop
+  DW_CFA_nop
+  DW_CFA_nop
+  DW_CFA_nop
+
diff --git a/gas/testsuite/gas/cfi/cfi-x86_64.s b/gas/testsuite/gas/cfi/cfi-x86_64.s
new file mode 100644
index 00000000000..65c2aa27595
--- /dev/null
+++ b/gas/testsuite/gas/cfi/cfi-x86_64.s
@@ -0,0 +1,214 @@
+	.text
+
+#; func_locvars
+#; - function with a space on the stack 
+#;   allocated for local variables
+
+	.type	func_locvars,@function
+func_locvars:
+	.cfi_startproc
+	
+	#; alocate space for local vars
+	sub	$0x1234,%rsp
+	.cfi_adjust_cfa_offset	0x1234
+	
+	#; dummy body
+	movl	$1,%eax
+	
+	#; release space of local vars and return
+	add	$0x1234,%rsp
+	.cfi_adjust_cfa_offset	-0x1234
+	ret
+	.cfi_endproc
+
+#; func_prologue
+#; - functions that begins with standard
+#;   prologue: "pushq %rbp; movq %rsp,%rbp"
+
+	.type	func_prologue,@function
+func_prologue:
+	.cfi_startproc
+	
+	#; prologue, CFI is valid after 
+	#; each instruction.
+	pushq	%rbp
+	.cfi_def_cfa_offset	16
+	.cfi_offset		%rbp, -16
+	movq	%rsp, %rbp
+	.cfi_def_cfa_register	%rbp
+
+	#; function body
+	call	func_locvars
+	addl	$3, %eax
+
+	#; epilogue with valid CFI
+	#; (we're better than gcc :-)
+	leaveq
+	.cfi_def_cfa		%rsp, 8
+	ret
+	.cfi_endproc
+
+#; func_otherreg
+#; - function that moves frame pointer to 
+#;   another register (r12) and then allocates 
+#;   a space for local variables
+
+	.type	func_otherreg,@function
+func_otherreg:
+	.cfi_startproc
+
+	#; save frame pointer to r8
+	movq	%rsp,%r8
+	.cfi_def_cfa_register	r8
+
+	#; alocate space for local vars
+	#;  (no .cfi_{def,adjust}_cfa_offset here,
+	#;   because CFA is computed from r8!)
+	sub	$100,%rsp
+
+	#; function body
+	call	func_prologue
+	addl	$2, %eax
+	
+	#; restore frame pointer from r8
+	movq	%r8,%rsp
+	.cfi_def_cfa_register	rsp
+	ret
+	.cfi_endproc
+
+#; main
+#; - typical function
+	.type	main,@function
+main:
+	.cfi_startproc
+	
+	#; only function body that doesn't
+	#; touch the stack at all.
+	call	func_otherreg
+	
+	#; return
+	ret
+	.cfi_endproc
+
+#; _start
+#; - standard entry point
+
+	.type	_start,@function
+	.globl	_start
+_start:
+	.cfi_startproc
+	call	main
+	movq	%rax,%rdi
+	movq	$0x3c,%rax
+	syscall
+	hlt
+	.cfi_endproc
+
+#; func_alldirectives
+#; - test for all .cfi directives. 
+#;   This function is never called and the CFI info doesn't make sense.
+
+	.type	func_alldirectives,@function
+func_alldirectives:
+	.cfi_startproc simple
+	.cfi_def_cfa	rsp,8
+	nop
+	.cfi_def_cfa_offset	16
+	nop
+	.cfi_def_cfa_register	r8
+	nop
+	.cfi_adjust_cfa_offset	0x1234
+	nop
+	.cfi_offset	%rsi, 0x10
+	nop
+	.cfi_register	%r8, %r9
+	nop
+	.cfi_remember_state
+	nop
+	.cfi_restore %rbp
+	nop
+	.cfi_undefined %rip
+	nop
+	.cfi_same_value rbx
+	nop
+	.cfi_restore_state
+	ret
+	.cfi_endproc
+
+#; func_all_registers
+#; - test for all .cfi register numbers. 
+#;   This function is never called and the CFI info doesn't make sense.
+
+	.type	func_all_registers,@function
+func_all_registers:
+	.cfi_startproc simple
+
+	.cfi_undefined rip	; nop
+	.cfi_undefined rax	; nop
+	.cfi_undefined rcx	; nop
+	.cfi_undefined rdx	; nop
+	.cfi_undefined rbx	; nop
+	.cfi_undefined rsp	; nop
+	.cfi_undefined rbp	; nop
+	.cfi_undefined rsi	; nop
+	.cfi_undefined rdi	; nop
+	.cfi_undefined r8	; nop
+	.cfi_undefined r9	; nop
+	.cfi_undefined r10	; nop
+	.cfi_undefined r11	; nop
+	.cfi_undefined r12	; nop
+	.cfi_undefined r13	; nop
+	.cfi_undefined r14	; nop
+	.cfi_undefined r15	; nop
+	.cfi_undefined rflags	; nop
+
+	.cfi_undefined es	; nop
+	.cfi_undefined cs	; nop
+	.cfi_undefined ds	; nop
+	.cfi_undefined ss	; nop
+	.cfi_undefined fs	; nop
+	.cfi_undefined gs	; nop
+	.cfi_undefined tr	; nop
+	.cfi_undefined ldtr	; nop
+	.cfi_undefined fs.base	; nop
+	.cfi_undefined gs.base	; nop
+
+	.cfi_undefined mxcsr	; nop
+	.cfi_undefined xmm0	; nop
+	.cfi_undefined xmm1	; nop
+	.cfi_undefined xmm2	; nop
+	.cfi_undefined xmm3	; nop
+	.cfi_undefined xmm4	; nop
+	.cfi_undefined xmm5	; nop
+	.cfi_undefined xmm6	; nop
+	.cfi_undefined xmm7	; nop
+	.cfi_undefined xmm8	; nop
+	.cfi_undefined xmm9	; nop
+	.cfi_undefined xmm10	; nop
+	.cfi_undefined xmm11	; nop
+	.cfi_undefined xmm12	; nop
+	.cfi_undefined xmm13	; nop
+	.cfi_undefined xmm14	; nop
+	.cfi_undefined xmm15	; nop
+
+	.cfi_undefined fcw	; nop
+	.cfi_undefined fsw	; nop
+	.cfi_undefined st	; nop
+	.cfi_undefined st(1)	; nop
+	.cfi_undefined st(2)	; nop
+	.cfi_undefined st(3)	; nop
+	.cfi_undefined st(4)	; nop
+	.cfi_undefined st(5)	; nop
+	.cfi_undefined st(6)	; nop
+	.cfi_undefined st(7)	; nop
+
+	.cfi_undefined mm0	; nop
+	.cfi_undefined mm1	; nop
+	.cfi_undefined mm2	; nop
+	.cfi_undefined mm3	; nop
+	.cfi_undefined mm4	; nop
+	.cfi_undefined mm5	; nop
+	.cfi_undefined mm6	; nop
+	.cfi_undefined mm7	; nop
+
+	.cfi_endproc
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 4b73185dcca..22d20b32a6d 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-reg.tbl: Use Dw2Inval on AVX registers.
+	* i386-tbl.h: Regenerated.
+
 2008-07-30  Michael J. Eager  <eager@eagercon.com>
 
 	* ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
diff --git a/opcodes/i386-reg.tbl b/opcodes/i386-reg.tbl
index c88a9e06cfb..d1885e18067 100644
--- a/opcodes/i386-reg.tbl
+++ b/opcodes/i386-reg.tbl
@@ -189,22 +189,22 @@ xmm13, RegXMM, RegRex, 5, Dw2Inval, 30
 xmm14, RegXMM, RegRex, 6, Dw2Inval, 31
 xmm15, RegXMM, RegRex, 7, Dw2Inval, 32
 // AVX registers.
-ymm0, RegYMM, 0, 0, 53, 70
-ymm1, RegYMM, 0, 1, 54, 71
-ymm2, RegYMM, 0, 2, 55, 72
-ymm3, RegYMM, 0, 3, 56, 73
-ymm4, RegYMM, 0, 4, 57, 74
-ymm5, RegYMM, 0, 5, 58, 75
-ymm6, RegYMM, 0, 6, 59, 76
-ymm7, RegYMM, 0, 7, 60, 77
-ymm8, RegYMM, RegRex, 0, Dw2Inval, 78
-ymm9, RegYMM, RegRex, 1, Dw2Inval, 79
-ymm10, RegYMM, RegRex, 2, Dw2Inval, 80
-ymm11, RegYMM, RegRex, 3, Dw2Inval, 81
-ymm12, RegYMM, RegRex, 4, Dw2Inval, 82
-ymm13, RegYMM, RegRex, 5, Dw2Inval, 83
-ymm14, RegYMM, RegRex, 6, Dw2Inval, 84
-ymm15, RegYMM, RegRex, 7, Dw2Inval, 85
+ymm0, RegYMM, 0, 0, Dw2Inval, Dw2Inval
+ymm1, RegYMM, 0, 1, Dw2Inval, Dw2Inval
+ymm2, RegYMM, 0, 2, Dw2Inval, Dw2Inval
+ymm3, RegYMM, 0, 3, Dw2Inval, Dw2Inval
+ymm4, RegYMM, 0, 4, Dw2Inval, Dw2Inval
+ymm5, RegYMM, 0, 5, Dw2Inval, Dw2Inval
+ymm6, RegYMM, 0, 6, Dw2Inval, Dw2Inval
+ymm7, RegYMM, 0, 7, Dw2Inval, Dw2Inval
+ymm8, RegYMM, RegRex, 0, Dw2Inval, Dw2Inval
+ymm9, RegYMM, RegRex, 1, Dw2Inval, Dw2Inval
+ymm10, RegYMM, RegRex, 2, Dw2Inval, Dw2Inval
+ymm11, RegYMM, RegRex, 3, Dw2Inval, Dw2Inval
+ymm12, RegYMM, RegRex, 4, Dw2Inval, Dw2Inval
+ymm13, RegYMM, RegRex, 5, Dw2Inval, Dw2Inval
+ymm14, RegYMM, RegRex, 6, Dw2Inval, Dw2Inval
+ymm15, RegYMM, RegRex, 7, Dw2Inval, Dw2Inval
 // No type will make these registers rejected for all purposes except
 // for addressing.  This saves creating one extra type for RIP/EIP.
 rip, BaseIndex, RegRex64, RegRip, Dw2Inval, 16
diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index ad1e331dd7b..6f0b165468c 100644
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -31840,82 +31840,82 @@ const reg_entry i386_regtab[] =
     { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0 } },
-    0, 0, { 53, 70 } },
+    0, 0, { Dw2Inval, Dw2Inval } },
   { "ymm1",
     { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0 } },
-    0, 1, { 54, 71 } },
+    0, 1, { Dw2Inval, Dw2Inval } },
   { "ymm2",
     { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0 } },
-    0, 2, { 55, 72 } },
+    0, 2, { Dw2Inval, Dw2Inval } },
   { "ymm3",
     { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0 } },
-    0, 3, { 56, 73 } },
+    0, 3, { Dw2Inval, Dw2Inval } },
   { "ymm4",
     { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0 } },
-    0, 4, { 57, 74 } },
+    0, 4, { Dw2Inval, Dw2Inval } },
   { "ymm5",
     { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0 } },
-    0, 5, { 58, 75 } },
+    0, 5, { Dw2Inval, Dw2Inval } },
   { "ymm6",
     { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0 } },
-    0, 6, { 59, 76 } },
+    0, 6, { Dw2Inval, Dw2Inval } },
   { "ymm7",
     { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0 } },
-    0, 7, { 60, 77 } },
+    0, 7, { Dw2Inval, Dw2Inval } },
   { "ymm8",
     { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0 } },
-    RegRex, 0, { Dw2Inval, 78 } },
+    RegRex, 0, { Dw2Inval, Dw2Inval } },
   { "ymm9",
     { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0 } },
-    RegRex, 1, { Dw2Inval, 79 } },
+    RegRex, 1, { Dw2Inval, Dw2Inval } },
   { "ymm10",
     { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0 } },
-    RegRex, 2, { Dw2Inval, 80 } },
+    RegRex, 2, { Dw2Inval, Dw2Inval } },
   { "ymm11",
     { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0 } },
-    RegRex, 3, { Dw2Inval, 81 } },
+    RegRex, 3, { Dw2Inval, Dw2Inval } },
   { "ymm12",
     { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0 } },
-    RegRex, 4, { Dw2Inval, 82 } },
+    RegRex, 4, { Dw2Inval, Dw2Inval } },
   { "ymm13",
     { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0 } },
-    RegRex, 5, { Dw2Inval, 83 } },
+    RegRex, 5, { Dw2Inval, Dw2Inval } },
   { "ymm14",
     { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0 } },
-    RegRex, 6, { Dw2Inval, 84 } },
+    RegRex, 6, { Dw2Inval, Dw2Inval } },
   { "ymm15",
     { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0 } },
-    RegRex, 7, { Dw2Inval, 85 } },
+    RegRex, 7, { Dw2Inval, Dw2Inval } },
   { "rip",
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,