Merge with mainline.cvs/cagney_frameaddr-20030403-branchcagney_frameaddr-20030403-branch

14 files changed, 167 insertions, 73 deletions

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 809e9f74249..ac7503ec433 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,59 @@
+2003-04-10  Bob Wilson  <bob.wilson@acm.org>
+
+	* elf32-xtensa.c (elf_xtensa_relocate_section): Don't continue to the
+	next relocation on an undefined symbol.
+
+2003-04-09  Richard Henderson  <rth@redhat.com>
+
+	* elf64-alpha.c (elf64_alpha_relocate_section) <R_ALPHA_GPREL32>:
+	Ignore relocations against r_symndx == 0.
+
+2003-04-09  H.J. Lu <hjl@gnu.org>
+
+	* elf64-alpha.c (elf64_alpha_relocate_section): Don't return
+	FALSE for undefined symbols.
+	* elfxx-ia64.c (elfNN_ia64_relocate_section): Likewise.
+
+2003-04-09  Alexandre Oliva  <aoliva@redhat.com>
+
+	* dwarf2.c (_bfd_dwarf2_find_nearest_line): Try DWARF3-standard
+	and IRIX-specific shift-to-64-bit 4-byte lengths before following
+	addr_size.
+
+2003-04-08  Alexandre Oliva  <aoliva@redhat.com>
+
+	* elf32-mips.c (bfd_elf32_bfd_reloc_type_lookup): Detect (ctor)
+	pointer size from ABI, not arch_bits_per_address.
+
+2003-04-07  Kevin Buettner  <kevinb@redhat.com>
+
+	* elfn32-mips.c (elf32_mips_grok_prstatus): Adjust core file related
+	constants for n32 ABI.
+
+2003-04-06  Andrew Cagney  <cagney@redhat.com>
+
+	* simple.c (bfd_simple_get_relocated_section_contents): Disable
+	free that leads to GDB vs BFD memory corruption.
+
+2003-04-04  Stephane Carrez  <stcarrez@nerim.fr>
+
+	* elf32-m68hc11.c (m68hc11_elf_relax_delete_bytes): Also adjust
+	symbols that mark the end of the section.
+	(m68hc11_elf_relax_section): Use R_M68HC11_PCREL_8 relocs when
+	converting to a relative branch so that the offset is computed after
+	the relaxation; also relocate a jsr into a bsr if possible but don't
+	relax them if they are to a far symbol as we need to call the
+	trampoline code.
+	(elf_m68hc11_howto_table): Set pcrel_offset to true.
+
+2003-04-04  Svein E. Seldal  <Svein.Seldal@solidas.com>
+
+	* archures.c: Namespace cleanup. Rename bfd_mach_c3x to
+	bfd_mach_tic3x and bfd_mach_c4x to bfd_mach_tic4x
+	* bfd-in2.h: Regenerate
+	* coff-tic4x.c: Namespace cleanup. Replace s/c4x/tic4x/
+	* cpu-tic4x.c: Ditto
+
 2003-04-03  Nick Clifton  <nickc@redhat.com>
 
 	* peXXigen.c (_bfd_XXi_swap_scnhdr_out): Compute ps and ss
diff --git a/bfd/archures.c b/bfd/archures.c
index 9337fb19273..efed99333c5 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -241,8 +241,8 @@ DESCRIPTION
 .  bfd_arch_w65,       {* WDC 65816 *}
 .  bfd_arch_tic30,     {* Texas Instruments TMS320C30 *}
 .  bfd_arch_tic4x,     {* Texas Instruments TMS320C3X/4X *}
-.#define bfd_mach_c3x           30
-.#define bfd_mach_c4x           40
+.#define bfd_mach_tic3x         30
+.#define bfd_mach_tic4x         40
 .  bfd_arch_tic54x,    {* Texas Instruments TMS320C54X *}
 .  bfd_arch_tic80,     {* TI TMS320c80 (MVP) *}
 .  bfd_arch_v850,      {* NEC V850 *}
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index a5ff0c0599b..749e6aa6770 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -1707,8 +1707,8 @@ enum bfd_architecture
   bfd_arch_w65,       /* WDC 65816 */
   bfd_arch_tic30,     /* Texas Instruments TMS320C30 */
   bfd_arch_tic4x,     /* Texas Instruments TMS320C3X/4X */
-#define bfd_mach_c3x           30
-#define bfd_mach_c4x           40
+#define bfd_mach_tic3x         30
+#define bfd_mach_tic4x         40
   bfd_arch_tic54x,    /* Texas Instruments TMS320C54X */
   bfd_arch_tic80,     /* TI TMS320c80 (MVP) */
   bfd_arch_v850,      /* NEC V850 */
diff --git a/bfd/coff-tic4x.c b/bfd/coff-tic4x.c
index 3062b9f86f7..5c8de41995c 100644
--- a/bfd/coff-tic4x.c
+++ b/bfd/coff-tic4x.c
@@ -1,6 +1,7 @@
 /* BFD back-end for TMS320C4X coff binaries.
-   Copyright 1996, 1997, 1998, 1999, 2000, 2002
+   Copyright 1996, 1997, 1998, 1999, 2000, 2002, 2003
    Free Software Foundation, Inc.
+
    Contributed by Michael Hayes (m.hayes@elec.canterbury.ac.nz)
 
    This file is part of BFD, the Binary File Descriptor library.
@@ -365,7 +366,7 @@ static const bfd_coff_backend_data ticoff1_swap_table =
 /* TI COFF v0, DOS tools (little-endian headers).  */
 const bfd_target tic4x_coff0_vec =
 {
-  "coff0-c4x",			/* Name.  */
+  "coff0-tic4x",		/* Name.  */
   bfd_target_coff_flavour,
   BFD_ENDIAN_LITTLE,		/* Data byte order is little.  */
   BFD_ENDIAN_LITTLE,		/* Header byte order is little (DOS tools).  */
@@ -409,7 +410,7 @@ const bfd_target tic4x_coff0_vec =
 /* TI COFF v0, SPARC tools (big-endian headers).  */
 const bfd_target tic4x_coff0_beh_vec =
 {
-  "coff0-beh-c4x",		/* Name.  */
+  "coff0-beh-tic4x",		/* Name.  */
   bfd_target_coff_flavour,
   BFD_ENDIAN_LITTLE,		/* Data byte order is little.  */
   BFD_ENDIAN_BIG,		/* Header byte order is big.  */
@@ -454,7 +455,7 @@ const bfd_target tic4x_coff0_beh_vec =
 /* TI COFF v1, DOS tools (little-endian headers).  */
 const bfd_target tic4x_coff1_vec =
 {
-  "coff1-c4x",			/* Name.  */
+  "coff1-tic4x",		/* Name.  */
   bfd_target_coff_flavour,
   BFD_ENDIAN_LITTLE,		/* Data byte order is little.  */
   BFD_ENDIAN_LITTLE,		/* Header byte order is little (DOS tools).  */
@@ -499,7 +500,7 @@ const bfd_target tic4x_coff1_vec =
 /* TI COFF v1, SPARC tools (big-endian headers).  */
 const bfd_target tic4x_coff1_beh_vec =
 {
-  "coff1-beh-c4x",		/* Name.  */
+  "coff1-beh-tic4x",		/* Name.  */
   bfd_target_coff_flavour,
   BFD_ENDIAN_LITTLE,		/* Data byte order is little.  */
   BFD_ENDIAN_BIG,		/* Header byte order is big.  */
@@ -544,7 +545,7 @@ const bfd_target tic4x_coff1_beh_vec =
 /* TI COFF v2, TI DOS tools output (little-endian headers).  */
 const bfd_target tic4x_coff2_vec =
 {
-  "coff2-c4x",			/* Name.  */
+  "coff2-tic4x",		/* Name.  */
   bfd_target_coff_flavour,
   BFD_ENDIAN_LITTLE,		/* Data byte order is little.  */
   BFD_ENDIAN_LITTLE,		/* Header byte order is little (DOS tools).  */
@@ -589,7 +590,7 @@ const bfd_target tic4x_coff2_vec =
 /* TI COFF v2, TI SPARC tools output (big-endian headers).  */
 const bfd_target tic4x_coff2_beh_vec =
 {
-  "coff2-beh-c4x",		/* Name.  */
+  "coff2-beh-tic4x",		/* Name.  */
   bfd_target_coff_flavour,
   BFD_ENDIAN_LITTLE,		/* Data byte order is little.  */
   BFD_ENDIAN_BIG,		/* Header byte order is big.  */
diff --git a/bfd/cpu-tic4x.c b/bfd/cpu-tic4x.c
index 2260f703343..a7f40e1a4fa 100644
--- a/bfd/cpu-tic4x.c
+++ b/bfd/cpu-tic4x.c
@@ -1,5 +1,5 @@
 /* bfd back-end for TMS320C[34]x support
-   Copyright 1996, 1997, 2002 Free Software Foundation, Inc.
+   Copyright 1996, 1997, 2002, 2003 Free Software Foundation, Inc.
 
    Contributed by Michael Hayes (m.hayes@elec.canterbury.ac.nz)
 
@@ -23,12 +23,12 @@
 #include "sysdep.h"
 #include "libbfd.h"
 
-static bfd_boolean c4x_scan
+static bfd_boolean tic4x_scan
     PARAMS ((const struct bfd_arch_info *, const char * ));
 
 
 static bfd_boolean
-c4x_scan (info, string)
+tic4x_scan (info, string)
      const struct bfd_arch_info *info;
      const char *string;
 {
@@ -42,9 +42,9 @@ c4x_scan (info, string)
     return FALSE;
 
   if (*string == '3')
-    return (info->mach == bfd_mach_c3x);
+    return (info->mach == bfd_mach_tic3x);
   else if (*string == '4')
-    return info->mach == bfd_mach_c4x;
+    return info->mach == bfd_mach_tic4x;
 
   return FALSE;
 }
@@ -56,13 +56,13 @@ const bfd_arch_info_type bfd_tic3x_arch =
     32,				/* 32 bits in an address.  */
     32,				/* 32 bits in a byte.  */
     bfd_arch_tic4x,
-    bfd_mach_c3x,		/* Machine number.  */
-    "c3x",			/* Architecture name.  */
+    bfd_mach_tic3x,		/* Machine number.  */
+    "tic3x",			/* Architecture name.  */
     "tms320c3x",		/* Printable name.  */
     0,				/* Alignment power.  */
     FALSE,			/* Not the default architecture.  */
     bfd_default_compatible,
-    c4x_scan,
+    tic4x_scan,
     0
   };
 
@@ -72,13 +72,13 @@ const bfd_arch_info_type bfd_tic4x_arch =
     32,				/* 32 bits in an address.  */
     32,				/* 32 bits in a byte.  */
     bfd_arch_tic4x,
-    bfd_mach_c4x,		/* Machine number.  */
-    "c4x",			/* Architecture name.  */
+    bfd_mach_tic4x,		/* Machine number.  */
+    "tic4x",			/* Architecture name.  */
     "tms320c4x",		/* Printable name.  */
     0,				/* Alignment power.  */
     TRUE,			/* The default architecture.  */
     bfd_default_compatible,
-    c4x_scan,
+    tic4x_scan,
     &bfd_tic3x_arch,
   };
 
diff --git a/bfd/dwarf2.c b/bfd/dwarf2.c
index 8a4cc64b1bd..c4a44234c83 100644
--- a/bfd/dwarf2.c
+++ b/bfd/dwarf2.c
@@ -1927,26 +1927,34 @@ _bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
       bfd_boolean found;
       unsigned int offset_size = addr_size;
 
-      if (addr_size == 4)
+      length = read_4_bytes (abfd, stash->info_ptr);
+      /* A 0xffffff length is the DWARF3 way of indicating we use
+	 64-bit offsets, instead of 32-bit offsets.  */
+      if (length == 0xffffffff)
 	{
-	  length = read_4_bytes (abfd, stash->info_ptr);
-	  if (length == 0xffffffff)
-	    {
-	      offset_size = 8;
-	      length = read_8_bytes (abfd, stash->info_ptr + 4);
-	      stash->info_ptr += 8;
-	    }
-	  else if (length == 0)
-	    {
-	      /* Handle (non-standard) 64-bit DWARF2 formats.  */
-	      offset_size = 8;
-	      length = read_4_bytes (abfd, stash->info_ptr + 4);
-	      stash->info_ptr += 4;
-	    }
+	  offset_size = 8;
+	  length = read_8_bytes (abfd, stash->info_ptr + 4);
+	  stash->info_ptr += 12;
+	}
+      /* A zero length is the IRIX way of indicating 64-bit offsets,
+	 mostly because the 64-bit length will generally fit in 32
+	 bits, and the endianness helps.  */
+      else if (length == 0)
+	{
+	  offset_size = 8;
+	  length = read_4_bytes (abfd, stash->info_ptr + 4);
+	  stash->info_ptr += 8;
+	}
+      /* In the absence of the hints above, we assume addr_size-sized
+	 offsets, for backward-compatibility with pre-DWARF3 64-bit
+	 platforms.  */
+      else if (addr_size == 8)
+	{
+	  length = read_8_bytes (abfd, stash->info_ptr);
+	  stash->info_ptr = 8;
 	}
       else
-	length = read_8_bytes (abfd, stash->info_ptr);
-      stash->info_ptr += addr_size;
+	stash->info_ptr += 4;
 
       if (length > 0)
 	{
diff --git a/bfd/elf32-m68hc11.c b/bfd/elf32-m68hc11.c
index 98ea6a69cd5..26fa3933a74 100644
--- a/bfd/elf32-m68hc11.c
+++ b/bfd/elf32-m68hc11.c
@@ -1,5 +1,5 @@
 /* Motorola 68HC11-specific support for 32-bit ELF
-   Copyright 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
+   Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
    Contributed by Stephane Carrez (stcarrez@nerim.fr)
    (Heavily copied from the D10V port by Martin Hunt (hunt@cygnus.com))
 
@@ -143,7 +143,7 @@ static reloc_howto_type elf_m68hc11_howto_table[] = {
 	 FALSE,			/* partial_inplace */
 	 0x00ff,		/* src_mask */
 	 0x00ff,		/* dst_mask */
-	 FALSE),		/* pcrel_offset */
+	 TRUE),                 /* pcrel_offset */
 
   /* A 16 bit absolute relocation */
   HOWTO (R_M68HC11_16,		/* type */
@@ -204,7 +204,7 @@ static reloc_howto_type elf_m68hc11_howto_table[] = {
 	 FALSE,			/* partial_inplace */
 	 0xffff,		/* src_mask */
 	 0xffff,		/* dst_mask */
-	 FALSE),		/* pcrel_offset */
+	 TRUE),                 /* pcrel_offset */
 
   /* GNU extension to record C++ vtable hierarchy */
   HOWTO (R_M68HC11_GNU_VTINHERIT,	/* type */
@@ -247,8 +247,8 @@ static reloc_howto_type elf_m68hc11_howto_table[] = {
 	 bfd_elf_generic_reloc,	/* special_function */
 	 "R_M68HC11_24",	/* name */
 	 FALSE,			/* partial_inplace */
-	 0xffff,		/* src_mask */
-	 0xffff,		/* dst_mask */
+	 0xffffff,		/* src_mask */
+	 0xffffff,		/* dst_mask */
 	 FALSE),		/* pcrel_offset */
 
   /* A 16-bit low relocation */
@@ -445,6 +445,9 @@ elf32_m68hc11_gc_sweep_hook (abfd, info, sec, relocs)
   return TRUE;
 }
 
+
+/* 68HC11 Linker Relaxation.  */
+
 struct m68hc11_direct_relax
 {
   const char *name;
@@ -694,6 +697,7 @@ m68hc11_elf_relax_section (abfd, sec, link_info, again)
       bfd_vma value;
       Elf_Internal_Sym *isym;
       asection *sym_sec;
+      int is_far = 0;
 
       /* If this isn't something that can be relaxed, then ignore
 	 this reloc.  */
@@ -747,7 +751,7 @@ m68hc11_elf_relax_section (abfd, sec, link_info, again)
           prev_insn_group = 0;
 
 	  /* Do nothing if this reloc is the last byte in the section.  */
-	  if (irel->r_offset == sec->_cooked_size)
+	  if (irel->r_offset + 2 >= sec->_cooked_size)
 	    continue;
 
 	  /* See if the next instruction is an unconditional pc-relative
@@ -793,6 +797,7 @@ m68hc11_elf_relax_section (abfd, sec, link_info, again)
 	{
 	  /* A local symbol.  */
 	  isym = isymbuf + ELF32_R_SYM (irel->r_info);
+          is_far = isym->st_other & STO_M68HC12_FAR;
           sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
 	  symval = (isym->st_value
 		    + sym_sec->output_section->vma
@@ -818,6 +823,7 @@ m68hc11_elf_relax_section (abfd, sec, link_info, again)
 	      continue;
 	    }
 
+          is_far = h->other & STO_M68HC12_FAR;
           isym = 0;
           sym_sec = h->root.u.def.section;
 	  symval = (h->root.u.def.value
@@ -891,23 +897,25 @@ m68hc11_elf_relax_section (abfd, sec, link_info, again)
             {
               code = 0x20;
               bfd_put_8 (abfd, code, contents + prev_insn_branch->r_offset);
-              bfd_put_8 (abfd, offset,
+              bfd_put_8 (abfd, 0xff,
                          contents + prev_insn_branch->r_offset + 1);
+              irel->r_offset = prev_insn_branch->r_offset + 1;
               irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
-                                           R_M68HC11_NONE);
+                                           R_M68HC11_PCREL_8);
               m68hc11_elf_relax_delete_bytes (abfd, sec,
-                                              irel->r_offset, 1);
+                                              irel->r_offset + 1, 1);
             }
           else
             {
               code ^= 0x1;
               bfd_put_8 (abfd, code, contents + prev_insn_branch->r_offset);
-              bfd_put_8 (abfd, offset,
+              bfd_put_8 (abfd, 0xff,
                          contents + prev_insn_branch->r_offset + 1);
+              irel->r_offset = prev_insn_branch->r_offset + 1;
               irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
-                                           R_M68HC11_NONE);
+                                           R_M68HC11_PCREL_8);
               m68hc11_elf_relax_delete_bytes (abfd, sec,
-                                              irel->r_offset - 1, 3);
+                                              irel->r_offset + 1, 3);
             }
           prev_insn_branch = 0;
           *again = TRUE;
@@ -991,14 +999,14 @@ m68hc11_elf_relax_section (abfd, sec, link_info, again)
           /* That will change things, so, we should relax again.  */
           *again = TRUE;
         }
-      else if (ELF32_R_TYPE (irel->r_info) == R_M68HC11_16)
+      else if (ELF32_R_TYPE (irel->r_info) == R_M68HC11_16 && !is_far)
         {
           unsigned char code;
           bfd_vma offset;
 
           prev_insn_branch = 0;
           code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
-          if (code == 0x7e)
+          if (code == 0x7e || code == 0xbd)
             {
               offset = value - (irel->r_offset
                                 + sec->output_section->vma
@@ -1021,13 +1029,13 @@ m68hc11_elf_relax_section (abfd, sec, link_info, again)
                   free_extsyms = NULL;
 
                   /* Shrink the branch.  */
-                  code = 0x20;
+                  code = (code == 0x7e) ? 0x20 : 0x8d;
                   bfd_put_8 (abfd, code,
                              contents + irel->r_offset - 1);
-                  bfd_put_8 (abfd, offset,
+                  bfd_put_8 (abfd, 0xff,
                              contents + irel->r_offset);
                   irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
-                                               R_M68HC11_NONE);
+                                               R_M68HC11_PCREL_8);
                   m68hc11_elf_relax_delete_bytes (abfd, sec,
                                                   irel->r_offset + 1, 1);
                   /* That will change things, so, we should relax again.  */
@@ -1220,7 +1228,7 @@ m68hc11_elf_relax_delete_bytes (abfd, sec, addr, count)
     {
       if (isym->st_shndx == sec_shndx
 	  && isym->st_value > addr
-	  && isym->st_value < toaddr)
+	  && isym->st_value <= toaddr)
 	isym->st_value -= count;
     }
 
@@ -1236,7 +1244,7 @@ m68hc11_elf_relax_delete_bytes (abfd, sec, addr, count)
 	   || sym_hash->root.type == bfd_link_hash_defweak)
 	  && sym_hash->root.u.def.section == sec
 	  && sym_hash->root.u.def.value > addr
-	  && sym_hash->root.u.def.value < toaddr)
+	  && sym_hash->root.u.def.value <= toaddr)
 	{
 	  sym_hash->root.u.def.value -= count;
 	}
diff --git a/bfd/elf32-mips.c b/bfd/elf32-mips.c
index 1399f003128..adf057b40d2 100644
--- a/bfd/elf32-mips.c
+++ b/bfd/elf32-mips.c
@@ -1440,11 +1440,12 @@ bfd_elf32_bfd_reloc_type_lookup (abfd, code)
     case BFD_RELOC_CTOR:
       /* We need to handle BFD_RELOC_CTOR specially.
 	 Select the right relocation (R_MIPS_32 or R_MIPS_64) based on the
-	 size of addresses on this architecture.  */
-      if (bfd_arch_bits_per_address (abfd) == 32)
-	return &howto_table[(int) R_MIPS_32];
-      else
+	 size of addresses of the ABI.  */
+      if ((elf_elfheader (abfd)->e_flags & (E_MIPS_ABI_O64
+					    | E_MIPS_ABI_EABI64)) != 0)
 	return &elf_mips_ctor64_howto;
+      else
+	return &howto_table[(int) R_MIPS_32];
 
     case BFD_RELOC_MIPS16_JMP:
       return &elf_mips16_jump_howto;
diff --git a/bfd/elf32-xtensa.c b/bfd/elf32-xtensa.c
index 92fb98c7721..b991df4f792 100644
--- a/bfd/elf32-xtensa.c
+++ b/bfd/elf32-xtensa.c
@@ -1893,6 +1893,7 @@ elf_xtensa_relocate_section (output_bfd, info, input_bfd,
       bfd_reloc_status_type r;
       bfd_boolean is_weak_undef;
       bfd_boolean unresolved_reloc;
+      bfd_boolean warned;
 
       r_type = ELF32_R_TYPE (rel->r_info);
       if (r_type == (int) R_XTENSA_GNU_VTINHERIT
@@ -1983,6 +1984,7 @@ elf_xtensa_relocate_section (output_bfd, info, input_bfd,
       sec = NULL;
       is_weak_undef = FALSE;
       unresolved_reloc = FALSE;
+      warned = FALSE;
 
       if (howto->partial_inplace)
 	{
@@ -2039,10 +2041,7 @@ elf_xtensa_relocate_section (output_bfd, info, input_bfd,
 		      (!info->shared || info->no_undefined
 		       || ELF_ST_VISIBILITY (h->other)))))
 		return FALSE;
-
-	      /* To avoid any more warning messages, like "call out of
-		 range", we continue immediately to the next relocation.  */
-	      continue;
+	      warned = TRUE;
 	    }
 	}
 
@@ -2171,7 +2170,7 @@ elf_xtensa_relocate_section (output_bfd, info, input_bfd,
 			       contents, rel->r_offset, is_weak_undef,
 			       &error_message);
       
-      if (r != bfd_reloc_ok)
+      if (r != bfd_reloc_ok && !warned)
 	{
 	  const char *name;
 
diff --git a/bfd/elf64-alpha.c b/bfd/elf64-alpha.c
index 9f564ca35d3..bf18e205c0d 100644
--- a/bfd/elf64-alpha.c
+++ b/bfd/elf64-alpha.c
@@ -4514,7 +4514,6 @@ elf64_alpha_relocate_section (output_bfd, info, input_bfd, input_section,
 		     (!info->shared || info->no_undefined
 		      || ELF_ST_VISIBILITY (h->root.other)))))
 		return FALSE;
-	      ret_val = FALSE;
 	      continue;
 	    }
 
@@ -4580,8 +4579,20 @@ elf64_alpha_relocate_section (output_bfd, info, input_bfd, input_section,
 	  value -= gp;
 	  goto default_reloc;
 
-	case R_ALPHA_GPREL16:
 	case R_ALPHA_GPREL32:
+	  /* If the target section was a removed linkonce section,
+	     r_symndx will be zero.  In this case, assume that the
+	     switch will not be used, so don't fill it in.  If we
+	     do nothing here, we'll get relocation truncated messages,
+	     due to the placement of the application above 4GB.  */
+	  if (r_symndx == 0)
+	    {
+	      r = bfd_reloc_ok;
+	      break;
+	    }
+	  /* FALLTHRU */
+
+	case R_ALPHA_GPREL16:
 	case R_ALPHA_GPRELLOW:
 	  if (dynamic_symbol_p)
             {
diff --git a/bfd/elfn32-mips.c b/bfd/elfn32-mips.c
index 9105d185bb8..ab255fa6974 100644
--- a/bfd/elfn32-mips.c
+++ b/bfd/elfn32-mips.c
@@ -2024,7 +2024,7 @@ elf32_mips_grok_prstatus (abfd, note)
       default:
 	return FALSE;
 
-      case 256:		/* Linux/MIPS */
+      case 440:		/* Linux/MIPS N32 */
 	/* pr_cursig */
 	elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
 
@@ -2033,7 +2033,7 @@ elf32_mips_grok_prstatus (abfd, note)
 
 	/* pr_reg */
 	offset = 72;
-	raw_size = 180;
+	raw_size = 360;
 
 	break;
     }
diff --git a/bfd/elfxx-ia64.c b/bfd/elfxx-ia64.c
index 3c8ec9e45ce..bff78c84345 100644
--- a/bfd/elfxx-ia64.c
+++ b/bfd/elfxx-ia64.c
@@ -3963,7 +3963,6 @@ elfNN_ia64_relocate_section (output_bfd, info, input_bfd, input_section,
 		      (!info->shared || info->no_undefined
 		       || ELF_ST_VISIBILITY (h->other)))))
 		return FALSE;
-	      ret_val = FALSE;
 	      continue;
 	    }
 	}
diff --git a/bfd/simple.c b/bfd/simple.c
index a91d118e40d..a247f1153ba 100644
--- a/bfd/simple.c
+++ b/bfd/simple.c
@@ -261,8 +261,19 @@ bfd_simple_get_relocated_section_contents (abfd, sec, outbuf, symbol_table)
   if (contents == NULL && data != NULL)
     free (data);
 
+#if 0
+  /* NOTE: cagney/2003-04-05: This free, which was introduced on
+     2003-03-31 to stop a memory leak, caused a memory corruption
+     between GDB and BFD.  The problem, which is stabs specific, can
+     be identified by a bunch of failures in relocate.exp vis:
+
+       gdb.base/relocate.exp: get address of static_bar
+
+     Details of the problem can be found on the binutils@ mailing
+     list, see the discussion thread: "gdb.mi/mi-cli.exp failures".  */
   if (storage_needed != 0)
     free (symbol_table);
+#endif
 
   bfd_map_over_sections (abfd, simple_restore_output_info, saved_offsets);
   free (saved_offsets);
diff --git a/bfd/version.h b/bfd/version.h
index bd19d02b888..b4cc6269923 100644
--- a/bfd/version.h
+++ b/bfd/version.h
@@ -1,3 +1,3 @@
-#define BFD_VERSION_DATE 20030403
+#define BFD_VERSION_DATE 20030410
 #define BFD_VERSION @bfd_version@
 #define BFD_VERSION_STRING @bfd_version_string@