* arm-tdep.h: New file.

* arm-tdep.c: Include arm-tdep.h.
(arm_addr_bits_remove, arm_smash_text_address, arm_saved_pc_after_call)
(arm_skip_prologue, arm_call_dummy_words, arm_fix_call_dummy)
(arm_print_float_info, arm_register_type, convert_to_extended)
(arm_elf_make_msymbols_special, arm_coff_make_msymbol_special)
(arm_extract_return_value, arm_register_name): Make static.
(arm_software_single_step): Similarly.  Fix types in declaration.
(arm_register_byte, arm_register_raw_size, arm_register_virtual_size)
(arm_store_return_value, arm_store_struct_return): New functions.
(arm_gdbarch_init): Register the above functions.  Also register
call_dummy_start_offset, sizeof_call_dummy_words,
function_start_offset, inner_than, decr_pc_after_break, fp_regnum,
sp_regnum, pc_regnum, register_bytes, num_regs, max_register_raw_size,
max_register_virtual_size, register_size.  Set up
prologue_cache.saved_regs here, rather than ...
(_initialize_arm_tdep): ... here.
* config/arm/tm-arm.h (struct type, struct value): Delete forward
declarations.
(arm_addr_bits_remove, arm_smash_text_address, arm_saved_pc_after_call)
(arm_skip_prologue, arm_call_dummy_words, arm_fix_call_dummy)
(arm_print_float_info, arm_register_type, convert_to_extended)
(arm_elf_make_msymbols_special, arm_coff_make_msymbol_special)
(arm_extract_return_value, arm_register_name): Delete declarations.
(SMASH_TEXT_ADDRESS, ADDR_BITS_REMOVE, FUNCTION_START_OFFSET)
(SKIP_PROLOGUE, SAVED_PC_AFTER_CALL, INNER_THAN, BREAKPOINT_FROM_PC)
(DECR_PC_AFTER_BREAK, PRINT_FLOAT_INFO, REGISTER_SIZE, NUM_REGS)
(REGISTER_NAME, REGISTER_BYTES, REGISTER_BYTE, REGISTER_RAW_SIZE)
(REGISTER_VIRTUAL_SIZE, MAX_REGISTER_RAW_SIZE)
(MAX_REGISTER_VIRTUAL_SIZE, REGISTER_VIRTUAL_TYPE, STORE_STRUCT_RETURN)
(EXTRACT_RETURN_VALUE, STORE_RETURN_VALUE, CALL_DUMMY_WORDS)
(SIZEOF_CALL_DUMMY_WORDS, CALL_DUMMY_START_OFFSET, FIX_CALL_DUMMY)
(SOFTWARE_SINGLE_STEP_P, SOFTWARE_SINGLE_STEP)
(ELF_MAKE_MSYMBOL_SPECIAL, COFF_MAKE_MSYMBOL_SPECIAL) Delete.
(arm_pc_is_thumb, arm_pc_is_thumb_dummy, thumb_get_next_pc)
(arm_get_next_pc): No-longer static -- these are needed by the RDI
interface.
* arm-linux-nat.c arm-linux-tdep.c armnbsd-nat.c: Include arm-tdep.h.
* remote-rdi.c remote-rdp.c: Likewise.
* Makefile.in (arm-linux-nat.o, arm-linux-tdep.o arm-tdep.o)
(armnbsd-nat.o, remote-rdi.o, remote_rdp.o): Update dependencies.
* config/arm/tm-nbsd.h (SOFTWARE_SINGLE_STEP_P): Delete bogus
definition.

* arm-tdep.h (ARM_A1_REGNUM, ARM_A4_REGNUM, ARM_AP_REGNUM)
(ARM_SP_REGNUM, ARM_LR_REGNUM, ARM_PC_REGNUM, ARM_F0_REGNUM)
(ARM_F3_REGNUM, ARM_F7_REGNUM, ARM_FPS_REGNUM, ARM_PS_REGNUM): Renamed
from non-ARM_ prefixed definitions.
* arm-tdep.c armnbsd-nat.c arm-linux-nat.c arm-linux-tdep.c: Update
all uses of above.
* remote-rdi.c remote-rdp.c: Likewise.
* arm-linux-nat.c (ARM_CPSR_REGNUM): Renamed from CPSR_REGNUM.

1 files changed, 108 insertions, 0 deletions

diff --git a/gdb/arm-tdep.h b/gdb/arm-tdep.h
new file mode 100644
index 00000000000..197d4392aaf
--- /dev/null
+++ b/gdb/arm-tdep.h
@@ -0,0 +1,108 @@
+/* Common target dependent code for GDB on ARM systems.
+   Copyright 2002 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Register numbers of various important registers.  Note that some of
+   these values are "real" register numbers, and correspond to the
+   general registers of the machine, and some are "phony" register
+   numbers which are too large to be actual register numbers as far as
+   the user is concerned but do serve to get the desired values when
+   passed to read_register.  */
+
+#define ARM_A1_REGNUM 0		/* first integer-like argument */
+#define ARM_A4_REGNUM 3		/* last integer-like argument */
+#define ARM_AP_REGNUM 11
+#define ARM_SP_REGNUM 13	/* Contains address of top of stack */
+#define ARM_LR_REGNUM 14	/* address to return to from a function call */
+#define ARM_PC_REGNUM 15	/* Contains program counter */
+#define ARM_F0_REGNUM 16	/* first floating point register */
+#define ARM_F3_REGNUM 19	/* last floating point argument register */
+#define ARM_F7_REGNUM 23	/* last floating point register */
+#define ARM_FPS_REGNUM 24	/* floating point status register */
+#define ARM_PS_REGNUM 25	/* Contains processor status */
+
+#define ARM_FP_REGNUM 11	/* Frame register in ARM code, if used.  */
+#define THUMB_FP_REGNUM 7	/* Frame register in Thumb code, if used.  */
+
+#define ARM_NUM_ARG_REGS 	4
+#define ARM_LAST_ARG_REGNUM 	ARM_A4_REGNUM
+#define ARM_NUM_FP_ARG_REGS 	4
+#define ARM_LAST_FP_ARG_REGNUM	ARM_F3_REGNUM
+
+/* Size of integer registers.  */
+#define INT_REGISTER_RAW_SIZE		4
+#define INT_REGISTER_VIRTUAL_SIZE	4
+
+/* Say how long FP registers are.  Used for documentation purposes and
+   code readability in this header.  IEEE extended doubles are 80
+   bits.  DWORD aligned they use 96 bits.  */
+#define FP_REGISTER_RAW_SIZE	12
+
+/* GCC doesn't support long doubles (extended IEEE values).  The FP
+   register virtual size is therefore 64 bits.  Used for documentation
+   purposes and code readability in this header.  */
+#define FP_REGISTER_VIRTUAL_SIZE	8
+
+/* Status registers are the same size as general purpose registers.
+   Used for documentation purposes and code readability in this
+   header.  */
+#define STATUS_REGISTER_SIZE	4
+
+/* Number of machine registers.  The only define actually required 
+   is NUM_REGS.  The other definitions are used for documentation
+   purposes and code readability.  */
+/* For 26 bit ARM code, a fake copy of the PC is placed in register 25 (PS)
+   (and called PS for processor status) so the status bits can be cleared
+   from the PC (register 15).  For 32 bit ARM code, a copy of CPSR is placed
+   in PS.  */
+#define NUM_FREGS	8	/* Number of floating point registers.  */
+#define NUM_SREGS	2	/* Number of status registers.  */
+#define NUM_GREGS	16	/* Number of general purpose registers.  */
+
+
+/* Instruction condition field values.  */
+#define INST_EQ		0x0
+#define INST_NE		0x1
+#define INST_CS		0x2
+#define INST_CC		0x3
+#define INST_MI		0x4
+#define INST_PL		0x5
+#define INST_VS		0x6
+#define INST_VC		0x7
+#define INST_HI		0x8
+#define INST_LS		0x9
+#define INST_GE		0xa
+#define INST_LT		0xb
+#define INST_GT		0xc
+#define INST_LE		0xd
+#define INST_AL		0xe
+#define INST_NV		0xf
+
+#define FLAG_N		0x80000000
+#define FLAG_Z		0x40000000
+#define FLAG_C		0x20000000
+#define FLAG_V		0x10000000
+
+/* Prototypes for internal interfaces needed by more than one MD file.  */
+int arm_pc_is_thumb_dummy (CORE_ADDR);
+
+int arm_pc_is_thumb (CORE_ADDR);
+
+CORE_ADDR thumb_get_next_pc (CORE_ADDR);
+