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| author | Andrew Cagney <cagney@redhat.com> | 2000-08-02 11:05:50 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 2000-08-02 11:05:50 +0000 |
| commit | f03c32ed9258a7b6798b65b5dd29ad08de1abd87 (patch) | |
| tree | 2a74770c14790afaf8ca821d95d0e8c574d922b0 /gdb/d10v-tdep.c | |
| parent | 1f78a53b3804a3eb9be72f36b2d7311a61205e2b (diff) | |
| download | gdb-f03c32ed9258a7b6798b65b5dd29ad08de1abd87.tar.gz | |
Multi-arch REGISTER_SIM_REGNO. Update d10v.
Diffstat (limited to 'gdb/d10v-tdep.c')
| -rw-r--r-- | gdb/d10v-tdep.c | 14 |
1 files changed, 5 insertions, 9 deletions
diff --git a/gdb/d10v-tdep.c b/gdb/d10v-tdep.c index 20e146f3b1c..c5b7b5a6c3a 100644 --- a/gdb/d10v-tdep.c +++ b/gdb/d10v-tdep.c @@ -55,7 +55,6 @@ struct gdbarch_tdep int nr_dmap_regs; unsigned long (*dmap_register) (int nr); unsigned long (*imap_register) (int nr); - int (*register_sim_regno) (int nr); }; /* These are the addresses the D10V-EVA board maps data and @@ -274,12 +273,6 @@ d10v_ts3_register_sim_regno (int nr) return nr; } -int -d10v_register_sim_regno (int nr) -{ - return gdbarch_tdep (current_gdbarch)->register_sim_regno (nr); -} - /* Index within `registers' of the first byte of the space for register REG_NR. */ @@ -1467,6 +1460,7 @@ d10v_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) int d10v_num_regs; struct gdbarch_tdep *tdep; gdbarch_register_name_ftype *d10v_register_name; + gdbarch_register_sim_regno_ftype *d10v_register_sim_regno; /* Find a candidate among the list of pre-declared architectures. */ arches = gdbarch_list_lookup_by_info (arches, &info); @@ -1483,9 +1477,9 @@ d10v_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) case bfd_mach_d10v_ts2: d10v_num_regs = 37; d10v_register_name = d10v_ts2_register_name; + d10v_register_sim_regno = d10v_ts2_register_sim_regno; tdep->a0_regnum = TS2_A0_REGNUM; tdep->nr_dmap_regs = TS2_NR_DMAP_REGS; - tdep->register_sim_regno = d10v_ts2_register_sim_regno; tdep->dmap_register = d10v_ts2_dmap_register; tdep->imap_register = d10v_ts2_imap_register; break; @@ -1493,9 +1487,9 @@ d10v_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) case bfd_mach_d10v_ts3: d10v_num_regs = 42; d10v_register_name = d10v_ts3_register_name; + d10v_register_sim_regno = d10v_ts3_register_sim_regno; tdep->a0_regnum = TS3_A0_REGNUM; tdep->nr_dmap_regs = TS3_NR_DMAP_REGS; - tdep->register_sim_regno = d10v_ts3_register_sim_regno; tdep->dmap_register = d10v_ts3_dmap_register; tdep->imap_register = d10v_ts3_imap_register; break; @@ -1608,6 +1602,8 @@ d10v_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown); set_gdbarch_stack_align (gdbarch, d10v_stack_align); + set_gdbarch_register_sim_regno (gdbarch, d10v_register_sim_regno); + return gdbarch; } |