diff options
author | Jim Blandy <jimb@codesourcery.com> | 2004-05-11 04:55:32 +0000 |
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committer | Jim Blandy <jimb@codesourcery.com> | 2004-05-11 04:55:32 +0000 |
commit | 3530d0731567bc2a212338e2fbb03deaadfca53b (patch) | |
tree | b47fbef360682a7cb470c9bf382081eb125ea44d /gdb/ppc-linux-nat.c | |
parent | 18f995358ae43cfb494f14cc75c3fe300da1c857 (diff) | |
download | gdb-3530d0731567bc2a212338e2fbb03deaadfca53b.tar.gz |
* ppc-tdep.h (struct gdbarch_tdep): Change definition of
ppc_fp0_regnum and ppc_fpscr_regnum: if they are -1, then this
processor variant lacks those registers.
(ppc_floating_point_unit_p): Change description to make it clear
that this returns info about the ISA, not the ABI.
* rs6000-tdep.c (ppc_floating_point_unit_p): Decide whether to
return true or false by checking tdep->ppc_fp0_regnum and
tdep->ppc_fpscr_regnum. The original code replicated the BFD
arch/mach switching done in rs6000_gdbarch_init; it's better to
keep that logic there, and just check the results here.
(rs6000_gdbarch_init): On the E500, set tdep->ppc_fp0_regnum and
tdep->ppc_fpscr_regnum to -1 to indicate that we have no
floating-point registers.
(ppc_supply_fpregset, ppc_collect_fpregset)
(rs6000_push_dummy_call, rs6000_extract_return_value)
(rs6000_store_return_value): Assert that we have floating-point
registers.
(rs6000_dwarf2_stab_reg_to_regnum): Add FIXME.
(rs6000_frame_cache): Don't note the locations at which
floating-point registers were saved if we have no fprs.
* aix-thread.c (supply_fprs, fill_fprs): Assert that we have FP
registers.
(fetch_regs_user_thread, fetch_regs_kernel_thread)
(store_regs_user_thread, store_regs_kernel_thread): Only call
supply_fprs / fill_fprs if we actually have floating-point
registers.
(special_register_p): Check ppc_fpscr_regnum before matching
against it.
(supply_sprs64, supply_sprs32, fill_sprs64, fill_sprs32): Don't
supply / collect fpscr if we don't have it.
* ppc-bdm.c: #include "gdb_assert.h".
(bdm_ppc_fetch_registers, bdm_ppc_store_registers): Assert that we
have floating-point registers, since I can't test this code on
FP-free systems to adapt it.
* ppc-linux-nat.c (ppc_register_u_addr): Don't match against the
fpscr and floating point register numbers if they don't exist.
(fetch_register): Assert that we have floating-point registers
before we reach the code that handles them.
(store_register): Same. And use tdep instead of calling
gdbarch_tdep again.
(fill_fpregset): Don't try to collect FP registers and fpscr if we
don't have them.
(ppc_linux_sigtramp_cache): Don't record the saved locations of
fprs and fpscr if we don't have them.
(ppc_linux_supply_fpregset): Don't supply fp regs and fpscr if we
don't have them.
* ppcnbsd-nat.c: #include "gdb_assert.h".
(getfpregs_supplies): Assert that we have floating-point registers.
* ppcnbsd-tdep.c (ppcnbsd_supply_fpreg, ppcnbsd_fill_fpreg): Same.
* ppcobsd-tdep.c: #include "gdb_assert.h".
(ppcobsd_supply_gregset, ppcobsd_collect_gregset): Assert that we
have floating-point registers.
* rs6000-nat.c (regmap): Don't match against the fpscr and
floating point register numbers if they don't exist.
(fetch_inferior_registers, store_inferior_registers,
fetch_core_registers): Only fetch / store / supply the
floating-point registers and the fpscr if we have them.
* Makefile.in (ppc-bdm.o, ppc-linux-nat.o, ppcnbsd-nat.o)
(ppcobsd-tdep.o): Update dependencies.
Diffstat (limited to 'gdb/ppc-linux-nat.c')
-rw-r--r-- | gdb/ppc-linux-nat.c | 32 |
1 files changed, 24 insertions, 8 deletions
diff --git a/gdb/ppc-linux-nat.c b/gdb/ppc-linux-nat.c index 6d646653aea..460d48abf30 100644 --- a/gdb/ppc-linux-nat.c +++ b/gdb/ppc-linux-nat.c @@ -26,6 +26,7 @@ #include "inferior.h" #include "gdbcore.h" #include "regcache.h" +#include "gdb_assert.h" #include <sys/types.h> #include <sys/param.h> @@ -139,7 +140,8 @@ ppc_register_u_addr (int regno) /* Floating point regs: eight bytes each in both 32- and 64-bit ptrace interfaces. Thus, two slots each in 32-bit interface, one slot each in 64-bit interface. */ - if (regno >= tdep->ppc_fp0_regnum + if (tdep->ppc_fp0_regnum >= 0 + && regno >= tdep->ppc_fp0_regnum && regno < tdep->ppc_fp0_regnum + ppc_num_fprs) u_addr = (PT_FPR0 * wordsize) + ((regno - tdep->ppc_fp0_regnum) * 8); @@ -160,7 +162,8 @@ ppc_register_u_addr (int regno) #endif if (regno == tdep->ppc_ps_regnum) u_addr = PT_MSR * wordsize; - if (regno == tdep->ppc_fpscr_regnum) + if (tdep->ppc_fpscr_regnum >= 0 + && regno == tdep->ppc_fpscr_regnum) u_addr = PT_FPSCR * wordsize; return u_addr; @@ -234,6 +237,11 @@ fetch_register (int tid, int regno) return; } + /* If the current architecture has no floating-point registers, we + should never reach this point: ppc_register_u_addr should have + returned -1, and we should have caught that above. */ + gdb_assert (ppc_floating_point_unit_p (current_gdbarch)); + /* Read the raw register using PTRACE_XFER_TYPE sized chunks. On a 32-bit platform, 64-bit floating-point registers will require two transfers. */ @@ -412,6 +420,11 @@ store_register (int tid, int regno) if (regaddr == -1) return; + /* If the current architecture has no floating-point registers, we + should never reach this point: ppc_register_u_addr should have + returned -1, and we should have caught that above. */ + gdb_assert (ppc_floating_point_unit_p (current_gdbarch)); + /* First collect the register value from the regcache. Be careful to to convert the regcache's wordsize into ptrace's wordsize. */ memset (buf, 0, sizeof buf); @@ -436,7 +449,7 @@ store_register (int tid, int regno) regaddr += sizeof (PTRACE_XFER_TYPE); if (errno == EIO - && regno == gdbarch_tdep (current_gdbarch)->ppc_fpscr_regnum) + && regno == tdep->ppc_fpscr_regnum) { /* Some older kernel versions don't allow fpscr to be written. */ continue; @@ -620,11 +633,14 @@ fill_fpregset (gdb_fpregset_t *fpregsetp, int regno) struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); bfd_byte *fpp = (void *) fpregsetp; - for (regi = 0; regi < 32; regi++) + if (ppc_floating_point_unit_p (current_gdbarch)) { - if ((regno == -1) || (regno == tdep->ppc_fp0_regnum + regi)) - regcache_collect (tdep->ppc_fp0_regnum + regi, fpp + 8 * regi); + for (regi = 0; regi < ppc_num_fprs; regi++) + { + if ((regno == -1) || (regno == tdep->ppc_fp0_regnum + regi)) + regcache_collect (tdep->ppc_fp0_regnum + regi, fpp + 8 * regi); + } + if (regno == -1 || regno == tdep->ppc_fpscr_regnum) + right_fill_reg (tdep->ppc_fpscr_regnum, (fpp + 8 * 32)); } - if ((regno == -1) || regno == tdep->ppc_fpscr_regnum) - right_fill_reg (tdep->ppc_fpscr_regnum, (fpp + 8 * 32)); } |