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authorFrank Ch. Eigler <fche@redhat.com>2002-02-05 19:40:45 +0000
committerFrank Ch. Eigler <fche@redhat.com>2002-02-05 19:40:45 +0000
commit9e93f657070562fcd7c8f62e019a346a901fe20e (patch)
treeb7ef73f5773843a23fd4649588b5885bfc534556 /include/dis-asm.h
parent3eb0055b08f3c9fd527165fb5d911d70bce91c56 (diff)
downloadgdb-9e93f657070562fcd7c8f62e019a346a901fe20e.tar.gz
* opcodes disassembler extension
[includes] 2002-02-04 Frank Ch. Eigler <fche@redhat.com> * dis-asm.h (disassemble_info): New field `insn_sets'. (INIT_DISASSEMBLE_INFO): Clear it. [opcodes] 2002-02-04 Frank Ch. Eigler <fche@redhat.com> * cgen-dis.in (print_insn_@arch@): Support disassemble_info.insn_sets.
Diffstat (limited to 'include/dis-asm.h')
-rw-r--r--include/dis-asm.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/include/dis-asm.h b/include/dis-asm.h
index 8cd848dbd39..5b9e390d34c 100644
--- a/include/dis-asm.h
+++ b/include/dis-asm.h
@@ -73,6 +73,11 @@ typedef struct disassemble_info {
unsigned long mach;
/* Endianness (for bi-endian cpus). Mono-endian cpus can ignore this. */
enum bfd_endian endian;
+ /* An arch/mach-specific bitmask of selected instruction subsets, mainly
+ for processors with run-time-switchable instruction sets. The default,
+ zero, means that there is no constraint. CGEN-based opcodes ports
+ may use ISA_foo masks. */
+ unsigned long insn_sets;
/* Some targets need information about the current section to accurately
display insns. If this is NULL, the target disassembler function
@@ -275,6 +280,7 @@ extern int generic_symbol_at_address
(INFO).flavour = bfd_target_unknown_flavour, \
(INFO).arch = bfd_arch_unknown, \
(INFO).mach = 0, \
+ (INFO).insn_sets = 0, \
(INFO).endian = BFD_ENDIAN_UNKNOWN, \
(INFO).octets_per_byte = 1, \
INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC)