2000-08-28 Dave Brolley <brolley@redhat.com>

	* cgen-ibld.in (cgen_put_insn_int_value): New function.
	(insert_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
	(insert_insn_normal): Use cgen_put_insn_int_value with CGEN_INT_INSN_P.
	(extract_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
	* cgen-dis.in (read_insn): New static function.
	(print_insn): Use read_insn to read the insn into the buffer and set
	up for disassembly.
	(print_insn): in CGEN_INT_INSN_P, make sure that the entire insn is
	in the buffer.
	* fr30-asm.c: Regenerated.
	* fr30-desc.c: Regenerated.
	* fr30-desc.h Regenerated.
	* fr30-dis.c: Regenerated.
	* fr30-ibld.c: Regenerated.
	* fr30-opc.c: Regenerated.
	* fr30-opc.h Regenerated.
	* m32r-asm.c: Regenerated.
	* m32r-desc.c: Regenerated.
	* m32r-desc.h Regenerated.
	* m32r-dis.c: Regenerated.
	* m32r-ibld.c: Regenerated.
	* m32r-opc.c: Regenerated.

1 files changed, 35 insertions, 34 deletions

diff --git a/opcodes/fr30-opc.c b/opcodes/fr30-opc.c
index 5ea7e0af0b8..3b37dcb8a67 100644
--- a/opcodes/fr30-opc.c
+++ b/opcodes/fr30-opc.c
@@ -28,6 +28,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
 #include "symcat.h"
 #include "fr30-desc.h"
 #include "fr30-opc.h"
+#include "libiberty.h"
 
 /* The hash functions are recorded here to help keep assembler code out of
    the disassembler and vice versa.  */
@@ -42,123 +43,123 @@ static unsigned int dis_hash_insn PARAMS ((const char *, CGEN_INSN_INT));
 #define F(f) & fr30_cgen_ifld_table[CONCAT2 (FR30_,f)]
 
 static const CGEN_IFMT ifmt_empty = {
-  0, 0, 0x0, { 0 }
+  0, 0, 0x0, { { 0 } }
 };
 
 static const CGEN_IFMT ifmt_add = {
-  16, 16, 0xff00, { F (F_OP1), F (F_OP2), F (F_RJ), F (F_RI), 0 }
+  16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_RJ) }, { F (F_RI) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_addi = {
-  16, 16, 0xff00, { F (F_OP1), F (F_OP2), F (F_U4), F (F_RI), 0 }
+  16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_U4) }, { F (F_RI) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_add2 = {
-  16, 16, 0xff00, { F (F_OP1), F (F_OP2), F (F_M4), F (F_RI), 0 }
+  16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_M4) }, { F (F_RI) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_div0s = {
-  16, 16, 0xfff0, { F (F_OP1), F (F_OP2), F (F_OP3), F (F_RI), 0 }
+  16, 16, 0xfff0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RI) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_div3 = {
-  16, 16, 0xffff, { F (F_OP1), F (F_OP2), F (F_OP3), F (F_OP4), 0 }
+  16, 16, 0xffff, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_OP4) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_ldi8 = {
-  16, 16, 0xf000, { F (F_OP1), F (F_I8), F (F_RI), 0 }
+  16, 16, 0xf000, { { F (F_OP1) }, { F (F_I8) }, { F (F_RI) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_ldi20 = {
-  16, 32, 0xff00, { F (F_OP1), F (F_I20), F (F_OP2), F (F_RI), 0 }
+  16, 32, 0xff00, { { F (F_OP1) }, { F (F_I20) }, { F (F_OP2) }, { F (F_RI) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_ldi32 = {
-  16, 48, 0xfff0, { F (F_OP1), F (F_I32), F (F_OP2), F (F_OP3), F (F_RI), 0 }
+  16, 48, 0xfff0, { { F (F_OP1) }, { F (F_I32) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RI) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_ldr14 = {
-  16, 16, 0xf000, { F (F_OP1), F (F_DISP10), F (F_RI), 0 }
+  16, 16, 0xf000, { { F (F_OP1) }, { F (F_DISP10) }, { F (F_RI) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_ldr14uh = {
-  16, 16, 0xf000, { F (F_OP1), F (F_DISP9), F (F_RI), 0 }
+  16, 16, 0xf000, { { F (F_OP1) }, { F (F_DISP9) }, { F (F_RI) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_ldr14ub = {
-  16, 16, 0xf000, { F (F_OP1), F (F_DISP8), F (F_RI), 0 }
+  16, 16, 0xf000, { { F (F_OP1) }, { F (F_DISP8) }, { F (F_RI) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_ldr15 = {
-  16, 16, 0xff00, { F (F_OP1), F (F_OP2), F (F_UDISP6), F (F_RI), 0 }
+  16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_UDISP6) }, { F (F_RI) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_ldr15dr = {
-  16, 16, 0xfff0, { F (F_OP1), F (F_OP2), F (F_OP3), F (F_RS2), 0 }
+  16, 16, 0xfff0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RS2) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_movdr = {
-  16, 16, 0xff00, { F (F_OP1), F (F_OP2), F (F_RS1), F (F_RI), 0 }
+  16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_RS1) }, { F (F_RI) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_call = {
-  16, 16, 0xf800, { F (F_OP1), F (F_OP5), F (F_REL12), 0 }
+  16, 16, 0xf800, { { F (F_OP1) }, { F (F_OP5) }, { F (F_REL12) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_int = {
-  16, 16, 0xff00, { F (F_OP1), F (F_OP2), F (F_U8), 0 }
+  16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_U8) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_brad = {
-  16, 16, 0xff00, { F (F_OP1), F (F_CC), F (F_REL9), 0 }
+  16, 16, 0xff00, { { F (F_OP1) }, { F (F_CC) }, { F (F_REL9) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_dmovr13 = {
-  16, 16, 0xff00, { F (F_OP1), F (F_OP2), F (F_DIR10), 0 }
+  16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_DIR10) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_dmovr13h = {
-  16, 16, 0xff00, { F (F_OP1), F (F_OP2), F (F_DIR9), 0 }
+  16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_DIR9) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_dmovr13b = {
-  16, 16, 0xff00, { F (F_OP1), F (F_OP2), F (F_DIR8), 0 }
+  16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_DIR8) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_copop = {
-  16, 32, 0xfff0, { F (F_OP1), F (F_CCC), F (F_OP2), F (F_OP3), F (F_CRJ), F (F_U4C), F (F_CRI), 0 }
+  16, 32, 0xfff0, { { F (F_OP1) }, { F (F_CCC) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_CRJ) }, { F (F_U4C) }, { F (F_CRI) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_copld = {
-  16, 32, 0xfff0, { F (F_OP1), F (F_CCC), F (F_OP2), F (F_OP3), F (F_RJC), F (F_U4C), F (F_CRI), 0 }
+  16, 32, 0xfff0, { { F (F_OP1) }, { F (F_CCC) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RJC) }, { F (F_U4C) }, { F (F_CRI) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_copst = {
-  16, 32, 0xfff0, { F (F_OP1), F (F_CCC), F (F_OP2), F (F_OP3), F (F_CRJ), F (F_U4C), F (F_RIC), 0 }
+  16, 32, 0xfff0, { { F (F_OP1) }, { F (F_CCC) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_CRJ) }, { F (F_U4C) }, { F (F_RIC) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_addsp = {
-  16, 16, 0xff00, { F (F_OP1), F (F_OP2), F (F_S10), 0 }
+  16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_S10) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_ldm0 = {
-  16, 16, 0xff00, { F (F_OP1), F (F_OP2), F (F_REGLIST_LOW_LD), 0 }
+  16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_REGLIST_LOW_LD) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_ldm1 = {
-  16, 16, 0xff00, { F (F_OP1), F (F_OP2), F (F_REGLIST_HI_LD), 0 }
+  16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_REGLIST_HI_LD) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_stm0 = {
-  16, 16, 0xff00, { F (F_OP1), F (F_OP2), F (F_REGLIST_LOW_ST), 0 }
+  16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_REGLIST_LOW_ST) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_stm1 = {
-  16, 16, 0xff00, { F (F_OP1), F (F_OP2), F (F_REGLIST_HI_ST), 0 }
+  16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_REGLIST_HI_ST) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_enter = {
-  16, 16, 0xff00, { F (F_OP1), F (F_OP2), F (F_U10), 0 }
+  16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_U10) }, { 0 } }
 };
 
 #undef F
@@ -175,7 +176,7 @@ static const CGEN_OPCODE fr30_cgen_insn_opcode_table[MAX_INSNS] =
   /* Special null first entry.
      A `num' value of zero is thus invalid.
      Also, the special `invalid' insn resides here.  */
-  { { 0 } },
+  { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
 /* add $Rj,$Ri */
   {
     { 0, 0, 0, 0 },
@@ -1178,15 +1179,15 @@ static const CGEN_OPCODE fr30_cgen_insn_opcode_table[MAX_INSNS] =
 #define F(f) & fr30_cgen_ifld_table[CONCAT2 (FR30_,f)]
 
 static const CGEN_IFMT ifmt_ldi8m = {
-  16, 16, 0xf000, { F (F_OP1), F (F_I8), F (F_RI), 0 }
+  16, 16, 0xf000, { { F (F_OP1) }, { F (F_I8) }, { F (F_RI) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_ldi20m = {
-  16, 32, 0xff00, { F (F_OP1), F (F_OP2), F (F_RI), F (F_I20), 0 }
+  16, 32, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_RI) }, { F (F_I20) }, { 0 } }
 };
 
 static const CGEN_IFMT ifmt_ldi32m = {
-  16, 48, 0xfff0, { F (F_OP1), F (F_OP2), F (F_OP3), F (F_RI), F (F_I32), 0 }
+  16, 48, 0xfff0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RI) }, { F (F_I32) }, { 0 } }
 };
 
 #undef F