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authorH.J. Lu <hjl@lucon.org>2005-03-29 19:30:46 +0000
committerH.J. Lu <hjl@lucon.org>2005-03-29 19:30:46 +0000
commitb22e5743d313a6fe7bf3c298db203da340796449 (patch)
tree847c038136c15e9b4cc616d0c6930809deb7a7e4 /opcodes/i386-dis.c
parent3839323d98020519a11cda2717ff9a0ff5a8ec15 (diff)
downloadgdb-b22e5743d313a6fe7bf3c298db203da340796449.tar.gz
gas/testsuite/
2005-03-29 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run segment and inval-seg for i386. Run x86-64-segment and x86-64-inval-seg for x86-64. * gas/i386/intel.d: Expect movw for moving between memory and segment register. * gas/i386/naked.d: Likewise. * gas/i386/opcode.d: Likewise. * gas/i386/x86-64-opcode.d: Likewise. * gas/i386/opcode.s: Use movw for moving between memory and segment register. * gas/i386/x86-64-opcode.s: Likewise. * : Likewise. * gas/i386/inval-seg.l: New. * gas/i386/inval-seg.s: New. * gas/i386/segment.l: New. * gas/i386/segment.s: New. * gas/i386/x86-64-inval-seg.l: New. * gas/i386/x86-64-inval-seg.s: New. * gas/i386/x86-64-segment.l: New. * gas/i386/x86-64-segment.s: New. include/opcode/ 2005-03-29 H.J. Lu <hongjiu.lu@intel.com> * i386.h (i386_optab): Don't allow the `l' suffix for moving moving between memory and segment register. Allow movq for moving between general-purpose register and segment register. opcodes/ 2005-03-29 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (SEG_Fixup): New. (Sv): New. (dis386): Use "Sv" for 0x8c and 0x8e.
Diffstat (limited to 'opcodes/i386-dis.c')
-rw-r--r--opcodes/i386-dis.c55
1 files changed, 53 insertions, 2 deletions
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 24e5a393ed2..a2a5a06f726 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -97,6 +97,7 @@ static void SIMD_Fixup (int, int);
static void PNI_Fixup (int, int);
static void INVLPG_Fixup (int, int);
static void BadOp (void);
+static void SEG_Fixup (int, int);
struct dis_private {
/* Points to first byte not fetched. */
@@ -221,6 +222,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
#define Cm OP_C, m_mode
#define Dm OP_D, m_mode
#define Td OP_T, d_mode
+#define Sv SEG_Fixup, v_mode
#define RMeAX OP_REG, eAX_reg
#define RMeBX OP_REG, eBX_reg
@@ -642,9 +644,9 @@ static const struct dis386 dis386[] = {
{ "movS", Ev, Gv, XX },
{ "movB", Gb, Eb, XX },
{ "movS", Gv, Ev, XX },
- { "movQ", Ev, Sw, XX },
+ { "movQ", Sv, Sw, XX },
{ "leaS", Gv, M, XX },
- { "movQ", Sw, Ev, XX },
+ { "movQ", Sw, Sv, XX },
{ "popU", Ev, XX, XX },
/* 90 */
{ "nop", NOP_Fixup, 0, XX, XX },
@@ -4411,3 +4413,52 @@ BadOp (void)
codep = insn_codep + 1;
oappend ("(bad)");
}
+
+static void
+SEG_Fixup (int extrachar, int sizeflag)
+{
+ if (mod == 3)
+ {
+ /* We need to add a proper suffix with
+
+ movw %ds,%ax
+ movl %ds,%eax
+ movq %ds,%rax
+ movw %ax,%ds
+ movl %eax,%ds
+ movq %rax,%ds
+ */
+ const char *suffix;
+
+ if (prefixes & PREFIX_DATA)
+ suffix = "w";
+ else
+ {
+ USED_REX (REX_MODE64);
+ if (rex & REX_MODE64)
+ suffix = "q";
+ else
+ suffix = "l";
+ }
+ strcat (obuf, suffix);
+ }
+ else
+ {
+ /* We need to fix the suffix for
+
+ movw %ds,(%eax)
+ movw %ds,(%rax)
+ movw (%eax),%ds
+ movw (%rax),%ds
+
+ Override "mov[l|q]". */
+ char *p = obuf + strlen (obuf) - 1;
+
+ /* We might not have a suffix. */
+ if (*p == 'v')
+ ++p;
+ *p = 'w';
+ }
+
+ OP_E (extrachar, sizeflag);
+}