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author | Michael Meissner <gnu@the-meissners.org> | 2007-09-14 18:21:09 +0000 |
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committer | Michael Meissner <gnu@the-meissners.org> | 2007-09-14 18:21:09 +0000 |
commit | 63b9ede1dca6a16024764cac215ad8f9ea8009a8 (patch) | |
tree | 83dd77295b4e1396d424c2835d993ac5d1bbf3a5 /opcodes/i386-init.h | |
parent | 8dbcf822bb3c6448d257add45acb51374917cd76 (diff) | |
download | gdb-63b9ede1dca6a16024764cac215ad8f9ea8009a8.tar.gz |
Add AMD SSE5 support
Diffstat (limited to 'opcodes/i386-init.h')
-rw-r--r-- | opcodes/i386-init.h | 72 |
1 files changed, 38 insertions, 34 deletions
diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h index e9b9aadfc59..be9a5442f9d 100644 --- a/opcodes/i386-init.h +++ b/opcodes/i386-init.h @@ -20,139 +20,143 @@ #define CPU_UNKNOWN_FLAGS \ { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ - 1, 1, 1, 1, 1, 0, 1, 1 } } + 1, 1, 1, 1, 1, 1, 0, 1, 1 } } #define CPU_GENERIC32_FLAGS \ { { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_GENERIC64_FLAGS \ { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_NONE_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_I186_FLAGS \ { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_I286_FLAGS \ { { 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_I386_FLAGS \ { { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_I486_FLAGS \ { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_I586_FLAGS \ { { 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_I686_FLAGS \ { { 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_P2_FLAGS \ { { 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_P3_FLAGS \ { { 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_P4_FLAGS \ { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_NOCONA_FLAGS \ { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, \ - 0, 0, 0, 0, 1, 0, 0, 0 } } + 0, 0, 0, 0, 0, 1, 0, 0, 0 } } #define CPU_CORE_FLAGS \ { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_CORE2_FLAGS \ { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 1, \ - 0, 0, 0, 0, 1, 0, 0, 0 } } + 0, 0, 0, 0, 0, 1, 0, 0, 0 } } #define CPU_K6_FLAGS \ { { 1, 1, 1, 1, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_K6_2_FLAGS \ { { 1, 1, 1, 1, 1, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_ATHLON_FLAGS \ { { 1, 1, 1, 1, 1, 1, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_K8_FLAGS \ { { 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 1, 0, 0, 0 } } + 0, 0, 0, 0, 0, 1, 0, 0, 0 } } #define CPU_AMDFAM10_FLAGS \ { { 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, \ - 1, 1, 0, 0, 1, 0, 0, 0 } } + 1, 1, 0, 0, 0, 1, 0, 0, 0 } } #define CPU_MMX_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_SSE_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_SSE2_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_SSE3_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_SSSE3_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 1, \ - 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_SSE4_1_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 1, \ - 0, 0, 1, 0, 0, 0, 0, 0 } } + 0, 0, 1, 0, 0, 0, 0, 0, 0 } } #define CPU_SSE4_2_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 1, \ - 0, 0, 1, 1, 0, 0, 0, 0 } } + 0, 0, 1, 1, 0, 0, 0, 0, 0 } } #define CPU_3DNOW_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_3DNOWA_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_PADLOCK_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_SVME_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0 } } + 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_SSE4A_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, \ - 1, 0, 0, 0, 0, 0, 0, 0 } } + 1, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_ABM_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 1, 0, 0, 0, 0, 0, 0 } } + 0, 1, 0, 0, 0, 0, 0, 0, 0 } } + +#define CPU_SSE5_FLAGS \ + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, \ + 1, 1, 0, 0, 1, 0, 0, 0, 0 } } #define OPERAND_TYPE_NONE \ |