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authorDJ Delorie <dj@delorie.com>2005-10-27 23:54:17 +0000
committerDJ Delorie <dj@delorie.com>2005-10-27 23:54:17 +0000
commita0072d3776f4ab1f6ba79dcc7522da1f719fc13a (patch)
treede4812af4c8ed2dec6651c6ea467609dd7523840 /opcodes/m32c-dis.c
parent8b97abf61871424711eae339f9cd53a2c0b843f9 (diff)
downloadgdb-a0072d3776f4ab1f6ba79dcc7522da1f719fc13a.tar.gz
* m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
(arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn, arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which imm operand is needed. (adjnz, sbjnz): Pass the right operands. (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach, unary-insn): Add -g variants for opcodes that need to support :G. (not.BW:G, push.BW:G): Call it. (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb, stzx16-imm8-imm8-abs16): Fix operand typos. * m32c.opc (m32c_asm_hash): Support bnCND. (parse_signed4n, print_signed4n): New. * m32c-asm.c: Regenerate. * m32c-desc.c: Regenerate. * m32c-desc.h: Regenerate. * m32c-dis.c: Regenerate. * m32c-ibld.c: Regenerate. * m32c-opc.c: Regenerate. * m32c-opc.h: Regenerate.
Diffstat (limited to 'opcodes/m32c-dis.c')
-rw-r--r--opcodes/m32c-dis.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/opcodes/m32c-dis.c b/opcodes/m32c-dis.c
index 1aaaa897abb..cfa3517cb1b 100644
--- a/opcodes/m32c-dis.c
+++ b/opcodes/m32c-dis.c
@@ -262,6 +262,19 @@ print_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
print_regset (cd, dis_info, value, attrs, pc, length, PUSH);
}
+static void
+print_signed4n (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info,
+ signed long value,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+ disassemble_info *info = dis_info;
+
+ (*info->fprintf_func) (info->stream, "%ld", -value);
+}
+
void m32c_cgen_print_operand
(CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int);
@@ -572,6 +585,9 @@ m32c_cgen_print_operand (CGEN_CPU_DESC cd,
case M32C_OPERAND_IMM_12_S4 :
print_normal (cd, info, fields->f_imm_12_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
+ case M32C_OPERAND_IMM_12_S4N :
+ print_signed4n (cd, info, fields->f_imm_12_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
+ break;
case M32C_OPERAND_IMM_13_U3 :
print_normal (cd, info, fields->f_imm_13_u3, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
@@ -641,6 +657,9 @@ m32c_cgen_print_operand (CGEN_CPU_DESC cd,
case M32C_OPERAND_IMM_8_S4 :
print_normal (cd, info, fields->f_imm_8_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
+ case M32C_OPERAND_IMM_8_S4N :
+ print_normal (cd, info, fields->f_imm_8_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
+ break;
case M32C_OPERAND_IMM_SH_12_S4 :
print_keyword (cd, info, & m32c_cgen_opval_h_shimm, fields->f_imm_12_s4, 0);
break;