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| author | Chris Demetriou <cgd@google.com> | 2003-09-30 16:17:15 +0000 |
|---|---|---|
| committer | Chris Demetriou <cgd@google.com> | 2003-09-30 16:17:15 +0000 |
| commit | 1393f652d71c0c84faba5a69fbb02aa459b8f8de (patch) | |
| tree | 2f20a49c18dd8df2bfcfeae5aad820d49576a809 /opcodes/mips-dis.c | |
| parent | 87df5cd6bfb2653c6552c3535dd6cf2e3a83f739 (diff) | |
| download | gdb-1393f652d71c0c84faba5a69fbb02aa459b8f8de.tar.gz | |
[ bfd/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* archures.c (bfd_mach_mipsisa64r2): New define.
* bfd-in2.h: Regenerate.
* aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mipsisa64r2.
* cpu-mips.c (I_mipsisa64r2): New enum value.
(arch_info_struct): Add entry for I_mipsisa64r2.
* elfxx-mips.c (_bfd_elf_mips_mach)
(_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_64R2.
(mips_set_isa_flags): Add bfd_mach_mipsisa64r2 case.
(mips_mach_extensions): Add entry for bfd_mach_mipsisa64r2.
[ binutils/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* readelf.c (get_machine_flags): Handle E_MIPS_ARCH_64R2.
[ gas/Changelog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* configure.in (mipsisa64r2, mipsisa64r2el, mipsisa64r2*): New CPUs.
* configure: Regenerate.
* config/tc-mips.c (imm2_expr): New variable.
(md_assemble, mips16_ip): Initialize imm2_expr.
(ISA_HAS_64BIT_REGS, ISA_HAS_DROR, ISA_HAS_ROR): Add ISA_MIPS64R2.
(macro_build): Handle +A, +B, +C, +E, +F, +G, and +H format operands.
(macro): Handle M_DEXT and M_DINS.
(validate_mips_insn): Handle +E, +F, +G, +H, and +I format operands.
(mips_ip): Likewise.
(OPTION_MIPS64R2): New define.
(md_longopts): New entry for -mips64r2 (OPTION_MIPS64R2).
OPTION_ASE_BASE): Increase to compensate for OPTION_MIPS64R2.
(md_parse_option): Handle OPTION_MIPS64R2.
(s_mipsset): Handle setting "mips64r2" ISA.
(mips_cpu_info_table): Add mips64r2.
(md_show_usage): Document -mips64r2 option.
* doc/as.texinfo: Docuemnt -mips64r2 option.
* doc/c-mips.texi: Likewise.
[ gas/testsuite/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* gas/mips/cp0-names-mips64r2.d: New file.
* gas/mips/cp0sel-names-mips64r2.d: New file.
* gas/mips/elf_arch_mips64r2.d: New file.
* gas/mips/hwr-names-mips64r2.d: New file.
* gas/mips/mips32r2-ill-fp64.l: New file.
* gas/mips/mips32r2-ill-fp64.s: New file.
* gas/mips/mips64r2-ill.l: New file.
* gas/mips/mips64r2-ill.s: New file.
* gas/mips/mips64r2.d: New file.
* gas/mips/mips64r2.s: New file.
* gas/mips/mips.exp: Define "mips64r2" arch, and run new tests.
[ include/elf/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* mips.h (E_MIPS_ARCH_64R2): New define.
[ include/opcode/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* mips.h: Document +E, +F, +G, +H, and +I operand types.
Update documentation of I, +B and +C operand types.
(INSN_ISA64R2, ISA_MIPS64R2, CPU_MIPS64R2): New defines.
(M_DEXT, M_DINS): New enum values.
[ ld/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* ldmain.c (get_emulation): Ignore "-mips64r2".
[ ld/testsuite/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* ld-mips-elf/mips-elf-flags.exp: Add tests for combinations
with MIPS64r2.
[ opcodes/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_arch_choices): Add entry for "mips64r2"
(print_insn_args): Add handing for +E, +F, +G, and +H.
* mips-opc.c (I65): New define for MIPS64r2.
(mips_builtin_opcodes): Add "dext", "dextm", "dextu", "dins",
"dinsm", "dinsu", "drotl", "drotr", "drotr32", "drotrv", "dsbh",
and "dshd" for MIPS64r2. Adjust "dror", "dror32", and "drorv" to
be supported on MIPS64r2.
Diffstat (limited to 'opcodes/mips-dis.c')
| -rw-r--r-- | opcodes/mips-dis.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c index af6c445a561..43fcb3ca79a 100644 --- a/opcodes/mips-dis.c +++ b/opcodes/mips-dis.c @@ -384,6 +384,12 @@ const struct mips_arch_choice mips_arch_choices[] = { mips_cp0sel_names_mips3264, ARRAY_SIZE (mips_cp0sel_names_mips3264), mips_hwr_names_numeric }, + { "mips64r2", 1, bfd_mach_mipsisa64r2, CPU_MIPS64R2, + ISA_MIPS64R2 | INSN_MIPS16 | INSN_MIPS3D | INSN_MDMX, + mips_cp0_names_mips3264r2, + mips_cp0sel_names_mips3264r2, ARRAY_SIZE (mips_cp0sel_names_mips3264r2), + mips_hwr_names_mips3264r2 }, + { "sb1", 1, bfd_mach_mips_sb1, CPU_SB1, ISA_MIPS64 | INSN_MIPS3D | INSN_SB1, mips_cp0_names_sb1, @@ -714,6 +720,7 @@ print_insn_args (d, l, pc, info) break; case 'C': + case 'H': msbd = (l >> OP_SH_EXTMSBD) & OP_MASK_EXTMSBD; (*info->fprintf_func) (info->stream, "0x%x", msbd + 1); break; @@ -740,6 +747,21 @@ print_insn_args (d, l, pc, info) break; } + case 'E': + lsb = ((l >> OP_SH_SHAMT) & OP_MASK_SHAMT) + 32; + (*info->fprintf_func) (info->stream, "0x%x", lsb); + break; + + case 'F': + msb = ((l >> OP_SH_INSMSB) & OP_MASK_INSMSB) + 32; + (*info->fprintf_func) (info->stream, "0x%x", msb - lsb + 1); + break; + + case 'G': + msbd = ((l >> OP_SH_EXTMSBD) & OP_MASK_EXTMSBD) + 32; + (*info->fprintf_func) (info->stream, "0x%x", msbd + 1); + break; + default: /* xgettext:c-format */ (*info->fprintf_func) (info->stream, |