bfd:

	Add ms2.
	* archures.c (bfd_mach_ms2): Define.
	* cpu-ms1.c (arch_info_struct): Add ms2 stanza.
	* elf32-ms1.c (elf32_ms1_machine): Add ms2 case.
	(ms1_elf_merge_private_bfd_data): Remove unused variables.  Add
	correct merging logic, with workaround.
	(ms1_elf_print_private_bfd_data): Add ms2 case.
	* reloc.c (BFD_RELOC_MS1_PCINSN8): Add ms2 specific reloc.
	* libbfd.h: Regenerated.
	* bfd-in2.h: Regenerated.

cpu:
	Add ms2
	* ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
	model.
	(f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
	f-cb2incr, f-rc3): New fields.
	(LOOP): New instruction.
	(JAL-HAZARD): New hazard.
	(imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
	New operands.
	(mul, muli, dbnz, iflush): Enable for ms2
	(jal, reti): Has JAL-HAZARD.
	(ldctxt, ldfb, stfb): Only ms1.
	(fbcb): Only ms1,ms1-003.
	(wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
	fbcbincrs, mfbcbincrs): Enable for ms2.
	(loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
	* ms1.opc (parse_loopsize): New.
	(parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
	(print_pcrel): New.

gas:
	Add ms2.
	* config/tc-ms1.c (ms1_mach_bitmask): Initialize to MS1.
	(ms1_architectures): Add ms2.
	(md_parse_option): Add ms2.
	(md_show_usage): Add ms2.
	(md_assemble): Add JAL_HAZARD detection logic.
	(md_cgen_lookup_reloc): Add MS1_OPERAND_LOOPSIZE case.
	* doc/c-ms1.texi: New.
	* doc/all.texi: Add MS1.
	* doc/Makefile.am (CPU_DOCS): Add c-ms1.texi.
	* doc/Makefile.in: Rebuilt.
	* doc/Makefile: Rebuilt.

gas/testsuite:
	Add ms2.
	* gas/ms1/allinsn.d: Adjust pcrel disassembly.
	* gas/ms1/errors.exp: Fix target triplet.
	* gas/ms1/ms1-16-003.d: Adjust pcrel disassembly.
	* gas/ms1/ms1-16-003.s: Tweak label.
	* gas/ms1/ms1.exp: Adjust target triplet.  Add ms2 test.
	* gas/ms1/ms2.d, gas/ms1/ms2.s: New.
	* gas/ms1/relocs.d: Adjust expected machine name and pcrel
	disassembly.
	* gas/ms1/relocs.exp: Adjust target triplet.

include:
	Add ms2.
	* elf/ms1.h (EF_MS1_CPU_MS2): New.


opcodes:
	Add ms2.
	* ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
	ms1-opc.c, ms1-opc.h: Regenerated.

1 files changed, 49 insertions, 1 deletions

diff --git a/opcodes/ms1-asm.c b/opcodes/ms1-asm.c
index 528a0d5eebe..177198e4991 100644
--- a/opcodes/ms1-asm.c
+++ b/opcodes/ms1-asm.c
@@ -61,6 +61,31 @@ signed_out_of_bounds (long val)
 }
 
 static const char *
+parse_loopsize (CGEN_CPU_DESC cd,
+		const char **strp,
+		int opindex,
+		void *arg)
+{
+  signed long * valuep = (signed long *) arg;
+  const char *errmsg;
+  bfd_reloc_code_real_type code = BFD_RELOC_NONE;
+  enum cgen_parse_operand_result result_type;
+  bfd_vma value;
+
+  /* Is it a control transfer instructions?  */ 
+  if (opindex == (CGEN_OPERAND_TYPE) MS1_OPERAND_LOOPSIZE)
+    {
+      code = BFD_RELOC_MS1_PCINSN8;
+      errmsg = cgen_parse_address (cd, strp, opindex, code,
+                                   & result_type, & value);
+      *valuep = value;
+      return errmsg;
+    }
+
+  abort ();
+}
+
+static const char *
 parse_imm16 (CGEN_CPU_DESC cd,
 	     const char **strp,
 	     int opindex,
@@ -89,7 +114,9 @@ parse_imm16 (CGEN_CPU_DESC cd,
 
   /* If it's not a control transfer instruction, then
      we have to check for %OP relocating operators.  */
-  if (strncmp (*strp, "%hi16", 5) == 0)
+  if (opindex == (CGEN_OPERAND_TYPE) MS1_OPERAND_IMM16L)
+    ;
+  else if (strncmp (*strp, "%hi16", 5) == 0)
     {
       *strp += 5;
       code = BFD_RELOC_HI16;
@@ -417,6 +444,18 @@ ms1_cgen_parse_operand (CGEN_CPU_DESC cd,
     case MS1_OPERAND_BRC2 :
       errmsg = cgen_parse_unsigned_integer (cd, strp, MS1_OPERAND_BRC2, (unsigned long *) (& fields->f_brc2));
       break;
+    case MS1_OPERAND_CB1INCR :
+      errmsg = cgen_parse_signed_integer (cd, strp, MS1_OPERAND_CB1INCR, (long *) (& fields->f_cb1incr));
+      break;
+    case MS1_OPERAND_CB1SEL :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, MS1_OPERAND_CB1SEL, (unsigned long *) (& fields->f_cb1sel));
+      break;
+    case MS1_OPERAND_CB2INCR :
+      errmsg = cgen_parse_signed_integer (cd, strp, MS1_OPERAND_CB2INCR, (long *) (& fields->f_cb2incr));
+      break;
+    case MS1_OPERAND_CB2SEL :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, MS1_OPERAND_CB2SEL, (unsigned long *) (& fields->f_cb2sel));
+      break;
     case MS1_OPERAND_CBRB :
       errmsg = parse_cbrb (cd, strp, MS1_OPERAND_CBRB, (unsigned long *) (& fields->f_cbrb));
       break;
@@ -474,6 +513,9 @@ ms1_cgen_parse_operand (CGEN_CPU_DESC cd,
     case MS1_OPERAND_IMM16 :
       errmsg = parse_imm16 (cd, strp, MS1_OPERAND_IMM16, (long *) (& fields->f_imm16s));
       break;
+    case MS1_OPERAND_IMM16L :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, MS1_OPERAND_IMM16L, (unsigned long *) (& fields->f_imm16l));
+      break;
     case MS1_OPERAND_IMM16O :
       errmsg = parse_imm16 (cd, strp, MS1_OPERAND_IMM16O, (unsigned long *) (& fields->f_imm16s));
       break;
@@ -489,6 +531,9 @@ ms1_cgen_parse_operand (CGEN_CPU_DESC cd,
     case MS1_OPERAND_LENGTH :
       errmsg = cgen_parse_unsigned_integer (cd, strp, MS1_OPERAND_LENGTH, (unsigned long *) (& fields->f_length));
       break;
+    case MS1_OPERAND_LOOPSIZE :
+      errmsg = parse_loopsize (cd, strp, MS1_OPERAND_LOOPSIZE, (unsigned long *) (& fields->f_loopo));
+      break;
     case MS1_OPERAND_MASK :
       errmsg = cgen_parse_unsigned_integer (cd, strp, MS1_OPERAND_MASK, (unsigned long *) (& fields->f_mask));
       break;
@@ -513,6 +558,9 @@ ms1_cgen_parse_operand (CGEN_CPU_DESC cd,
     case MS1_OPERAND_RC2 :
       errmsg = parse_rc (cd, strp, MS1_OPERAND_RC2, (unsigned long *) (& fields->f_rc2));
       break;
+    case MS1_OPERAND_RC3 :
+      errmsg = parse_rc (cd, strp, MS1_OPERAND_RC3, (unsigned long *) (& fields->f_rc3));
+      break;
     case MS1_OPERAND_RCNUM :
       errmsg = cgen_parse_unsigned_integer (cd, strp, MS1_OPERAND_RCNUM, (unsigned long *) (& fields->f_rcnum));
       break;