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authorNick Clifton <nickc@redhat.com>2009-06-29 08:08:14 +0000
committerNick Clifton <nickc@redhat.com>2009-06-29 08:08:14 +0000
commit592efc20ece7c6677b4f1be2cf0d3b5acd943df6 (patch)
tree0f13338f61bf6108a5795da97f28982ed4c77532 /opcodes/mt-dis.c
parentbe991f2f7be9379b609c6bffebe2f086cc9d5d01 (diff)
downloadgdb-592efc20ece7c6677b4f1be2cf0d3b5acd943df6.tar.gz
PR 10288
* arm-dis.c (enum opcode_sentinels): New: Used to mark the boundary between variaant and generic coprocessor instuctions. (coprocessor): Use it. Fix architecture version of MCRR and MRRC instructions. (arm_opcdes): Fix patterns for STRB and STRH instructions. (print_insn_coprocessor): Check architecture and extension masks. Print a hexadecimal version of any decimal constant that is outside of the range of -16 to +32. (print_arm_address): Add a return value of the offset used in the adress, if it is worth printing a hexadecimal version of it. (print_insn_neon): Print a hexadecimal version of any decimal constant that is outside of the range of -16 to +32. (print_insn_arm): Likewise. (print_insn_thumb16): Likewise. (print_insn_thumb32): Likewise. PR 10297 * arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description of an undefined instruction. (arm_opcodes): Use it. (thumb_opcod): Use it. (thumb32_opc): Use it. Update expected disassembly regrexps in GAS and LD testsuites.
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