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authorAlan Modra <amodra@bigpond.net.au>2001-10-20 13:50:16 +0000
committerAlan Modra <amodra@bigpond.net.au>2001-10-20 13:50:16 +0000
commit2d9aa0f92d18bf6a99e49d40c887bd569caea155 (patch)
treee94283d17e1d7dcb872e921be8d017aa2af50743 /opcodes
parent1d5401338480b57efcf8c71ce9e2b979fb43b6e6 (diff)
downloadgdb-2d9aa0f92d18bf6a99e49d40c887bd569caea155.tar.gz
* ppc-opc.c (CT): Make it an optional operand.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog4
-rw-r--r--opcodes/ppc-opc.c2
2 files changed, 5 insertions, 1 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index f8269b256b8..5a474399a2c 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2001-10-20 Alan Modra <amodra@bigpond.net.au>
+
+ * ppc-opc.c (CT): Make it an optional operand.
+
2001-10-17 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_isa_type): Make the ISA used to disassemble
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index 8aab61baeca..82f8d569813 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -195,7 +195,7 @@ const struct powerpc_operand powerpc_operands[] =
/* The CT field in an X form instruction. */
#define CT CR + 1
- { 5, 21, 0, 0, 0 },
+ { 5, 21, 0, 0, PPC_OPERAND_OPTIONAL },
/* The D field in a D form instruction. This is a displacement off
a register, and implies that the next operand is a register in