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| author | Jan Beulich <jbeulich@novell.com> | 2008-02-13 13:41:26 +0000 |
|---|---|---|
| committer | Jan Beulich <jbeulich@novell.com> | 2008-02-13 13:41:26 +0000 |
| commit | 6bc54bb14e27078ccec0052c432dbf96e20892b6 (patch) | |
| tree | ccd745967d717b9f71c154ae8acf9cb12583b0b4 /opcodes | |
| parent | 942f2129223fff848732740896281f8271eac2ac (diff) | |
| download | gdb-6bc54bb14e27078ccec0052c432dbf96e20892b6.tar.gz | |
gas/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (parse_real_register): Don't return 'FLAT'
if not in Intel mode.
(i386_intel_operand): Ignore segment overrides in immediate and
offset operands.
(intel_e11): Range-check i.mem_operands before use as array
index. Filter out FLAT for uses other than as segment override.
(intel_get_token): Remove broken promotion of "FLAT:" to mean
"offset FLAT:".
gas/testsuite/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* gas/i386/intelok.s: Replace invalid offset expression with
valid ones.
* gas/i386/x86_64.s: Likewise.
opcodes/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* i386-opc.h (RegFlat): New.
* i386-reg.tbl (flat): Add.
* i386-tbl.h: Re-generate.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 6 | ||||
| -rw-r--r-- | opcodes/i386-opc.h | 2 | ||||
| -rw-r--r-- | opcodes/i386-reg.tbl | 1 | ||||
| -rw-r--r-- | opcodes/i386-tbl.h | 5 |
4 files changed, 14 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index a2d9646e18c..d6a245a8c25 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,11 @@ 2008-02-13 Jan Beulich <jbeulich@novell.com> + * i386-opc.h (RegFlat): New. + * i386-reg.tbl (flat): Add. + * i386-tbl.h: Re-generate. + +2008-02-13 Jan Beulich <jbeulich@novell.com> + * i386-dis.c (a_mode): New. (cond_jump_mode): Adjust. (Ma): Change to a_mode. diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index 95c315b9723..d66f02bbbde 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -501,6 +501,8 @@ typedef struct /* EIZ and RIZ are fake index registers. */ #define RegEiz (RegEip - 1) #define RegRiz (RegEiz - 1) +/* FLAT is a fake segment register (Intel mode). */ +#define RegFlat ((unsigned char) ~0) signed char dw2_regnum[2]; #define Dw2Inval (-1) } diff --git a/opcodes/i386-reg.tbl b/opcodes/i386-reg.tbl index 11f2ee74a92..6aa89fc4d94 100644 --- a/opcodes/i386-reg.tbl +++ b/opcodes/i386-reg.tbl @@ -103,6 +103,7 @@ ss, SReg2, 0, 2, 42, 52 ds, SReg2, 0, 3, 43, 53 fs, SReg3, 0, 4, 44, 54 gs, SReg3, 0, 5, 45, 55 +flat, SReg3, 0, RegFlat, Dw2Inval, Dw2Inval // Control registers. cr0, Control, 0, 0, Dw2Inval, Dw2Inval cr1, Control, 0, 1, Dw2Inval, Dw2Inval diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h index 13ad14fc28d..36399b532c8 100644 --- a/opcodes/i386-tbl.h +++ b/opcodes/i386-tbl.h @@ -17385,6 +17385,11 @@ const reg_entry i386_regtab[] = 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, 0, 5, { 45, 55 } }, + { "flat", + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0 } }, + 0, RegFlat, { Dw2Inval, Dw2Inval } }, { "cr0", { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |