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authorH.J. Lu <hjl@lucon.org>2006-06-12 18:55:44 +0000
committerH.J. Lu <hjl@lucon.org>2006-06-12 18:55:44 +0000
commit47027494566cf62a7fa3583701fec2cd68c6b8ff (patch)
treed7de54026a6348a727ae8bb4e5edca451c4745e5 /opcodes
parenta64abfed593f552156806dc8749c383bc6ec915d (diff)
downloadgdb-47027494566cf62a7fa3583701fec2cd68c6b8ff.tar.gz
gas/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (process_suffix): Don't add rex64 for "xchg %rax,%rax". gas/testsuite/ 2006-06-12 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/opcode.s: Add "xchg %ax,%ax". * gas/i386/opcode.d: Updated. * gas/i386/x86-64-opcode.s: Add xchg %ax,%ax, xchg %eax,%eax, xchg %rax,%rax, rex64 xchg %rax,%rax and xchg %rax,%r8. * gas/i386/x86-64-opcode.d: Updated. include/opcode/ 2006-06-12 H.J. Lu <hongjiu.lu@intel.com> * i386.h (i386_optab): Update comment for 64bit NOP. opcodes/ 2006-06-12 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (NOP_Fixup): Removed. (NOP_Fixup1): New. (NOP_Fixup2): Likewise. (dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog7
-rw-r--r--opcodes/i386-dis.c26
2 files changed, 29 insertions, 4 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 0357828ce21..826c54ec912 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,10 @@
+2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (NOP_Fixup): Removed.
+ (NOP_Fixup1): New.
+ (NOP_Fixup2): Likewise.
+ (dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
+
2006-06-12 Julian Brown <julian@codesourcery.com>
* arm-dis.c (print_insn_neon): Disassemble 32-bit immediates as signed
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 39016193b59..49a3e9ff72e 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -91,7 +91,8 @@ static void OP_M (int, int);
static void OP_VMX (int, int);
static void OP_0fae (int, int);
static void OP_0f07 (int, int);
-static void NOP_Fixup (int, int);
+static void NOP_Fixup1 (int, int);
+static void NOP_Fixup2 (int, int);
static void OP_3DNowSuffix (int, int);
static void OP_SIMD_Suffix (int, int);
static void SIMD_Fixup (int, int);
@@ -679,7 +680,7 @@ static const struct dis386 dis386[] = {
{ "movQ", Sw, Sv, XX },
{ "popU", stackEv, XX, XX },
/* 90 */
- { "nop", NOP_Fixup, 0, XX, XX },
+ { "xchgS", NOP_Fixup1, eAX_reg, NOP_Fixup2, eAX_reg, XX },
{ "xchgS", RMeCX, eAX, XX },
{ "xchgS", RMeDX, eAX, XX },
{ "xchgS", RMeBX, eAX, XX },
@@ -4360,12 +4361,29 @@ OP_0fae (int bytemode, int sizeflag)
OP_E (bytemode, sizeflag);
}
+/* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
+ 32bit mode and "xchg %rax,%rax" in 64bit mode. NOP with REPZ prefix
+ is called PAUSE. We display "xchg %ax,%ax" instead of "data16 nop".
+ */
+
static void
-NOP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
+NOP_Fixup1 (int bytemode, int sizeflag)
{
- /* NOP with REPZ prefix is called PAUSE. */
if (prefixes == PREFIX_REPZ)
strcpy (obuf, "pause");
+ else if (prefixes == PREFIX_DATA
+ || ((rex & REX_MODE64) && rex != 0x48))
+ OP_REG (bytemode, sizeflag);
+ else
+ strcpy (obuf, "nop");
+}
+
+static void
+NOP_Fixup2 (int bytemode, int sizeflag)
+{
+ if (prefixes == PREFIX_DATA
+ || ((rex & REX_MODE64) && rex != 0x48))
+ OP_IMREG (bytemode, sizeflag);
}
static const char *const Suffix3DNow[] = {