diff options
| author | Jan Beulich <jbeulich@novell.com> | 2012-07-31 07:38:41 +0000 |
|---|---|---|
| committer | Jan Beulich <jbeulich@novell.com> | 2012-07-31 07:38:41 +0000 |
| commit | 093945b35e5881edb6060ba59d1ccab417056548 (patch) | |
| tree | 00cc949c8247f179e9a43892b3799807233184f8 /opcodes | |
| parent | 40ed8c1e47871c33ae2b39c789a38ce8db41cf80 (diff) | |
| download | gdb-093945b35e5881edb6060ba59d1ccab417056548.tar.gz | |
VMOVNTDQA was both misplaced and improperly tagged as being an AVX
instruction (instead of AVX2).
2012-07-31 Jan Beulich <jbeulich@suse.com>
* i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
instruction group. Mark as requiring AVX2.
* i386-tbl.h: Re-generate.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 6 | ||||
| -rw-r--r-- | opcodes/i386-opc.tbl | 2 | ||||
| -rw-r--r-- | opcodes/i386-tbl.h | 2 |
3 files changed, 8 insertions, 2 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index ef8f37e8996..a1bd955ef77 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,9 @@ +2012-07-31 Jan Beulich <jbeulich@suse.com> + + * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2 + instruction group. Mark as requiring AVX2. + * i386-tbl.h: Re-generate. + 2012-07-30 Nick Clifton <nickc@redhat.com> * po/opcodes.pot: Updated template. diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index c21ced50953..faff2437cc7 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -2386,6 +2386,7 @@ vzeroupper, 0, 0x77, None, 1, CpuAVX, Vex|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf| // 256bit integer AVX2 instructions. +vmovntdqa, 2, 0x662a, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegYMM } vmpsadbw, 4, 0x6642, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=2|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } vpabsb, 2, 0x661c, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM } vpabsd, 2, 0x661e, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM } @@ -2508,7 +2509,6 @@ vbroadcasti128, 2, 0x665A, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexW=1|Igno vbroadcastsd, 2, 0x6619, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, RegYMM } vbroadcastss, 2, 0x6618, None, 1, CpuAVX2, Modrm|Vex|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, RegXMM } vbroadcastss, 2, 0x6618, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, RegYMM } -vmovntdqa, 2, 0x662a, None, 1, CpuAVX, Modrm|Vex=2|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegYMM } vpblendd, 4, 0x6602, None, 1, CpuAVX2, Modrm|Vex|VexOpcode=2|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM, RegXMM } vpblendd, 4, 0x6602, None, 1, CpuAVX2, Modrm|Vex=2|VexOpcode=2|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } vpbroadcastb, 2, 0x6678, None, 1, CpuAVX2, Modrm|Vex=1|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Byte|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h index 69588f1c3a6..faca6bbe462 100644 --- a/opcodes/i386-tbl.h +++ b/opcodes/i386-tbl.h @@ -25560,7 +25560,7 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0 } } } }, { "vmovntdqa", 2, 0x662a, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, |