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author | Daniel Berlin <dberlin@dberlin.org> | 2001-07-06 19:17:05 +0000 |
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committer | Daniel Berlin <dberlin@dberlin.org> | 2001-07-06 19:17:05 +0000 |
commit | efae50153d4577bd05fc34b76c47bdca79982233 (patch) | |
tree | ebfdde719009a58b2f719cb06926eb6aab787aba /sim/arm/tconfig.in | |
parent | d30f071864b3938dd9d197547c65b33980a243f8 (diff) | |
download | gdb-cvs/dberlin-typesystem-branch.tar.gz |
Typesystem work initial import.dberlin-typesystem-branchcvs/dberlin-typesystem-branch
Note that this currently isn't building, i'm in the middle of converting make_function_type/lookup_function_type
Diffstat (limited to 'sim/arm/tconfig.in')
-rw-r--r-- | sim/arm/tconfig.in | 17 |
1 files changed, 0 insertions, 17 deletions
diff --git a/sim/arm/tconfig.in b/sim/arm/tconfig.in deleted file mode 100644 index 04f702d5a4e..00000000000 --- a/sim/arm/tconfig.in +++ /dev/null @@ -1,17 +0,0 @@ -/* ARM target configuration file. */ - -/* Define this if the simulator supports profiling. - See the mips simulator for an example. - This enables the `-p foo' and `-s bar' options. - The target is required to provide sim_set_profile{,_size}. */ -/* #define SIM_HAVE_PROFILE */ - -/* Define this if the simulator uses an instruction cache. - See the h8/300 simulator for an example. - This enables the `-c size' option to set the size of the cache. - The target is required to provide sim_set_simcache_size. */ -/* #define SIM_HAVE_SIMCACHE */ - -/* Define this if the target cpu is bi-endian - and the simulator supports it. */ -#define SIM_HAVE_BIENDIAN |