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| author | Nick Clifton <nickc@redhat.com> | 2002-05-21 20:28:26 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2002-05-21 20:28:26 +0000 |
| commit | 3cef8414172b42cef4c8ac1d0c738ad0651c6399 (patch) | |
| tree | dcdbf28851797eef32fc763f7c0b4fec0f6bb69d /sim/arm | |
| parent | 87bcc520989beec4df6125475c5c3ae6c7c85bf4 (diff) | |
| download | gdb-3cef8414172b42cef4c8ac1d0c738ad0651c6399.tar.gz | |
Simulate XScale BCUMOD register
Diffstat (limited to 'sim/arm')
| -rw-r--r-- | sim/arm/ChangeLog | 6 | ||||
| -rw-r--r-- | sim/arm/armcopro.c | 12 |
2 files changed, 15 insertions, 3 deletions
diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog index f0639fe3c53..b6d8266289b 100644 --- a/sim/arm/ChangeLog +++ b/sim/arm/ChangeLog @@ -1,3 +1,9 @@ +2002-05-21 Nick Clifton <nickc@cambridge.redhat.com> + + * armcopro.c (check_cp13_access): Allow access to register 1 when + CRm is 1. + (write_cp13_reg): Allow bit 0 of reg 1 of CRm 1 to be written to. + 2002-05-20 Nick Clifton <nickc@cambridge.redhat.com> * Makefile.in (SWI_TARGET_SWITCHES): Define. diff --git a/sim/arm/armcopro.c b/sim/arm/armcopro.c index 75c6bfca62b..da409f06724 100644 --- a/sim/arm/armcopro.c +++ b/sim/arm/armcopro.c @@ -587,7 +587,7 @@ check_cp13_access (ARMul_State * state, unsigned opcode_1, unsigned opcode_2) { - /* Do not allow access to these register in USER mode. */ + /* Do not allow access to these registers in USER mode. */ if (state->Mode == USER26MODE || state->Mode == USER32MODE) return ARMul_CANT; @@ -601,7 +601,7 @@ check_cp13_access (ARMul_State * state, return ARMul_CANT; /* Registers 0, 4 and 8 are defined when CRm == 0. - Registers 0, 4, 5, 6, 7, 8 are defined when CRm == 1. + Registers 0, 1, 4, 5, 6, 7, 8 are defined when CRm == 1. For all other CRm values undefined behaviour results. */ if (CRm == 0) { @@ -610,7 +610,7 @@ check_cp13_access (ARMul_State * state, } else if (CRm == 1) { - if (reg == 0 || (reg >= 4 && reg <= 8)) + if (reg == 0 || reg == 1 || (reg >= 4 && reg <= 8)) return ARMul_DONE; } @@ -659,6 +659,12 @@ write_cp13_reg (unsigned reg, unsigned CRm, ARMword value) value |= XScale_cp13_CR1_Regs[0] & (1UL << 31); break; + case 1: /* BCUMOD */ + /* Only bit 0 is accecssible. */ + value &= 1; + value |= XScale_cp13_CR1_Regs[1] & ~ 1; + break; + case 4: /* ELOG0 */ case 5: /* ELOG1 */ case 6: /* ECAR0 */ |