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authorStan Shebs <shebs@apple.com>1999-09-09 00:02:17 +0000
committerStan Shebs <shebs@apple.com>1999-09-09 00:02:17 +0000
commit754acf44966696ce7bce75ec6d374dbd443970be (patch)
treea4806dbe8f3980165a4f389fcb2a7617aecb9bfa /sim/d10v/simops.c
parent88d27de31e77c81b718eb8d9aeb16b20814796d3 (diff)
downloadgdb-754acf44966696ce7bce75ec6d374dbd443970be.tar.gz
import gdb-1999-09-08 snapshot
Diffstat (limited to 'sim/d10v/simops.c')
-rw-r--r--sim/d10v/simops.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/sim/d10v/simops.c b/sim/d10v/simops.c
index 0614c9feda3..54cc6fe4112 100644
--- a/sim/d10v/simops.c
+++ b/sim/d10v/simops.c
@@ -1333,7 +1333,7 @@ OP_6601 ()
trace_input ("ld2w", OP_REG_OUTPUT, OP_POSTDEC, OP_VOID);
tmp = RLW (addr);
SET_GPR32 (OP[0], tmp);
- if (OP[0] != OP[1])
+ if (OP[0] != OP[1] && ((OP[0] + 1) != OP[1]))
INC_ADDR (OP[1], -4);
trace_output_32 (tmp);
}
@@ -1347,7 +1347,7 @@ OP_6201 ()
trace_input ("ld2w", OP_REG_OUTPUT, OP_POSTINC, OP_VOID);
tmp = RLW (addr);
SET_GPR32 (OP[0], tmp);
- if (OP[0] != OP[1])
+ if (OP[0] != OP[1] && ((OP[0] + 1) != OP[1]))
INC_ADDR (OP[1], 4);
trace_output_32 (tmp);
}