2003-06-06 Andrew Cagney <cagney@redhat.com>

	* frame.h (put_frame_register): Declare.
	* frame.c (put_frame_register): New function.

	* arch-utils.c: Include "gdbcore.h".
	(legacy_convert_register_p): Add "type" parameter.
	(legacy_register_to_value): Rewrite, use "frame" to get the
	register value.
	(legacy_value_to_register): Rewrite, use "frame" to find the
	register's location before storing.
	* arch-utils.h (legacy_convert_register_p): Update.
	(legacy_register_to_value, legacy_value_to_register): Update.

	* Makefile.in (arch-utils.o): Update dependencies.

	* findvar.c (value_from_register): Rewrite, eliminate use of
	REGISTER_CONVERT_TO_TYPE, pass "type" to CONVERT_REGISTER_P, pass
	"frame" to REGISTER_TO_VALUE.

	* gdbarch.sh (CONVERT_REGISTER_P): Add "type" parameter.
	(REGISTER_TO_VALUE, VALUE_TO_REGISTER): Replace "type", "from" and
	"to" parameters with "frame" and "value".
	* gdbarch.h, gdbarch.c: Re-generate.

	* mips-tdep.c (mips_convert_register_p): New function.
	(mips_value_to_register): Replace mips_register_convert_from_type.
	(mips_register_to_value): Replace mips_register_convert_to_type.
	(mips_gdbarch_init): Set conver_register_p, value_to_register and
	register_to_value.

	* valops.c (value_assign): Move the CONVERT_REGISTER code to the
	lval_reg_frame_relative + lval_register branch of the switch.  Do
	not use REGISTER_CONVERT_FROM_TYPE.  Use put_frame_register.

1 files changed, 0 insertions, 45 deletions

diff --git a/sim/sh64/tconfig.in b/sim/sh64/tconfig.in
deleted file mode 100644
index bab3f1ce7ed..00000000000
--- a/sim/sh64/tconfig.in
+++ /dev/null
@@ -1,45 +0,0 @@
-/* SH64 target configuration file.  -*- C -*- */
-
-/* Define this if the simulator can vary the size of memory.
-   See the xxx simulator for an example.
-   This enables the `-m size' option.
-   The memory size is stored in STATE_MEM_SIZE.  */
-/* Not used for SH64 since we use the memory module. TODO -- check this  */
-/* #define SIM_HAVE_MEM_SIZE */
-
-/* See sim-hload.c.  We properly handle LMA. -- TODO: check this */
-#define SIM_HANDLES_LMA 1
-
-/* For MSPR support.  FIXME: revisit.  */
-#define WITH_DEVICES 0
-
-/* FIXME: Revisit.  */
-#ifdef HAVE_DV_SOCKSER
-MODULE_INSTALL_FN dv_sockser_install;
-#define MODULE_LIST dv_sockser_install,
-#endif
-
-#if 0
-/* Enable watchpoints.  */
-#define WITH_WATCHPOINTS 1
-#endif
-
-/* ??? Temporary hack until model support unified.  */
-#define SIM_HAVE_MODEL
-
-/* Define this to enable the intrinsic breakpoint mechanism. */
-/* FIXME: may be able to remove SIM_HAVE_BREAKPOINTS since it essentially
-   duplicates ifdef SIM_BREAKPOINT (right?) */
-#if 1
-#define SIM_HAVE_BREAKPOINTS
-#define SIM_BREAKPOINT { 0, 0, 0, 0xD }
-#define SIM_BREAKPOINT_SIZE 4
-#endif
-
-/* This is a global setting.  Different cpu families can't mix-n-match -scache
-   and -pbb.  However some cpu families may use -simple while others use
-   one of -scache/-pbb. ???? */
-#define WITH_SCACHE_PBB 1
-
-/* Define this if the target cpu is bi-endian and the simulator supports it.  */
-#define SIM_HAVE_BIENDIAN